Merge git://git.kernel.org/pub/scm/linux/kernel/git/pablo/nf
[deliverable/linux.git] / drivers / pinctrl / freescale / pinctrl-imx.h
1 /*
2 * IMX pinmux core definitions
3 *
4 * Copyright (C) 2012 Freescale Semiconductor, Inc.
5 * Copyright (C) 2012 Linaro Ltd.
6 *
7 * Author: Dong Aisheng <dong.aisheng@linaro.org>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 */
14
15 #ifndef __DRIVERS_PINCTRL_IMX_H
16 #define __DRIVERS_PINCTRL_IMX_H
17
18 struct platform_device;
19
20 /**
21 * struct imx_pin_group - describes a single i.MX pin
22 * @pin: the pin_id of this pin
23 * @mux_mode: the mux mode for this pin.
24 * @input_reg: the select input register offset for this pin if any
25 * 0 if no select input setting needed.
26 * @input_val: the select input value for this pin.
27 * @configs: the config for this pin.
28 */
29 struct imx_pin {
30 unsigned int pin;
31 unsigned int mux_mode;
32 u16 input_reg;
33 unsigned int input_val;
34 unsigned long config;
35 };
36
37 /**
38 * struct imx_pin_group - describes an IMX pin group
39 * @name: the name of this specific pin group
40 * @npins: the number of pins in this group array, i.e. the number of
41 * elements in .pins so we can iterate over that array
42 * @pin_ids: array of pin_ids. pinctrl forces us to maintain such an array
43 * @pins: array of pins
44 */
45 struct imx_pin_group {
46 const char *name;
47 unsigned npins;
48 unsigned int *pin_ids;
49 struct imx_pin *pins;
50 };
51
52 /**
53 * struct imx_pmx_func - describes IMX pinmux functions
54 * @name: the name of this specific function
55 * @groups: corresponding pin groups
56 * @num_groups: the number of groups
57 */
58 struct imx_pmx_func {
59 const char *name;
60 const char **groups;
61 unsigned num_groups;
62 };
63
64 /**
65 * struct imx_pin_reg - describe a pin reg map
66 * @mux_reg: mux register offset
67 * @conf_reg: config register offset
68 */
69 struct imx_pin_reg {
70 s16 mux_reg;
71 s16 conf_reg;
72 };
73
74 struct imx_pinctrl_soc_info {
75 struct device *dev;
76 const struct pinctrl_pin_desc *pins;
77 unsigned int npins;
78 struct imx_pin_reg *pin_regs;
79 struct imx_pin_group *groups;
80 unsigned int ngroups;
81 unsigned int group_index;
82 struct imx_pmx_func *functions;
83 unsigned int nfunctions;
84 unsigned int flags;
85 const char *gpr_compatible;
86 };
87
88 #define SHARE_MUX_CONF_REG 0x1
89 #define ZERO_OFFSET_VALID 0x2
90
91 #define NO_MUX 0x0
92 #define NO_PAD 0x0
93
94 #define IMX_PINCTRL_PIN(pin) PINCTRL_PIN(pin, #pin)
95
96 #define PAD_CTL_MASK(len) ((1 << len) - 1)
97 #define IMX_MUX_MASK 0x7
98 #define IOMUXC_CONFIG_SION (0x1 << 4)
99
100 int imx_pinctrl_probe(struct platform_device *pdev,
101 struct imx_pinctrl_soc_info *info);
102 #endif /* __DRIVERS_PINCTRL_IMX_H */
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