drivers/pinctrl/qcom/pinctrl-spmi-mpp.c

   1 /*
   2  * Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 and
   6  * only version 2 as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope that it will be useful,
   9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11  * GNU General Public License for more details.
  12  */
  13
  14 #include <linux/gpio.h>
  15 #include <linux/module.h>
  16 #include <linux/of.h>
  17 #include <linux/of_irq.h>
  18 #include <linux/pinctrl/pinconf-generic.h>
  19 #include <linux/pinctrl/pinconf.h>
  20 #include <linux/pinctrl/pinmux.h>
  21 #include <linux/platform_device.h>
  22 #include <linux/regmap.h>
  23 #include <linux/slab.h>
  24 #include <linux/types.h>
  25
  26 #include <dt-bindings/pinctrl/qcom,pmic-mpp.h>
  27
  28 #include "../core.h"
  29 #include "../pinctrl-utils.h"
  30
  31 #define PMIC_MPP_ADDRESS_RANGE                  0x100
  32
  33 /*
  34  * Pull Up Values - it indicates whether a pull-up should be
  35  * applied for bidirectional mode only. The hardware ignores the
  36  * configuration when operating in other modes.
  37  */
  38 #define PMIC_MPP_PULL_UP_0P6KOHM                0
  39 #define PMIC_MPP_PULL_UP_10KOHM                 1
  40 #define PMIC_MPP_PULL_UP_30KOHM                 2
  41 #define PMIC_MPP_PULL_UP_OPEN                   3
  42
  43 /* type registers base address bases */
  44 #define PMIC_MPP_REG_TYPE                       0x4
  45 #define PMIC_MPP_REG_SUBTYPE                    0x5
  46
  47 /* mpp peripheral type and subtype values */
  48 #define PMIC_MPP_TYPE                           0x11
  49 #define PMIC_MPP_SUBTYPE_4CH_NO_ANA_OUT         0x3
  50 #define PMIC_MPP_SUBTYPE_ULT_4CH_NO_ANA_OUT     0x4
  51 #define PMIC_MPP_SUBTYPE_4CH_NO_SINK            0x5
  52 #define PMIC_MPP_SUBTYPE_ULT_4CH_NO_SINK        0x6
  53 #define PMIC_MPP_SUBTYPE_4CH_FULL_FUNC          0x7
  54 #define PMIC_MPP_SUBTYPE_8CH_FULL_FUNC          0xf
  55
  56 #define PMIC_MPP_REG_RT_STS                     0x10
  57 #define PMIC_MPP_REG_RT_STS_VAL_MASK            0x1
  58
  59 /* control register base address bases */
  60 #define PMIC_MPP_REG_MODE_CTL                   0x40
  61 #define PMIC_MPP_REG_DIG_VIN_CTL                0x41
  62 #define PMIC_MPP_REG_DIG_PULL_CTL               0x42
  63 #define PMIC_MPP_REG_DIG_IN_CTL                 0x43
  64 #define PMIC_MPP_REG_EN_CTL                     0x46
  65 #define PMIC_MPP_REG_AOUT_CTL                   0x48
  66 #define PMIC_MPP_REG_AIN_CTL                    0x4a
  67 #define PMIC_MPP_REG_SINK_CTL                   0x4c
  68
  69 /* PMIC_MPP_REG_MODE_CTL */
  70 #define PMIC_MPP_REG_MODE_VALUE_MASK            0x1
  71 #define PMIC_MPP_REG_MODE_FUNCTION_SHIFT        1
  72 #define PMIC_MPP_REG_MODE_FUNCTION_MASK         0x7
  73 #define PMIC_MPP_REG_MODE_DIR_SHIFT             4
  74 #define PMIC_MPP_REG_MODE_DIR_MASK              0x7
  75
  76 /* PMIC_MPP_REG_DIG_VIN_CTL */
  77 #define PMIC_MPP_REG_VIN_SHIFT                  0
  78 #define PMIC_MPP_REG_VIN_MASK                   0x7
  79
  80 /* PMIC_MPP_REG_DIG_PULL_CTL */
  81 #define PMIC_MPP_REG_PULL_SHIFT                 0
  82 #define PMIC_MPP_REG_PULL_MASK                  0x7
  83
  84 /* PMIC_MPP_REG_EN_CTL */
  85 #define PMIC_MPP_REG_MASTER_EN_SHIFT            7
  86
  87 /* PMIC_MPP_REG_AIN_CTL */
  88 #define PMIC_MPP_REG_AIN_ROUTE_SHIFT            0
  89 #define PMIC_MPP_REG_AIN_ROUTE_MASK             0x7
  90
  91 #define PMIC_MPP_MODE_DIGITAL_INPUT             0
  92 #define PMIC_MPP_MODE_DIGITAL_OUTPUT            1
  93 #define PMIC_MPP_MODE_DIGITAL_BIDIR             2
  94 #define PMIC_MPP_MODE_ANALOG_BIDIR              3
  95 #define PMIC_MPP_MODE_ANALOG_INPUT              4
  96 #define PMIC_MPP_MODE_ANALOG_OUTPUT             5
  97 #define PMIC_MPP_MODE_CURRENT_SINK              6
  98
  99 #define PMIC_MPP_SELECTOR_NORMAL                0
 100 #define PMIC_MPP_SELECTOR_PAIRED                1
 101 #define PMIC_MPP_SELECTOR_DTEST_FIRST           4
 102
 103 #define PMIC_MPP_PHYSICAL_OFFSET                1
 104
 105 /* Qualcomm specific pin configurations */
 106 #define PMIC_MPP_CONF_AMUX_ROUTE                (PIN_CONFIG_END + 1)
 107 #define PMIC_MPP_CONF_ANALOG_LEVEL              (PIN_CONFIG_END + 2)
 108 #define PMIC_MPP_CONF_DTEST_SELECTOR            (PIN_CONFIG_END + 3)
 109 #define PMIC_MPP_CONF_PAIRED                    (PIN_CONFIG_END + 4)
 110
 111 /**
 112  * struct pmic_mpp_pad - keep current MPP settings
 113  * @base: Address base in SPMI device.
 114  * @irq: IRQ number which this MPP generate.
 115  * @is_enabled: Set to false when MPP should be put in high Z state.
 116  * @out_value: Cached pin output value.
 117  * @output_enabled: Set to true if MPP output logic is enabled.
 118  * @input_enabled: Set to true if MPP input buffer logic is enabled.
 119  * @paired: Pin operates in paired mode
 120  * @num_sources: Number of power-sources supported by this MPP.
 121  * @power_source: Current power-source used.
 122  * @amux_input: Set the source for analog input.
 123  * @aout_level: Analog output level
 124  * @pullup: Pullup resistor value. Valid in Bidirectional mode only.
 125  * @function: See pmic_mpp_functions[].
 126  * @drive_strength: Amount of current in sink mode
 127  * @dtest: DTEST route selector
 128  */
 129 struct pmic_mpp_pad {
 130         u16             base;
 131         int             irq;
 132         bool            is_enabled;
 133         bool            out_value;
 134         bool            output_enabled;
 135         bool            input_enabled;
 136         bool            paired;
 137         unsigned int    num_sources;
 138         unsigned int    power_source;
 139         unsigned int    amux_input;
 140         unsigned int    aout_level;
 141         unsigned int    pullup;
 142         unsigned int    function;
 143         unsigned int    drive_strength;
 144         unsigned int    dtest;
 145 };
 146
 147 struct pmic_mpp_state {
 148         struct device   *dev;
 149         struct regmap   *map;
 150         struct pinctrl_dev *ctrl;
 151         struct gpio_chip chip;
 152 };
 153
 154 static const struct pinconf_generic_params pmic_mpp_bindings[] = {
 155         {"qcom,amux-route",     PMIC_MPP_CONF_AMUX_ROUTE,       0},
 156         {"qcom,analog-level",   PMIC_MPP_CONF_ANALOG_LEVEL,     0},
 157         {"qcom,dtest",          PMIC_MPP_CONF_DTEST_SELECTOR,   0},
 158         {"qcom,paired",         PMIC_MPP_CONF_PAIRED,           0},
 159 };
 160
 161 #ifdef CONFIG_DEBUG_FS
 162 static const struct pin_config_item pmic_conf_items[] = {
 163         PCONFDUMP(PMIC_MPP_CONF_AMUX_ROUTE, "analog mux", NULL, true),
 164         PCONFDUMP(PMIC_MPP_CONF_ANALOG_LEVEL, "analog level", NULL, true),
 165         PCONFDUMP(PMIC_MPP_CONF_DTEST_SELECTOR, "dtest", NULL, true),
 166         PCONFDUMP(PMIC_MPP_CONF_PAIRED, "paired", NULL, false),
 167 };
 168 #endif
 169
 170 static const char *const pmic_mpp_groups[] = {
 171         "mpp1", "mpp2", "mpp3", "mpp4", "mpp5", "mpp6", "mpp7", "mpp8",
 172 };
 173
 174 #define PMIC_MPP_DIGITAL        0
 175 #define PMIC_MPP_ANALOG         1
 176 #define PMIC_MPP_SINK           2
 177
 178 static const char *const pmic_mpp_functions[] = {
 179         "digital", "analog", "sink"
 180 };
 181
 182 static inline struct pmic_mpp_state *to_mpp_state(struct gpio_chip *chip)
 183 {
 184         return container_of(chip, struct pmic_mpp_state, chip);
 185 };
 186
 187 static int pmic_mpp_read(struct pmic_mpp_state *state,
 188                          struct pmic_mpp_pad *pad, unsigned int addr)
 189 {
 190         unsigned int val;
 191         int ret;
 192
 193         ret = regmap_read(state->map, pad->base + addr, &val);
 194         if (ret < 0)
 195                 dev_err(state->dev, "read 0x%x failed\n", addr);
 196         else
 197                 ret = val;
 198
 199         return ret;
 200 }
 201
 202 static int pmic_mpp_write(struct pmic_mpp_state *state,
 203                           struct pmic_mpp_pad *pad, unsigned int addr,
 204                           unsigned int val)
 205 {
 206         int ret;
 207
 208         ret = regmap_write(state->map, pad->base + addr, val);
 209         if (ret < 0)
 210                 dev_err(state->dev, "write 0x%x failed\n", addr);
 211
 212         return ret;
 213 }
 214
 215 static int pmic_mpp_get_groups_count(struct pinctrl_dev *pctldev)
 216 {
 217         /* Every PIN is a group */
 218         return pctldev->desc->npins;
 219 }
 220
 221 static const char *pmic_mpp_get_group_name(struct pinctrl_dev *pctldev,
 222                                            unsigned pin)
 223 {
 224         return pctldev->desc->pins[pin].name;
 225 }
 226
 227 static int pmic_mpp_get_group_pins(struct pinctrl_dev *pctldev,
 228                                    unsigned pin,
 229                                    const unsigned **pins, unsigned *num_pins)
 230 {
 231         *pins = &pctldev->desc->pins[pin].number;
 232         *num_pins = 1;
 233         return 0;
 234 }
 235
 236 static const struct pinctrl_ops pmic_mpp_pinctrl_ops = {
 237         .get_groups_count       = pmic_mpp_get_groups_count,
 238         .get_group_name         = pmic_mpp_get_group_name,
 239         .get_group_pins         = pmic_mpp_get_group_pins,
 240         .dt_node_to_map         = pinconf_generic_dt_node_to_map_group,
 241         .dt_free_map            = pinctrl_utils_dt_free_map,
 242 };
 243
 244 static int pmic_mpp_get_functions_count(struct pinctrl_dev *pctldev)
 245 {
 246         return ARRAY_SIZE(pmic_mpp_functions);
 247 }
 248
 249 static const char *pmic_mpp_get_function_name(struct pinctrl_dev *pctldev,
 250                                               unsigned function)
 251 {
 252         return pmic_mpp_functions[function];
 253 }
 254
 255 static int pmic_mpp_get_function_groups(struct pinctrl_dev *pctldev,
 256                                         unsigned function,
 257                                         const char *const **groups,
 258                                         unsigned *const num_qgroups)
 259 {
 260         *groups = pmic_mpp_groups;
 261         *num_qgroups = pctldev->desc->npins;
 262         return 0;
 263 }
 264
 265 static int pmic_mpp_write_mode_ctl(struct pmic_mpp_state *state,
 266                                    struct pmic_mpp_pad *pad)
 267 {
 268         unsigned int mode;
 269         unsigned int sel;
 270         unsigned int val;
 271         unsigned int en;
 272
 273         switch (pad->function) {
 274         case PMIC_MPP_ANALOG:
 275                 if (pad->input_enabled && pad->output_enabled)
 276                         mode = PMIC_MPP_MODE_ANALOG_BIDIR;
 277                 else if (pad->input_enabled)
 278                         mode = PMIC_MPP_MODE_ANALOG_INPUT;
 279                 else
 280                         mode = PMIC_MPP_MODE_ANALOG_OUTPUT;
 281                 break;
 282         case PMIC_MPP_DIGITAL:
 283                 if (pad->input_enabled && pad->output_enabled)
 284                         mode = PMIC_MPP_MODE_DIGITAL_BIDIR;
 285                 else if (pad->input_enabled)
 286                         mode = PMIC_MPP_MODE_DIGITAL_INPUT;
 287                 else
 288                         mode = PMIC_MPP_MODE_DIGITAL_OUTPUT;
 289                 break;
 290         case PMIC_MPP_SINK:
 291         default:
 292                 mode = PMIC_MPP_MODE_CURRENT_SINK;
 293                 break;
 294         }
 295
 296         if (pad->dtest)
 297                 sel = PMIC_MPP_SELECTOR_DTEST_FIRST + pad->dtest - 1;
 298         else if (pad->paired)
 299                 sel = PMIC_MPP_SELECTOR_PAIRED;
 300         else
 301                 sel = PMIC_MPP_SELECTOR_NORMAL;
 302
 303         en = !!pad->out_value;
 304
 305         val = mode << PMIC_MPP_REG_MODE_DIR_SHIFT |
 306               sel << PMIC_MPP_REG_MODE_FUNCTION_SHIFT |
 307               en;
 308
 309         return pmic_mpp_write(state, pad, PMIC_MPP_REG_MODE_CTL, val);
 310 }
 311
 312 static int pmic_mpp_set_mux(struct pinctrl_dev *pctldev, unsigned function,
 313                                 unsigned pin)
 314 {
 315         struct pmic_mpp_state *state = pinctrl_dev_get_drvdata(pctldev);
 316         struct pmic_mpp_pad *pad;
 317         unsigned int val;
 318         int ret;
 319
 320         pad = pctldev->desc->pins[pin].drv_data;
 321
 322         pad->function = function;
 323
 324         ret = pmic_mpp_write_mode_ctl(state, pad);
 325
 326         val = pad->is_enabled << PMIC_MPP_REG_MASTER_EN_SHIFT;
 327
 328         return pmic_mpp_write(state, pad, PMIC_MPP_REG_EN_CTL, val);
 329 }
 330
 331 static const struct pinmux_ops pmic_mpp_pinmux_ops = {
 332         .get_functions_count    = pmic_mpp_get_functions_count,
 333         .get_function_name      = pmic_mpp_get_function_name,
 334         .get_function_groups    = pmic_mpp_get_function_groups,
 335         .set_mux                = pmic_mpp_set_mux,
 336 };
 337
 338 static int pmic_mpp_config_get(struct pinctrl_dev *pctldev,
 339                                unsigned int pin, unsigned long *config)
 340 {
 341         unsigned param = pinconf_to_config_param(*config);
 342         struct pmic_mpp_pad *pad;
 343         unsigned arg = 0;
 344
 345         pad = pctldev->desc->pins[pin].drv_data;
 346
 347         switch (param) {
 348         case PIN_CONFIG_BIAS_DISABLE:
 349                 arg = pad->pullup == PMIC_MPP_PULL_UP_OPEN;
 350                 break;
 351         case PIN_CONFIG_BIAS_PULL_UP:
 352                 switch (pad->pullup) {
 353                 case PMIC_MPP_PULL_UP_OPEN:
 354                         arg = 0;
 355                         break;
 356                 case PMIC_MPP_PULL_UP_0P6KOHM:
 357                         arg = 600;
 358                         break;
 359                 case PMIC_MPP_PULL_UP_10KOHM:
 360                         arg = 10000;
 361                         break;
 362                 case PMIC_MPP_PULL_UP_30KOHM:
 363                         arg = 30000;
 364                         break;
 365                 default:
 366                         return -EINVAL;
 367                 }
 368                 break;
 369         case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
 370                 arg = !pad->is_enabled;
 371                 break;
 372         case PIN_CONFIG_POWER_SOURCE:
 373                 arg = pad->power_source;
 374                 break;
 375         case PIN_CONFIG_INPUT_ENABLE:
 376                 arg = pad->input_enabled;
 377                 break;
 378         case PIN_CONFIG_OUTPUT:
 379                 arg = pad->out_value;
 380                 break;
 381         case PMIC_MPP_CONF_DTEST_SELECTOR:
 382                 arg = pad->dtest;
 383                 break;
 384         case PMIC_MPP_CONF_AMUX_ROUTE:
 385                 arg = pad->amux_input;
 386                 break;
 387         case PMIC_MPP_CONF_PAIRED:
 388                 arg = pad->paired;
 389                 break;
 390         case PIN_CONFIG_DRIVE_STRENGTH:
 391                 arg = pad->drive_strength;
 392                 break;
 393         case PMIC_MPP_CONF_ANALOG_LEVEL:
 394                 arg = pad->aout_level;
 395                 break;
 396         default:
 397                 return -EINVAL;
 398         }
 399
 400         /* Convert register value to pinconf value */
 401         *config = pinconf_to_config_packed(param, arg);
 402         return 0;
 403 }
 404
 405 static int pmic_mpp_config_set(struct pinctrl_dev *pctldev, unsigned int pin,
 406                                unsigned long *configs, unsigned nconfs)
 407 {
 408         struct pmic_mpp_state *state = pinctrl_dev_get_drvdata(pctldev);
 409         struct pmic_mpp_pad *pad;
 410         unsigned param, arg;
 411         unsigned int val;
 412         int i, ret;
 413
 414         pad = pctldev->desc->pins[pin].drv_data;
 415
 416         /* Make it possible to enable the pin, by not setting high impedance */
 417         pad->is_enabled = true;
 418
 419         for (i = 0; i < nconfs; i++) {
 420                 param = pinconf_to_config_param(configs[i]);
 421                 arg = pinconf_to_config_argument(configs[i]);
 422
 423                 switch (param) {
 424                 case PIN_CONFIG_BIAS_DISABLE:
 425                         pad->pullup = PMIC_MPP_PULL_UP_OPEN;
 426                         break;
 427                 case PIN_CONFIG_BIAS_PULL_UP:
 428                         switch (arg) {
 429                         case 600:
 430                                 pad->pullup = PMIC_MPP_PULL_UP_0P6KOHM;
 431                                 break;
 432                         case 10000:
 433                                 pad->pullup = PMIC_MPP_PULL_UP_10KOHM;
 434                                 break;
 435                         case 30000:
 436                                 pad->pullup = PMIC_MPP_PULL_UP_30KOHM;
 437                                 break;
 438                         default:
 439                                 return -EINVAL;
 440                         }
 441                         break;
 442                 case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
 443                         pad->is_enabled = false;
 444                         break;
 445                 case PIN_CONFIG_POWER_SOURCE:
 446                         if (arg >= pad->num_sources)
 447                                 return -EINVAL;
 448                         pad->power_source = arg;
 449                         break;
 450                 case PIN_CONFIG_INPUT_ENABLE:
 451                         pad->input_enabled = arg ? true : false;
 452                         break;
 453                 case PIN_CONFIG_OUTPUT:
 454                         pad->output_enabled = true;
 455                         pad->out_value = arg;
 456                         break;
 457                 case PMIC_MPP_CONF_DTEST_SELECTOR:
 458                         pad->dtest = arg;
 459                         break;
 460                 case PIN_CONFIG_DRIVE_STRENGTH:
 461                         arg = pad->drive_strength;
 462                         break;
 463                 case PMIC_MPP_CONF_AMUX_ROUTE:
 464                         if (arg >= PMIC_MPP_AMUX_ROUTE_ABUS4)
 465                                 return -EINVAL;
 466                         pad->amux_input = arg;
 467                         break;
 468                 case PMIC_MPP_CONF_ANALOG_LEVEL:
 469                         pad->aout_level = arg;
 470                         break;
 471                 case PMIC_MPP_CONF_PAIRED:
 472                         pad->paired = !!arg;
 473                         break;
 474                 default:
 475                         return -EINVAL;
 476                 }
 477         }
 478
 479         val = pad->power_source << PMIC_MPP_REG_VIN_SHIFT;
 480
 481         ret = pmic_mpp_write(state, pad, PMIC_MPP_REG_DIG_VIN_CTL, val);
 482         if (ret < 0)
 483                 return ret;
 484
 485         val = pad->pullup << PMIC_MPP_REG_PULL_SHIFT;
 486
 487         ret = pmic_mpp_write(state, pad, PMIC_MPP_REG_DIG_PULL_CTL, val);
 488         if (ret < 0)
 489                 return ret;
 490
 491         val = pad->amux_input & PMIC_MPP_REG_AIN_ROUTE_MASK;
 492
 493         ret = pmic_mpp_write(state, pad, PMIC_MPP_REG_AIN_CTL, val);
 494         if (ret < 0)
 495                 return ret;
 496
 497         ret = pmic_mpp_write(state, pad, PMIC_MPP_REG_AOUT_CTL, pad->aout_level);
 498         if (ret < 0)
 499                 return ret;
 500
 501         ret = pmic_mpp_write_mode_ctl(state, pad);
 502         if (ret < 0)
 503                 return ret;
 504
 505         val = pad->is_enabled << PMIC_MPP_REG_MASTER_EN_SHIFT;
 506
 507         return pmic_mpp_write(state, pad, PMIC_MPP_REG_EN_CTL, val);
 508 }
 509
 510 static void pmic_mpp_config_dbg_show(struct pinctrl_dev *pctldev,
 511                                      struct seq_file *s, unsigned pin)
 512 {
 513         struct pmic_mpp_state *state = pinctrl_dev_get_drvdata(pctldev);
 514         struct pmic_mpp_pad *pad;
 515         int ret;
 516
 517         static const char *const biases[] = {
 518                 "0.6kOhm", "10kOhm", "30kOhm", "Disabled"
 519         };
 520
 521         pad = pctldev->desc->pins[pin].drv_data;
 522
 523         seq_printf(s, " mpp%-2d:", pin + PMIC_MPP_PHYSICAL_OFFSET);
 524
 525         if (!pad->is_enabled) {
 526                 seq_puts(s, " ---");
 527         } else {
 528
 529                 if (pad->input_enabled) {
 530                         ret = pmic_mpp_read(state, pad, PMIC_MPP_REG_RT_STS);
 531                         if (ret < 0)
 532                                 return;
 533
 534                         ret &= PMIC_MPP_REG_RT_STS_VAL_MASK;
 535                         pad->out_value = ret;
 536                 }
 537
 538                 seq_printf(s, " %-4s", pad->output_enabled ? "out" : "in");
 539                 seq_printf(s, " %-7s", pmic_mpp_functions[pad->function]);
 540                 seq_printf(s, " vin-%d", pad->power_source);
 541                 seq_printf(s, " %d", pad->aout_level);
 542                 seq_printf(s, " %-8s", biases[pad->pullup]);
 543                 seq_printf(s, " %-4s", pad->out_value ? "high" : "low");
 544                 if (pad->dtest)
 545                         seq_printf(s, " dtest%d", pad->dtest);
 546                 if (pad->paired)
 547                         seq_puts(s, " paired");
 548         }
 549 }
 550
 551 static const struct pinconf_ops pmic_mpp_pinconf_ops = {
 552         .is_generic = true,
 553         .pin_config_group_get           = pmic_mpp_config_get,
 554         .pin_config_group_set           = pmic_mpp_config_set,
 555         .pin_config_group_dbg_show      = pmic_mpp_config_dbg_show,
 556 };
 557
 558 static int pmic_mpp_direction_input(struct gpio_chip *chip, unsigned pin)
 559 {
 560         struct pmic_mpp_state *state = to_mpp_state(chip);
 561         unsigned long config;
 562
 563         config = pinconf_to_config_packed(PIN_CONFIG_INPUT_ENABLE, 1);
 564
 565         return pmic_mpp_config_set(state->ctrl, pin, &config, 1);
 566 }
 567
 568 static int pmic_mpp_direction_output(struct gpio_chip *chip,
 569                                      unsigned pin, int val)
 570 {
 571         struct pmic_mpp_state *state = to_mpp_state(chip);
 572         unsigned long config;
 573
 574         config = pinconf_to_config_packed(PIN_CONFIG_OUTPUT, val);
 575
 576         return pmic_mpp_config_set(state->ctrl, pin, &config, 1);
 577 }
 578
 579 static int pmic_mpp_get(struct gpio_chip *chip, unsigned pin)
 580 {
 581         struct pmic_mpp_state *state = to_mpp_state(chip);
 582         struct pmic_mpp_pad *pad;
 583         int ret;
 584
 585         pad = state->ctrl->desc->pins[pin].drv_data;
 586
 587         if (pad->input_enabled) {
 588                 ret = pmic_mpp_read(state, pad, PMIC_MPP_REG_RT_STS);
 589                 if (ret < 0)
 590                         return ret;
 591
 592                 pad->out_value = ret & PMIC_MPP_REG_RT_STS_VAL_MASK;
 593         }
 594
 595         return pad->out_value;
 596 }
 597
 598 static void pmic_mpp_set(struct gpio_chip *chip, unsigned pin, int value)
 599 {
 600         struct pmic_mpp_state *state = to_mpp_state(chip);
 601         unsigned long config;
 602
 603         config = pinconf_to_config_packed(PIN_CONFIG_OUTPUT, value);
 604
 605         pmic_mpp_config_set(state->ctrl, pin, &config, 1);
 606 }
 607
 608 static int pmic_mpp_of_xlate(struct gpio_chip *chip,
 609                              const struct of_phandle_args *gpio_desc,
 610                              u32 *flags)
 611 {
 612         if (chip->of_gpio_n_cells < 2)
 613                 return -EINVAL;
 614
 615         if (flags)
 616                 *flags = gpio_desc->args[1];
 617
 618         return gpio_desc->args[0] - PMIC_MPP_PHYSICAL_OFFSET;
 619 }
 620
 621 static int pmic_mpp_to_irq(struct gpio_chip *chip, unsigned pin)
 622 {
 623         struct pmic_mpp_state *state = to_mpp_state(chip);
 624         struct pmic_mpp_pad *pad;
 625
 626         pad = state->ctrl->desc->pins[pin].drv_data;
 627
 628         return pad->irq;
 629 }
 630
 631 static void pmic_mpp_dbg_show(struct seq_file *s, struct gpio_chip *chip)
 632 {
 633         struct pmic_mpp_state *state = to_mpp_state(chip);
 634         unsigned i;
 635
 636         for (i = 0; i < chip->ngpio; i++) {
 637                 pmic_mpp_config_dbg_show(state->ctrl, s, i);
 638                 seq_puts(s, "\n");
 639         }
 640 }
 641
 642 static const struct gpio_chip pmic_mpp_gpio_template = {
 643         .direction_input        = pmic_mpp_direction_input,
 644         .direction_output       = pmic_mpp_direction_output,
 645         .get                    = pmic_mpp_get,
 646         .set                    = pmic_mpp_set,
 647         .request                = gpiochip_generic_request,
 648         .free                   = gpiochip_generic_free,
 649         .of_xlate               = pmic_mpp_of_xlate,
 650         .to_irq                 = pmic_mpp_to_irq,
 651         .dbg_show               = pmic_mpp_dbg_show,
 652 };
 653
 654 static int pmic_mpp_populate(struct pmic_mpp_state *state,
 655                              struct pmic_mpp_pad *pad)
 656 {
 657         int type, subtype, val, dir;
 658         unsigned int sel;
 659
 660         type = pmic_mpp_read(state, pad, PMIC_MPP_REG_TYPE);
 661         if (type < 0)
 662                 return type;
 663
 664         if (type != PMIC_MPP_TYPE) {
 665                 dev_err(state->dev, "incorrect block type 0x%x at 0x%x\n",
 666                         type, pad->base);
 667                 return -ENODEV;
 668         }
 669
 670         subtype = pmic_mpp_read(state, pad, PMIC_MPP_REG_SUBTYPE);
 671         if (subtype < 0)
 672                 return subtype;
 673
 674         switch (subtype) {
 675         case PMIC_MPP_SUBTYPE_4CH_NO_ANA_OUT:
 676         case PMIC_MPP_SUBTYPE_ULT_4CH_NO_ANA_OUT:
 677         case PMIC_MPP_SUBTYPE_4CH_NO_SINK:
 678         case PMIC_MPP_SUBTYPE_ULT_4CH_NO_SINK:
 679         case PMIC_MPP_SUBTYPE_4CH_FULL_FUNC:
 680                 pad->num_sources = 4;
 681                 break;
 682         case PMIC_MPP_SUBTYPE_8CH_FULL_FUNC:
 683                 pad->num_sources = 8;
 684                 break;
 685         default:
 686                 dev_err(state->dev, "unknown MPP type 0x%x at 0x%x\n",
 687                         subtype, pad->base);
 688                 return -ENODEV;
 689         }
 690
 691         val = pmic_mpp_read(state, pad, PMIC_MPP_REG_MODE_CTL);
 692         if (val < 0)
 693                 return val;
 694
 695         pad->out_value = val & PMIC_MPP_REG_MODE_VALUE_MASK;
 696
 697         dir = val >> PMIC_MPP_REG_MODE_DIR_SHIFT;
 698         dir &= PMIC_MPP_REG_MODE_DIR_MASK;
 699
 700         switch (dir) {
 701         case PMIC_MPP_MODE_DIGITAL_INPUT:
 702                 pad->input_enabled = true;
 703                 pad->output_enabled = false;
 704                 pad->function = PMIC_MPP_DIGITAL;
 705                 break;
 706         case PMIC_MPP_MODE_DIGITAL_OUTPUT:
 707                 pad->input_enabled = false;
 708                 pad->output_enabled = true;
 709                 pad->function = PMIC_MPP_DIGITAL;
 710                 break;
 711         case PMIC_MPP_MODE_DIGITAL_BIDIR:
 712                 pad->input_enabled = true;
 713                 pad->output_enabled = true;
 714                 pad->function = PMIC_MPP_DIGITAL;
 715                 break;
 716         case PMIC_MPP_MODE_ANALOG_BIDIR:
 717                 pad->input_enabled = true;
 718                 pad->output_enabled = true;
 719                 pad->function = PMIC_MPP_ANALOG;
 720                 break;
 721         case PMIC_MPP_MODE_ANALOG_INPUT:
 722                 pad->input_enabled = true;
 723                 pad->output_enabled = false;
 724                 pad->function = PMIC_MPP_ANALOG;
 725                 break;
 726         case PMIC_MPP_MODE_ANALOG_OUTPUT:
 727                 pad->input_enabled = false;
 728                 pad->output_enabled = true;
 729                 pad->function = PMIC_MPP_ANALOG;
 730                 break;
 731         case PMIC_MPP_MODE_CURRENT_SINK:
 732                 pad->input_enabled = false;
 733                 pad->output_enabled = true;
 734                 pad->function = PMIC_MPP_SINK;
 735                 break;
 736         default:
 737                 dev_err(state->dev, "unknown MPP direction\n");
 738                 return -ENODEV;
 739         }
 740
 741         sel = val >> PMIC_MPP_REG_MODE_FUNCTION_SHIFT;
 742         sel &= PMIC_MPP_REG_MODE_FUNCTION_MASK;
 743
 744         if (sel >= PMIC_MPP_SELECTOR_DTEST_FIRST)
 745                 pad->dtest = sel + 1;
 746         else if (sel == PMIC_MPP_SELECTOR_PAIRED)
 747                 pad->paired = true;
 748
 749         val = pmic_mpp_read(state, pad, PMIC_MPP_REG_DIG_VIN_CTL);
 750         if (val < 0)
 751                 return val;
 752
 753         pad->power_source = val >> PMIC_MPP_REG_VIN_SHIFT;
 754         pad->power_source &= PMIC_MPP_REG_VIN_MASK;
 755
 756         val = pmic_mpp_read(state, pad, PMIC_MPP_REG_DIG_PULL_CTL);
 757         if (val < 0)
 758                 return val;
 759
 760         pad->pullup = val >> PMIC_MPP_REG_PULL_SHIFT;
 761         pad->pullup &= PMIC_MPP_REG_PULL_MASK;
 762
 763         val = pmic_mpp_read(state, pad, PMIC_MPP_REG_AIN_CTL);
 764         if (val < 0)
 765                 return val;
 766
 767         pad->amux_input = val >> PMIC_MPP_REG_AIN_ROUTE_SHIFT;
 768         pad->amux_input &= PMIC_MPP_REG_AIN_ROUTE_MASK;
 769
 770         val = pmic_mpp_read(state, pad, PMIC_MPP_REG_SINK_CTL);
 771         if (val < 0)
 772                 return val;
 773
 774         pad->drive_strength = val;
 775
 776         val = pmic_mpp_read(state, pad, PMIC_MPP_REG_AOUT_CTL);
 777         if (val < 0)
 778                 return val;
 779
 780         pad->aout_level = val;
 781
 782         val = pmic_mpp_read(state, pad, PMIC_MPP_REG_EN_CTL);
 783         if (val < 0)
 784                 return val;
 785
 786         pad->is_enabled = !!val;
 787
 788         return 0;
 789 }
 790
 791 static int pmic_mpp_probe(struct platform_device *pdev)
 792 {
 793         struct device *dev = &pdev->dev;
 794         struct pinctrl_pin_desc *pindesc;
 795         struct pinctrl_desc *pctrldesc;
 796         struct pmic_mpp_pad *pad, *pads;
 797         struct pmic_mpp_state *state;
 798         int ret, npins, i;
 799         u32 reg;
 800
 801         ret = of_property_read_u32(dev->of_node, "reg", &reg);
 802         if (ret < 0) {
 803                 dev_err(dev, "missing base address");
 804                 return ret;
 805         }
 806
 807         npins = platform_irq_count(pdev);
 808         if (!npins)
 809                 return -EINVAL;
 810         if (npins < 0)
 811                 return npins;
 812
 813         BUG_ON(npins > ARRAY_SIZE(pmic_mpp_groups));
 814
 815         state = devm_kzalloc(dev, sizeof(*state), GFP_KERNEL);
 816         if (!state)
 817                 return -ENOMEM;
 818
 819         platform_set_drvdata(pdev, state);
 820
 821         state->dev = &pdev->dev;
 822         state->map = dev_get_regmap(dev->parent, NULL);
 823
 824         pindesc = devm_kcalloc(dev, npins, sizeof(*pindesc), GFP_KERNEL);
 825         if (!pindesc)
 826                 return -ENOMEM;
 827
 828         pads = devm_kcalloc(dev, npins, sizeof(*pads), GFP_KERNEL);
 829         if (!pads)
 830                 return -ENOMEM;
 831
 832         pctrldesc = devm_kzalloc(dev, sizeof(*pctrldesc), GFP_KERNEL);
 833         if (!pctrldesc)
 834                 return -ENOMEM;
 835
 836         pctrldesc->pctlops = &pmic_mpp_pinctrl_ops;
 837         pctrldesc->pmxops = &pmic_mpp_pinmux_ops;
 838         pctrldesc->confops = &pmic_mpp_pinconf_ops;
 839         pctrldesc->owner = THIS_MODULE;
 840         pctrldesc->name = dev_name(dev);
 841         pctrldesc->pins = pindesc;
 842         pctrldesc->npins = npins;
 843
 844         pctrldesc->num_custom_params = ARRAY_SIZE(pmic_mpp_bindings);
 845         pctrldesc->custom_params = pmic_mpp_bindings;
 846 #ifdef CONFIG_DEBUG_FS
 847         pctrldesc->custom_conf_items = pmic_conf_items;
 848 #endif
 849
 850         for (i = 0; i < npins; i++, pindesc++) {
 851                 pad = &pads[i];
 852                 pindesc->drv_data = pad;
 853                 pindesc->number = i;
 854                 pindesc->name = pmic_mpp_groups[i];
 855
 856                 pad->irq = platform_get_irq(pdev, i);
 857                 if (pad->irq < 0)
 858                         return pad->irq;
 859
 860                 pad->base = reg + i * PMIC_MPP_ADDRESS_RANGE;
 861
 862                 ret = pmic_mpp_populate(state, pad);
 863                 if (ret < 0)
 864                         return ret;
 865         }
 866
 867         state->chip = pmic_mpp_gpio_template;
 868         state->chip.dev = dev;
 869         state->chip.base = -1;
 870         state->chip.ngpio = npins;
 871         state->chip.label = dev_name(dev);
 872         state->chip.of_gpio_n_cells = 2;
 873         state->chip.can_sleep = false;
 874
 875         state->ctrl = pinctrl_register(pctrldesc, dev, state);
 876         if (IS_ERR(state->ctrl))
 877                 return PTR_ERR(state->ctrl);
 878
 879         ret = gpiochip_add(&state->chip);
 880         if (ret) {
 881                 dev_err(state->dev, "can't add gpio chip\n");
 882                 goto err_chip;
 883         }
 884
 885         ret = gpiochip_add_pin_range(&state->chip, dev_name(dev), 0, 0, npins);
 886         if (ret) {
 887                 dev_err(dev, "failed to add pin range\n");
 888                 goto err_range;
 889         }
 890
 891         return 0;
 892
 893 err_range:
 894         gpiochip_remove(&state->chip);
 895 err_chip:
 896         pinctrl_unregister(state->ctrl);
 897         return ret;
 898 }
 899
 900 static int pmic_mpp_remove(struct platform_device *pdev)
 901 {
 902         struct pmic_mpp_state *state = platform_get_drvdata(pdev);
 903
 904         gpiochip_remove(&state->chip);
 905         pinctrl_unregister(state->ctrl);
 906         return 0;
 907 }
 908
 909 static const struct of_device_id pmic_mpp_of_match[] = {
 910         { .compatible = "qcom,pm8841-mpp" },    /* 4 MPP's */
 911         { .compatible = "qcom,pm8916-mpp" },    /* 4 MPP's */
 912         { .compatible = "qcom,pm8941-mpp" },    /* 8 MPP's */
 913         { .compatible = "qcom,pm8994-mpp" },    /* 8 MPP's */
 914         { .compatible = "qcom,pma8084-mpp" },   /* 8 MPP's */
 915         { },
 916 };
 917
 918 MODULE_DEVICE_TABLE(of, pmic_mpp_of_match);
 919
 920 static struct platform_driver pmic_mpp_driver = {
 921         .driver = {
 922                    .name = "qcom-spmi-mpp",
 923                    .of_match_table = pmic_mpp_of_match,
 924         },
 925         .probe  = pmic_mpp_probe,
 926         .remove = pmic_mpp_remove,
 927 };
 928
 929 module_platform_driver(pmic_mpp_driver);
 930
 931 MODULE_AUTHOR("Ivan T. Ivanov <iivanov@mm-sol.com>");
 932 MODULE_DESCRIPTION("Qualcomm SPMI PMIC MPP pin control driver");
 933 MODULE_ALIAS("platform:qcom-spmi-mpp");
 934 MODULE_LICENSE("GPL v2");