pwm: sti: Supply PWM Capture clock handling
[deliverable/linux.git] / drivers / pwm / pwm-sti.c
1 /*
2 * PWM device driver for ST SoCs.
3 * Author: Ajit Pal Singh <ajitpal.singh@st.com>
4 *
5 * Copyright (C) 2013-2014 STMicroelectronics (R&D) Limited
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 */
12
13 #include <linux/clk.h>
14 #include <linux/math64.h>
15 #include <linux/mfd/syscon.h>
16 #include <linux/module.h>
17 #include <linux/of.h>
18 #include <linux/platform_device.h>
19 #include <linux/pwm.h>
20 #include <linux/regmap.h>
21 #include <linux/slab.h>
22 #include <linux/time.h>
23
24 #define PWM_OUT_VAL(x) (0x00 + (4 * (x))) /* Device's Duty Cycle register */
25 #define PWM_CPT_VAL(x) (0x10 + (4 * (x))) /* Capture value */
26 #define PWM_CPT_EDGE(x) (0x30 + (4 * (x))) /* Edge to capture on */
27
28 #define STI_PWM_CTRL 0x50 /* Control/Config register */
29 #define STI_INT_EN 0x54 /* Interrupt Enable/Disable register */
30 #define STI_INT_STA 0x58 /* Interrupt Status register */
31 #define PWM_INT_ACK 0x5c
32 #define PWM_PRESCALE_LOW_MASK 0x0f
33 #define PWM_PRESCALE_HIGH_MASK 0xf0
34 #define PWM_CPT_EDGE_MASK 0x03
35 #define PWM_INT_ACK_MASK 0x1ff
36
37 #define STI_MAX_CPT_DEVS 4
38 #define CPT_DC_MAX 0xff
39
40 /* Regfield IDs */
41 enum {
42 /* Bits in PWM_CTRL*/
43 PWMCLK_PRESCALE_LOW,
44 PWMCLK_PRESCALE_HIGH,
45 CPTCLK_PRESCALE,
46
47 PWM_OUT_EN,
48 PWM_CPT_EN,
49
50 PWM_CPT_INT_EN,
51 PWM_CPT_INT_STAT,
52
53 /* Keep last */
54 MAX_REGFIELDS
55 };
56
57 /* Each capture input can be programmed to detect rising-edge, falling-edge,
58 * either edge or neither egde
59 */
60 enum sti_cpt_edge {
61 CPT_EDGE_DISABLED,
62 CPT_EDGE_RISING,
63 CPT_EDGE_FALLING,
64 CPT_EDGE_BOTH,
65 };
66
67 struct sti_pwm_compat_data {
68 const struct reg_field *reg_fields;
69 unsigned int num_devs;
70 unsigned int max_pwm_cnt;
71 unsigned int max_prescale;
72 };
73
74 struct sti_pwm_chip {
75 struct device *dev;
76 struct clk *pwm_clk;
77 struct clk *cpt_clk;
78 struct regmap *regmap;
79 struct sti_pwm_compat_data *cdata;
80 struct regmap_field *prescale_low;
81 struct regmap_field *prescale_high;
82 struct regmap_field *pwm_out_en;
83 struct regmap_field *pwm_cpt_int_en;
84 struct pwm_chip chip;
85 struct pwm_device *cur;
86 unsigned long configured;
87 unsigned int en_count;
88 struct mutex sti_pwm_lock; /* To sync between enable/disable calls */
89 void __iomem *mmio;
90 };
91
92 static const struct reg_field sti_pwm_regfields[MAX_REGFIELDS] = {
93 [PWMCLK_PRESCALE_LOW] = REG_FIELD(STI_PWM_CTRL, 0, 3),
94 [PWMCLK_PRESCALE_HIGH] = REG_FIELD(STI_PWM_CTRL, 11, 14),
95 [CPTCLK_PRESCALE] = REG_FIELD(STI_PWM_CTRL, 4, 8),
96 [PWM_OUT_EN] = REG_FIELD(STI_PWM_CTRL, 9, 9),
97 [PWM_CPT_EN] = REG_FIELD(STI_PWM_CTRL, 10, 10),
98 [PWM_CPT_INT_EN] = REG_FIELD(STI_INT_EN, 1, 4),
99 [PWM_CPT_INT_STAT] = REG_FIELD(STI_INT_STA, 1, 4),
100 };
101
102 static inline struct sti_pwm_chip *to_sti_pwmchip(struct pwm_chip *chip)
103 {
104 return container_of(chip, struct sti_pwm_chip, chip);
105 }
106
107 /*
108 * Calculate the prescaler value corresponding to the period.
109 */
110 static int sti_pwm_get_prescale(struct sti_pwm_chip *pc, unsigned long period,
111 unsigned int *prescale)
112 {
113 struct sti_pwm_compat_data *cdata = pc->cdata;
114 unsigned long clk_rate;
115 unsigned long val;
116 unsigned int ps;
117
118 clk_rate = clk_get_rate(pc->pwm_clk);
119 if (!clk_rate) {
120 dev_err(pc->dev, "failed to get clock rate\n");
121 return -EINVAL;
122 }
123
124 /*
125 * prescale = ((period_ns * clk_rate) / (10^9 * (max_pwm_count + 1)) - 1
126 */
127 val = NSEC_PER_SEC / clk_rate;
128 val *= cdata->max_pwm_cnt + 1;
129
130 if (period % val) {
131 return -EINVAL;
132 } else {
133 ps = period / val - 1;
134 if (ps > cdata->max_prescale)
135 return -EINVAL;
136 }
137 *prescale = ps;
138
139 return 0;
140 }
141
142 /*
143 * For STiH4xx PWM IP, the PWM period is fixed to 256 local clock cycles.
144 * The only way to change the period (apart from changing the PWM input clock)
145 * is to change the PWM clock prescaler.
146 * The prescaler is of 8 bits, so 256 prescaler values and hence
147 * 256 possible period values are supported (for a particular clock rate).
148 * The requested period will be applied only if it matches one of these
149 * 256 values.
150 */
151 static int sti_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
152 int duty_ns, int period_ns)
153 {
154 struct sti_pwm_chip *pc = to_sti_pwmchip(chip);
155 struct sti_pwm_compat_data *cdata = pc->cdata;
156 struct pwm_device *cur = pc->cur;
157 struct device *dev = pc->dev;
158 unsigned int prescale = 0, pwmvalx;
159 int ret;
160 unsigned int ncfg;
161 bool period_same = false;
162
163 ncfg = hweight_long(pc->configured);
164 if (ncfg)
165 period_same = (period_ns == pwm_get_period(cur));
166
167 /* Allow configuration changes if one of the
168 * following conditions satisfy.
169 * 1. No devices have been configured.
170 * 2. Only one device has been configured and the new request
171 * is for the same device.
172 * 3. Only one device has been configured and the new request is
173 * for a new device and period of the new device is same as
174 * the current configured period.
175 * 4. More than one devices are configured and period of the new
176 * requestis the same as the current period.
177 */
178 if (!ncfg ||
179 ((ncfg == 1) && (pwm->hwpwm == cur->hwpwm)) ||
180 ((ncfg == 1) && (pwm->hwpwm != cur->hwpwm) && period_same) ||
181 ((ncfg > 1) && period_same)) {
182 /* Enable clock before writing to PWM registers. */
183 ret = clk_enable(pc->pwm_clk);
184 if (ret)
185 return ret;
186
187 ret = clk_enable(pc->cpt_clk);
188 if (ret)
189 return ret;
190
191 if (!period_same) {
192 ret = sti_pwm_get_prescale(pc, period_ns, &prescale);
193 if (ret)
194 goto clk_dis;
195
196 ret =
197 regmap_field_write(pc->prescale_low,
198 prescale & PWM_PRESCALE_LOW_MASK);
199 if (ret)
200 goto clk_dis;
201
202 ret =
203 regmap_field_write(pc->prescale_high,
204 (prescale & PWM_PRESCALE_HIGH_MASK) >> 4);
205 if (ret)
206 goto clk_dis;
207 }
208
209 /*
210 * When PWMVal == 0, PWM pulse = 1 local clock cycle.
211 * When PWMVal == max_pwm_count,
212 * PWM pulse = (max_pwm_count + 1) local cycles,
213 * that is continuous pulse: signal never goes low.
214 */
215 pwmvalx = cdata->max_pwm_cnt * duty_ns / period_ns;
216
217 ret = regmap_write(pc->regmap,
218 PWM_OUT_VAL(pwm->hwpwm), pwmvalx);
219 if (ret)
220 goto clk_dis;
221
222 ret = regmap_field_write(pc->pwm_cpt_int_en, 0);
223
224 set_bit(pwm->hwpwm, &pc->configured);
225 pc->cur = pwm;
226
227 dev_dbg(dev, "prescale:%u, period:%i, duty:%i, pwmvalx:%u\n",
228 prescale, period_ns, duty_ns, pwmvalx);
229 } else {
230 return -EINVAL;
231 }
232
233 clk_dis:
234 clk_disable(pc->pwm_clk);
235 clk_disable(pc->cpt_clk);
236 return ret;
237 }
238
239 static int sti_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
240 {
241 struct sti_pwm_chip *pc = to_sti_pwmchip(chip);
242 struct device *dev = pc->dev;
243 int ret = 0;
244
245 /*
246 * Since we have a common enable for all PWM devices,
247 * do not enable if already enabled.
248 */
249 mutex_lock(&pc->sti_pwm_lock);
250 if (!pc->en_count) {
251 ret = clk_enable(pc->pwm_clk);
252 if (ret)
253 goto out;
254
255 ret = clk_enable(pc->cpt_clk);
256 if (ret)
257 goto out;
258
259 ret = regmap_field_write(pc->pwm_out_en, 1);
260 if (ret) {
261 dev_err(dev, "failed to enable PWM device:%d\n",
262 pwm->hwpwm);
263 goto out;
264 }
265 }
266 pc->en_count++;
267 out:
268 mutex_unlock(&pc->sti_pwm_lock);
269 return ret;
270 }
271
272 static void sti_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
273 {
274 struct sti_pwm_chip *pc = to_sti_pwmchip(chip);
275
276 mutex_lock(&pc->sti_pwm_lock);
277 if (--pc->en_count) {
278 mutex_unlock(&pc->sti_pwm_lock);
279 return;
280 }
281 regmap_field_write(pc->pwm_out_en, 0);
282
283 clk_disable(pc->pwm_clk);
284 clk_disable(pc->cpt_clk);
285 mutex_unlock(&pc->sti_pwm_lock);
286 }
287
288 static void sti_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm)
289 {
290 struct sti_pwm_chip *pc = to_sti_pwmchip(chip);
291
292 clear_bit(pwm->hwpwm, &pc->configured);
293 }
294
295 static const struct pwm_ops sti_pwm_ops = {
296 .config = sti_pwm_config,
297 .enable = sti_pwm_enable,
298 .disable = sti_pwm_disable,
299 .free = sti_pwm_free,
300 .owner = THIS_MODULE,
301 };
302
303 static int sti_pwm_probe_dt(struct sti_pwm_chip *pc)
304 {
305 struct device *dev = pc->dev;
306 const struct reg_field *reg_fields;
307 struct device_node *np = dev->of_node;
308 struct sti_pwm_compat_data *cdata = pc->cdata;
309 u32 num_devs;
310
311 of_property_read_u32(np, "st,pwm-num-chan", &num_devs);
312 if (num_devs)
313 cdata->num_devs = num_devs;
314
315 reg_fields = cdata->reg_fields;
316
317 pc->prescale_low = devm_regmap_field_alloc(dev, pc->regmap,
318 reg_fields[PWMCLK_PRESCALE_LOW]);
319 if (IS_ERR(pc->prescale_low))
320 return PTR_ERR(pc->prescale_low);
321
322 pc->prescale_high = devm_regmap_field_alloc(dev, pc->regmap,
323 reg_fields[PWMCLK_PRESCALE_HIGH]);
324 if (IS_ERR(pc->prescale_high))
325 return PTR_ERR(pc->prescale_high);
326
327
328 pc->pwm_out_en = devm_regmap_field_alloc(dev, pc->regmap,
329 reg_fields[PWM_OUT_EN]);
330 if (IS_ERR(pc->pwm_out_en))
331 return PTR_ERR(pc->pwm_out_en);
332
333 pc->pwm_cpt_int_en = devm_regmap_field_alloc(dev, pc->regmap,
334 reg_fields[PWM_CPT_INT_EN]);
335 if (IS_ERR(pc->pwm_cpt_int_en))
336 return PTR_ERR(pc->pwm_cpt_int_en);
337
338 return 0;
339 }
340
341 static const struct regmap_config sti_pwm_regmap_config = {
342 .reg_bits = 32,
343 .val_bits = 32,
344 .reg_stride = 4,
345 };
346
347 static int sti_pwm_probe(struct platform_device *pdev)
348 {
349 struct device *dev = &pdev->dev;
350 struct sti_pwm_compat_data *cdata;
351 struct sti_pwm_chip *pc;
352 struct resource *res;
353 int ret;
354
355 pc = devm_kzalloc(dev, sizeof(*pc), GFP_KERNEL);
356 if (!pc)
357 return -ENOMEM;
358
359 cdata = devm_kzalloc(dev, sizeof(*cdata), GFP_KERNEL);
360 if (!cdata)
361 return -ENOMEM;
362
363 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
364
365 pc->mmio = devm_ioremap_resource(dev, res);
366 if (IS_ERR(pc->mmio))
367 return PTR_ERR(pc->mmio);
368
369 pc->regmap = devm_regmap_init_mmio(dev, pc->mmio,
370 &sti_pwm_regmap_config);
371 if (IS_ERR(pc->regmap))
372 return PTR_ERR(pc->regmap);
373
374 /*
375 * Setup PWM data with default values: some values could be replaced
376 * with specific ones provided from Device Tree.
377 */
378 cdata->reg_fields = &sti_pwm_regfields[0];
379 cdata->max_prescale = 0xff;
380 cdata->max_pwm_cnt = 255;
381 cdata->num_devs = 1;
382
383 pc->cdata = cdata;
384 pc->dev = dev;
385 pc->en_count = 0;
386 mutex_init(&pc->sti_pwm_lock);
387
388 ret = sti_pwm_probe_dt(pc);
389 if (ret)
390 return ret;
391
392 pc->pwm_clk = of_clk_get_by_name(dev->of_node, "pwm");
393 if (IS_ERR(pc->pwm_clk)) {
394 dev_err(dev, "failed to get PWM clock\n");
395 return PTR_ERR(pc->pwm_clk);
396 }
397
398 ret = clk_prepare(pc->pwm_clk);
399 if (ret) {
400 dev_err(dev, "failed to prepare clock\n");
401 return ret;
402 }
403
404 pc->cpt_clk = of_clk_get_by_name(dev->of_node, "capture");
405 if (IS_ERR(pc->cpt_clk)) {
406 dev_err(dev, "failed to get PWM capture clock\n");
407 return PTR_ERR(pc->cpt_clk);
408 }
409
410 ret = clk_prepare(pc->cpt_clk);
411 if (ret) {
412 dev_err(dev, "failed to prepare clock\n");
413 return ret;
414 }
415
416 pc->chip.dev = dev;
417 pc->chip.ops = &sti_pwm_ops;
418 pc->chip.base = -1;
419 pc->chip.npwm = pc->cdata->num_devs;
420 pc->chip.can_sleep = true;
421
422 ret = pwmchip_add(&pc->chip);
423 if (ret < 0) {
424 clk_unprepare(pc->pwm_clk);
425 clk_unprepare(pc->cpt_clk);
426 return ret;
427 }
428
429 platform_set_drvdata(pdev, pc);
430
431 return 0;
432 }
433
434 static int sti_pwm_remove(struct platform_device *pdev)
435 {
436 struct sti_pwm_chip *pc = platform_get_drvdata(pdev);
437 unsigned int i;
438
439 for (i = 0; i < pc->cdata->num_devs; i++)
440 pwm_disable(&pc->chip.pwms[i]);
441
442 clk_unprepare(pc->pwm_clk);
443 clk_unprepare(pc->cpt_clk);
444
445 return pwmchip_remove(&pc->chip);
446 }
447
448 static const struct of_device_id sti_pwm_of_match[] = {
449 { .compatible = "st,sti-pwm", },
450 { /* sentinel */ }
451 };
452 MODULE_DEVICE_TABLE(of, sti_pwm_of_match);
453
454 static struct platform_driver sti_pwm_driver = {
455 .driver = {
456 .name = "sti-pwm",
457 .of_match_table = sti_pwm_of_match,
458 },
459 .probe = sti_pwm_probe,
460 .remove = sti_pwm_remove,
461 };
462 module_platform_driver(sti_pwm_driver);
463
464 MODULE_AUTHOR("Ajit Pal Singh <ajitpal.singh@st.com>");
465 MODULE_DESCRIPTION("STMicroelectronics ST PWM driver");
466 MODULE_LICENSE("GPL");
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