drivers/pwm/pwm-tegra.c

   1 /*
   2  * drivers/pwm/pwm-tegra.c
   3  *
   4  * Tegra pulse-width-modulation controller driver
   5  *
   6  * Copyright (c) 2010, NVIDIA Corporation.
   7  * Based on arch/arm/plat-mxc/pwm.c by Sascha Hauer <s.hauer@pengutronix.de>
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License as published by
  11  * the Free Software Foundation; either version 2 of the License, or
  12  * (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful, but WITHOUT
  15  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  16  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  17  * more details.
  18  *
  19  * You should have received a copy of the GNU General Public License along
  20  * with this program; if not, write to the Free Software Foundation, Inc.,
  21  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
  22  */
  23
  24 #include <linux/clk.h>
  25 #include <linux/err.h>
  26 #include <linux/io.h>
  27 #include <linux/module.h>
  28 #include <linux/of.h>
  29 #include <linux/pwm.h>
  30 #include <linux/platform_device.h>
  31 #include <linux/slab.h>
  32
  33 #define PWM_ENABLE      (1 << 31)
  34 #define PWM_DUTY_WIDTH  8
  35 #define PWM_DUTY_SHIFT  16
  36 #define PWM_SCALE_WIDTH 13
  37 #define PWM_SCALE_SHIFT 0
  38
  39 struct tegra_pwm_chip {
  40         struct pwm_chip chip;
  41         struct device *dev;
  42
  43         struct clk *clk;
  44
  45         void __iomem *regs;
  46 };
  47
  48 static inline struct tegra_pwm_chip *to_tegra_pwm_chip(struct pwm_chip *chip)
  49 {
  50         return container_of(chip, struct tegra_pwm_chip, chip);
  51 }
  52
  53 static inline u32 pwm_readl(struct tegra_pwm_chip *chip, unsigned int num)
  54 {
  55         return readl(chip->regs + (num << 4));
  56 }
  57
  58 static inline void pwm_writel(struct tegra_pwm_chip *chip, unsigned int num,
  59                              unsigned long val)
  60 {
  61         writel(val, chip->regs + (num << 4));
  62 }
  63
  64 static int tegra_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
  65                             int duty_ns, int period_ns)
  66 {
  67         struct tegra_pwm_chip *pc = to_tegra_pwm_chip(chip);
  68         unsigned long long c;
  69         unsigned long rate, hz;
  70         u32 val = 0;
  71         int err;
  72
  73         /*
  74          * Convert from duty_ns / period_ns to a fixed number of duty ticks
  75          * per (1 << PWM_DUTY_WIDTH) cycles and make sure to round to the
  76          * nearest integer during division.
  77          */
  78         c = duty_ns * ((1 << PWM_DUTY_WIDTH) - 1) + period_ns / 2;
  79         do_div(c, period_ns);
  80
  81         val = (u32)c << PWM_DUTY_SHIFT;
  82
  83         /*
  84          * Compute the prescaler value for which (1 << PWM_DUTY_WIDTH)
  85          * cycles at the PWM clock rate will take period_ns nanoseconds.
  86          */
  87         rate = clk_get_rate(pc->clk) >> PWM_DUTY_WIDTH;
  88         hz = NSEC_PER_SEC / period_ns;
  89
  90         rate = (rate + (hz / 2)) / hz;
  91
  92         /*
  93          * Since the actual PWM divider is the register's frequency divider
  94          * field minus 1, we need to decrement to get the correct value to
  95          * write to the register.
  96          */
  97         if (rate > 0)
  98                 rate--;
  99
 100         /*
 101          * Make sure that the rate will fit in the register's frequency
 102          * divider field.
 103          */
 104         if (rate >> PWM_SCALE_WIDTH)
 105                 return -EINVAL;
 106
 107         val |= rate << PWM_SCALE_SHIFT;
 108
 109         /*
 110          * If the PWM channel is disabled, make sure to turn on the clock
 111          * before writing the register. Otherwise, keep it enabled.
 112          */
 113         if (!pwm_is_enabled(pwm)) {
 114                 err = clk_prepare_enable(pc->clk);
 115                 if (err < 0)
 116                         return err;
 117         } else
 118                 val |= PWM_ENABLE;
 119
 120         pwm_writel(pc, pwm->hwpwm, val);
 121
 122         /*
 123          * If the PWM is not enabled, turn the clock off again to save power.
 124          */
 125         if (!pwm_is_enabled(pwm))
 126                 clk_disable_unprepare(pc->clk);
 127
 128         return 0;
 129 }
 130
 131 static int tegra_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
 132 {
 133         struct tegra_pwm_chip *pc = to_tegra_pwm_chip(chip);
 134         int rc = 0;
 135         u32 val;
 136
 137         rc = clk_prepare_enable(pc->clk);
 138         if (rc < 0)
 139                 return rc;
 140
 141         val = pwm_readl(pc, pwm->hwpwm);
 142         val |= PWM_ENABLE;
 143         pwm_writel(pc, pwm->hwpwm, val);
 144
 145         return 0;
 146 }
 147
 148 static void tegra_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
 149 {
 150         struct tegra_pwm_chip *pc = to_tegra_pwm_chip(chip);
 151         u32 val;
 152
 153         val = pwm_readl(pc, pwm->hwpwm);
 154         val &= ~PWM_ENABLE;
 155         pwm_writel(pc, pwm->hwpwm, val);
 156
 157         clk_disable_unprepare(pc->clk);
 158 }
 159
 160 static const struct pwm_ops tegra_pwm_ops = {
 161         .config = tegra_pwm_config,
 162         .enable = tegra_pwm_enable,
 163         .disable = tegra_pwm_disable,
 164         .owner = THIS_MODULE,
 165 };
 166
 167 static int tegra_pwm_probe(struct platform_device *pdev)
 168 {
 169         struct tegra_pwm_chip *pwm;
 170         struct resource *r;
 171         int ret;
 172
 173         pwm = devm_kzalloc(&pdev->dev, sizeof(*pwm), GFP_KERNEL);
 174         if (!pwm)
 175                 return -ENOMEM;
 176
 177         pwm->dev = &pdev->dev;
 178
 179         r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 180         pwm->regs = devm_ioremap_resource(&pdev->dev, r);
 181         if (IS_ERR(pwm->regs))
 182                 return PTR_ERR(pwm->regs);
 183
 184         platform_set_drvdata(pdev, pwm);
 185
 186         pwm->clk = devm_clk_get(&pdev->dev, NULL);
 187         if (IS_ERR(pwm->clk))
 188                 return PTR_ERR(pwm->clk);
 189
 190         pwm->chip.dev = &pdev->dev;
 191         pwm->chip.ops = &tegra_pwm_ops;
 192         pwm->chip.base = -1;
 193         pwm->chip.npwm = 4;
 194
 195         ret = pwmchip_add(&pwm->chip);
 196         if (ret < 0) {
 197                 dev_err(&pdev->dev, "pwmchip_add() failed: %d\n", ret);
 198                 return ret;
 199         }
 200
 201         return 0;
 202 }
 203
 204 static int tegra_pwm_remove(struct platform_device *pdev)
 205 {
 206         struct tegra_pwm_chip *pc = platform_get_drvdata(pdev);
 207         unsigned int i;
 208
 209         if (WARN_ON(!pc))
 210                 return -ENODEV;
 211
 212         for (i = 0; i < pc->chip.npwm; i++) {
 213                 struct pwm_device *pwm = &pc->chip.pwms[i];
 214
 215                 if (!pwm_is_enabled(pwm))
 216                         if (clk_prepare_enable(pc->clk) < 0)
 217                                 continue;
 218
 219                 pwm_writel(pc, i, 0);
 220
 221                 clk_disable_unprepare(pc->clk);
 222         }
 223
 224         return pwmchip_remove(&pc->chip);
 225 }
 226
 227 static const struct of_device_id tegra_pwm_of_match[] = {
 228         { .compatible = "nvidia,tegra20-pwm" },
 229         { .compatible = "nvidia,tegra30-pwm" },
 230         { }
 231 };
 232
 233 MODULE_DEVICE_TABLE(of, tegra_pwm_of_match);
 234
 235 static struct platform_driver tegra_pwm_driver = {
 236         .driver = {
 237                 .name = "tegra-pwm",
 238                 .of_match_table = tegra_pwm_of_match,
 239         },
 240         .probe = tegra_pwm_probe,
 241         .remove = tegra_pwm_remove,
 242 };
 243
 244 module_platform_driver(tegra_pwm_driver);
 245
 246 MODULE_LICENSE("GPL");
 247 MODULE_AUTHOR("NVIDIA Corporation");
 248 MODULE_ALIAS("platform:tegra-pwm");