Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/nab/target...
[deliverable/linux.git] / drivers / rtc / rtc-cmos.c
1 /*
2 * RTC class driver for "CMOS RTC": PCs, ACPI, etc
3 *
4 * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c)
5 * Copyright (C) 2006 David Brownell (convert to new framework)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13 /*
14 * The original "cmos clock" chip was an MC146818 chip, now obsolete.
15 * That defined the register interface now provided by all PCs, some
16 * non-PC systems, and incorporated into ACPI. Modern PC chipsets
17 * integrate an MC146818 clone in their southbridge, and boards use
18 * that instead of discrete clones like the DS12887 or M48T86. There
19 * are also clones that connect using the LPC bus.
20 *
21 * That register API is also used directly by various other drivers
22 * (notably for integrated NVRAM), infrastructure (x86 has code to
23 * bypass the RTC framework, directly reading the RTC during boot
24 * and updating minutes/seconds for systems using NTP synch) and
25 * utilities (like userspace 'hwclock', if no /dev node exists).
26 *
27 * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with
28 * interrupts disabled, holding the global rtc_lock, to exclude those
29 * other drivers and utilities on correctly configured systems.
30 */
31
32 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
33
34 #include <linux/kernel.h>
35 #include <linux/module.h>
36 #include <linux/init.h>
37 #include <linux/interrupt.h>
38 #include <linux/spinlock.h>
39 #include <linux/platform_device.h>
40 #include <linux/log2.h>
41 #include <linux/pm.h>
42 #include <linux/of.h>
43 #include <linux/of_platform.h>
44 #include <linux/dmi.h>
45
46 /* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
47 #include <asm-generic/rtc.h>
48
49 struct cmos_rtc {
50 struct rtc_device *rtc;
51 struct device *dev;
52 int irq;
53 struct resource *iomem;
54
55 void (*wake_on)(struct device *);
56 void (*wake_off)(struct device *);
57
58 u8 enabled_wake;
59 u8 suspend_ctrl;
60
61 /* newer hardware extends the original register set */
62 u8 day_alrm;
63 u8 mon_alrm;
64 u8 century;
65 };
66
67 /* both platform and pnp busses use negative numbers for invalid irqs */
68 #define is_valid_irq(n) ((n) > 0)
69
70 static const char driver_name[] = "rtc_cmos";
71
72 /* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear;
73 * always mask it against the irq enable bits in RTC_CONTROL. Bit values
74 * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both.
75 */
76 #define RTC_IRQMASK (RTC_PF | RTC_AF | RTC_UF)
77
78 static inline int is_intr(u8 rtc_intr)
79 {
80 if (!(rtc_intr & RTC_IRQF))
81 return 0;
82 return rtc_intr & RTC_IRQMASK;
83 }
84
85 /*----------------------------------------------------------------*/
86
87 /* Much modern x86 hardware has HPETs (10+ MHz timers) which, because
88 * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly
89 * used in a broken "legacy replacement" mode. The breakage includes
90 * HPET #1 hijacking the IRQ for this RTC, and being unavailable for
91 * other (better) use.
92 *
93 * When that broken mode is in use, platform glue provides a partial
94 * emulation of hardware RTC IRQ facilities using HPET #1. We don't
95 * want to use HPET for anything except those IRQs though...
96 */
97 #ifdef CONFIG_HPET_EMULATE_RTC
98 #include <asm/hpet.h>
99 #else
100
101 static inline int is_hpet_enabled(void)
102 {
103 return 0;
104 }
105
106 static inline int hpet_mask_rtc_irq_bit(unsigned long mask)
107 {
108 return 0;
109 }
110
111 static inline int hpet_set_rtc_irq_bit(unsigned long mask)
112 {
113 return 0;
114 }
115
116 static inline int
117 hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
118 {
119 return 0;
120 }
121
122 static inline int hpet_set_periodic_freq(unsigned long freq)
123 {
124 return 0;
125 }
126
127 static inline int hpet_rtc_dropped_irq(void)
128 {
129 return 0;
130 }
131
132 static inline int hpet_rtc_timer_init(void)
133 {
134 return 0;
135 }
136
137 extern irq_handler_t hpet_rtc_interrupt;
138
139 static inline int hpet_register_irq_handler(irq_handler_t handler)
140 {
141 return 0;
142 }
143
144 static inline int hpet_unregister_irq_handler(irq_handler_t handler)
145 {
146 return 0;
147 }
148
149 #endif
150
151 /*----------------------------------------------------------------*/
152
153 #ifdef RTC_PORT
154
155 /* Most newer x86 systems have two register banks, the first used
156 * for RTC and NVRAM and the second only for NVRAM. Caller must
157 * own rtc_lock ... and we won't worry about access during NMI.
158 */
159 #define can_bank2 true
160
161 static inline unsigned char cmos_read_bank2(unsigned char addr)
162 {
163 outb(addr, RTC_PORT(2));
164 return inb(RTC_PORT(3));
165 }
166
167 static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
168 {
169 outb(addr, RTC_PORT(2));
170 outb(val, RTC_PORT(3));
171 }
172
173 #else
174
175 #define can_bank2 false
176
177 static inline unsigned char cmos_read_bank2(unsigned char addr)
178 {
179 return 0;
180 }
181
182 static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
183 {
184 }
185
186 #endif
187
188 /*----------------------------------------------------------------*/
189
190 static int cmos_read_time(struct device *dev, struct rtc_time *t)
191 {
192 /* REVISIT: if the clock has a "century" register, use
193 * that instead of the heuristic in get_rtc_time().
194 * That'll make Y3K compatility (year > 2070) easy!
195 */
196 get_rtc_time(t);
197 return 0;
198 }
199
200 static int cmos_set_time(struct device *dev, struct rtc_time *t)
201 {
202 /* REVISIT: set the "century" register if available
203 *
204 * NOTE: this ignores the issue whereby updating the seconds
205 * takes effect exactly 500ms after we write the register.
206 * (Also queueing and other delays before we get this far.)
207 */
208 return set_rtc_time(t);
209 }
210
211 static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t)
212 {
213 struct cmos_rtc *cmos = dev_get_drvdata(dev);
214 unsigned char rtc_control;
215
216 if (!is_valid_irq(cmos->irq))
217 return -EIO;
218
219 /* Basic alarms only support hour, minute, and seconds fields.
220 * Some also support day and month, for alarms up to a year in
221 * the future.
222 */
223 t->time.tm_mday = -1;
224 t->time.tm_mon = -1;
225
226 spin_lock_irq(&rtc_lock);
227 t->time.tm_sec = CMOS_READ(RTC_SECONDS_ALARM);
228 t->time.tm_min = CMOS_READ(RTC_MINUTES_ALARM);
229 t->time.tm_hour = CMOS_READ(RTC_HOURS_ALARM);
230
231 if (cmos->day_alrm) {
232 /* ignore upper bits on readback per ACPI spec */
233 t->time.tm_mday = CMOS_READ(cmos->day_alrm) & 0x3f;
234 if (!t->time.tm_mday)
235 t->time.tm_mday = -1;
236
237 if (cmos->mon_alrm) {
238 t->time.tm_mon = CMOS_READ(cmos->mon_alrm);
239 if (!t->time.tm_mon)
240 t->time.tm_mon = -1;
241 }
242 }
243
244 rtc_control = CMOS_READ(RTC_CONTROL);
245 spin_unlock_irq(&rtc_lock);
246
247 if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
248 if (((unsigned)t->time.tm_sec) < 0x60)
249 t->time.tm_sec = bcd2bin(t->time.tm_sec);
250 else
251 t->time.tm_sec = -1;
252 if (((unsigned)t->time.tm_min) < 0x60)
253 t->time.tm_min = bcd2bin(t->time.tm_min);
254 else
255 t->time.tm_min = -1;
256 if (((unsigned)t->time.tm_hour) < 0x24)
257 t->time.tm_hour = bcd2bin(t->time.tm_hour);
258 else
259 t->time.tm_hour = -1;
260
261 if (cmos->day_alrm) {
262 if (((unsigned)t->time.tm_mday) <= 0x31)
263 t->time.tm_mday = bcd2bin(t->time.tm_mday);
264 else
265 t->time.tm_mday = -1;
266
267 if (cmos->mon_alrm) {
268 if (((unsigned)t->time.tm_mon) <= 0x12)
269 t->time.tm_mon = bcd2bin(t->time.tm_mon)-1;
270 else
271 t->time.tm_mon = -1;
272 }
273 }
274 }
275 t->time.tm_year = -1;
276
277 t->enabled = !!(rtc_control & RTC_AIE);
278 t->pending = 0;
279
280 return 0;
281 }
282
283 static void cmos_checkintr(struct cmos_rtc *cmos, unsigned char rtc_control)
284 {
285 unsigned char rtc_intr;
286
287 /* NOTE after changing RTC_xIE bits we always read INTR_FLAGS;
288 * allegedly some older rtcs need that to handle irqs properly
289 */
290 rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
291
292 if (is_hpet_enabled())
293 return;
294
295 rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
296 if (is_intr(rtc_intr))
297 rtc_update_irq(cmos->rtc, 1, rtc_intr);
298 }
299
300 static void cmos_irq_enable(struct cmos_rtc *cmos, unsigned char mask)
301 {
302 unsigned char rtc_control;
303
304 /* flush any pending IRQ status, notably for update irqs,
305 * before we enable new IRQs
306 */
307 rtc_control = CMOS_READ(RTC_CONTROL);
308 cmos_checkintr(cmos, rtc_control);
309
310 rtc_control |= mask;
311 CMOS_WRITE(rtc_control, RTC_CONTROL);
312 hpet_set_rtc_irq_bit(mask);
313
314 cmos_checkintr(cmos, rtc_control);
315 }
316
317 static void cmos_irq_disable(struct cmos_rtc *cmos, unsigned char mask)
318 {
319 unsigned char rtc_control;
320
321 rtc_control = CMOS_READ(RTC_CONTROL);
322 rtc_control &= ~mask;
323 CMOS_WRITE(rtc_control, RTC_CONTROL);
324 hpet_mask_rtc_irq_bit(mask);
325
326 cmos_checkintr(cmos, rtc_control);
327 }
328
329 static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t)
330 {
331 struct cmos_rtc *cmos = dev_get_drvdata(dev);
332 unsigned char mon, mday, hrs, min, sec, rtc_control;
333
334 if (!is_valid_irq(cmos->irq))
335 return -EIO;
336
337 mon = t->time.tm_mon + 1;
338 mday = t->time.tm_mday;
339 hrs = t->time.tm_hour;
340 min = t->time.tm_min;
341 sec = t->time.tm_sec;
342
343 rtc_control = CMOS_READ(RTC_CONTROL);
344 if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
345 /* Writing 0xff means "don't care" or "match all". */
346 mon = (mon <= 12) ? bin2bcd(mon) : 0xff;
347 mday = (mday >= 1 && mday <= 31) ? bin2bcd(mday) : 0xff;
348 hrs = (hrs < 24) ? bin2bcd(hrs) : 0xff;
349 min = (min < 60) ? bin2bcd(min) : 0xff;
350 sec = (sec < 60) ? bin2bcd(sec) : 0xff;
351 }
352
353 spin_lock_irq(&rtc_lock);
354
355 /* next rtc irq must not be from previous alarm setting */
356 cmos_irq_disable(cmos, RTC_AIE);
357
358 /* update alarm */
359 CMOS_WRITE(hrs, RTC_HOURS_ALARM);
360 CMOS_WRITE(min, RTC_MINUTES_ALARM);
361 CMOS_WRITE(sec, RTC_SECONDS_ALARM);
362
363 /* the system may support an "enhanced" alarm */
364 if (cmos->day_alrm) {
365 CMOS_WRITE(mday, cmos->day_alrm);
366 if (cmos->mon_alrm)
367 CMOS_WRITE(mon, cmos->mon_alrm);
368 }
369
370 /* FIXME the HPET alarm glue currently ignores day_alrm
371 * and mon_alrm ...
372 */
373 hpet_set_alarm_time(t->time.tm_hour, t->time.tm_min, t->time.tm_sec);
374
375 if (t->enabled)
376 cmos_irq_enable(cmos, RTC_AIE);
377
378 spin_unlock_irq(&rtc_lock);
379
380 return 0;
381 }
382
383 /*
384 * Do not disable RTC alarm on shutdown - workaround for b0rked BIOSes.
385 */
386 static bool alarm_disable_quirk;
387
388 static int __init set_alarm_disable_quirk(const struct dmi_system_id *id)
389 {
390 alarm_disable_quirk = true;
391 pr_info("BIOS has alarm-disable quirk - RTC alarms disabled\n");
392 return 0;
393 }
394
395 static const struct dmi_system_id rtc_quirks[] __initconst = {
396 /* https://bugzilla.novell.com/show_bug.cgi?id=805740 */
397 {
398 .callback = set_alarm_disable_quirk,
399 .ident = "IBM Truman",
400 .matches = {
401 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
402 DMI_MATCH(DMI_PRODUCT_NAME, "4852570"),
403 },
404 },
405 /* https://bugzilla.novell.com/show_bug.cgi?id=812592 */
406 {
407 .callback = set_alarm_disable_quirk,
408 .ident = "Gigabyte GA-990XA-UD3",
409 .matches = {
410 DMI_MATCH(DMI_SYS_VENDOR,
411 "Gigabyte Technology Co., Ltd."),
412 DMI_MATCH(DMI_PRODUCT_NAME, "GA-990XA-UD3"),
413 },
414 },
415 /* http://permalink.gmane.org/gmane.linux.kernel/1604474 */
416 {
417 .callback = set_alarm_disable_quirk,
418 .ident = "Toshiba Satellite L300",
419 .matches = {
420 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
421 DMI_MATCH(DMI_PRODUCT_NAME, "Satellite L300"),
422 },
423 },
424 {}
425 };
426
427 static int cmos_alarm_irq_enable(struct device *dev, unsigned int enabled)
428 {
429 struct cmos_rtc *cmos = dev_get_drvdata(dev);
430 unsigned long flags;
431
432 if (!is_valid_irq(cmos->irq))
433 return -EINVAL;
434
435 if (alarm_disable_quirk)
436 return 0;
437
438 spin_lock_irqsave(&rtc_lock, flags);
439
440 if (enabled)
441 cmos_irq_enable(cmos, RTC_AIE);
442 else
443 cmos_irq_disable(cmos, RTC_AIE);
444
445 spin_unlock_irqrestore(&rtc_lock, flags);
446 return 0;
447 }
448
449 #if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE)
450
451 static int cmos_procfs(struct device *dev, struct seq_file *seq)
452 {
453 struct cmos_rtc *cmos = dev_get_drvdata(dev);
454 unsigned char rtc_control, valid;
455
456 spin_lock_irq(&rtc_lock);
457 rtc_control = CMOS_READ(RTC_CONTROL);
458 valid = CMOS_READ(RTC_VALID);
459 spin_unlock_irq(&rtc_lock);
460
461 /* NOTE: at least ICH6 reports battery status using a different
462 * (non-RTC) bit; and SQWE is ignored on many current systems.
463 */
464 seq_printf(seq,
465 "periodic_IRQ\t: %s\n"
466 "update_IRQ\t: %s\n"
467 "HPET_emulated\t: %s\n"
468 // "square_wave\t: %s\n"
469 "BCD\t\t: %s\n"
470 "DST_enable\t: %s\n"
471 "periodic_freq\t: %d\n"
472 "batt_status\t: %s\n",
473 (rtc_control & RTC_PIE) ? "yes" : "no",
474 (rtc_control & RTC_UIE) ? "yes" : "no",
475 is_hpet_enabled() ? "yes" : "no",
476 // (rtc_control & RTC_SQWE) ? "yes" : "no",
477 (rtc_control & RTC_DM_BINARY) ? "no" : "yes",
478 (rtc_control & RTC_DST_EN) ? "yes" : "no",
479 cmos->rtc->irq_freq,
480 (valid & RTC_VRT) ? "okay" : "dead");
481
482 return 0;
483 }
484
485 #else
486 #define cmos_procfs NULL
487 #endif
488
489 static const struct rtc_class_ops cmos_rtc_ops = {
490 .read_time = cmos_read_time,
491 .set_time = cmos_set_time,
492 .read_alarm = cmos_read_alarm,
493 .set_alarm = cmos_set_alarm,
494 .proc = cmos_procfs,
495 .alarm_irq_enable = cmos_alarm_irq_enable,
496 };
497
498 /*----------------------------------------------------------------*/
499
500 /*
501 * All these chips have at least 64 bytes of address space, shared by
502 * RTC registers and NVRAM. Most of those bytes of NVRAM are used
503 * by boot firmware. Modern chips have 128 or 256 bytes.
504 */
505
506 #define NVRAM_OFFSET (RTC_REG_D + 1)
507
508 static ssize_t
509 cmos_nvram_read(struct file *filp, struct kobject *kobj,
510 struct bin_attribute *attr,
511 char *buf, loff_t off, size_t count)
512 {
513 int retval;
514
515 if (unlikely(off >= attr->size))
516 return 0;
517 if (unlikely(off < 0))
518 return -EINVAL;
519 if ((off + count) > attr->size)
520 count = attr->size - off;
521
522 off += NVRAM_OFFSET;
523 spin_lock_irq(&rtc_lock);
524 for (retval = 0; count; count--, off++, retval++) {
525 if (off < 128)
526 *buf++ = CMOS_READ(off);
527 else if (can_bank2)
528 *buf++ = cmos_read_bank2(off);
529 else
530 break;
531 }
532 spin_unlock_irq(&rtc_lock);
533
534 return retval;
535 }
536
537 static ssize_t
538 cmos_nvram_write(struct file *filp, struct kobject *kobj,
539 struct bin_attribute *attr,
540 char *buf, loff_t off, size_t count)
541 {
542 struct cmos_rtc *cmos;
543 int retval;
544
545 cmos = dev_get_drvdata(container_of(kobj, struct device, kobj));
546 if (unlikely(off >= attr->size))
547 return -EFBIG;
548 if (unlikely(off < 0))
549 return -EINVAL;
550 if ((off + count) > attr->size)
551 count = attr->size - off;
552
553 /* NOTE: on at least PCs and Ataris, the boot firmware uses a
554 * checksum on part of the NVRAM data. That's currently ignored
555 * here. If userspace is smart enough to know what fields of
556 * NVRAM to update, updating checksums is also part of its job.
557 */
558 off += NVRAM_OFFSET;
559 spin_lock_irq(&rtc_lock);
560 for (retval = 0; count; count--, off++, retval++) {
561 /* don't trash RTC registers */
562 if (off == cmos->day_alrm
563 || off == cmos->mon_alrm
564 || off == cmos->century)
565 buf++;
566 else if (off < 128)
567 CMOS_WRITE(*buf++, off);
568 else if (can_bank2)
569 cmos_write_bank2(*buf++, off);
570 else
571 break;
572 }
573 spin_unlock_irq(&rtc_lock);
574
575 return retval;
576 }
577
578 static struct bin_attribute nvram = {
579 .attr = {
580 .name = "nvram",
581 .mode = S_IRUGO | S_IWUSR,
582 },
583
584 .read = cmos_nvram_read,
585 .write = cmos_nvram_write,
586 /* size gets set up later */
587 };
588
589 /*----------------------------------------------------------------*/
590
591 static struct cmos_rtc cmos_rtc;
592
593 static irqreturn_t cmos_interrupt(int irq, void *p)
594 {
595 u8 irqstat;
596 u8 rtc_control;
597
598 spin_lock(&rtc_lock);
599
600 /* When the HPET interrupt handler calls us, the interrupt
601 * status is passed as arg1 instead of the irq number. But
602 * always clear irq status, even when HPET is in the way.
603 *
604 * Note that HPET and RTC are almost certainly out of phase,
605 * giving different IRQ status ...
606 */
607 irqstat = CMOS_READ(RTC_INTR_FLAGS);
608 rtc_control = CMOS_READ(RTC_CONTROL);
609 if (is_hpet_enabled())
610 irqstat = (unsigned long)irq & 0xF0;
611
612 /* If we were suspended, RTC_CONTROL may not be accurate since the
613 * bios may have cleared it.
614 */
615 if (!cmos_rtc.suspend_ctrl)
616 irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
617 else
618 irqstat &= (cmos_rtc.suspend_ctrl & RTC_IRQMASK) | RTC_IRQF;
619
620 /* All Linux RTC alarms should be treated as if they were oneshot.
621 * Similar code may be needed in system wakeup paths, in case the
622 * alarm woke the system.
623 */
624 if (irqstat & RTC_AIE) {
625 cmos_rtc.suspend_ctrl &= ~RTC_AIE;
626 rtc_control &= ~RTC_AIE;
627 CMOS_WRITE(rtc_control, RTC_CONTROL);
628 hpet_mask_rtc_irq_bit(RTC_AIE);
629 CMOS_READ(RTC_INTR_FLAGS);
630 }
631 spin_unlock(&rtc_lock);
632
633 if (is_intr(irqstat)) {
634 rtc_update_irq(p, 1, irqstat);
635 return IRQ_HANDLED;
636 } else
637 return IRQ_NONE;
638 }
639
640 #ifdef CONFIG_PNP
641 #define INITSECTION
642
643 #else
644 #define INITSECTION __init
645 #endif
646
647 static int INITSECTION
648 cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq)
649 {
650 struct cmos_rtc_board_info *info = dev_get_platdata(dev);
651 int retval = 0;
652 unsigned char rtc_control;
653 unsigned address_space;
654 u32 flags = 0;
655
656 /* there can be only one ... */
657 if (cmos_rtc.dev)
658 return -EBUSY;
659
660 if (!ports)
661 return -ENODEV;
662
663 /* Claim I/O ports ASAP, minimizing conflict with legacy driver.
664 *
665 * REVISIT non-x86 systems may instead use memory space resources
666 * (needing ioremap etc), not i/o space resources like this ...
667 */
668 if (RTC_IOMAPPED)
669 ports = request_region(ports->start, resource_size(ports),
670 driver_name);
671 else
672 ports = request_mem_region(ports->start, resource_size(ports),
673 driver_name);
674 if (!ports) {
675 dev_dbg(dev, "i/o registers already in use\n");
676 return -EBUSY;
677 }
678
679 cmos_rtc.irq = rtc_irq;
680 cmos_rtc.iomem = ports;
681
682 /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM
683 * driver did, but don't reject unknown configs. Old hardware
684 * won't address 128 bytes. Newer chips have multiple banks,
685 * though they may not be listed in one I/O resource.
686 */
687 #if defined(CONFIG_ATARI)
688 address_space = 64;
689 #elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \
690 || defined(__sparc__) || defined(__mips__) \
691 || defined(__powerpc__)
692 address_space = 128;
693 #else
694 #warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes.
695 address_space = 128;
696 #endif
697 if (can_bank2 && ports->end > (ports->start + 1))
698 address_space = 256;
699
700 /* For ACPI systems extension info comes from the FADT. On others,
701 * board specific setup provides it as appropriate. Systems where
702 * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and
703 * some almost-clones) can provide hooks to make that behave.
704 *
705 * Note that ACPI doesn't preclude putting these registers into
706 * "extended" areas of the chip, including some that we won't yet
707 * expect CMOS_READ and friends to handle.
708 */
709 if (info) {
710 if (info->flags)
711 flags = info->flags;
712 if (info->address_space)
713 address_space = info->address_space;
714
715 if (info->rtc_day_alarm && info->rtc_day_alarm < 128)
716 cmos_rtc.day_alrm = info->rtc_day_alarm;
717 if (info->rtc_mon_alarm && info->rtc_mon_alarm < 128)
718 cmos_rtc.mon_alrm = info->rtc_mon_alarm;
719 if (info->rtc_century && info->rtc_century < 128)
720 cmos_rtc.century = info->rtc_century;
721
722 if (info->wake_on && info->wake_off) {
723 cmos_rtc.wake_on = info->wake_on;
724 cmos_rtc.wake_off = info->wake_off;
725 }
726 }
727
728 cmos_rtc.dev = dev;
729 dev_set_drvdata(dev, &cmos_rtc);
730
731 cmos_rtc.rtc = rtc_device_register(driver_name, dev,
732 &cmos_rtc_ops, THIS_MODULE);
733 if (IS_ERR(cmos_rtc.rtc)) {
734 retval = PTR_ERR(cmos_rtc.rtc);
735 goto cleanup0;
736 }
737
738 rename_region(ports, dev_name(&cmos_rtc.rtc->dev));
739
740 spin_lock_irq(&rtc_lock);
741
742 if (!(flags & CMOS_RTC_FLAGS_NOFREQ)) {
743 /* force periodic irq to CMOS reset default of 1024Hz;
744 *
745 * REVISIT it's been reported that at least one x86_64 ALI
746 * mobo doesn't use 32KHz here ... for portability we might
747 * need to do something about other clock frequencies.
748 */
749 cmos_rtc.rtc->irq_freq = 1024;
750 hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq);
751 CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT);
752 }
753
754 /* disable irqs */
755 if (is_valid_irq(rtc_irq))
756 cmos_irq_disable(&cmos_rtc, RTC_PIE | RTC_AIE | RTC_UIE);
757
758 rtc_control = CMOS_READ(RTC_CONTROL);
759
760 spin_unlock_irq(&rtc_lock);
761
762 /* FIXME:
763 * <asm-generic/rtc.h> doesn't know 12-hour mode either.
764 */
765 if (is_valid_irq(rtc_irq) && !(rtc_control & RTC_24H)) {
766 dev_warn(dev, "only 24-hr supported\n");
767 retval = -ENXIO;
768 goto cleanup1;
769 }
770
771 if (is_valid_irq(rtc_irq)) {
772 irq_handler_t rtc_cmos_int_handler;
773
774 if (is_hpet_enabled()) {
775 rtc_cmos_int_handler = hpet_rtc_interrupt;
776 retval = hpet_register_irq_handler(cmos_interrupt);
777 if (retval) {
778 dev_warn(dev, "hpet_register_irq_handler "
779 " failed in rtc_init().");
780 goto cleanup1;
781 }
782 } else
783 rtc_cmos_int_handler = cmos_interrupt;
784
785 retval = request_irq(rtc_irq, rtc_cmos_int_handler,
786 0, dev_name(&cmos_rtc.rtc->dev),
787 cmos_rtc.rtc);
788 if (retval < 0) {
789 dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq);
790 goto cleanup1;
791 }
792 }
793 hpet_rtc_timer_init();
794
795 /* export at least the first block of NVRAM */
796 nvram.size = address_space - NVRAM_OFFSET;
797 retval = sysfs_create_bin_file(&dev->kobj, &nvram);
798 if (retval < 0) {
799 dev_dbg(dev, "can't create nvram file? %d\n", retval);
800 goto cleanup2;
801 }
802
803 dev_info(dev, "%s%s, %zd bytes nvram%s\n",
804 !is_valid_irq(rtc_irq) ? "no alarms" :
805 cmos_rtc.mon_alrm ? "alarms up to one year" :
806 cmos_rtc.day_alrm ? "alarms up to one month" :
807 "alarms up to one day",
808 cmos_rtc.century ? ", y3k" : "",
809 nvram.size,
810 is_hpet_enabled() ? ", hpet irqs" : "");
811
812 return 0;
813
814 cleanup2:
815 if (is_valid_irq(rtc_irq))
816 free_irq(rtc_irq, cmos_rtc.rtc);
817 cleanup1:
818 cmos_rtc.dev = NULL;
819 rtc_device_unregister(cmos_rtc.rtc);
820 cleanup0:
821 if (RTC_IOMAPPED)
822 release_region(ports->start, resource_size(ports));
823 else
824 release_mem_region(ports->start, resource_size(ports));
825 return retval;
826 }
827
828 static void cmos_do_shutdown(int rtc_irq)
829 {
830 spin_lock_irq(&rtc_lock);
831 if (is_valid_irq(rtc_irq))
832 cmos_irq_disable(&cmos_rtc, RTC_IRQMASK);
833 spin_unlock_irq(&rtc_lock);
834 }
835
836 static void __exit cmos_do_remove(struct device *dev)
837 {
838 struct cmos_rtc *cmos = dev_get_drvdata(dev);
839 struct resource *ports;
840
841 cmos_do_shutdown(cmos->irq);
842
843 sysfs_remove_bin_file(&dev->kobj, &nvram);
844
845 if (is_valid_irq(cmos->irq)) {
846 free_irq(cmos->irq, cmos->rtc);
847 hpet_unregister_irq_handler(cmos_interrupt);
848 }
849
850 rtc_device_unregister(cmos->rtc);
851 cmos->rtc = NULL;
852
853 ports = cmos->iomem;
854 if (RTC_IOMAPPED)
855 release_region(ports->start, resource_size(ports));
856 else
857 release_mem_region(ports->start, resource_size(ports));
858 cmos->iomem = NULL;
859
860 cmos->dev = NULL;
861 }
862
863 #ifdef CONFIG_PM
864
865 static int cmos_suspend(struct device *dev)
866 {
867 struct cmos_rtc *cmos = dev_get_drvdata(dev);
868 unsigned char tmp;
869
870 /* only the alarm might be a wakeup event source */
871 spin_lock_irq(&rtc_lock);
872 cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL);
873 if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) {
874 unsigned char mask;
875
876 if (device_may_wakeup(dev))
877 mask = RTC_IRQMASK & ~RTC_AIE;
878 else
879 mask = RTC_IRQMASK;
880 tmp &= ~mask;
881 CMOS_WRITE(tmp, RTC_CONTROL);
882 hpet_mask_rtc_irq_bit(mask);
883
884 cmos_checkintr(cmos, tmp);
885 }
886 spin_unlock_irq(&rtc_lock);
887
888 if (tmp & RTC_AIE) {
889 cmos->enabled_wake = 1;
890 if (cmos->wake_on)
891 cmos->wake_on(dev);
892 else
893 enable_irq_wake(cmos->irq);
894 }
895
896 dev_dbg(dev, "suspend%s, ctrl %02x\n",
897 (tmp & RTC_AIE) ? ", alarm may wake" : "",
898 tmp);
899
900 return 0;
901 }
902
903 /* We want RTC alarms to wake us from e.g. ACPI G2/S5 "soft off", even
904 * after a detour through G3 "mechanical off", although the ACPI spec
905 * says wakeup should only work from G1/S4 "hibernate". To most users,
906 * distinctions between S4 and S5 are pointless. So when the hardware
907 * allows, don't draw that distinction.
908 */
909 static inline int cmos_poweroff(struct device *dev)
910 {
911 return cmos_suspend(dev);
912 }
913
914 #ifdef CONFIG_PM_SLEEP
915
916 static int cmos_resume(struct device *dev)
917 {
918 struct cmos_rtc *cmos = dev_get_drvdata(dev);
919 unsigned char tmp;
920
921 if (cmos->enabled_wake) {
922 if (cmos->wake_off)
923 cmos->wake_off(dev);
924 else
925 disable_irq_wake(cmos->irq);
926 cmos->enabled_wake = 0;
927 }
928
929 spin_lock_irq(&rtc_lock);
930 tmp = cmos->suspend_ctrl;
931 cmos->suspend_ctrl = 0;
932 /* re-enable any irqs previously active */
933 if (tmp & RTC_IRQMASK) {
934 unsigned char mask;
935
936 if (device_may_wakeup(dev))
937 hpet_rtc_timer_init();
938
939 do {
940 CMOS_WRITE(tmp, RTC_CONTROL);
941 hpet_set_rtc_irq_bit(tmp & RTC_IRQMASK);
942
943 mask = CMOS_READ(RTC_INTR_FLAGS);
944 mask &= (tmp & RTC_IRQMASK) | RTC_IRQF;
945 if (!is_hpet_enabled() || !is_intr(mask))
946 break;
947
948 /* force one-shot behavior if HPET blocked
949 * the wake alarm's irq
950 */
951 rtc_update_irq(cmos->rtc, 1, mask);
952 tmp &= ~RTC_AIE;
953 hpet_mask_rtc_irq_bit(RTC_AIE);
954 } while (mask & RTC_AIE);
955 }
956 spin_unlock_irq(&rtc_lock);
957
958 dev_dbg(dev, "resume, ctrl %02x\n", tmp);
959
960 return 0;
961 }
962
963 #endif
964 #else
965
966 static inline int cmos_poweroff(struct device *dev)
967 {
968 return -ENOSYS;
969 }
970
971 #endif
972
973 static SIMPLE_DEV_PM_OPS(cmos_pm_ops, cmos_suspend, cmos_resume);
974
975 /*----------------------------------------------------------------*/
976
977 /* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus.
978 * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs
979 * probably list them in similar PNPBIOS tables; so PNP is more common.
980 *
981 * We don't use legacy "poke at the hardware" probing. Ancient PCs that
982 * predate even PNPBIOS should set up platform_bus devices.
983 */
984
985 #ifdef CONFIG_ACPI
986
987 #include <linux/acpi.h>
988
989 static u32 rtc_handler(void *context)
990 {
991 struct device *dev = context;
992
993 pm_wakeup_event(dev, 0);
994 acpi_clear_event(ACPI_EVENT_RTC);
995 acpi_disable_event(ACPI_EVENT_RTC, 0);
996 return ACPI_INTERRUPT_HANDLED;
997 }
998
999 static inline void rtc_wake_setup(struct device *dev)
1000 {
1001 acpi_install_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler, dev);
1002 /*
1003 * After the RTC handler is installed, the Fixed_RTC event should
1004 * be disabled. Only when the RTC alarm is set will it be enabled.
1005 */
1006 acpi_clear_event(ACPI_EVENT_RTC);
1007 acpi_disable_event(ACPI_EVENT_RTC, 0);
1008 }
1009
1010 static void rtc_wake_on(struct device *dev)
1011 {
1012 acpi_clear_event(ACPI_EVENT_RTC);
1013 acpi_enable_event(ACPI_EVENT_RTC, 0);
1014 }
1015
1016 static void rtc_wake_off(struct device *dev)
1017 {
1018 acpi_disable_event(ACPI_EVENT_RTC, 0);
1019 }
1020
1021 /* Every ACPI platform has a mc146818 compatible "cmos rtc". Here we find
1022 * its device node and pass extra config data. This helps its driver use
1023 * capabilities that the now-obsolete mc146818 didn't have, and informs it
1024 * that this board's RTC is wakeup-capable (per ACPI spec).
1025 */
1026 static struct cmos_rtc_board_info acpi_rtc_info;
1027
1028 static void cmos_wake_setup(struct device *dev)
1029 {
1030 if (acpi_disabled)
1031 return;
1032
1033 rtc_wake_setup(dev);
1034 acpi_rtc_info.wake_on = rtc_wake_on;
1035 acpi_rtc_info.wake_off = rtc_wake_off;
1036
1037 /* workaround bug in some ACPI tables */
1038 if (acpi_gbl_FADT.month_alarm && !acpi_gbl_FADT.day_alarm) {
1039 dev_dbg(dev, "bogus FADT month_alarm (%d)\n",
1040 acpi_gbl_FADT.month_alarm);
1041 acpi_gbl_FADT.month_alarm = 0;
1042 }
1043
1044 acpi_rtc_info.rtc_day_alarm = acpi_gbl_FADT.day_alarm;
1045 acpi_rtc_info.rtc_mon_alarm = acpi_gbl_FADT.month_alarm;
1046 acpi_rtc_info.rtc_century = acpi_gbl_FADT.century;
1047
1048 /* NOTE: S4_RTC_WAKE is NOT currently useful to Linux */
1049 if (acpi_gbl_FADT.flags & ACPI_FADT_S4_RTC_WAKE)
1050 dev_info(dev, "RTC can wake from S4\n");
1051
1052 dev->platform_data = &acpi_rtc_info;
1053
1054 /* RTC always wakes from S1/S2/S3, and often S4/STD */
1055 device_init_wakeup(dev, 1);
1056 }
1057
1058 #else
1059
1060 static void cmos_wake_setup(struct device *dev)
1061 {
1062 }
1063
1064 #endif
1065
1066 #ifdef CONFIG_PNP
1067
1068 #include <linux/pnp.h>
1069
1070 static int cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id)
1071 {
1072 cmos_wake_setup(&pnp->dev);
1073
1074 if (pnp_port_start(pnp, 0) == 0x70 && !pnp_irq_valid(pnp, 0))
1075 /* Some machines contain a PNP entry for the RTC, but
1076 * don't define the IRQ. It should always be safe to
1077 * hardcode it in these cases
1078 */
1079 return cmos_do_probe(&pnp->dev,
1080 pnp_get_resource(pnp, IORESOURCE_IO, 0), 8);
1081 else
1082 return cmos_do_probe(&pnp->dev,
1083 pnp_get_resource(pnp, IORESOURCE_IO, 0),
1084 pnp_irq(pnp, 0));
1085 }
1086
1087 static void __exit cmos_pnp_remove(struct pnp_dev *pnp)
1088 {
1089 cmos_do_remove(&pnp->dev);
1090 }
1091
1092 static void cmos_pnp_shutdown(struct pnp_dev *pnp)
1093 {
1094 struct device *dev = &pnp->dev;
1095 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1096
1097 if (system_state == SYSTEM_POWER_OFF && !cmos_poweroff(dev))
1098 return;
1099
1100 cmos_do_shutdown(cmos->irq);
1101 }
1102
1103 static const struct pnp_device_id rtc_ids[] = {
1104 { .id = "PNP0b00", },
1105 { .id = "PNP0b01", },
1106 { .id = "PNP0b02", },
1107 { },
1108 };
1109 MODULE_DEVICE_TABLE(pnp, rtc_ids);
1110
1111 static struct pnp_driver cmos_pnp_driver = {
1112 .name = (char *) driver_name,
1113 .id_table = rtc_ids,
1114 .probe = cmos_pnp_probe,
1115 .remove = __exit_p(cmos_pnp_remove),
1116 .shutdown = cmos_pnp_shutdown,
1117
1118 /* flag ensures resume() gets called, and stops syslog spam */
1119 .flags = PNP_DRIVER_RES_DO_NOT_CHANGE,
1120 .driver = {
1121 .pm = &cmos_pm_ops,
1122 },
1123 };
1124
1125 #endif /* CONFIG_PNP */
1126
1127 #ifdef CONFIG_OF
1128 static const struct of_device_id of_cmos_match[] = {
1129 {
1130 .compatible = "motorola,mc146818",
1131 },
1132 { },
1133 };
1134 MODULE_DEVICE_TABLE(of, of_cmos_match);
1135
1136 static __init void cmos_of_init(struct platform_device *pdev)
1137 {
1138 struct device_node *node = pdev->dev.of_node;
1139 struct rtc_time time;
1140 int ret;
1141 const __be32 *val;
1142
1143 if (!node)
1144 return;
1145
1146 val = of_get_property(node, "ctrl-reg", NULL);
1147 if (val)
1148 CMOS_WRITE(be32_to_cpup(val), RTC_CONTROL);
1149
1150 val = of_get_property(node, "freq-reg", NULL);
1151 if (val)
1152 CMOS_WRITE(be32_to_cpup(val), RTC_FREQ_SELECT);
1153
1154 get_rtc_time(&time);
1155 ret = rtc_valid_tm(&time);
1156 if (ret) {
1157 struct rtc_time def_time = {
1158 .tm_year = 1,
1159 .tm_mday = 1,
1160 };
1161 set_rtc_time(&def_time);
1162 }
1163 }
1164 #else
1165 static inline void cmos_of_init(struct platform_device *pdev) {}
1166 #endif
1167 /*----------------------------------------------------------------*/
1168
1169 /* Platform setup should have set up an RTC device, when PNP is
1170 * unavailable ... this could happen even on (older) PCs.
1171 */
1172
1173 static int __init cmos_platform_probe(struct platform_device *pdev)
1174 {
1175 struct resource *resource;
1176 int irq;
1177
1178 cmos_of_init(pdev);
1179 cmos_wake_setup(&pdev->dev);
1180
1181 if (RTC_IOMAPPED)
1182 resource = platform_get_resource(pdev, IORESOURCE_IO, 0);
1183 else
1184 resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1185 irq = platform_get_irq(pdev, 0);
1186 if (irq < 0)
1187 irq = -1;
1188
1189 return cmos_do_probe(&pdev->dev, resource, irq);
1190 }
1191
1192 static int __exit cmos_platform_remove(struct platform_device *pdev)
1193 {
1194 cmos_do_remove(&pdev->dev);
1195 return 0;
1196 }
1197
1198 static void cmos_platform_shutdown(struct platform_device *pdev)
1199 {
1200 struct device *dev = &pdev->dev;
1201 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1202
1203 if (system_state == SYSTEM_POWER_OFF && !cmos_poweroff(dev))
1204 return;
1205
1206 cmos_do_shutdown(cmos->irq);
1207 }
1208
1209 /* work with hotplug and coldplug */
1210 MODULE_ALIAS("platform:rtc_cmos");
1211
1212 static struct platform_driver cmos_platform_driver = {
1213 .remove = __exit_p(cmos_platform_remove),
1214 .shutdown = cmos_platform_shutdown,
1215 .driver = {
1216 .name = driver_name,
1217 #ifdef CONFIG_PM
1218 .pm = &cmos_pm_ops,
1219 #endif
1220 .of_match_table = of_match_ptr(of_cmos_match),
1221 }
1222 };
1223
1224 #ifdef CONFIG_PNP
1225 static bool pnp_driver_registered;
1226 #endif
1227 static bool platform_driver_registered;
1228
1229 static int __init cmos_init(void)
1230 {
1231 int retval = 0;
1232
1233 #ifdef CONFIG_PNP
1234 retval = pnp_register_driver(&cmos_pnp_driver);
1235 if (retval == 0)
1236 pnp_driver_registered = true;
1237 #endif
1238
1239 if (!cmos_rtc.dev) {
1240 retval = platform_driver_probe(&cmos_platform_driver,
1241 cmos_platform_probe);
1242 if (retval == 0)
1243 platform_driver_registered = true;
1244 }
1245
1246 dmi_check_system(rtc_quirks);
1247
1248 if (retval == 0)
1249 return 0;
1250
1251 #ifdef CONFIG_PNP
1252 if (pnp_driver_registered)
1253 pnp_unregister_driver(&cmos_pnp_driver);
1254 #endif
1255 return retval;
1256 }
1257 module_init(cmos_init);
1258
1259 static void __exit cmos_exit(void)
1260 {
1261 #ifdef CONFIG_PNP
1262 if (pnp_driver_registered)
1263 pnp_unregister_driver(&cmos_pnp_driver);
1264 #endif
1265 if (platform_driver_registered)
1266 platform_driver_unregister(&cmos_platform_driver);
1267 }
1268 module_exit(cmos_exit);
1269
1270
1271 MODULE_AUTHOR("David Brownell");
1272 MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs");
1273 MODULE_LICENSE("GPL");
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