2 * rtc-ds1305.c -- driver for DS1305 and DS1306 SPI RTC chips
4 * Copyright (C) 2008 David Brownell
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/bcd.h>
14 #include <linux/slab.h>
15 #include <linux/rtc.h>
16 #include <linux/workqueue.h>
18 #include <linux/spi/spi.h>
19 #include <linux/spi/ds1305.h>
23 * Registers ... mask DS1305_WRITE into register address to write,
24 * otherwise you're reading it. All non-bitmask values are BCD.
26 #define DS1305_WRITE 0x80
29 /* RTC date/time ... the main special cases are that we:
30 * - Need fancy "hours" encoding in 12hour mode
31 * - Don't rely on the "day-of-week" field (or tm_wday)
32 * - Are a 21st-century clock (2000 <= year < 2100)
34 #define DS1305_RTC_LEN 7 /* bytes for RTC regs */
36 #define DS1305_SEC 0x00 /* register addresses */
37 #define DS1305_MIN 0x01
38 #define DS1305_HOUR 0x02
39 # define DS1305_HR_12 0x40 /* set == 12 hr mode */
40 # define DS1305_HR_PM 0x20 /* set == PM (12hr mode) */
41 #define DS1305_WDAY 0x03
42 #define DS1305_MDAY 0x04
43 #define DS1305_MON 0x05
44 #define DS1305_YEAR 0x06
47 /* The two alarms have only sec/min/hour/wday fields (ALM_LEN).
48 * DS1305_ALM_DISABLE disables a match field (some combos are bad).
50 * NOTE that since we don't use WDAY, we limit ourselves to alarms
51 * only one day into the future (vs potentially up to a week).
53 * NOTE ALSO that while we could generate once-a-second IRQs (UIE), we
54 * don't currently support them. We'd either need to do it only when
55 * no alarm is pending (not the standard model), or to use the second
56 * alarm (implying that this is a DS1305 not DS1306, *and* that either
57 * it's wired up a second IRQ we know, or that INTCN is set)
59 #define DS1305_ALM_LEN 4 /* bytes for ALM regs */
60 #define DS1305_ALM_DISABLE 0x80
62 #define DS1305_ALM0(r) (0x07 + (r)) /* register addresses */
63 #define DS1305_ALM1(r) (0x0b + (r))
66 /* three control registers */
67 #define DS1305_CONTROL_LEN 3 /* bytes of control regs */
69 #define DS1305_CONTROL 0x0f /* register addresses */
70 # define DS1305_nEOSC 0x80 /* low enables oscillator */
71 # define DS1305_WP 0x40 /* write protect */
72 # define DS1305_INTCN 0x04 /* clear == only int0 used */
73 # define DS1306_1HZ 0x04 /* enable 1Hz output */
74 # define DS1305_AEI1 0x02 /* enable ALM1 IRQ */
75 # define DS1305_AEI0 0x01 /* enable ALM0 IRQ */
76 #define DS1305_STATUS 0x10
77 /* status has just AEIx bits, mirrored as IRQFx */
78 #define DS1305_TRICKLE 0x11
79 /* trickle bits are defined in <linux/spi/ds1305.h> */
81 /* a bunch of NVRAM */
82 #define DS1305_NVRAM_LEN 96 /* bytes of NVRAM */
84 #define DS1305_NVRAM 0x20 /* register addresses */
88 struct spi_device
*spi
;
89 struct rtc_device
*rtc
;
91 struct work_struct work
;
94 #define FLAG_EXITING 0
97 u8 ctrl
[DS1305_CONTROL_LEN
];
101 /*----------------------------------------------------------------------*/
104 * Utilities ... tolerate 12-hour AM/PM notation in case of non-Linux
105 * software (like a bootloader) which may require it.
108 static unsigned bcd2hour(u8 bcd
)
110 if (bcd
& DS1305_HR_12
) {
113 bcd
&= ~DS1305_HR_12
;
114 if (bcd
& DS1305_HR_PM
) {
116 bcd
&= ~DS1305_HR_PM
;
118 hour
+= bcd2bin(bcd
);
124 static u8
hour2bcd(bool hr12
, int hour
)
129 return DS1305_HR_12
| bin2bcd(hour
);
131 return DS1305_HR_12
| DS1305_HR_PM
| bin2bcd(hour
);
133 return bin2bcd(hour
);
136 /*----------------------------------------------------------------------*/
139 * Interface to RTC framework
142 #ifdef CONFIG_RTC_INTF_DEV
145 * Context: caller holds rtc->ops_lock (to protect ds1305->ctrl)
147 static int ds1305_ioctl(struct device
*dev
, unsigned cmd
, unsigned long arg
)
149 struct ds1305
*ds1305
= dev_get_drvdata(dev
);
151 int status
= -ENOIOCTLCMD
;
153 buf
[0] = DS1305_WRITE
| DS1305_CONTROL
;
154 buf
[1] = ds1305
->ctrl
[0];
159 if (!(buf
[1] & DS1305_AEI0
))
161 buf
[1] &= ~DS1305_AEI0
;
166 if (ds1305
->ctrl
[0] & DS1305_AEI0
)
168 buf
[1] |= DS1305_AEI0
;
172 status
= spi_write_then_read(ds1305
->spi
, buf
, sizeof buf
,
175 ds1305
->ctrl
[0] = buf
[1];
183 #define ds1305_ioctl NULL
187 * Get/set of date and time is pretty normal.
190 static int ds1305_get_time(struct device
*dev
, struct rtc_time
*time
)
192 struct ds1305
*ds1305
= dev_get_drvdata(dev
);
193 u8 addr
= DS1305_SEC
;
194 u8 buf
[DS1305_RTC_LEN
];
197 /* Use write-then-read to get all the date/time registers
198 * since dma from stack is nonportable
200 status
= spi_write_then_read(ds1305
->spi
, &addr
, sizeof addr
,
205 dev_vdbg(dev
, "%s: %02x %02x %02x, %02x %02x %02x %02x\n",
206 "read", buf
[0], buf
[1], buf
[2], buf
[3],
207 buf
[4], buf
[5], buf
[6]);
209 /* Decode the registers */
210 time
->tm_sec
= bcd2bin(buf
[DS1305_SEC
]);
211 time
->tm_min
= bcd2bin(buf
[DS1305_MIN
]);
212 time
->tm_hour
= bcd2hour(buf
[DS1305_HOUR
]);
213 time
->tm_wday
= buf
[DS1305_WDAY
] - 1;
214 time
->tm_mday
= bcd2bin(buf
[DS1305_MDAY
]);
215 time
->tm_mon
= bcd2bin(buf
[DS1305_MON
]) - 1;
216 time
->tm_year
= bcd2bin(buf
[DS1305_YEAR
]) + 100;
218 dev_vdbg(dev
, "%s secs=%d, mins=%d, "
219 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
220 "read", time
->tm_sec
, time
->tm_min
,
221 time
->tm_hour
, time
->tm_mday
,
222 time
->tm_mon
, time
->tm_year
, time
->tm_wday
);
224 /* Time may not be set */
225 return rtc_valid_tm(time
);
228 static int ds1305_set_time(struct device
*dev
, struct rtc_time
*time
)
230 struct ds1305
*ds1305
= dev_get_drvdata(dev
);
231 u8 buf
[1 + DS1305_RTC_LEN
];
234 dev_vdbg(dev
, "%s secs=%d, mins=%d, "
235 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
236 "write", time
->tm_sec
, time
->tm_min
,
237 time
->tm_hour
, time
->tm_mday
,
238 time
->tm_mon
, time
->tm_year
, time
->tm_wday
);
240 /* Write registers starting at the first time/date address. */
241 *bp
++ = DS1305_WRITE
| DS1305_SEC
;
243 *bp
++ = bin2bcd(time
->tm_sec
);
244 *bp
++ = bin2bcd(time
->tm_min
);
245 *bp
++ = hour2bcd(ds1305
->hr12
, time
->tm_hour
);
246 *bp
++ = (time
->tm_wday
< 7) ? (time
->tm_wday
+ 1) : 1;
247 *bp
++ = bin2bcd(time
->tm_mday
);
248 *bp
++ = bin2bcd(time
->tm_mon
+ 1);
249 *bp
++ = bin2bcd(time
->tm_year
- 100);
251 dev_dbg(dev
, "%s: %02x %02x %02x, %02x %02x %02x %02x\n",
252 "write", buf
[1], buf
[2], buf
[3],
253 buf
[4], buf
[5], buf
[6], buf
[7]);
255 /* use write-then-read since dma from stack is nonportable */
256 return spi_write_then_read(ds1305
->spi
, buf
, sizeof buf
,
261 * Get/set of alarm is a bit funky:
263 * - First there's the inherent raciness of getting the (partitioned)
264 * status of an alarm that could trigger while we're reading parts
267 * - Second there's its limited range (we could increase it a bit by
268 * relying on WDAY), which means it will easily roll over.
270 * - Third there's the choice of two alarms and alarm signals.
271 * Here we use ALM0 and expect that nINT0 (open drain) is used;
272 * that's the only real option for DS1306 runtime alarms, and is
275 * - Fourth, there's also ALM1, and a second interrupt signal:
276 * + On DS1305 ALM1 uses nINT1 (when INTCN=1) else nINT0;
277 * + On DS1306 ALM1 only uses INT1 (an active high pulse)
278 * and it won't work when VCC1 is active.
280 * So to be most general, we should probably set both alarms to the
281 * same value, letting ALM1 be the wakeup event source on DS1306
282 * and handling several wiring options on DS1305.
284 * - Fifth, we support the polled mode (as well as possible; why not?)
285 * even when no interrupt line is wired to an IRQ.
289 * Context: caller holds rtc->ops_lock (to protect ds1305->ctrl)
291 static int ds1305_get_alarm(struct device
*dev
, struct rtc_wkalrm
*alm
)
293 struct ds1305
*ds1305
= dev_get_drvdata(dev
);
294 struct spi_device
*spi
= ds1305
->spi
;
297 u8 buf
[DS1305_ALM_LEN
];
299 /* Refresh control register cache BEFORE reading ALM0 registers,
300 * since reading alarm registers acks any pending IRQ. That
301 * makes returning "pending" status a bit of a lie, but that bit
302 * of EFI status is at best fragile anyway (given IRQ handlers).
304 addr
= DS1305_CONTROL
;
305 status
= spi_write_then_read(spi
, &addr
, sizeof addr
,
306 ds1305
->ctrl
, sizeof ds1305
->ctrl
);
310 alm
->enabled
= !!(ds1305
->ctrl
[0] & DS1305_AEI0
);
311 alm
->pending
= !!(ds1305
->ctrl
[1] & DS1305_AEI0
);
313 /* get and check ALM0 registers */
314 addr
= DS1305_ALM0(DS1305_SEC
);
315 status
= spi_write_then_read(spi
, &addr
, sizeof addr
,
320 dev_vdbg(dev
, "%s: %02x %02x %02x %02x\n",
321 "alm0 read", buf
[DS1305_SEC
], buf
[DS1305_MIN
],
322 buf
[DS1305_HOUR
], buf
[DS1305_WDAY
]);
324 if ((DS1305_ALM_DISABLE
& buf
[DS1305_SEC
])
325 || (DS1305_ALM_DISABLE
& buf
[DS1305_MIN
])
326 || (DS1305_ALM_DISABLE
& buf
[DS1305_HOUR
]))
329 /* Stuff these values into alm->time and let RTC framework code
330 * fill in the rest ... and also handle rollover to tomorrow when
333 alm
->time
.tm_sec
= bcd2bin(buf
[DS1305_SEC
]);
334 alm
->time
.tm_min
= bcd2bin(buf
[DS1305_MIN
]);
335 alm
->time
.tm_hour
= bcd2hour(buf
[DS1305_HOUR
]);
336 alm
->time
.tm_mday
= -1;
337 alm
->time
.tm_mon
= -1;
338 alm
->time
.tm_year
= -1;
339 /* next three fields are unused by Linux */
340 alm
->time
.tm_wday
= -1;
341 alm
->time
.tm_mday
= -1;
342 alm
->time
.tm_isdst
= -1;
348 * Context: caller holds rtc->ops_lock (to protect ds1305->ctrl)
350 static int ds1305_set_alarm(struct device
*dev
, struct rtc_wkalrm
*alm
)
352 struct ds1305
*ds1305
= dev_get_drvdata(dev
);
353 struct spi_device
*spi
= ds1305
->spi
;
354 unsigned long now
, later
;
357 u8 buf
[1 + DS1305_ALM_LEN
];
359 /* convert desired alarm to time_t */
360 status
= rtc_tm_to_time(&alm
->time
, &later
);
364 /* Read current time as time_t */
365 status
= ds1305_get_time(dev
, &tm
);
368 status
= rtc_tm_to_time(&tm
, &now
);
372 /* make sure alarm fires within the next 24 hours */
375 if ((later
- now
) > 24 * 60 * 60)
378 /* disable alarm if needed */
379 if (ds1305
->ctrl
[0] & DS1305_AEI0
) {
380 ds1305
->ctrl
[0] &= ~DS1305_AEI0
;
382 buf
[0] = DS1305_WRITE
| DS1305_CONTROL
;
383 buf
[1] = ds1305
->ctrl
[0];
384 status
= spi_write_then_read(ds1305
->spi
, buf
, 2, NULL
, 0);
390 buf
[0] = DS1305_WRITE
| DS1305_ALM0(DS1305_SEC
);
391 buf
[1 + DS1305_SEC
] = bin2bcd(alm
->time
.tm_sec
);
392 buf
[1 + DS1305_MIN
] = bin2bcd(alm
->time
.tm_min
);
393 buf
[1 + DS1305_HOUR
] = hour2bcd(ds1305
->hr12
, alm
->time
.tm_hour
);
394 buf
[1 + DS1305_WDAY
] = DS1305_ALM_DISABLE
;
396 dev_dbg(dev
, "%s: %02x %02x %02x %02x\n",
397 "alm0 write", buf
[1 + DS1305_SEC
], buf
[1 + DS1305_MIN
],
398 buf
[1 + DS1305_HOUR
], buf
[1 + DS1305_WDAY
]);
400 status
= spi_write_then_read(spi
, buf
, sizeof buf
, NULL
, 0);
404 /* enable alarm if requested */
406 ds1305
->ctrl
[0] |= DS1305_AEI0
;
408 buf
[0] = DS1305_WRITE
| DS1305_CONTROL
;
409 buf
[1] = ds1305
->ctrl
[0];
410 status
= spi_write_then_read(ds1305
->spi
, buf
, 2, NULL
, 0);
416 #ifdef CONFIG_PROC_FS
418 static int ds1305_proc(struct device
*dev
, struct seq_file
*seq
)
420 struct ds1305
*ds1305
= dev_get_drvdata(dev
);
422 char *resistors
= "";
424 /* ctrl[2] is treated as read-only; no locking needed */
425 if ((ds1305
->ctrl
[2] & 0xf0) == DS1305_TRICKLE_MAGIC
) {
426 switch (ds1305
->ctrl
[2] & 0x0c) {
427 case DS1305_TRICKLE_DS2
:
428 diodes
= "2 diodes, ";
430 case DS1305_TRICKLE_DS1
:
431 diodes
= "1 diode, ";
436 switch (ds1305
->ctrl
[2] & 0x03) {
437 case DS1305_TRICKLE_2K
:
438 resistors
= "2k Ohm";
440 case DS1305_TRICKLE_4K
:
441 resistors
= "4k Ohm";
443 case DS1305_TRICKLE_8K
:
444 resistors
= "8k Ohm";
453 return seq_printf(seq
,
454 "trickle_charge\t: %s%s\n",
459 #define ds1305_proc NULL
462 static const struct rtc_class_ops ds1305_ops
= {
463 .ioctl
= ds1305_ioctl
,
464 .read_time
= ds1305_get_time
,
465 .set_time
= ds1305_set_time
,
466 .read_alarm
= ds1305_get_alarm
,
467 .set_alarm
= ds1305_set_alarm
,
471 static void ds1305_work(struct work_struct
*work
)
473 struct ds1305
*ds1305
= container_of(work
, struct ds1305
, work
);
474 struct mutex
*lock
= &ds1305
->rtc
->ops_lock
;
475 struct spi_device
*spi
= ds1305
->spi
;
479 /* lock to protect ds1305->ctrl */
482 /* Disable the IRQ, and clear its status ... for now, we "know"
483 * that if more than one alarm is active, they're in sync.
484 * Note that reading ALM data registers also clears IRQ status.
486 ds1305
->ctrl
[0] &= ~(DS1305_AEI1
| DS1305_AEI0
);
489 buf
[0] = DS1305_WRITE
| DS1305_CONTROL
;
490 buf
[1] = ds1305
->ctrl
[0];
493 status
= spi_write_then_read(spi
, buf
, sizeof buf
,
496 dev_dbg(&spi
->dev
, "clear irq --> %d\n", status
);
500 if (!test_bit(FLAG_EXITING
, &ds1305
->flags
))
501 enable_irq(spi
->irq
);
503 rtc_update_irq(ds1305
->rtc
, 1, RTC_AF
| RTC_IRQF
);
507 * This "real" IRQ handler hands off to a workqueue mostly to allow
508 * mutex locking for ds1305->ctrl ... unlike I2C, we could issue async
509 * I/O requests in IRQ context (to clear the IRQ status).
511 static irqreturn_t
ds1305_irq(int irq
, void *p
)
513 struct ds1305
*ds1305
= p
;
516 schedule_work(&ds1305
->work
);
520 /*----------------------------------------------------------------------*/
523 * Interface for NVRAM
526 static void msg_init(struct spi_message
*m
, struct spi_transfer
*x
,
527 u8
*addr
, size_t count
, char *tx
, char *rx
)
530 memset(x
, 0, 2 * sizeof(*x
));
534 spi_message_add_tail(x
, m
);
541 spi_message_add_tail(x
, m
);
545 ds1305_nvram_read(struct file
*filp
, struct kobject
*kobj
,
546 struct bin_attribute
*attr
,
547 char *buf
, loff_t off
, size_t count
)
549 struct spi_device
*spi
;
551 struct spi_message m
;
552 struct spi_transfer x
[2];
555 spi
= container_of(kobj
, struct spi_device
, dev
.kobj
);
557 if (unlikely(off
>= DS1305_NVRAM_LEN
))
559 if (count
>= DS1305_NVRAM_LEN
)
560 count
= DS1305_NVRAM_LEN
;
561 if ((off
+ count
) > DS1305_NVRAM_LEN
)
562 count
= DS1305_NVRAM_LEN
- off
;
563 if (unlikely(!count
))
566 addr
= DS1305_NVRAM
+ off
;
567 msg_init(&m
, x
, &addr
, count
, NULL
, buf
);
569 status
= spi_sync(spi
, &m
);
571 dev_err(&spi
->dev
, "nvram %s error %d\n", "read", status
);
572 return (status
< 0) ? status
: count
;
576 ds1305_nvram_write(struct file
*filp
, struct kobject
*kobj
,
577 struct bin_attribute
*attr
,
578 char *buf
, loff_t off
, size_t count
)
580 struct spi_device
*spi
;
582 struct spi_message m
;
583 struct spi_transfer x
[2];
586 spi
= container_of(kobj
, struct spi_device
, dev
.kobj
);
588 if (unlikely(off
>= DS1305_NVRAM_LEN
))
590 if (count
>= DS1305_NVRAM_LEN
)
591 count
= DS1305_NVRAM_LEN
;
592 if ((off
+ count
) > DS1305_NVRAM_LEN
)
593 count
= DS1305_NVRAM_LEN
- off
;
594 if (unlikely(!count
))
597 addr
= (DS1305_WRITE
| DS1305_NVRAM
) + off
;
598 msg_init(&m
, x
, &addr
, count
, buf
, NULL
);
600 status
= spi_sync(spi
, &m
);
602 dev_err(&spi
->dev
, "nvram %s error %d\n", "write", status
);
603 return (status
< 0) ? status
: count
;
606 static struct bin_attribute nvram
= {
607 .attr
.name
= "nvram",
608 .attr
.mode
= S_IRUGO
| S_IWUSR
,
609 .read
= ds1305_nvram_read
,
610 .write
= ds1305_nvram_write
,
611 .size
= DS1305_NVRAM_LEN
,
614 /*----------------------------------------------------------------------*/
617 * Interface to SPI stack
620 static int __devinit
ds1305_probe(struct spi_device
*spi
)
622 struct ds1305
*ds1305
;
625 struct ds1305_platform_data
*pdata
= spi
->dev
.platform_data
;
626 bool write_ctrl
= false;
628 /* Sanity check board setup data. This may be hooked up
629 * in 3wire mode, but we don't care. Note that unless
630 * there's an inverter in place, this needs SPI_CS_HIGH!
632 if ((spi
->bits_per_word
&& spi
->bits_per_word
!= 8)
633 || (spi
->max_speed_hz
> 2000000)
634 || !(spi
->mode
& SPI_CPHA
))
637 /* set up driver data */
638 ds1305
= kzalloc(sizeof *ds1305
, GFP_KERNEL
);
642 spi_set_drvdata(spi
, ds1305
);
644 /* read and cache control registers */
645 addr
= DS1305_CONTROL
;
646 status
= spi_write_then_read(spi
, &addr
, sizeof addr
,
647 ds1305
->ctrl
, sizeof ds1305
->ctrl
);
649 dev_dbg(&spi
->dev
, "can't %s, %d\n",
654 dev_dbg(&spi
->dev
, "ctrl %s: %02x %02x %02x\n",
655 "read", ds1305
->ctrl
[0],
656 ds1305
->ctrl
[1], ds1305
->ctrl
[2]);
658 /* Sanity check register values ... partially compensating for the
659 * fact that SPI has no device handshake. A pullup on MISO would
660 * make these tests fail; but not all systems will have one. If
661 * some register is neither 0x00 nor 0xff, a chip is likely there.
663 if ((ds1305
->ctrl
[0] & 0x38) != 0 || (ds1305
->ctrl
[1] & 0xfc) != 0) {
664 dev_dbg(&spi
->dev
, "RTC chip is not present\n");
668 if (ds1305
->ctrl
[2] == 0)
669 dev_dbg(&spi
->dev
, "chip may not be present\n");
671 /* enable writes if needed ... if we were paranoid it would
672 * make sense to enable them only when absolutely necessary.
674 if (ds1305
->ctrl
[0] & DS1305_WP
) {
677 ds1305
->ctrl
[0] &= ~DS1305_WP
;
679 buf
[0] = DS1305_WRITE
| DS1305_CONTROL
;
680 buf
[1] = ds1305
->ctrl
[0];
681 status
= spi_write_then_read(spi
, buf
, sizeof buf
, NULL
, 0);
683 dev_dbg(&spi
->dev
, "clear WP --> %d\n", status
);
688 /* on DS1305, maybe start oscillator; like most low power
689 * oscillators, it may take a second to stabilize
691 if (ds1305
->ctrl
[0] & DS1305_nEOSC
) {
692 ds1305
->ctrl
[0] &= ~DS1305_nEOSC
;
694 dev_warn(&spi
->dev
, "SET TIME!\n");
697 /* ack any pending IRQs */
698 if (ds1305
->ctrl
[1]) {
703 /* this may need one-time (re)init */
705 /* maybe enable trickle charge */
706 if (((ds1305
->ctrl
[2] & 0xf0) != DS1305_TRICKLE_MAGIC
)) {
707 ds1305
->ctrl
[2] = DS1305_TRICKLE_MAGIC
712 /* on DS1306, configure 1 Hz signal */
713 if (pdata
->is_ds1306
) {
715 if (!(ds1305
->ctrl
[0] & DS1306_1HZ
)) {
716 ds1305
->ctrl
[0] |= DS1306_1HZ
;
720 if (ds1305
->ctrl
[0] & DS1306_1HZ
) {
721 ds1305
->ctrl
[0] &= ~DS1306_1HZ
;
731 buf
[0] = DS1305_WRITE
| DS1305_CONTROL
;
732 buf
[1] = ds1305
->ctrl
[0];
733 buf
[2] = ds1305
->ctrl
[1];
734 buf
[3] = ds1305
->ctrl
[2];
735 status
= spi_write_then_read(spi
, buf
, sizeof buf
, NULL
, 0);
737 dev_dbg(&spi
->dev
, "can't %s, %d\n",
742 dev_dbg(&spi
->dev
, "ctrl %s: %02x %02x %02x\n",
743 "write", ds1305
->ctrl
[0],
744 ds1305
->ctrl
[1], ds1305
->ctrl
[2]);
747 /* see if non-Linux software set up AM/PM mode */
749 status
= spi_write_then_read(spi
, &addr
, sizeof addr
,
750 &value
, sizeof value
);
752 dev_dbg(&spi
->dev
, "read HOUR --> %d\n", status
);
756 ds1305
->hr12
= (DS1305_HR_12
& value
) != 0;
758 dev_dbg(&spi
->dev
, "AM/PM\n");
760 /* register RTC ... from here on, ds1305->ctrl needs locking */
761 ds1305
->rtc
= rtc_device_register("ds1305", &spi
->dev
,
762 &ds1305_ops
, THIS_MODULE
);
763 if (IS_ERR(ds1305
->rtc
)) {
764 status
= PTR_ERR(ds1305
->rtc
);
765 dev_dbg(&spi
->dev
, "register rtc --> %d\n", status
);
769 /* Maybe set up alarm IRQ; be ready to handle it triggering right
770 * away. NOTE that we don't share this. The signal is active low,
771 * and we can't ack it before a SPI message delay. We temporarily
772 * disable the IRQ until it's acked, which lets us work with more
773 * IRQ trigger modes (not all IRQ controllers can do falling edge).
776 INIT_WORK(&ds1305
->work
, ds1305_work
);
777 status
= request_irq(spi
->irq
, ds1305_irq
,
778 0, dev_name(&ds1305
->rtc
->dev
), ds1305
);
780 dev_dbg(&spi
->dev
, "request_irq %d --> %d\n",
785 device_set_wakeup_capable(&spi
->dev
, 1);
789 status
= sysfs_create_bin_file(&spi
->dev
.kobj
, &nvram
);
791 dev_dbg(&spi
->dev
, "register nvram --> %d\n", status
);
798 free_irq(spi
->irq
, ds1305
);
800 rtc_device_unregister(ds1305
->rtc
);
806 static int __devexit
ds1305_remove(struct spi_device
*spi
)
808 struct ds1305
*ds1305
= spi_get_drvdata(spi
);
810 sysfs_remove_bin_file(&spi
->dev
.kobj
, &nvram
);
812 /* carefully shut down irq and workqueue, if present */
814 set_bit(FLAG_EXITING
, &ds1305
->flags
);
815 free_irq(spi
->irq
, ds1305
);
816 flush_scheduled_work();
819 rtc_device_unregister(ds1305
->rtc
);
820 spi_set_drvdata(spi
, NULL
);
825 static struct spi_driver ds1305_driver
= {
826 .driver
.name
= "rtc-ds1305",
827 .driver
.owner
= THIS_MODULE
,
828 .probe
= ds1305_probe
,
829 .remove
= __devexit_p(ds1305_remove
),
830 /* REVISIT add suspend/resume */
833 static int __init
ds1305_init(void)
835 return spi_register_driver(&ds1305_driver
);
837 module_init(ds1305_init
);
839 static void __exit
ds1305_exit(void)
841 spi_unregister_driver(&ds1305_driver
);
843 module_exit(ds1305_exit
);
845 MODULE_DESCRIPTION("RTC driver for DS1305 and DS1306 chips");
846 MODULE_LICENSE("GPL");
847 MODULE_ALIAS("spi:rtc-ds1305");
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