projects / deliverable / linux.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
[deliverable/linux.git] / drivers / rtc / rtc-ds1307.c
1 /*
2 * rtc-ds1307.c - RTC driver for some mostly-compatible I2C chips.
3 *
4 * Copyright (C) 2005 James Chapman (ds1337 core)
5 * Copyright (C) 2006 David Brownell
6 * Copyright (C) 2009 Matthias Fuchs (rx8025 support)
7 * Copyright (C) 2012 Bertrand Achard (nvram access fixes)
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14 #include <linux/bcd.h>
15 #include <linux/i2c.h>
16 #include <linux/init.h>
17 #include <linux/module.h>
18 #include <linux/rtc/ds1307.h>
19 #include <linux/rtc.h>
20 #include <linux/slab.h>
21 #include <linux/string.h>
22
23 /*
24 * We can't determine type by probing, but if we expect pre-Linux code
25 * to have set the chip up as a clock (turning on the oscillator and
26 * setting the date and time), Linux can ignore the non-clock features.
27 * That's a natural job for a factory or repair bench.
28 */
29 enum ds_type {
30 ds_1307,
31 ds_1337,
32 ds_1338,
33 ds_1339,
34 ds_1340,
35 ds_1388,
36 ds_3231,
37 m41t00,
38 mcp794xx,
39 rx_8025,
40 last_ds_type /* always last */
41 /* rs5c372 too? different address... */
42 };
43
44
45 /* RTC registers don't differ much, except for the century flag */
46 #define DS1307_REG_SECS 0x00 /* 00-59 */
47 # define DS1307_BIT_CH 0x80
48 # define DS1340_BIT_nEOSC 0x80
49 # define MCP794XX_BIT_ST 0x80
50 #define DS1307_REG_MIN 0x01 /* 00-59 */
51 #define DS1307_REG_HOUR 0x02 /* 00-23, or 1-12{am,pm} */
52 # define DS1307_BIT_12HR 0x40 /* in REG_HOUR */
53 # define DS1307_BIT_PM 0x20 /* in REG_HOUR */
54 # define DS1340_BIT_CENTURY_EN 0x80 /* in REG_HOUR */
55 # define DS1340_BIT_CENTURY 0x40 /* in REG_HOUR */
56 #define DS1307_REG_WDAY 0x03 /* 01-07 */
57 # define MCP794XX_BIT_VBATEN 0x08
58 #define DS1307_REG_MDAY 0x04 /* 01-31 */
59 #define DS1307_REG_MONTH 0x05 /* 01-12 */
60 # define DS1337_BIT_CENTURY 0x80 /* in REG_MONTH */
61 #define DS1307_REG_YEAR 0x06 /* 00-99 */
62
63 /*
64 * Other registers (control, status, alarms, trickle charge, NVRAM, etc)
65 * start at 7, and they differ a LOT. Only control and status matter for
66 * basic RTC date and time functionality; be careful using them.
67 */
68 #define DS1307_REG_CONTROL 0x07 /* or ds1338 */
69 # define DS1307_BIT_OUT 0x80
70 # define DS1338_BIT_OSF 0x20
71 # define DS1307_BIT_SQWE 0x10
72 # define DS1307_BIT_RS1 0x02
73 # define DS1307_BIT_RS0 0x01
74 #define DS1337_REG_CONTROL 0x0e
75 # define DS1337_BIT_nEOSC 0x80
76 # define DS1339_BIT_BBSQI 0x20
77 # define DS3231_BIT_BBSQW 0x40 /* same as BBSQI */
78 # define DS1337_BIT_RS2 0x10
79 # define DS1337_BIT_RS1 0x08
80 # define DS1337_BIT_INTCN 0x04
81 # define DS1337_BIT_A2IE 0x02
82 # define DS1337_BIT_A1IE 0x01
83 #define DS1340_REG_CONTROL 0x07
84 # define DS1340_BIT_OUT 0x80
85 # define DS1340_BIT_FT 0x40
86 # define DS1340_BIT_CALIB_SIGN 0x20
87 # define DS1340_M_CALIBRATION 0x1f
88 #define DS1340_REG_FLAG 0x09
89 # define DS1340_BIT_OSF 0x80
90 #define DS1337_REG_STATUS 0x0f
91 # define DS1337_BIT_OSF 0x80
92 # define DS1337_BIT_A2I 0x02
93 # define DS1337_BIT_A1I 0x01
94 #define DS1339_REG_ALARM1_SECS 0x07
95
96 #define DS13XX_TRICKLE_CHARGER_MAGIC 0xa0
97
98 #define RX8025_REG_CTRL1 0x0e
99 # define RX8025_BIT_2412 0x20
100 #define RX8025_REG_CTRL2 0x0f
101 # define RX8025_BIT_PON 0x10
102 # define RX8025_BIT_VDET 0x40
103 # define RX8025_BIT_XST 0x20
104
105
106 struct ds1307 {
107 u8 offset; /* register's offset */
108 u8 regs[11];
109 u16 nvram_offset;
110 struct bin_attribute *nvram;
111 enum ds_type type;
112 unsigned long flags;
113 #define HAS_NVRAM 0 /* bit 0 == sysfs file active */
114 #define HAS_ALARM 1 /* bit 1 == irq claimed */
115 struct i2c_client *client;
116 struct rtc_device *rtc;
117 s32 (*read_block_data)(const struct i2c_client *client, u8 command,
118 u8 length, u8 *values);
119 s32 (*write_block_data)(const struct i2c_client *client, u8 command,
120 u8 length, const u8 *values);
121 };
122
123 struct chip_desc {
124 unsigned alarm:1;
125 u16 nvram_offset;
126 u16 nvram_size;
127 u16 trickle_charger_reg;
128 u8 trickle_charger_setup;
129 u8 (*do_trickle_setup)(struct i2c_client *, uint32_t, bool);
130 };
131
132 static u8 do_trickle_setup_ds1339(struct i2c_client *,
133 uint32_t ohms, bool diode);
134
135 static struct chip_desc chips[last_ds_type] = {
136 [ds_1307] = {
137 .nvram_offset = 8,
138 .nvram_size = 56,
139 },
140 [ds_1337] = {
141 .alarm = 1,
142 },
143 [ds_1338] = {
144 .nvram_offset = 8,
145 .nvram_size = 56,
146 },
147 [ds_1339] = {
148 .alarm = 1,
149 .trickle_charger_reg = 0x10,
150 .do_trickle_setup = &do_trickle_setup_ds1339,
151 },
152 [ds_1340] = {
153 .trickle_charger_reg = 0x08,
154 },
155 [ds_1388] = {
156 .trickle_charger_reg = 0x0a,
157 },
158 [ds_3231] = {
159 .alarm = 1,
160 },
161 [mcp794xx] = {
162 .alarm = 1,
163 /* this is battery backed SRAM */
164 .nvram_offset = 0x20,
165 .nvram_size = 0x40,
166 },
167 };
168
169 static const struct i2c_device_id ds1307_id[] = {
170 { "ds1307", ds_1307 },
171 { "ds1337", ds_1337 },
172 { "ds1338", ds_1338 },
173 { "ds1339", ds_1339 },
174 { "ds1388", ds_1388 },
175 { "ds1340", ds_1340 },
176 { "ds3231", ds_3231 },
177 { "m41t00", m41t00 },
178 { "mcp7940x", mcp794xx },
179 { "mcp7941x", mcp794xx },
180 { "pt7c4338", ds_1307 },
181 { "rx8025", rx_8025 },
182 { }
183 };
184 MODULE_DEVICE_TABLE(i2c, ds1307_id);
185
186 /*----------------------------------------------------------------------*/
187
188 #define BLOCK_DATA_MAX_TRIES 10
189
190 static s32 ds1307_read_block_data_once(const struct i2c_client *client,
191 u8 command, u8 length, u8 *values)
192 {
193 s32 i, data;
194
195 for (i = 0; i < length; i++) {
196 data = i2c_smbus_read_byte_data(client, command + i);
197 if (data < 0)
198 return data;
199 values[i] = data;
200 }
201 return i;
202 }
203
204 static s32 ds1307_read_block_data(const struct i2c_client *client, u8 command,
205 u8 length, u8 *values)
206 {
207 u8 oldvalues[255];
208 s32 ret;
209 int tries = 0;
210
211 dev_dbg(&client->dev, "ds1307_read_block_data (length=%d)\n", length);
212 ret = ds1307_read_block_data_once(client, command, length, values);
213 if (ret < 0)
214 return ret;
215 do {
216 if (++tries > BLOCK_DATA_MAX_TRIES) {
217 dev_err(&client->dev,
218 "ds1307_read_block_data failed\n");
219 return -EIO;
220 }
221 memcpy(oldvalues, values, length);
222 ret = ds1307_read_block_data_once(client, command, length,
223 values);
224 if (ret < 0)
225 return ret;
226 } while (memcmp(oldvalues, values, length));
227 return length;
228 }
229
230 static s32 ds1307_write_block_data(const struct i2c_client *client, u8 command,
231 u8 length, const u8 *values)
232 {
233 u8 currvalues[255];
234 int tries = 0;
235
236 dev_dbg(&client->dev, "ds1307_write_block_data (length=%d)\n", length);
237 do {
238 s32 i, ret;
239
240 if (++tries > BLOCK_DATA_MAX_TRIES) {
241 dev_err(&client->dev,
242 "ds1307_write_block_data failed\n");
243 return -EIO;
244 }
245 for (i = 0; i < length; i++) {
246 ret = i2c_smbus_write_byte_data(client, command + i,
247 values[i]);
248 if (ret < 0)
249 return ret;
250 }
251 ret = ds1307_read_block_data_once(client, command, length,
252 currvalues);
253 if (ret < 0)
254 return ret;
255 } while (memcmp(currvalues, values, length));
256 return length;
257 }
258
259 /*----------------------------------------------------------------------*/
260
261 /* These RTC devices are not designed to be connected to a SMbus adapter.
262 SMbus limits block operations length to 32 bytes, whereas it's not
263 limited on I2C buses. As a result, accesses may exceed 32 bytes;
264 in that case, split them into smaller blocks */
265
266 static s32 ds1307_native_smbus_write_block_data(const struct i2c_client *client,
267 u8 command, u8 length, const u8 *values)
268 {
269 u8 suboffset = 0;
270
271 if (length <= I2C_SMBUS_BLOCK_MAX)
272 return i2c_smbus_write_i2c_block_data(client,
273 command, length, values);
274
275 while (suboffset < length) {
276 s32 retval = i2c_smbus_write_i2c_block_data(client,
277 command + suboffset,
278 min(I2C_SMBUS_BLOCK_MAX, length - suboffset),
279 values + suboffset);
280 if (retval < 0)
281 return retval;
282
283 suboffset += I2C_SMBUS_BLOCK_MAX;
284 }
285 return length;
286 }
287
288 static s32 ds1307_native_smbus_read_block_data(const struct i2c_client *client,
289 u8 command, u8 length, u8 *values)
290 {
291 u8 suboffset = 0;
292
293 if (length <= I2C_SMBUS_BLOCK_MAX)
294 return i2c_smbus_read_i2c_block_data(client,
295 command, length, values);
296
297 while (suboffset < length) {
298 s32 retval = i2c_smbus_read_i2c_block_data(client,
299 command + suboffset,
300 min(I2C_SMBUS_BLOCK_MAX, length - suboffset),
301 values + suboffset);
302 if (retval < 0)
303 return retval;
304
305 suboffset += I2C_SMBUS_BLOCK_MAX;
306 }
307 return length;
308 }
309
310 /*----------------------------------------------------------------------*/
311
312 /*
313 * The ds1337 and ds1339 both have two alarms, but we only use the first
314 * one (with a "seconds" field). For ds1337 we expect nINTA is our alarm
315 * signal; ds1339 chips have only one alarm signal.
316 */
317 static irqreturn_t ds1307_irq(int irq, void *dev_id)
318 {
319 struct i2c_client *client = dev_id;
320 struct ds1307 *ds1307 = i2c_get_clientdata(client);
321 struct mutex *lock = &ds1307->rtc->ops_lock;
322 int stat, control;
323
324 mutex_lock(lock);
325 stat = i2c_smbus_read_byte_data(client, DS1337_REG_STATUS);
326 if (stat < 0)
327 goto out;
328
329 if (stat & DS1337_BIT_A1I) {
330 stat &= ~DS1337_BIT_A1I;
331 i2c_smbus_write_byte_data(client, DS1337_REG_STATUS, stat);
332
333 control = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
334 if (control < 0)
335 goto out;
336
337 control &= ~DS1337_BIT_A1IE;
338 i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, control);
339
340 rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF);
341 }
342
343 out:
344 mutex_unlock(lock);
345
346 return IRQ_HANDLED;
347 }
348
349 /*----------------------------------------------------------------------*/
350
351 static int ds1307_get_time(struct device *dev, struct rtc_time *t)
352 {
353 struct ds1307 *ds1307 = dev_get_drvdata(dev);
354 int tmp;
355
356 /* read the RTC date and time registers all at once */
357 tmp = ds1307->read_block_data(ds1307->client,
358 ds1307->offset, 7, ds1307->regs);
359 if (tmp != 7) {
360 dev_err(dev, "%s error %d\n", "read", tmp);
361 return -EIO;
362 }
363
364 dev_dbg(dev, "%s: %7ph\n", "read", ds1307->regs);
365
366 t->tm_sec = bcd2bin(ds1307->regs[DS1307_REG_SECS] & 0x7f);
367 t->tm_min = bcd2bin(ds1307->regs[DS1307_REG_MIN] & 0x7f);
368 tmp = ds1307->regs[DS1307_REG_HOUR] & 0x3f;
369 t->tm_hour = bcd2bin(tmp);
370 t->tm_wday = bcd2bin(ds1307->regs[DS1307_REG_WDAY] & 0x07) - 1;
371 t->tm_mday = bcd2bin(ds1307->regs[DS1307_REG_MDAY] & 0x3f);
372 tmp = ds1307->regs[DS1307_REG_MONTH] & 0x1f;
373 t->tm_mon = bcd2bin(tmp) - 1;
374
375 /* assume 20YY not 19YY, and ignore DS1337_BIT_CENTURY */
376 t->tm_year = bcd2bin(ds1307->regs[DS1307_REG_YEAR]) + 100;
377
378 dev_dbg(dev, "%s secs=%d, mins=%d, "
379 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
380 "read", t->tm_sec, t->tm_min,
381 t->tm_hour, t->tm_mday,
382 t->tm_mon, t->tm_year, t->tm_wday);
383
384 /* initial clock setting can be undefined */
385 return rtc_valid_tm(t);
386 }
387
388 static int ds1307_set_time(struct device *dev, struct rtc_time *t)
389 {
390 struct ds1307 *ds1307 = dev_get_drvdata(dev);
391 int result;
392 int tmp;
393 u8 *buf = ds1307->regs;
394
395 dev_dbg(dev, "%s secs=%d, mins=%d, "
396 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
397 "write", t->tm_sec, t->tm_min,
398 t->tm_hour, t->tm_mday,
399 t->tm_mon, t->tm_year, t->tm_wday);
400
401 buf[DS1307_REG_SECS] = bin2bcd(t->tm_sec);
402 buf[DS1307_REG_MIN] = bin2bcd(t->tm_min);
403 buf[DS1307_REG_HOUR] = bin2bcd(t->tm_hour);
404 buf[DS1307_REG_WDAY] = bin2bcd(t->tm_wday + 1);
405 buf[DS1307_REG_MDAY] = bin2bcd(t->tm_mday);
406 buf[DS1307_REG_MONTH] = bin2bcd(t->tm_mon + 1);
407
408 /* assume 20YY not 19YY */
409 tmp = t->tm_year - 100;
410 buf[DS1307_REG_YEAR] = bin2bcd(tmp);
411
412 switch (ds1307->type) {
413 case ds_1337:
414 case ds_1339:
415 case ds_3231:
416 buf[DS1307_REG_MONTH] |= DS1337_BIT_CENTURY;
417 break;
418 case ds_1340:
419 buf[DS1307_REG_HOUR] |= DS1340_BIT_CENTURY_EN
420 | DS1340_BIT_CENTURY;
421 break;
422 case mcp794xx:
423 /*
424 * these bits were cleared when preparing the date/time
425 * values and need to be set again before writing the
426 * buffer out to the device.
427 */
428 buf[DS1307_REG_SECS] |= MCP794XX_BIT_ST;
429 buf[DS1307_REG_WDAY] |= MCP794XX_BIT_VBATEN;
430 break;
431 default:
432 break;
433 }
434
435 dev_dbg(dev, "%s: %7ph\n", "write", buf);
436
437 result = ds1307->write_block_data(ds1307->client,
438 ds1307->offset, 7, buf);
439 if (result < 0) {
440 dev_err(dev, "%s error %d\n", "write", result);
441 return result;
442 }
443 return 0;
444 }
445
446 static int ds1337_read_alarm(struct device *dev, struct rtc_wkalrm *t)
447 {
448 struct i2c_client *client = to_i2c_client(dev);
449 struct ds1307 *ds1307 = i2c_get_clientdata(client);
450 int ret;
451
452 if (!test_bit(HAS_ALARM, &ds1307->flags))
453 return -EINVAL;
454
455 /* read all ALARM1, ALARM2, and status registers at once */
456 ret = ds1307->read_block_data(client,
457 DS1339_REG_ALARM1_SECS, 9, ds1307->regs);
458 if (ret != 9) {
459 dev_err(dev, "%s error %d\n", "alarm read", ret);
460 return -EIO;
461 }
462
463 dev_dbg(dev, "%s: %4ph, %3ph, %2ph\n", "alarm read",
464 &ds1307->regs[0], &ds1307->regs[4], &ds1307->regs[7]);
465
466 /*
467 * report alarm time (ALARM1); assume 24 hour and day-of-month modes,
468 * and that all four fields are checked matches
469 */
470 t->time.tm_sec = bcd2bin(ds1307->regs[0] & 0x7f);
471 t->time.tm_min = bcd2bin(ds1307->regs[1] & 0x7f);
472 t->time.tm_hour = bcd2bin(ds1307->regs[2] & 0x3f);
473 t->time.tm_mday = bcd2bin(ds1307->regs[3] & 0x3f);
474 t->time.tm_mon = -1;
475 t->time.tm_year = -1;
476 t->time.tm_wday = -1;
477 t->time.tm_yday = -1;
478 t->time.tm_isdst = -1;
479
480 /* ... and status */
481 t->enabled = !!(ds1307->regs[7] & DS1337_BIT_A1IE);
482 t->pending = !!(ds1307->regs[8] & DS1337_BIT_A1I);
483
484 dev_dbg(dev, "%s secs=%d, mins=%d, "
485 "hours=%d, mday=%d, enabled=%d, pending=%d\n",
486 "alarm read", t->time.tm_sec, t->time.tm_min,
487 t->time.tm_hour, t->time.tm_mday,
488 t->enabled, t->pending);
489
490 return 0;
491 }
492
493 static int ds1337_set_alarm(struct device *dev, struct rtc_wkalrm *t)
494 {
495 struct i2c_client *client = to_i2c_client(dev);
496 struct ds1307 *ds1307 = i2c_get_clientdata(client);
497 unsigned char *buf = ds1307->regs;
498 u8 control, status;
499 int ret;
500
501 if (!test_bit(HAS_ALARM, &ds1307->flags))
502 return -EINVAL;
503
504 dev_dbg(dev, "%s secs=%d, mins=%d, "
505 "hours=%d, mday=%d, enabled=%d, pending=%d\n",
506 "alarm set", t->time.tm_sec, t->time.tm_min,
507 t->time.tm_hour, t->time.tm_mday,
508 t->enabled, t->pending);
509
510 /* read current status of both alarms and the chip */
511 ret = ds1307->read_block_data(client,
512 DS1339_REG_ALARM1_SECS, 9, buf);
513 if (ret != 9) {
514 dev_err(dev, "%s error %d\n", "alarm write", ret);
515 return -EIO;
516 }
517 control = ds1307->regs[7];
518 status = ds1307->regs[8];
519
520 dev_dbg(dev, "%s: %4ph, %3ph, %02x %02x\n", "alarm set (old status)",
521 &ds1307->regs[0], &ds1307->regs[4], control, status);
522
523 /* set ALARM1, using 24 hour and day-of-month modes */
524 buf[0] = bin2bcd(t->time.tm_sec);
525 buf[1] = bin2bcd(t->time.tm_min);
526 buf[2] = bin2bcd(t->time.tm_hour);
527 buf[3] = bin2bcd(t->time.tm_mday);
528
529 /* set ALARM2 to non-garbage */
530 buf[4] = 0;
531 buf[5] = 0;
532 buf[6] = 0;
533
534 /* optionally enable ALARM1 */
535 buf[7] = control & ~(DS1337_BIT_A1IE | DS1337_BIT_A2IE);
536 if (t->enabled) {
537 dev_dbg(dev, "alarm IRQ armed\n");
538 buf[7] |= DS1337_BIT_A1IE; /* only ALARM1 is used */
539 }
540 buf[8] = status & ~(DS1337_BIT_A1I | DS1337_BIT_A2I);
541
542 ret = ds1307->write_block_data(client,
543 DS1339_REG_ALARM1_SECS, 9, buf);
544 if (ret < 0) {
545 dev_err(dev, "can't set alarm time\n");
546 return ret;
547 }
548
549 return 0;
550 }
551
552 static int ds1307_alarm_irq_enable(struct device *dev, unsigned int enabled)
553 {
554 struct i2c_client *client = to_i2c_client(dev);
555 struct ds1307 *ds1307 = i2c_get_clientdata(client);
556 int ret;
557
558 if (!test_bit(HAS_ALARM, &ds1307->flags))
559 return -ENOTTY;
560
561 ret = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
562 if (ret < 0)
563 return ret;
564
565 if (enabled)
566 ret |= DS1337_BIT_A1IE;
567 else
568 ret &= ~DS1337_BIT_A1IE;
569
570 ret = i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, ret);
571 if (ret < 0)
572 return ret;
573
574 return 0;
575 }
576
577 static const struct rtc_class_ops ds13xx_rtc_ops = {
578 .read_time = ds1307_get_time,
579 .set_time = ds1307_set_time,
580 .read_alarm = ds1337_read_alarm,
581 .set_alarm = ds1337_set_alarm,
582 .alarm_irq_enable = ds1307_alarm_irq_enable,
583 };
584
585 /*----------------------------------------------------------------------*/
586
587 /*
588 * Alarm support for mcp794xx devices.
589 */
590
591 #define MCP794XX_REG_CONTROL 0x07
592 # define MCP794XX_BIT_ALM0_EN 0x10
593 # define MCP794XX_BIT_ALM1_EN 0x20
594 #define MCP794XX_REG_ALARM0_BASE 0x0a
595 #define MCP794XX_REG_ALARM0_CTRL 0x0d
596 #define MCP794XX_REG_ALARM1_BASE 0x11
597 #define MCP794XX_REG_ALARM1_CTRL 0x14
598 # define MCP794XX_BIT_ALMX_IF (1 << 3)
599 # define MCP794XX_BIT_ALMX_C0 (1 << 4)
600 # define MCP794XX_BIT_ALMX_C1 (1 << 5)
601 # define MCP794XX_BIT_ALMX_C2 (1 << 6)
602 # define MCP794XX_BIT_ALMX_POL (1 << 7)
603 # define MCP794XX_MSK_ALMX_MATCH (MCP794XX_BIT_ALMX_C0 | \
604 MCP794XX_BIT_ALMX_C1 | \
605 MCP794XX_BIT_ALMX_C2)
606
607 static irqreturn_t mcp794xx_irq(int irq, void *dev_id)
608 {
609 struct i2c_client *client = dev_id;
610 struct ds1307 *ds1307 = i2c_get_clientdata(client);
611 struct mutex *lock = &ds1307->rtc->ops_lock;
612 int reg, ret;
613
614 mutex_lock(lock);
615
616 /* Check and clear alarm 0 interrupt flag. */
617 reg = i2c_smbus_read_byte_data(client, MCP794XX_REG_ALARM0_CTRL);
618 if (reg < 0)
619 goto out;
620 if (!(reg & MCP794XX_BIT_ALMX_IF))
621 goto out;
622 reg &= ~MCP794XX_BIT_ALMX_IF;
623 ret = i2c_smbus_write_byte_data(client, MCP794XX_REG_ALARM0_CTRL, reg);
624 if (ret < 0)
625 goto out;
626
627 /* Disable alarm 0. */
628 reg = i2c_smbus_read_byte_data(client, MCP794XX_REG_CONTROL);
629 if (reg < 0)
630 goto out;
631 reg &= ~MCP794XX_BIT_ALM0_EN;
632 ret = i2c_smbus_write_byte_data(client, MCP794XX_REG_CONTROL, reg);
633 if (ret < 0)
634 goto out;
635
636 rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF);
637
638 out:
639 mutex_unlock(lock);
640
641 return IRQ_HANDLED;
642 }
643
644 static int mcp794xx_read_alarm(struct device *dev, struct rtc_wkalrm *t)
645 {
646 struct i2c_client *client = to_i2c_client(dev);
647 struct ds1307 *ds1307 = i2c_get_clientdata(client);
648 u8 *regs = ds1307->regs;
649 int ret;
650
651 if (!test_bit(HAS_ALARM, &ds1307->flags))
652 return -EINVAL;
653
654 /* Read control and alarm 0 registers. */
655 ret = ds1307->read_block_data(client, MCP794XX_REG_CONTROL, 10, regs);
656 if (ret < 0)
657 return ret;
658
659 t->enabled = !!(regs[0] & MCP794XX_BIT_ALM0_EN);
660
661 /* Report alarm 0 time assuming 24-hour and day-of-month modes. */
662 t->time.tm_sec = bcd2bin(ds1307->regs[3] & 0x7f);
663 t->time.tm_min = bcd2bin(ds1307->regs[4] & 0x7f);
664 t->time.tm_hour = bcd2bin(ds1307->regs[5] & 0x3f);
665 t->time.tm_wday = bcd2bin(ds1307->regs[6] & 0x7) - 1;
666 t->time.tm_mday = bcd2bin(ds1307->regs[7] & 0x3f);
667 t->time.tm_mon = bcd2bin(ds1307->regs[8] & 0x1f) - 1;
668 t->time.tm_year = -1;
669 t->time.tm_yday = -1;
670 t->time.tm_isdst = -1;
671
672 dev_dbg(dev, "%s, sec=%d min=%d hour=%d wday=%d mday=%d mon=%d "
673 "enabled=%d polarity=%d irq=%d match=%d\n", __func__,
674 t->time.tm_sec, t->time.tm_min, t->time.tm_hour,
675 t->time.tm_wday, t->time.tm_mday, t->time.tm_mon, t->enabled,
676 !!(ds1307->regs[6] & MCP794XX_BIT_ALMX_POL),
677 !!(ds1307->regs[6] & MCP794XX_BIT_ALMX_IF),
678 (ds1307->regs[6] & MCP794XX_MSK_ALMX_MATCH) >> 4);
679
680 return 0;
681 }
682
683 static int mcp794xx_set_alarm(struct device *dev, struct rtc_wkalrm *t)
684 {
685 struct i2c_client *client = to_i2c_client(dev);
686 struct ds1307 *ds1307 = i2c_get_clientdata(client);
687 unsigned char *regs = ds1307->regs;
688 int ret;
689
690 if (!test_bit(HAS_ALARM, &ds1307->flags))
691 return -EINVAL;
692
693 dev_dbg(dev, "%s, sec=%d min=%d hour=%d wday=%d mday=%d mon=%d "
694 "enabled=%d pending=%d\n", __func__,
695 t->time.tm_sec, t->time.tm_min, t->time.tm_hour,
696 t->time.tm_wday, t->time.tm_mday, t->time.tm_mon,
697 t->enabled, t->pending);
698
699 /* Read control and alarm 0 registers. */
700 ret = ds1307->read_block_data(client, MCP794XX_REG_CONTROL, 10, regs);
701 if (ret < 0)
702 return ret;
703
704 /* Set alarm 0, using 24-hour and day-of-month modes. */
705 regs[3] = bin2bcd(t->time.tm_sec);
706 regs[4] = bin2bcd(t->time.tm_min);
707 regs[5] = bin2bcd(t->time.tm_hour);
708 regs[6] = bin2bcd(t->time.tm_wday + 1);
709 regs[7] = bin2bcd(t->time.tm_mday);
710 regs[8] = bin2bcd(t->time.tm_mon + 1);
711
712 /* Clear the alarm 0 interrupt flag. */
713 regs[6] &= ~MCP794XX_BIT_ALMX_IF;
714 /* Set alarm match: second, minute, hour, day, date, month. */
715 regs[6] |= MCP794XX_MSK_ALMX_MATCH;
716 /* Disable interrupt. We will not enable until completely programmed */
717 regs[0] &= ~MCP794XX_BIT_ALM0_EN;
718
719 ret = ds1307->write_block_data(client, MCP794XX_REG_CONTROL, 10, regs);
720 if (ret < 0)
721 return ret;
722
723 if (!t->enabled)
724 return 0;
725 regs[0] |= MCP794XX_BIT_ALM0_EN;
726 return i2c_smbus_write_byte_data(client, MCP794XX_REG_CONTROL, regs[0]);
727 }
728
729 static int mcp794xx_alarm_irq_enable(struct device *dev, unsigned int enabled)
730 {
731 struct i2c_client *client = to_i2c_client(dev);
732 struct ds1307 *ds1307 = i2c_get_clientdata(client);
733 int reg;
734
735 if (!test_bit(HAS_ALARM, &ds1307->flags))
736 return -EINVAL;
737
738 reg = i2c_smbus_read_byte_data(client, MCP794XX_REG_CONTROL);
739 if (reg < 0)
740 return reg;
741
742 if (enabled)
743 reg |= MCP794XX_BIT_ALM0_EN;
744 else
745 reg &= ~MCP794XX_BIT_ALM0_EN;
746
747 return i2c_smbus_write_byte_data(client, MCP794XX_REG_CONTROL, reg);
748 }
749
750 static const struct rtc_class_ops mcp794xx_rtc_ops = {
751 .read_time = ds1307_get_time,
752 .set_time = ds1307_set_time,
753 .read_alarm = mcp794xx_read_alarm,
754 .set_alarm = mcp794xx_set_alarm,
755 .alarm_irq_enable = mcp794xx_alarm_irq_enable,
756 };
757
758 /*----------------------------------------------------------------------*/
759
760 static ssize_t
761 ds1307_nvram_read(struct file *filp, struct kobject *kobj,
762 struct bin_attribute *attr,
763 char *buf, loff_t off, size_t count)
764 {
765 struct i2c_client *client;
766 struct ds1307 *ds1307;
767 int result;
768
769 client = kobj_to_i2c_client(kobj);
770 ds1307 = i2c_get_clientdata(client);
771
772 result = ds1307->read_block_data(client, ds1307->nvram_offset + off,
773 count, buf);
774 if (result < 0)
775 dev_err(&client->dev, "%s error %d\n", "nvram read", result);
776 return result;
777 }
778
779 static ssize_t
780 ds1307_nvram_write(struct file *filp, struct kobject *kobj,
781 struct bin_attribute *attr,
782 char *buf, loff_t off, size_t count)
783 {
784 struct i2c_client *client;
785 struct ds1307 *ds1307;
786 int result;
787
788 client = kobj_to_i2c_client(kobj);
789 ds1307 = i2c_get_clientdata(client);
790
791 result = ds1307->write_block_data(client, ds1307->nvram_offset + off,
792 count, buf);
793 if (result < 0) {
794 dev_err(&client->dev, "%s error %d\n", "nvram write", result);
795 return result;
796 }
797 return count;
798 }
799
800
801 /*----------------------------------------------------------------------*/
802
803 static u8 do_trickle_setup_ds1339(struct i2c_client *client,
804 uint32_t ohms, bool diode)
805 {
806 u8 setup = (diode) ? DS1307_TRICKLE_CHARGER_DIODE :
807 DS1307_TRICKLE_CHARGER_NO_DIODE;
808
809 switch (ohms) {
810 case 250:
811 setup |= DS1307_TRICKLE_CHARGER_250_OHM;
812 break;
813 case 2000:
814 setup |= DS1307_TRICKLE_CHARGER_2K_OHM;
815 break;
816 case 4000:
817 setup |= DS1307_TRICKLE_CHARGER_4K_OHM;
818 break;
819 default:
820 dev_warn(&client->dev,
821 "Unsupported ohm value %u in dt\n", ohms);
822 return 0;
823 }
824 return setup;
825 }
826
827 static void ds1307_trickle_of_init(struct i2c_client *client,
828 struct chip_desc *chip)
829 {
830 uint32_t ohms = 0;
831 bool diode = true;
832
833 if (!chip->do_trickle_setup)
834 goto out;
835 if (of_property_read_u32(client->dev.of_node, "trickle-resistor-ohms" , &ohms))
836 goto out;
837 if (of_property_read_bool(client->dev.of_node, "trickle-diode-disable"))
838 diode = false;
839 chip->trickle_charger_setup = chip->do_trickle_setup(client,
840 ohms, diode);
841 out:
842 return;
843 }
844
845 static int ds1307_probe(struct i2c_client *client,
846 const struct i2c_device_id *id)
847 {
848 struct ds1307 *ds1307;
849 int err = -ENODEV;
850 int tmp;
851 struct chip_desc *chip = &chips[id->driver_data];
852 struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
853 bool want_irq = false;
854 unsigned char *buf;
855 struct ds1307_platform_data *pdata = dev_get_platdata(&client->dev);
856 irq_handler_t irq_handler = ds1307_irq;
857
858 static const int bbsqi_bitpos[] = {
859 [ds_1337] = 0,
860 [ds_1339] = DS1339_BIT_BBSQI,
861 [ds_3231] = DS3231_BIT_BBSQW,
862 };
863 const struct rtc_class_ops *rtc_ops = &ds13xx_rtc_ops;
864
865 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)
866 && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK))
867 return -EIO;
868
869 ds1307 = devm_kzalloc(&client->dev, sizeof(struct ds1307), GFP_KERNEL);
870 if (!ds1307)
871 return -ENOMEM;
872
873 i2c_set_clientdata(client, ds1307);
874
875 ds1307->client = client;
876 ds1307->type = id->driver_data;
877
878 if (!pdata && client->dev.of_node)
879 ds1307_trickle_of_init(client, chip);
880 else if (pdata && pdata->trickle_charger_setup)
881 chip->trickle_charger_setup = pdata->trickle_charger_setup;
882
883 if (chip->trickle_charger_setup && chip->trickle_charger_reg) {
884 dev_dbg(&client->dev, "writing trickle charger info 0x%x to 0x%x\n",
885 DS13XX_TRICKLE_CHARGER_MAGIC | chip->trickle_charger_setup,
886 chip->trickle_charger_reg);
887 i2c_smbus_write_byte_data(client, chip->trickle_charger_reg,
888 DS13XX_TRICKLE_CHARGER_MAGIC |
889 chip->trickle_charger_setup);
890 }
891
892 buf = ds1307->regs;
893 if (i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) {
894 ds1307->read_block_data = ds1307_native_smbus_read_block_data;
895 ds1307->write_block_data = ds1307_native_smbus_write_block_data;
896 } else {
897 ds1307->read_block_data = ds1307_read_block_data;
898 ds1307->write_block_data = ds1307_write_block_data;
899 }
900
901 switch (ds1307->type) {
902 case ds_1337:
903 case ds_1339:
904 case ds_3231:
905 /* get registers that the "rtc" read below won't read... */
906 tmp = ds1307->read_block_data(ds1307->client,
907 DS1337_REG_CONTROL, 2, buf);
908 if (tmp != 2) {
909 dev_dbg(&client->dev, "read error %d\n", tmp);
910 err = -EIO;
911 goto exit;
912 }
913
914 /* oscillator off? turn it on, so clock can tick. */
915 if (ds1307->regs[0] & DS1337_BIT_nEOSC)
916 ds1307->regs[0] &= ~DS1337_BIT_nEOSC;
917
918 /*
919 * Using IRQ? Disable the square wave and both alarms.
920 * For some variants, be sure alarms can trigger when we're
921 * running on Vbackup (BBSQI/BBSQW)
922 */
923 if (ds1307->client->irq > 0 && chip->alarm) {
924 ds1307->regs[0] |= DS1337_BIT_INTCN
925 | bbsqi_bitpos[ds1307->type];
926 ds1307->regs[0] &= ~(DS1337_BIT_A2IE | DS1337_BIT_A1IE);
927
928 want_irq = true;
929 }
930
931 i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL,
932 ds1307->regs[0]);
933
934 /* oscillator fault? clear flag, and warn */
935 if (ds1307->regs[1] & DS1337_BIT_OSF) {
936 i2c_smbus_write_byte_data(client, DS1337_REG_STATUS,
937 ds1307->regs[1] & ~DS1337_BIT_OSF);
938 dev_warn(&client->dev, "SET TIME!\n");
939 }
940 break;
941
942 case rx_8025:
943 tmp = i2c_smbus_read_i2c_block_data(ds1307->client,
944 RX8025_REG_CTRL1 << 4 | 0x08, 2, buf);
945 if (tmp != 2) {
946 dev_dbg(&client->dev, "read error %d\n", tmp);
947 err = -EIO;
948 goto exit;
949 }
950
951 /* oscillator off? turn it on, so clock can tick. */
952 if (!(ds1307->regs[1] & RX8025_BIT_XST)) {
953 ds1307->regs[1] |= RX8025_BIT_XST;
954 i2c_smbus_write_byte_data(client,
955 RX8025_REG_CTRL2 << 4 | 0x08,
956 ds1307->regs[1]);
957 dev_warn(&client->dev,
958 "oscillator stop detected - SET TIME!\n");
959 }
960
961 if (ds1307->regs[1] & RX8025_BIT_PON) {
962 ds1307->regs[1] &= ~RX8025_BIT_PON;
963 i2c_smbus_write_byte_data(client,
964 RX8025_REG_CTRL2 << 4 | 0x08,
965 ds1307->regs[1]);
966 dev_warn(&client->dev, "power-on detected\n");
967 }
968
969 if (ds1307->regs[1] & RX8025_BIT_VDET) {
970 ds1307->regs[1] &= ~RX8025_BIT_VDET;
971 i2c_smbus_write_byte_data(client,
972 RX8025_REG_CTRL2 << 4 | 0x08,
973 ds1307->regs[1]);
974 dev_warn(&client->dev, "voltage drop detected\n");
975 }
976
977 /* make sure we are running in 24hour mode */
978 if (!(ds1307->regs[0] & RX8025_BIT_2412)) {
979 u8 hour;
980
981 /* switch to 24 hour mode */
982 i2c_smbus_write_byte_data(client,
983 RX8025_REG_CTRL1 << 4 | 0x08,
984 ds1307->regs[0] |
985 RX8025_BIT_2412);
986
987 tmp = i2c_smbus_read_i2c_block_data(ds1307->client,
988 RX8025_REG_CTRL1 << 4 | 0x08, 2, buf);
989 if (tmp != 2) {
990 dev_dbg(&client->dev, "read error %d\n", tmp);
991 err = -EIO;
992 goto exit;
993 }
994
995 /* correct hour */
996 hour = bcd2bin(ds1307->regs[DS1307_REG_HOUR]);
997 if (hour == 12)
998 hour = 0;
999 if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM)
1000 hour += 12;
1001
1002 i2c_smbus_write_byte_data(client,
1003 DS1307_REG_HOUR << 4 | 0x08,
1004 hour);
1005 }
1006 break;
1007 case ds_1388:
1008 ds1307->offset = 1; /* Seconds starts at 1 */
1009 break;
1010 case mcp794xx:
1011 rtc_ops = &mcp794xx_rtc_ops;
1012 if (ds1307->client->irq > 0 && chip->alarm) {
1013 irq_handler = mcp794xx_irq;
1014 want_irq = true;
1015 }
1016 break;
1017 default:
1018 break;
1019 }
1020
1021 read_rtc:
1022 /* read RTC registers */
1023 tmp = ds1307->read_block_data(ds1307->client, ds1307->offset, 8, buf);
1024 if (tmp != 8) {
1025 dev_dbg(&client->dev, "read error %d\n", tmp);
1026 err = -EIO;
1027 goto exit;
1028 }
1029
1030 /*
1031 * minimal sanity checking; some chips (like DS1340) don't
1032 * specify the extra bits as must-be-zero, but there are
1033 * still a few values that are clearly out-of-range.
1034 */
1035 tmp = ds1307->regs[DS1307_REG_SECS];
1036 switch (ds1307->type) {
1037 case ds_1307:
1038 case m41t00:
1039 /* clock halted? turn it on, so clock can tick. */
1040 if (tmp & DS1307_BIT_CH) {
1041 i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
1042 dev_warn(&client->dev, "SET TIME!\n");
1043 goto read_rtc;
1044 }
1045 break;
1046 case ds_1338:
1047 /* clock halted? turn it on, so clock can tick. */
1048 if (tmp & DS1307_BIT_CH)
1049 i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
1050
1051 /* oscillator fault? clear flag, and warn */
1052 if (ds1307->regs[DS1307_REG_CONTROL] & DS1338_BIT_OSF) {
1053 i2c_smbus_write_byte_data(client, DS1307_REG_CONTROL,
1054 ds1307->regs[DS1307_REG_CONTROL]
1055 & ~DS1338_BIT_OSF);
1056 dev_warn(&client->dev, "SET TIME!\n");
1057 goto read_rtc;
1058 }
1059 break;
1060 case ds_1340:
1061 /* clock halted? turn it on, so clock can tick. */
1062 if (tmp & DS1340_BIT_nEOSC)
1063 i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
1064
1065 tmp = i2c_smbus_read_byte_data(client, DS1340_REG_FLAG);
1066 if (tmp < 0) {
1067 dev_dbg(&client->dev, "read error %d\n", tmp);
1068 err = -EIO;
1069 goto exit;
1070 }
1071
1072 /* oscillator fault? clear flag, and warn */
1073 if (tmp & DS1340_BIT_OSF) {
1074 i2c_smbus_write_byte_data(client, DS1340_REG_FLAG, 0);
1075 dev_warn(&client->dev, "SET TIME!\n");
1076 }
1077 break;
1078 case mcp794xx:
1079 /* make sure that the backup battery is enabled */
1080 if (!(ds1307->regs[DS1307_REG_WDAY] & MCP794XX_BIT_VBATEN)) {
1081 i2c_smbus_write_byte_data(client, DS1307_REG_WDAY,
1082 ds1307->regs[DS1307_REG_WDAY]
1083 | MCP794XX_BIT_VBATEN);
1084 }
1085
1086 /* clock halted? turn it on, so clock can tick. */
1087 if (!(tmp & MCP794XX_BIT_ST)) {
1088 i2c_smbus_write_byte_data(client, DS1307_REG_SECS,
1089 MCP794XX_BIT_ST);
1090 dev_warn(&client->dev, "SET TIME!\n");
1091 goto read_rtc;
1092 }
1093
1094 break;
1095 default:
1096 break;
1097 }
1098
1099 tmp = ds1307->regs[DS1307_REG_HOUR];
1100 switch (ds1307->type) {
1101 case ds_1340:
1102 case m41t00:
1103 /*
1104 * NOTE: ignores century bits; fix before deploying
1105 * systems that will run through year 2100.
1106 */
1107 break;
1108 case rx_8025:
1109 break;
1110 default:
1111 if (!(tmp & DS1307_BIT_12HR))
1112 break;
1113
1114 /*
1115 * Be sure we're in 24 hour mode. Multi-master systems
1116 * take note...
1117 */
1118 tmp = bcd2bin(tmp & 0x1f);
1119 if (tmp == 12)
1120 tmp = 0;
1121 if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM)
1122 tmp += 12;
1123 i2c_smbus_write_byte_data(client,
1124 ds1307->offset + DS1307_REG_HOUR,
1125 bin2bcd(tmp));
1126 }
1127
1128 if (want_irq) {
1129 device_set_wakeup_capable(&client->dev, true);
1130 set_bit(HAS_ALARM, &ds1307->flags);
1131 }
1132 ds1307->rtc = devm_rtc_device_register(&client->dev, client->name,
1133 rtc_ops, THIS_MODULE);
1134 if (IS_ERR(ds1307->rtc)) {
1135 return PTR_ERR(ds1307->rtc);
1136 }
1137
1138 if (want_irq) {
1139 err = devm_request_threaded_irq(&client->dev,
1140 client->irq, NULL, irq_handler,
1141 IRQF_SHARED | IRQF_ONESHOT,
1142 ds1307->rtc->name, client);
1143 if (err) {
1144 client->irq = 0;
1145 device_set_wakeup_capable(&client->dev, false);
1146 clear_bit(HAS_ALARM, &ds1307->flags);
1147 dev_err(&client->dev, "unable to request IRQ!\n");
1148 } else
1149 dev_dbg(&client->dev, "got IRQ %d\n", client->irq);
1150 }
1151
1152 if (chip->nvram_size) {
1153
1154 ds1307->nvram = devm_kzalloc(&client->dev,
1155 sizeof(struct bin_attribute),
1156 GFP_KERNEL);
1157 if (!ds1307->nvram) {
1158 dev_err(&client->dev, "cannot allocate memory for nvram sysfs\n");
1159 } else {
1160
1161 ds1307->nvram->attr.name = "nvram";
1162 ds1307->nvram->attr.mode = S_IRUGO | S_IWUSR;
1163
1164 sysfs_bin_attr_init(ds1307->nvram);
1165
1166 ds1307->nvram->read = ds1307_nvram_read;
1167 ds1307->nvram->write = ds1307_nvram_write;
1168 ds1307->nvram->size = chip->nvram_size;
1169 ds1307->nvram_offset = chip->nvram_offset;
1170
1171 err = sysfs_create_bin_file(&client->dev.kobj,
1172 ds1307->nvram);
1173 if (err) {
1174 dev_err(&client->dev,
1175 "unable to create sysfs file: %s\n",
1176 ds1307->nvram->attr.name);
1177 } else {
1178 set_bit(HAS_NVRAM, &ds1307->flags);
1179 dev_info(&client->dev, "%zu bytes nvram\n",
1180 ds1307->nvram->size);
1181 }
1182 }
1183 }
1184
1185 return 0;
1186
1187 exit:
1188 return err;
1189 }
1190
1191 static int ds1307_remove(struct i2c_client *client)
1192 {
1193 struct ds1307 *ds1307 = i2c_get_clientdata(client);
1194
1195 if (test_and_clear_bit(HAS_NVRAM, &ds1307->flags))
1196 sysfs_remove_bin_file(&client->dev.kobj, ds1307->nvram);
1197
1198 return 0;
1199 }
1200
1201 static struct i2c_driver ds1307_driver = {
1202 .driver = {
1203 .name = "rtc-ds1307",
1204 },
1205 .probe = ds1307_probe,
1206 .remove = ds1307_remove,
1207 .id_table = ds1307_id,
1208 };
1209
1210 module_i2c_driver(ds1307_driver);
1211
1212 MODULE_DESCRIPTION("RTC driver for DS1307 and similar chips");
1213 MODULE_LICENSE("GPL");
Linux kernel - Deliverables
This page took 0.058912 seconds and 6 git commands to generate.