Merge branch 'devel' of git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa...
[deliverable/linux.git] / drivers / s390 / cio / qdio_main.c
1 /*
2 * linux/drivers/s390/cio/qdio_main.c
3 *
4 * Linux for s390 qdio support, buffer handling, qdio API and module support.
5 *
6 * Copyright 2000,2008 IBM Corp.
7 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>
8 * Jan Glauber <jang@linux.vnet.ibm.com>
9 * 2.6 cio integration by Cornelia Huck <cornelia.huck@de.ibm.com>
10 */
11 #include <linux/module.h>
12 #include <linux/init.h>
13 #include <linux/kernel.h>
14 #include <linux/timer.h>
15 #include <linux/delay.h>
16 #include <asm/atomic.h>
17 #include <asm/debug.h>
18 #include <asm/qdio.h>
19
20 #include "cio.h"
21 #include "css.h"
22 #include "device.h"
23 #include "qdio.h"
24 #include "qdio_debug.h"
25 #include "qdio_perf.h"
26
27 MODULE_AUTHOR("Utz Bacher <utz.bacher@de.ibm.com>,"\
28 "Jan Glauber <jang@linux.vnet.ibm.com>");
29 MODULE_DESCRIPTION("QDIO base support");
30 MODULE_LICENSE("GPL");
31
32 static inline int do_siga_sync(struct subchannel_id schid,
33 unsigned int out_mask, unsigned int in_mask)
34 {
35 register unsigned long __fc asm ("0") = 2;
36 register struct subchannel_id __schid asm ("1") = schid;
37 register unsigned long out asm ("2") = out_mask;
38 register unsigned long in asm ("3") = in_mask;
39 int cc;
40
41 asm volatile(
42 " siga 0\n"
43 " ipm %0\n"
44 " srl %0,28\n"
45 : "=d" (cc)
46 : "d" (__fc), "d" (__schid), "d" (out), "d" (in) : "cc");
47 return cc;
48 }
49
50 static inline int do_siga_input(struct subchannel_id schid, unsigned int mask)
51 {
52 register unsigned long __fc asm ("0") = 1;
53 register struct subchannel_id __schid asm ("1") = schid;
54 register unsigned long __mask asm ("2") = mask;
55 int cc;
56
57 asm volatile(
58 " siga 0\n"
59 " ipm %0\n"
60 " srl %0,28\n"
61 : "=d" (cc)
62 : "d" (__fc), "d" (__schid), "d" (__mask) : "cc", "memory");
63 return cc;
64 }
65
66 /**
67 * do_siga_output - perform SIGA-w/wt function
68 * @schid: subchannel id or in case of QEBSM the subchannel token
69 * @mask: which output queues to process
70 * @bb: busy bit indicator, set only if SIGA-w/wt could not access a buffer
71 * @fc: function code to perform
72 *
73 * Returns cc or QDIO_ERROR_SIGA_ACCESS_EXCEPTION.
74 * Note: For IQDC unicast queues only the highest priority queue is processed.
75 */
76 static inline int do_siga_output(unsigned long schid, unsigned long mask,
77 unsigned int *bb, unsigned int fc)
78 {
79 register unsigned long __fc asm("0") = fc;
80 register unsigned long __schid asm("1") = schid;
81 register unsigned long __mask asm("2") = mask;
82 int cc = QDIO_ERROR_SIGA_ACCESS_EXCEPTION;
83
84 asm volatile(
85 " siga 0\n"
86 "0: ipm %0\n"
87 " srl %0,28\n"
88 "1:\n"
89 EX_TABLE(0b, 1b)
90 : "+d" (cc), "+d" (__fc), "+d" (__schid), "+d" (__mask)
91 : : "cc", "memory");
92 *bb = ((unsigned int) __fc) >> 31;
93 return cc;
94 }
95
96 static inline int qdio_check_ccq(struct qdio_q *q, unsigned int ccq)
97 {
98 /* all done or next buffer state different */
99 if (ccq == 0 || ccq == 32)
100 return 0;
101 /* not all buffers processed */
102 if (ccq == 96 || ccq == 97)
103 return 1;
104 /* notify devices immediately */
105 DBF_ERROR("%4x ccq:%3d", SCH_NO(q), ccq);
106 return -EIO;
107 }
108
109 /**
110 * qdio_do_eqbs - extract buffer states for QEBSM
111 * @q: queue to manipulate
112 * @state: state of the extracted buffers
113 * @start: buffer number to start at
114 * @count: count of buffers to examine
115 * @auto_ack: automatically acknowledge buffers
116 *
117 * Returns the number of successfully extracted equal buffer states.
118 * Stops processing if a state is different from the last buffers state.
119 */
120 static int qdio_do_eqbs(struct qdio_q *q, unsigned char *state,
121 int start, int count, int auto_ack)
122 {
123 unsigned int ccq = 0;
124 int tmp_count = count, tmp_start = start;
125 int nr = q->nr;
126 int rc;
127
128 BUG_ON(!q->irq_ptr->sch_token);
129 qdio_perf_stat_inc(&perf_stats.debug_eqbs_all);
130
131 if (!q->is_input_q)
132 nr += q->irq_ptr->nr_input_qs;
133 again:
134 ccq = do_eqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count,
135 auto_ack);
136 rc = qdio_check_ccq(q, ccq);
137
138 /* At least one buffer was processed, return and extract the remaining
139 * buffers later.
140 */
141 if ((ccq == 96) && (count != tmp_count)) {
142 qdio_perf_stat_inc(&perf_stats.debug_eqbs_incomplete);
143 return (count - tmp_count);
144 }
145
146 if (rc == 1) {
147 DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "EQBS again:%2d", ccq);
148 goto again;
149 }
150
151 if (rc < 0) {
152 DBF_ERROR("%4x EQBS ERROR", SCH_NO(q));
153 DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
154 q->handler(q->irq_ptr->cdev,
155 QDIO_ERROR_ACTIVATE_CHECK_CONDITION,
156 0, -1, -1, q->irq_ptr->int_parm);
157 return 0;
158 }
159 return count - tmp_count;
160 }
161
162 /**
163 * qdio_do_sqbs - set buffer states for QEBSM
164 * @q: queue to manipulate
165 * @state: new state of the buffers
166 * @start: first buffer number to change
167 * @count: how many buffers to change
168 *
169 * Returns the number of successfully changed buffers.
170 * Does retrying until the specified count of buffer states is set or an
171 * error occurs.
172 */
173 static int qdio_do_sqbs(struct qdio_q *q, unsigned char state, int start,
174 int count)
175 {
176 unsigned int ccq = 0;
177 int tmp_count = count, tmp_start = start;
178 int nr = q->nr;
179 int rc;
180
181 if (!count)
182 return 0;
183
184 BUG_ON(!q->irq_ptr->sch_token);
185 qdio_perf_stat_inc(&perf_stats.debug_sqbs_all);
186
187 if (!q->is_input_q)
188 nr += q->irq_ptr->nr_input_qs;
189 again:
190 ccq = do_sqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count);
191 rc = qdio_check_ccq(q, ccq);
192 if (rc == 1) {
193 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "SQBS again:%2d", ccq);
194 qdio_perf_stat_inc(&perf_stats.debug_sqbs_incomplete);
195 goto again;
196 }
197 if (rc < 0) {
198 DBF_ERROR("%4x SQBS ERROR", SCH_NO(q));
199 DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
200 q->handler(q->irq_ptr->cdev,
201 QDIO_ERROR_ACTIVATE_CHECK_CONDITION,
202 0, -1, -1, q->irq_ptr->int_parm);
203 return 0;
204 }
205 WARN_ON(tmp_count);
206 return count - tmp_count;
207 }
208
209 /* returns number of examined buffers and their common state in *state */
210 static inline int get_buf_states(struct qdio_q *q, unsigned int bufnr,
211 unsigned char *state, unsigned int count,
212 int auto_ack)
213 {
214 unsigned char __state = 0;
215 int i;
216
217 BUG_ON(bufnr > QDIO_MAX_BUFFERS_MASK);
218 BUG_ON(count > QDIO_MAX_BUFFERS_PER_Q);
219
220 if (is_qebsm(q))
221 return qdio_do_eqbs(q, state, bufnr, count, auto_ack);
222
223 for (i = 0; i < count; i++) {
224 if (!__state)
225 __state = q->slsb.val[bufnr];
226 else if (q->slsb.val[bufnr] != __state)
227 break;
228 bufnr = next_buf(bufnr);
229 }
230 *state = __state;
231 return i;
232 }
233
234 static inline int get_buf_state(struct qdio_q *q, unsigned int bufnr,
235 unsigned char *state, int auto_ack)
236 {
237 return get_buf_states(q, bufnr, state, 1, auto_ack);
238 }
239
240 /* wrap-around safe setting of slsb states, returns number of changed buffers */
241 static inline int set_buf_states(struct qdio_q *q, int bufnr,
242 unsigned char state, int count)
243 {
244 int i;
245
246 BUG_ON(bufnr > QDIO_MAX_BUFFERS_MASK);
247 BUG_ON(count > QDIO_MAX_BUFFERS_PER_Q);
248
249 if (is_qebsm(q))
250 return qdio_do_sqbs(q, state, bufnr, count);
251
252 for (i = 0; i < count; i++) {
253 xchg(&q->slsb.val[bufnr], state);
254 bufnr = next_buf(bufnr);
255 }
256 return count;
257 }
258
259 static inline int set_buf_state(struct qdio_q *q, int bufnr,
260 unsigned char state)
261 {
262 return set_buf_states(q, bufnr, state, 1);
263 }
264
265 /* set slsb states to initial state */
266 void qdio_init_buf_states(struct qdio_irq *irq_ptr)
267 {
268 struct qdio_q *q;
269 int i;
270
271 for_each_input_queue(irq_ptr, q, i)
272 set_buf_states(q, 0, SLSB_P_INPUT_NOT_INIT,
273 QDIO_MAX_BUFFERS_PER_Q);
274 for_each_output_queue(irq_ptr, q, i)
275 set_buf_states(q, 0, SLSB_P_OUTPUT_NOT_INIT,
276 QDIO_MAX_BUFFERS_PER_Q);
277 }
278
279 static inline int qdio_siga_sync(struct qdio_q *q, unsigned int output,
280 unsigned int input)
281 {
282 int cc;
283
284 if (!need_siga_sync(q))
285 return 0;
286
287 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-s:%1d", q->nr);
288 qdio_perf_stat_inc(&perf_stats.siga_sync);
289
290 cc = do_siga_sync(q->irq_ptr->schid, output, input);
291 if (cc)
292 DBF_ERROR("%4x SIGA-S:%2d", SCH_NO(q), cc);
293 return cc;
294 }
295
296 static inline int qdio_siga_sync_q(struct qdio_q *q)
297 {
298 if (q->is_input_q)
299 return qdio_siga_sync(q, 0, q->mask);
300 else
301 return qdio_siga_sync(q, q->mask, 0);
302 }
303
304 static inline int qdio_siga_sync_out(struct qdio_q *q)
305 {
306 return qdio_siga_sync(q, ~0U, 0);
307 }
308
309 static inline int qdio_siga_sync_all(struct qdio_q *q)
310 {
311 return qdio_siga_sync(q, ~0U, ~0U);
312 }
313
314 static int qdio_siga_output(struct qdio_q *q, unsigned int *busy_bit)
315 {
316 unsigned long schid;
317 unsigned int fc = 0;
318 u64 start_time = 0;
319 int cc;
320
321 if (q->u.out.use_enh_siga)
322 fc = 3;
323
324 if (is_qebsm(q)) {
325 schid = q->irq_ptr->sch_token;
326 fc |= 0x80;
327 }
328 else
329 schid = *((u32 *)&q->irq_ptr->schid);
330
331 again:
332 cc = do_siga_output(schid, q->mask, busy_bit, fc);
333
334 /* hipersocket busy condition */
335 if (*busy_bit) {
336 WARN_ON(queue_type(q) != QDIO_IQDIO_QFMT || cc != 2);
337
338 if (!start_time) {
339 start_time = get_usecs();
340 goto again;
341 }
342 if ((get_usecs() - start_time) < QDIO_BUSY_BIT_PATIENCE)
343 goto again;
344 }
345 return cc;
346 }
347
348 static inline int qdio_siga_input(struct qdio_q *q)
349 {
350 int cc;
351
352 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-r:%1d", q->nr);
353 qdio_perf_stat_inc(&perf_stats.siga_in);
354
355 cc = do_siga_input(q->irq_ptr->schid, q->mask);
356 if (cc)
357 DBF_ERROR("%4x SIGA-R:%2d", SCH_NO(q), cc);
358 return cc;
359 }
360
361 static inline void qdio_sync_after_thinint(struct qdio_q *q)
362 {
363 if (pci_out_supported(q)) {
364 if (need_siga_sync_thinint(q))
365 qdio_siga_sync_all(q);
366 else if (need_siga_sync_out_thinint(q))
367 qdio_siga_sync_out(q);
368 } else
369 qdio_siga_sync_q(q);
370 }
371
372 int debug_get_buf_state(struct qdio_q *q, unsigned int bufnr,
373 unsigned char *state)
374 {
375 qdio_siga_sync_q(q);
376 return get_buf_states(q, bufnr, state, 1, 0);
377 }
378
379 static inline void qdio_stop_polling(struct qdio_q *q)
380 {
381 if (!q->u.in.polling)
382 return;
383
384 q->u.in.polling = 0;
385 qdio_perf_stat_inc(&perf_stats.debug_stop_polling);
386
387 /* show the card that we are not polling anymore */
388 if (is_qebsm(q)) {
389 set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT,
390 q->u.in.ack_count);
391 q->u.in.ack_count = 0;
392 } else
393 set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT);
394 }
395
396 static void announce_buffer_error(struct qdio_q *q, int count)
397 {
398 q->qdio_error |= QDIO_ERROR_SLSB_STATE;
399
400 /* special handling for no target buffer empty */
401 if ((!q->is_input_q &&
402 (q->sbal[q->first_to_check]->element[15].flags & 0xff) == 0x10)) {
403 qdio_perf_stat_inc(&perf_stats.outbound_target_full);
404 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "OUTFULL FTC:%3d",
405 q->first_to_check);
406 return;
407 }
408
409 DBF_ERROR("%4x BUF ERROR", SCH_NO(q));
410 DBF_ERROR((q->is_input_q) ? "IN:%2d" : "OUT:%2d", q->nr);
411 DBF_ERROR("FTC:%3d C:%3d", q->first_to_check, count);
412 DBF_ERROR("F14:%2x F15:%2x",
413 q->sbal[q->first_to_check]->element[14].flags & 0xff,
414 q->sbal[q->first_to_check]->element[15].flags & 0xff);
415 }
416
417 static inline void inbound_primed(struct qdio_q *q, int count)
418 {
419 int new;
420
421 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in prim: %3d", count);
422
423 /* for QEBSM the ACK was already set by EQBS */
424 if (is_qebsm(q)) {
425 if (!q->u.in.polling) {
426 q->u.in.polling = 1;
427 q->u.in.ack_count = count;
428 q->u.in.ack_start = q->first_to_check;
429 return;
430 }
431
432 /* delete the previous ACK's */
433 set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT,
434 q->u.in.ack_count);
435 q->u.in.ack_count = count;
436 q->u.in.ack_start = q->first_to_check;
437 return;
438 }
439
440 /*
441 * ACK the newest buffer. The ACK will be removed in qdio_stop_polling
442 * or by the next inbound run.
443 */
444 new = add_buf(q->first_to_check, count - 1);
445 if (q->u.in.polling) {
446 /* reset the previous ACK but first set the new one */
447 set_buf_state(q, new, SLSB_P_INPUT_ACK);
448 set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT);
449 } else {
450 q->u.in.polling = 1;
451 set_buf_state(q, new, SLSB_P_INPUT_ACK);
452 }
453
454 q->u.in.ack_start = new;
455 count--;
456 if (!count)
457 return;
458 }
459
460 static int get_inbound_buffer_frontier(struct qdio_q *q)
461 {
462 int count, stop;
463 unsigned char state;
464
465 /*
466 * Don't check 128 buffers, as otherwise qdio_inbound_q_moved
467 * would return 0.
468 */
469 count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK);
470 stop = add_buf(q->first_to_check, count);
471
472 if (q->first_to_check == stop)
473 goto out;
474
475 /*
476 * No siga sync here, as a PCI or we after a thin interrupt
477 * already sync'ed the queues.
478 */
479 count = get_buf_states(q, q->first_to_check, &state, count, 1);
480 if (!count)
481 goto out;
482
483 switch (state) {
484 case SLSB_P_INPUT_PRIMED:
485 inbound_primed(q, count);
486 q->first_to_check = add_buf(q->first_to_check, count);
487 atomic_sub(count, &q->nr_buf_used);
488 break;
489 case SLSB_P_INPUT_ERROR:
490 announce_buffer_error(q, count);
491 /* process the buffer, the upper layer will take care of it */
492 q->first_to_check = add_buf(q->first_to_check, count);
493 atomic_sub(count, &q->nr_buf_used);
494 break;
495 case SLSB_CU_INPUT_EMPTY:
496 case SLSB_P_INPUT_NOT_INIT:
497 case SLSB_P_INPUT_ACK:
498 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in nop");
499 break;
500 default:
501 BUG();
502 }
503 out:
504 return q->first_to_check;
505 }
506
507 static int qdio_inbound_q_moved(struct qdio_q *q)
508 {
509 int bufnr;
510
511 bufnr = get_inbound_buffer_frontier(q);
512
513 if ((bufnr != q->last_move) || q->qdio_error) {
514 q->last_move = bufnr;
515 if (!is_thinint_irq(q->irq_ptr) && !MACHINE_IS_VM)
516 q->u.in.timestamp = get_usecs();
517 return 1;
518 } else
519 return 0;
520 }
521
522 static inline int qdio_inbound_q_done(struct qdio_q *q)
523 {
524 unsigned char state = 0;
525
526 if (!atomic_read(&q->nr_buf_used))
527 return 1;
528
529 qdio_siga_sync_q(q);
530 get_buf_state(q, q->first_to_check, &state, 0);
531
532 if (state == SLSB_P_INPUT_PRIMED)
533 /* more work coming */
534 return 0;
535
536 if (is_thinint_irq(q->irq_ptr))
537 return 1;
538
539 /* don't poll under z/VM */
540 if (MACHINE_IS_VM)
541 return 1;
542
543 /*
544 * At this point we know, that inbound first_to_check
545 * has (probably) not moved (see qdio_inbound_processing).
546 */
547 if (get_usecs() > q->u.in.timestamp + QDIO_INPUT_THRESHOLD) {
548 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in done:%3d",
549 q->first_to_check);
550 return 1;
551 } else
552 return 0;
553 }
554
555 static void qdio_kick_handler(struct qdio_q *q)
556 {
557 int start = q->first_to_kick;
558 int end = q->first_to_check;
559 int count;
560
561 if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
562 return;
563
564 count = sub_buf(end, start);
565
566 if (q->is_input_q) {
567 qdio_perf_stat_inc(&perf_stats.inbound_handler);
568 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "kih s:%3d c:%3d", start, count);
569 } else {
570 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "koh: nr:%1d", q->nr);
571 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "s:%3d c:%3d", start, count);
572 }
573
574 q->handler(q->irq_ptr->cdev, q->qdio_error, q->nr, start, count,
575 q->irq_ptr->int_parm);
576
577 /* for the next time */
578 q->first_to_kick = end;
579 q->qdio_error = 0;
580 }
581
582 static void __qdio_inbound_processing(struct qdio_q *q)
583 {
584 qdio_perf_stat_inc(&perf_stats.tasklet_inbound);
585 again:
586 if (!qdio_inbound_q_moved(q))
587 return;
588
589 qdio_kick_handler(q);
590
591 if (!qdio_inbound_q_done(q))
592 /* means poll time is not yet over */
593 goto again;
594
595 qdio_stop_polling(q);
596 /*
597 * We need to check again to not lose initiative after
598 * resetting the ACK state.
599 */
600 if (!qdio_inbound_q_done(q))
601 goto again;
602 }
603
604 void qdio_inbound_processing(unsigned long data)
605 {
606 struct qdio_q *q = (struct qdio_q *)data;
607 __qdio_inbound_processing(q);
608 }
609
610 static int get_outbound_buffer_frontier(struct qdio_q *q)
611 {
612 int count, stop;
613 unsigned char state;
614
615 if (((queue_type(q) != QDIO_IQDIO_QFMT) && !pci_out_supported(q)) ||
616 (queue_type(q) == QDIO_IQDIO_QFMT && multicast_outbound(q)))
617 qdio_siga_sync_q(q);
618
619 /*
620 * Don't check 128 buffers, as otherwise qdio_inbound_q_moved
621 * would return 0.
622 */
623 count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK);
624 stop = add_buf(q->first_to_check, count);
625
626 if (q->first_to_check == stop)
627 return q->first_to_check;
628
629 count = get_buf_states(q, q->first_to_check, &state, count, 0);
630 if (!count)
631 return q->first_to_check;
632
633 switch (state) {
634 case SLSB_P_OUTPUT_EMPTY:
635 /* the adapter got it */
636 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out empty:%1d %3d", q->nr, count);
637
638 atomic_sub(count, &q->nr_buf_used);
639 q->first_to_check = add_buf(q->first_to_check, count);
640 break;
641 case SLSB_P_OUTPUT_ERROR:
642 announce_buffer_error(q, count);
643 /* process the buffer, the upper layer will take care of it */
644 q->first_to_check = add_buf(q->first_to_check, count);
645 atomic_sub(count, &q->nr_buf_used);
646 break;
647 case SLSB_CU_OUTPUT_PRIMED:
648 /* the adapter has not fetched the output yet */
649 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out primed:%1d", q->nr);
650 break;
651 case SLSB_P_OUTPUT_NOT_INIT:
652 case SLSB_P_OUTPUT_HALTED:
653 break;
654 default:
655 BUG();
656 }
657 return q->first_to_check;
658 }
659
660 /* all buffers processed? */
661 static inline int qdio_outbound_q_done(struct qdio_q *q)
662 {
663 return atomic_read(&q->nr_buf_used) == 0;
664 }
665
666 static inline int qdio_outbound_q_moved(struct qdio_q *q)
667 {
668 int bufnr;
669
670 bufnr = get_outbound_buffer_frontier(q);
671
672 if ((bufnr != q->last_move) || q->qdio_error) {
673 q->last_move = bufnr;
674 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out moved:%1d", q->nr);
675 return 1;
676 } else
677 return 0;
678 }
679
680 static int qdio_kick_outbound_q(struct qdio_q *q)
681 {
682 unsigned int busy_bit;
683 int cc;
684
685 if (!need_siga_out(q))
686 return 0;
687
688 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w:%1d", q->nr);
689 qdio_perf_stat_inc(&perf_stats.siga_out);
690
691 cc = qdio_siga_output(q, &busy_bit);
692 switch (cc) {
693 case 0:
694 break;
695 case 2:
696 if (busy_bit) {
697 DBF_ERROR("%4x cc2 REP:%1d", SCH_NO(q), q->nr);
698 cc |= QDIO_ERROR_SIGA_BUSY;
699 } else
700 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w cc2:%1d", q->nr);
701 break;
702 case 1:
703 case 3:
704 DBF_ERROR("%4x SIGA-W:%1d", SCH_NO(q), cc);
705 break;
706 }
707 return cc;
708 }
709
710 static void __qdio_outbound_processing(struct qdio_q *q)
711 {
712 qdio_perf_stat_inc(&perf_stats.tasklet_outbound);
713 BUG_ON(atomic_read(&q->nr_buf_used) < 0);
714
715 if (qdio_outbound_q_moved(q))
716 qdio_kick_handler(q);
717
718 if (queue_type(q) == QDIO_ZFCP_QFMT)
719 if (!pci_out_supported(q) && !qdio_outbound_q_done(q))
720 goto sched;
721
722 /* bail out for HiperSockets unicast queues */
723 if (queue_type(q) == QDIO_IQDIO_QFMT && !multicast_outbound(q))
724 return;
725
726 if ((queue_type(q) == QDIO_IQDIO_QFMT) &&
727 (atomic_read(&q->nr_buf_used)) > QDIO_IQDIO_POLL_LVL)
728 goto sched;
729
730 if (q->u.out.pci_out_enabled)
731 return;
732
733 /*
734 * Now we know that queue type is either qeth without pci enabled
735 * or HiperSockets multicast. Make sure buffer switch from PRIMED to
736 * EMPTY is noticed and outbound_handler is called after some time.
737 */
738 if (qdio_outbound_q_done(q))
739 del_timer(&q->u.out.timer);
740 else {
741 if (!timer_pending(&q->u.out.timer)) {
742 mod_timer(&q->u.out.timer, jiffies + 10 * HZ);
743 qdio_perf_stat_inc(&perf_stats.debug_tl_out_timer);
744 }
745 }
746 return;
747
748 sched:
749 if (unlikely(q->irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
750 return;
751 tasklet_schedule(&q->tasklet);
752 }
753
754 /* outbound tasklet */
755 void qdio_outbound_processing(unsigned long data)
756 {
757 struct qdio_q *q = (struct qdio_q *)data;
758 __qdio_outbound_processing(q);
759 }
760
761 void qdio_outbound_timer(unsigned long data)
762 {
763 struct qdio_q *q = (struct qdio_q *)data;
764
765 if (unlikely(q->irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
766 return;
767 tasklet_schedule(&q->tasklet);
768 }
769
770 static inline void qdio_check_outbound_after_thinint(struct qdio_q *q)
771 {
772 struct qdio_q *out;
773 int i;
774
775 if (!pci_out_supported(q))
776 return;
777
778 for_each_output_queue(q->irq_ptr, out, i)
779 if (!qdio_outbound_q_done(out))
780 tasklet_schedule(&out->tasklet);
781 }
782
783 static void __tiqdio_inbound_processing(struct qdio_q *q)
784 {
785 qdio_perf_stat_inc(&perf_stats.thinint_inbound);
786 qdio_sync_after_thinint(q);
787
788 /*
789 * The interrupt could be caused by a PCI request. Check the
790 * PCI capable outbound queues.
791 */
792 qdio_check_outbound_after_thinint(q);
793
794 if (!qdio_inbound_q_moved(q))
795 return;
796
797 qdio_kick_handler(q);
798
799 if (!qdio_inbound_q_done(q)) {
800 qdio_perf_stat_inc(&perf_stats.thinint_inbound_loop);
801 if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED)) {
802 tasklet_schedule(&q->tasklet);
803 return;
804 }
805 }
806
807 qdio_stop_polling(q);
808 /*
809 * We need to check again to not lose initiative after
810 * resetting the ACK state.
811 */
812 if (!qdio_inbound_q_done(q)) {
813 qdio_perf_stat_inc(&perf_stats.thinint_inbound_loop2);
814 if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED))
815 tasklet_schedule(&q->tasklet);
816 }
817 }
818
819 void tiqdio_inbound_processing(unsigned long data)
820 {
821 struct qdio_q *q = (struct qdio_q *)data;
822 __tiqdio_inbound_processing(q);
823 }
824
825 static inline void qdio_set_state(struct qdio_irq *irq_ptr,
826 enum qdio_irq_states state)
827 {
828 DBF_DEV_EVENT(DBF_INFO, irq_ptr, "newstate: %1d", state);
829
830 irq_ptr->state = state;
831 mb();
832 }
833
834 static void qdio_irq_check_sense(struct qdio_irq *irq_ptr, struct irb *irb)
835 {
836 if (irb->esw.esw0.erw.cons) {
837 DBF_ERROR("%4x sense:", irq_ptr->schid.sch_no);
838 DBF_ERROR_HEX(irb, 64);
839 DBF_ERROR_HEX(irb->ecw, 64);
840 }
841 }
842
843 /* PCI interrupt handler */
844 static void qdio_int_handler_pci(struct qdio_irq *irq_ptr)
845 {
846 int i;
847 struct qdio_q *q;
848
849 if (unlikely(irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
850 return;
851
852 qdio_perf_stat_inc(&perf_stats.pci_int);
853
854 for_each_input_queue(irq_ptr, q, i)
855 tasklet_schedule(&q->tasklet);
856
857 if (!(irq_ptr->qib.ac & QIB_AC_OUTBOUND_PCI_SUPPORTED))
858 return;
859
860 for_each_output_queue(irq_ptr, q, i) {
861 if (qdio_outbound_q_done(q))
862 continue;
863
864 if (!siga_syncs_out_pci(q))
865 qdio_siga_sync_q(q);
866
867 tasklet_schedule(&q->tasklet);
868 }
869 }
870
871 static void qdio_handle_activate_check(struct ccw_device *cdev,
872 unsigned long intparm, int cstat, int dstat)
873 {
874 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
875 struct qdio_q *q;
876
877 DBF_ERROR("%4x ACT CHECK", irq_ptr->schid.sch_no);
878 DBF_ERROR("intp :%lx", intparm);
879 DBF_ERROR("ds: %2x cs:%2x", dstat, cstat);
880
881 if (irq_ptr->nr_input_qs) {
882 q = irq_ptr->input_qs[0];
883 } else if (irq_ptr->nr_output_qs) {
884 q = irq_ptr->output_qs[0];
885 } else {
886 dump_stack();
887 goto no_handler;
888 }
889 q->handler(q->irq_ptr->cdev, QDIO_ERROR_ACTIVATE_CHECK_CONDITION,
890 0, -1, -1, irq_ptr->int_parm);
891 no_handler:
892 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
893 }
894
895 static void qdio_establish_handle_irq(struct ccw_device *cdev, int cstat,
896 int dstat)
897 {
898 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
899
900 DBF_DEV_EVENT(DBF_INFO, irq_ptr, "qest irq");
901
902 if (cstat)
903 goto error;
904 if (dstat & ~(DEV_STAT_DEV_END | DEV_STAT_CHN_END))
905 goto error;
906 if (!(dstat & DEV_STAT_DEV_END))
907 goto error;
908 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ESTABLISHED);
909 return;
910
911 error:
912 DBF_ERROR("%4x EQ:error", irq_ptr->schid.sch_no);
913 DBF_ERROR("ds: %2x cs:%2x", dstat, cstat);
914 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
915 }
916
917 /* qdio interrupt handler */
918 void qdio_int_handler(struct ccw_device *cdev, unsigned long intparm,
919 struct irb *irb)
920 {
921 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
922 int cstat, dstat;
923
924 qdio_perf_stat_inc(&perf_stats.qdio_int);
925
926 if (!intparm || !irq_ptr) {
927 DBF_ERROR("qint:%4x", cdev->private->schid.sch_no);
928 return;
929 }
930
931 if (IS_ERR(irb)) {
932 switch (PTR_ERR(irb)) {
933 case -EIO:
934 DBF_ERROR("%4x IO error", irq_ptr->schid.sch_no);
935 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
936 wake_up(&cdev->private->wait_q);
937 return;
938 default:
939 WARN_ON(1);
940 return;
941 }
942 }
943 qdio_irq_check_sense(irq_ptr, irb);
944 cstat = irb->scsw.cmd.cstat;
945 dstat = irb->scsw.cmd.dstat;
946
947 switch (irq_ptr->state) {
948 case QDIO_IRQ_STATE_INACTIVE:
949 qdio_establish_handle_irq(cdev, cstat, dstat);
950 break;
951 case QDIO_IRQ_STATE_CLEANUP:
952 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
953 break;
954 case QDIO_IRQ_STATE_ESTABLISHED:
955 case QDIO_IRQ_STATE_ACTIVE:
956 if (cstat & SCHN_STAT_PCI) {
957 qdio_int_handler_pci(irq_ptr);
958 return;
959 }
960 if (cstat || dstat)
961 qdio_handle_activate_check(cdev, intparm, cstat,
962 dstat);
963 break;
964 default:
965 WARN_ON(1);
966 }
967 wake_up(&cdev->private->wait_q);
968 }
969
970 /**
971 * qdio_get_ssqd_desc - get qdio subchannel description
972 * @cdev: ccw device to get description for
973 * @data: where to store the ssqd
974 *
975 * Returns 0 or an error code. The results of the chsc are stored in the
976 * specified structure.
977 */
978 int qdio_get_ssqd_desc(struct ccw_device *cdev,
979 struct qdio_ssqd_desc *data)
980 {
981
982 if (!cdev || !cdev->private)
983 return -EINVAL;
984
985 DBF_EVENT("get ssqd:%4x", cdev->private->schid.sch_no);
986 return qdio_setup_get_ssqd(NULL, &cdev->private->schid, data);
987 }
988 EXPORT_SYMBOL_GPL(qdio_get_ssqd_desc);
989
990 /**
991 * qdio_cleanup - shutdown queues and free data structures
992 * @cdev: associated ccw device
993 * @how: use halt or clear to shutdown
994 *
995 * This function calls qdio_shutdown() for @cdev with method @how.
996 * and qdio_free(). The qdio_free() return value is ignored since
997 * !irq_ptr is already checked.
998 */
999 int qdio_cleanup(struct ccw_device *cdev, int how)
1000 {
1001 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1002 int rc;
1003
1004 if (!irq_ptr)
1005 return -ENODEV;
1006
1007 rc = qdio_shutdown(cdev, how);
1008
1009 qdio_free(cdev);
1010 return rc;
1011 }
1012 EXPORT_SYMBOL_GPL(qdio_cleanup);
1013
1014 static void qdio_shutdown_queues(struct ccw_device *cdev)
1015 {
1016 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1017 struct qdio_q *q;
1018 int i;
1019
1020 for_each_input_queue(irq_ptr, q, i)
1021 tasklet_kill(&q->tasklet);
1022
1023 for_each_output_queue(irq_ptr, q, i) {
1024 del_timer(&q->u.out.timer);
1025 tasklet_kill(&q->tasklet);
1026 }
1027 }
1028
1029 /**
1030 * qdio_shutdown - shut down a qdio subchannel
1031 * @cdev: associated ccw device
1032 * @how: use halt or clear to shutdown
1033 */
1034 int qdio_shutdown(struct ccw_device *cdev, int how)
1035 {
1036 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1037 int rc;
1038 unsigned long flags;
1039
1040 if (!irq_ptr)
1041 return -ENODEV;
1042
1043 BUG_ON(irqs_disabled());
1044 DBF_EVENT("qshutdown:%4x", cdev->private->schid.sch_no);
1045
1046 mutex_lock(&irq_ptr->setup_mutex);
1047 /*
1048 * Subchannel was already shot down. We cannot prevent being called
1049 * twice since cio may trigger a shutdown asynchronously.
1050 */
1051 if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) {
1052 mutex_unlock(&irq_ptr->setup_mutex);
1053 return 0;
1054 }
1055
1056 /*
1057 * Indicate that the device is going down. Scheduling the queue
1058 * tasklets is forbidden from here on.
1059 */
1060 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
1061
1062 tiqdio_remove_input_queues(irq_ptr);
1063 qdio_shutdown_queues(cdev);
1064 qdio_shutdown_debug_entries(irq_ptr, cdev);
1065
1066 /* cleanup subchannel */
1067 spin_lock_irqsave(get_ccwdev_lock(cdev), flags);
1068
1069 if (how & QDIO_FLAG_CLEANUP_USING_CLEAR)
1070 rc = ccw_device_clear(cdev, QDIO_DOING_CLEANUP);
1071 else
1072 /* default behaviour is halt */
1073 rc = ccw_device_halt(cdev, QDIO_DOING_CLEANUP);
1074 if (rc) {
1075 DBF_ERROR("%4x SHUTD ERR", irq_ptr->schid.sch_no);
1076 DBF_ERROR("rc:%4d", rc);
1077 goto no_cleanup;
1078 }
1079
1080 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_CLEANUP);
1081 spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
1082 wait_event_interruptible_timeout(cdev->private->wait_q,
1083 irq_ptr->state == QDIO_IRQ_STATE_INACTIVE ||
1084 irq_ptr->state == QDIO_IRQ_STATE_ERR,
1085 10 * HZ);
1086 spin_lock_irqsave(get_ccwdev_lock(cdev), flags);
1087
1088 no_cleanup:
1089 qdio_shutdown_thinint(irq_ptr);
1090
1091 /* restore interrupt handler */
1092 if ((void *)cdev->handler == (void *)qdio_int_handler)
1093 cdev->handler = irq_ptr->orig_handler;
1094 spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
1095
1096 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
1097 mutex_unlock(&irq_ptr->setup_mutex);
1098 if (rc)
1099 return rc;
1100 return 0;
1101 }
1102 EXPORT_SYMBOL_GPL(qdio_shutdown);
1103
1104 /**
1105 * qdio_free - free data structures for a qdio subchannel
1106 * @cdev: associated ccw device
1107 */
1108 int qdio_free(struct ccw_device *cdev)
1109 {
1110 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1111
1112 if (!irq_ptr)
1113 return -ENODEV;
1114
1115 DBF_EVENT("qfree:%4x", cdev->private->schid.sch_no);
1116 mutex_lock(&irq_ptr->setup_mutex);
1117
1118 if (irq_ptr->debug_area != NULL) {
1119 debug_unregister(irq_ptr->debug_area);
1120 irq_ptr->debug_area = NULL;
1121 }
1122 cdev->private->qdio_data = NULL;
1123 mutex_unlock(&irq_ptr->setup_mutex);
1124
1125 qdio_release_memory(irq_ptr);
1126 return 0;
1127 }
1128 EXPORT_SYMBOL_GPL(qdio_free);
1129
1130 /**
1131 * qdio_initialize - allocate and establish queues for a qdio subchannel
1132 * @init_data: initialization data
1133 *
1134 * This function first allocates queues via qdio_allocate() and on success
1135 * establishes them via qdio_establish().
1136 */
1137 int qdio_initialize(struct qdio_initialize *init_data)
1138 {
1139 int rc;
1140
1141 rc = qdio_allocate(init_data);
1142 if (rc)
1143 return rc;
1144
1145 rc = qdio_establish(init_data);
1146 if (rc)
1147 qdio_free(init_data->cdev);
1148 return rc;
1149 }
1150 EXPORT_SYMBOL_GPL(qdio_initialize);
1151
1152 /**
1153 * qdio_allocate - allocate qdio queues and associated data
1154 * @init_data: initialization data
1155 */
1156 int qdio_allocate(struct qdio_initialize *init_data)
1157 {
1158 struct qdio_irq *irq_ptr;
1159
1160 DBF_EVENT("qallocate:%4x", init_data->cdev->private->schid.sch_no);
1161
1162 if ((init_data->no_input_qs && !init_data->input_handler) ||
1163 (init_data->no_output_qs && !init_data->output_handler))
1164 return -EINVAL;
1165
1166 if ((init_data->no_input_qs > QDIO_MAX_QUEUES_PER_IRQ) ||
1167 (init_data->no_output_qs > QDIO_MAX_QUEUES_PER_IRQ))
1168 return -EINVAL;
1169
1170 if ((!init_data->input_sbal_addr_array) ||
1171 (!init_data->output_sbal_addr_array))
1172 return -EINVAL;
1173
1174 /* irq_ptr must be in GFP_DMA since it contains ccw1.cda */
1175 irq_ptr = (void *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
1176 if (!irq_ptr)
1177 goto out_err;
1178
1179 mutex_init(&irq_ptr->setup_mutex);
1180 qdio_allocate_dbf(init_data, irq_ptr);
1181
1182 /*
1183 * Allocate a page for the chsc calls in qdio_establish.
1184 * Must be pre-allocated since a zfcp recovery will call
1185 * qdio_establish. In case of low memory and swap on a zfcp disk
1186 * we may not be able to allocate memory otherwise.
1187 */
1188 irq_ptr->chsc_page = get_zeroed_page(GFP_KERNEL);
1189 if (!irq_ptr->chsc_page)
1190 goto out_rel;
1191
1192 /* qdr is used in ccw1.cda which is u32 */
1193 irq_ptr->qdr = (struct qdr *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
1194 if (!irq_ptr->qdr)
1195 goto out_rel;
1196 WARN_ON((unsigned long)irq_ptr->qdr & 0xfff);
1197
1198 if (qdio_allocate_qs(irq_ptr, init_data->no_input_qs,
1199 init_data->no_output_qs))
1200 goto out_rel;
1201
1202 init_data->cdev->private->qdio_data = irq_ptr;
1203 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
1204 return 0;
1205 out_rel:
1206 qdio_release_memory(irq_ptr);
1207 out_err:
1208 return -ENOMEM;
1209 }
1210 EXPORT_SYMBOL_GPL(qdio_allocate);
1211
1212 /**
1213 * qdio_establish - establish queues on a qdio subchannel
1214 * @init_data: initialization data
1215 */
1216 int qdio_establish(struct qdio_initialize *init_data)
1217 {
1218 struct qdio_irq *irq_ptr;
1219 struct ccw_device *cdev = init_data->cdev;
1220 unsigned long saveflags;
1221 int rc;
1222
1223 DBF_EVENT("qestablish:%4x", cdev->private->schid.sch_no);
1224
1225 irq_ptr = cdev->private->qdio_data;
1226 if (!irq_ptr)
1227 return -ENODEV;
1228
1229 if (cdev->private->state != DEV_STATE_ONLINE)
1230 return -EINVAL;
1231
1232 mutex_lock(&irq_ptr->setup_mutex);
1233 qdio_setup_irq(init_data);
1234
1235 rc = qdio_establish_thinint(irq_ptr);
1236 if (rc) {
1237 mutex_unlock(&irq_ptr->setup_mutex);
1238 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
1239 return rc;
1240 }
1241
1242 /* establish q */
1243 irq_ptr->ccw.cmd_code = irq_ptr->equeue.cmd;
1244 irq_ptr->ccw.flags = CCW_FLAG_SLI;
1245 irq_ptr->ccw.count = irq_ptr->equeue.count;
1246 irq_ptr->ccw.cda = (u32)((addr_t)irq_ptr->qdr);
1247
1248 spin_lock_irqsave(get_ccwdev_lock(cdev), saveflags);
1249 ccw_device_set_options_mask(cdev, 0);
1250
1251 rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ESTABLISH, 0, 0);
1252 if (rc) {
1253 DBF_ERROR("%4x est IO ERR", irq_ptr->schid.sch_no);
1254 DBF_ERROR("rc:%4x", rc);
1255 }
1256 spin_unlock_irqrestore(get_ccwdev_lock(cdev), saveflags);
1257
1258 if (rc) {
1259 mutex_unlock(&irq_ptr->setup_mutex);
1260 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
1261 return rc;
1262 }
1263
1264 wait_event_interruptible_timeout(cdev->private->wait_q,
1265 irq_ptr->state == QDIO_IRQ_STATE_ESTABLISHED ||
1266 irq_ptr->state == QDIO_IRQ_STATE_ERR, HZ);
1267
1268 if (irq_ptr->state != QDIO_IRQ_STATE_ESTABLISHED) {
1269 mutex_unlock(&irq_ptr->setup_mutex);
1270 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
1271 return -EIO;
1272 }
1273
1274 qdio_setup_ssqd_info(irq_ptr);
1275 DBF_EVENT("qDmmwc:%2x", irq_ptr->ssqd_desc.mmwc);
1276 DBF_EVENT("qib ac:%4x", irq_ptr->qib.ac);
1277
1278 /* qebsm is now setup if available, initialize buffer states */
1279 qdio_init_buf_states(irq_ptr);
1280
1281 mutex_unlock(&irq_ptr->setup_mutex);
1282 qdio_print_subchannel_info(irq_ptr, cdev);
1283 qdio_setup_debug_entries(irq_ptr, cdev);
1284 return 0;
1285 }
1286 EXPORT_SYMBOL_GPL(qdio_establish);
1287
1288 /**
1289 * qdio_activate - activate queues on a qdio subchannel
1290 * @cdev: associated cdev
1291 */
1292 int qdio_activate(struct ccw_device *cdev)
1293 {
1294 struct qdio_irq *irq_ptr;
1295 int rc;
1296 unsigned long saveflags;
1297
1298 DBF_EVENT("qactivate:%4x", cdev->private->schid.sch_no);
1299
1300 irq_ptr = cdev->private->qdio_data;
1301 if (!irq_ptr)
1302 return -ENODEV;
1303
1304 if (cdev->private->state != DEV_STATE_ONLINE)
1305 return -EINVAL;
1306
1307 mutex_lock(&irq_ptr->setup_mutex);
1308 if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) {
1309 rc = -EBUSY;
1310 goto out;
1311 }
1312
1313 irq_ptr->ccw.cmd_code = irq_ptr->aqueue.cmd;
1314 irq_ptr->ccw.flags = CCW_FLAG_SLI;
1315 irq_ptr->ccw.count = irq_ptr->aqueue.count;
1316 irq_ptr->ccw.cda = 0;
1317
1318 spin_lock_irqsave(get_ccwdev_lock(cdev), saveflags);
1319 ccw_device_set_options(cdev, CCWDEV_REPORT_ALL);
1320
1321 rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ACTIVATE,
1322 0, DOIO_DENY_PREFETCH);
1323 if (rc) {
1324 DBF_ERROR("%4x act IO ERR", irq_ptr->schid.sch_no);
1325 DBF_ERROR("rc:%4x", rc);
1326 }
1327 spin_unlock_irqrestore(get_ccwdev_lock(cdev), saveflags);
1328
1329 if (rc)
1330 goto out;
1331
1332 if (is_thinint_irq(irq_ptr))
1333 tiqdio_add_input_queues(irq_ptr);
1334
1335 /* wait for subchannel to become active */
1336 msleep(5);
1337
1338 switch (irq_ptr->state) {
1339 case QDIO_IRQ_STATE_STOPPED:
1340 case QDIO_IRQ_STATE_ERR:
1341 rc = -EIO;
1342 break;
1343 default:
1344 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ACTIVE);
1345 rc = 0;
1346 }
1347 out:
1348 mutex_unlock(&irq_ptr->setup_mutex);
1349 return rc;
1350 }
1351 EXPORT_SYMBOL_GPL(qdio_activate);
1352
1353 static inline int buf_in_between(int bufnr, int start, int count)
1354 {
1355 int end = add_buf(start, count);
1356
1357 if (end > start) {
1358 if (bufnr >= start && bufnr < end)
1359 return 1;
1360 else
1361 return 0;
1362 }
1363
1364 /* wrap-around case */
1365 if ((bufnr >= start && bufnr <= QDIO_MAX_BUFFERS_PER_Q) ||
1366 (bufnr < end))
1367 return 1;
1368 else
1369 return 0;
1370 }
1371
1372 /**
1373 * handle_inbound - reset processed input buffers
1374 * @q: queue containing the buffers
1375 * @callflags: flags
1376 * @bufnr: first buffer to process
1377 * @count: how many buffers are emptied
1378 */
1379 static int handle_inbound(struct qdio_q *q, unsigned int callflags,
1380 int bufnr, int count)
1381 {
1382 int used, diff;
1383
1384 if (!q->u.in.polling)
1385 goto set;
1386
1387 /* protect against stop polling setting an ACK for an emptied slsb */
1388 if (count == QDIO_MAX_BUFFERS_PER_Q) {
1389 /* overwriting everything, just delete polling status */
1390 q->u.in.polling = 0;
1391 q->u.in.ack_count = 0;
1392 goto set;
1393 } else if (buf_in_between(q->u.in.ack_start, bufnr, count)) {
1394 if (is_qebsm(q)) {
1395 /* partial overwrite, just update ack_start */
1396 diff = add_buf(bufnr, count);
1397 diff = sub_buf(diff, q->u.in.ack_start);
1398 q->u.in.ack_count -= diff;
1399 if (q->u.in.ack_count <= 0) {
1400 q->u.in.polling = 0;
1401 q->u.in.ack_count = 0;
1402 goto set;
1403 }
1404 q->u.in.ack_start = add_buf(q->u.in.ack_start, diff);
1405 }
1406 else
1407 /* the only ACK will be deleted, so stop polling */
1408 q->u.in.polling = 0;
1409 }
1410
1411 set:
1412 count = set_buf_states(q, bufnr, SLSB_CU_INPUT_EMPTY, count);
1413
1414 used = atomic_add_return(count, &q->nr_buf_used) - count;
1415 BUG_ON(used + count > QDIO_MAX_BUFFERS_PER_Q);
1416
1417 /* no need to signal as long as the adapter had free buffers */
1418 if (used)
1419 return 0;
1420
1421 if (need_siga_in(q))
1422 return qdio_siga_input(q);
1423 return 0;
1424 }
1425
1426 /**
1427 * handle_outbound - process filled outbound buffers
1428 * @q: queue containing the buffers
1429 * @callflags: flags
1430 * @bufnr: first buffer to process
1431 * @count: how many buffers are filled
1432 */
1433 static int handle_outbound(struct qdio_q *q, unsigned int callflags,
1434 int bufnr, int count)
1435 {
1436 unsigned char state;
1437 int used, rc = 0;
1438
1439 qdio_perf_stat_inc(&perf_stats.outbound_handler);
1440
1441 count = set_buf_states(q, bufnr, SLSB_CU_OUTPUT_PRIMED, count);
1442 used = atomic_add_return(count, &q->nr_buf_used);
1443 BUG_ON(used > QDIO_MAX_BUFFERS_PER_Q);
1444
1445 if (callflags & QDIO_FLAG_PCI_OUT)
1446 q->u.out.pci_out_enabled = 1;
1447 else
1448 q->u.out.pci_out_enabled = 0;
1449
1450 if (queue_type(q) == QDIO_IQDIO_QFMT) {
1451 if (multicast_outbound(q))
1452 rc = qdio_kick_outbound_q(q);
1453 else
1454 if ((q->irq_ptr->ssqd_desc.mmwc > 1) &&
1455 (count > 1) &&
1456 (count <= q->irq_ptr->ssqd_desc.mmwc)) {
1457 /* exploit enhanced SIGA */
1458 q->u.out.use_enh_siga = 1;
1459 rc = qdio_kick_outbound_q(q);
1460 } else {
1461 /*
1462 * One siga-w per buffer required for unicast
1463 * HiperSockets.
1464 */
1465 q->u.out.use_enh_siga = 0;
1466 while (count--) {
1467 rc = qdio_kick_outbound_q(q);
1468 if (rc)
1469 goto out;
1470 }
1471 }
1472 goto out;
1473 }
1474
1475 if (need_siga_sync(q)) {
1476 qdio_siga_sync_q(q);
1477 goto out;
1478 }
1479
1480 /* try to fast requeue buffers */
1481 get_buf_state(q, prev_buf(bufnr), &state, 0);
1482 if (state != SLSB_CU_OUTPUT_PRIMED)
1483 rc = qdio_kick_outbound_q(q);
1484 else {
1485 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "fast-req");
1486 qdio_perf_stat_inc(&perf_stats.fast_requeue);
1487 }
1488 out:
1489 tasklet_schedule(&q->tasklet);
1490 return rc;
1491 }
1492
1493 /**
1494 * do_QDIO - process input or output buffers
1495 * @cdev: associated ccw_device for the qdio subchannel
1496 * @callflags: input or output and special flags from the program
1497 * @q_nr: queue number
1498 * @bufnr: buffer number
1499 * @count: how many buffers to process
1500 */
1501 int do_QDIO(struct ccw_device *cdev, unsigned int callflags,
1502 int q_nr, unsigned int bufnr, unsigned int count)
1503 {
1504 struct qdio_irq *irq_ptr;
1505
1506 if (bufnr >= QDIO_MAX_BUFFERS_PER_Q || count > QDIO_MAX_BUFFERS_PER_Q)
1507 return -EINVAL;
1508
1509 irq_ptr = cdev->private->qdio_data;
1510 if (!irq_ptr)
1511 return -ENODEV;
1512
1513 if (callflags & QDIO_FLAG_SYNC_INPUT)
1514 DBF_DEV_EVENT(DBF_INFO, irq_ptr, "doQDIO input");
1515 else
1516 DBF_DEV_EVENT(DBF_INFO, irq_ptr, "doQDIO output");
1517 DBF_DEV_EVENT(DBF_INFO, irq_ptr, "q:%1d flag:%4x", q_nr, callflags);
1518 DBF_DEV_EVENT(DBF_INFO, irq_ptr, "buf:%2d cnt:%3d", bufnr, count);
1519
1520 if (irq_ptr->state != QDIO_IRQ_STATE_ACTIVE)
1521 return -EBUSY;
1522
1523 if (callflags & QDIO_FLAG_SYNC_INPUT)
1524 return handle_inbound(irq_ptr->input_qs[q_nr],
1525 callflags, bufnr, count);
1526 else if (callflags & QDIO_FLAG_SYNC_OUTPUT)
1527 return handle_outbound(irq_ptr->output_qs[q_nr],
1528 callflags, bufnr, count);
1529 return -EINVAL;
1530 }
1531 EXPORT_SYMBOL_GPL(do_QDIO);
1532
1533 static int __init init_QDIO(void)
1534 {
1535 int rc;
1536
1537 rc = qdio_setup_init();
1538 if (rc)
1539 return rc;
1540 rc = tiqdio_allocate_memory();
1541 if (rc)
1542 goto out_cache;
1543 rc = qdio_debug_init();
1544 if (rc)
1545 goto out_ti;
1546 rc = qdio_setup_perf_stats();
1547 if (rc)
1548 goto out_debug;
1549 rc = tiqdio_register_thinints();
1550 if (rc)
1551 goto out_perf;
1552 return 0;
1553
1554 out_perf:
1555 qdio_remove_perf_stats();
1556 out_debug:
1557 qdio_debug_exit();
1558 out_ti:
1559 tiqdio_free_memory();
1560 out_cache:
1561 qdio_setup_exit();
1562 return rc;
1563 }
1564
1565 static void __exit exit_QDIO(void)
1566 {
1567 tiqdio_unregister_thinints();
1568 tiqdio_free_memory();
1569 qdio_remove_perf_stats();
1570 qdio_debug_exit();
1571 qdio_setup_exit();
1572 }
1573
1574 module_init(init_QDIO);
1575 module_exit(exit_QDIO);
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