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Merge branch 'for-next' of git://git.infradead.org/users/eparis/notify
[deliverable/linux.git] / drivers / s390 / net / qeth_core_main.c
1 /*
2 * Copyright IBM Corp. 2007, 2009
3 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
4 * Frank Pavlic <fpavlic@de.ibm.com>,
5 * Thomas Spatzier <tspat@de.ibm.com>,
6 * Frank Blaschka <frank.blaschka@de.ibm.com>
7 */
8
9 #define KMSG_COMPONENT "qeth"
10 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
11
12 #include <linux/module.h>
13 #include <linux/moduleparam.h>
14 #include <linux/string.h>
15 #include <linux/errno.h>
16 #include <linux/kernel.h>
17 #include <linux/ip.h>
18 #include <linux/tcp.h>
19 #include <linux/mii.h>
20 #include <linux/kthread.h>
21 #include <linux/slab.h>
22 #include <net/iucv/af_iucv.h>
23
24 #include <asm/ebcdic.h>
25 #include <asm/io.h>
26 #include <asm/sysinfo.h>
27 #include <asm/compat.h>
28
29 #include "qeth_core.h"
30
31 struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
32 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
33 /* N P A M L V H */
34 [QETH_DBF_SETUP] = {"qeth_setup",
35 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
36 [QETH_DBF_MSG] = {"qeth_msg",
37 8, 1, 128, 3, &debug_sprintf_view, NULL},
38 [QETH_DBF_CTRL] = {"qeth_control",
39 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
40 };
41 EXPORT_SYMBOL_GPL(qeth_dbf);
42
43 struct qeth_card_list_struct qeth_core_card_list;
44 EXPORT_SYMBOL_GPL(qeth_core_card_list);
45 struct kmem_cache *qeth_core_header_cache;
46 EXPORT_SYMBOL_GPL(qeth_core_header_cache);
47 static struct kmem_cache *qeth_qdio_outbuf_cache;
48
49 static struct device *qeth_core_root_dev;
50 static unsigned int known_devices[][6] = QETH_MODELLIST_ARRAY;
51 static struct lock_class_key qdio_out_skb_queue_key;
52 static struct mutex qeth_mod_mutex;
53
54 static void qeth_send_control_data_cb(struct qeth_channel *,
55 struct qeth_cmd_buffer *);
56 static int qeth_issue_next_read(struct qeth_card *);
57 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
58 static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
59 static void qeth_free_buffer_pool(struct qeth_card *);
60 static int qeth_qdio_establish(struct qeth_card *);
61 static void qeth_free_qdio_buffers(struct qeth_card *);
62 static void qeth_notify_skbs(struct qeth_qdio_out_q *queue,
63 struct qeth_qdio_out_buffer *buf,
64 enum iucv_tx_notify notification);
65 static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf);
66 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
67 struct qeth_qdio_out_buffer *buf,
68 enum qeth_qdio_buffer_states newbufstate);
69 static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int);
70
71 static inline const char *qeth_get_cardname(struct qeth_card *card)
72 {
73 if (card->info.guestlan) {
74 switch (card->info.type) {
75 case QETH_CARD_TYPE_OSD:
76 return " Virtual NIC QDIO";
77 case QETH_CARD_TYPE_IQD:
78 return " Virtual NIC Hiper";
79 case QETH_CARD_TYPE_OSM:
80 return " Virtual NIC QDIO - OSM";
81 case QETH_CARD_TYPE_OSX:
82 return " Virtual NIC QDIO - OSX";
83 default:
84 return " unknown";
85 }
86 } else {
87 switch (card->info.type) {
88 case QETH_CARD_TYPE_OSD:
89 return " OSD Express";
90 case QETH_CARD_TYPE_IQD:
91 return " HiperSockets";
92 case QETH_CARD_TYPE_OSN:
93 return " OSN QDIO";
94 case QETH_CARD_TYPE_OSM:
95 return " OSM QDIO";
96 case QETH_CARD_TYPE_OSX:
97 return " OSX QDIO";
98 default:
99 return " unknown";
100 }
101 }
102 return " n/a";
103 }
104
105 /* max length to be returned: 14 */
106 const char *qeth_get_cardname_short(struct qeth_card *card)
107 {
108 if (card->info.guestlan) {
109 switch (card->info.type) {
110 case QETH_CARD_TYPE_OSD:
111 return "Virt.NIC QDIO";
112 case QETH_CARD_TYPE_IQD:
113 return "Virt.NIC Hiper";
114 case QETH_CARD_TYPE_OSM:
115 return "Virt.NIC OSM";
116 case QETH_CARD_TYPE_OSX:
117 return "Virt.NIC OSX";
118 default:
119 return "unknown";
120 }
121 } else {
122 switch (card->info.type) {
123 case QETH_CARD_TYPE_OSD:
124 switch (card->info.link_type) {
125 case QETH_LINK_TYPE_FAST_ETH:
126 return "OSD_100";
127 case QETH_LINK_TYPE_HSTR:
128 return "HSTR";
129 case QETH_LINK_TYPE_GBIT_ETH:
130 return "OSD_1000";
131 case QETH_LINK_TYPE_10GBIT_ETH:
132 return "OSD_10GIG";
133 case QETH_LINK_TYPE_LANE_ETH100:
134 return "OSD_FE_LANE";
135 case QETH_LINK_TYPE_LANE_TR:
136 return "OSD_TR_LANE";
137 case QETH_LINK_TYPE_LANE_ETH1000:
138 return "OSD_GbE_LANE";
139 case QETH_LINK_TYPE_LANE:
140 return "OSD_ATM_LANE";
141 default:
142 return "OSD_Express";
143 }
144 case QETH_CARD_TYPE_IQD:
145 return "HiperSockets";
146 case QETH_CARD_TYPE_OSN:
147 return "OSN";
148 case QETH_CARD_TYPE_OSM:
149 return "OSM_1000";
150 case QETH_CARD_TYPE_OSX:
151 return "OSX_10GIG";
152 default:
153 return "unknown";
154 }
155 }
156 return "n/a";
157 }
158
159 void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
160 int clear_start_mask)
161 {
162 unsigned long flags;
163
164 spin_lock_irqsave(&card->thread_mask_lock, flags);
165 card->thread_allowed_mask = threads;
166 if (clear_start_mask)
167 card->thread_start_mask &= threads;
168 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
169 wake_up(&card->wait_q);
170 }
171 EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
172
173 int qeth_threads_running(struct qeth_card *card, unsigned long threads)
174 {
175 unsigned long flags;
176 int rc = 0;
177
178 spin_lock_irqsave(&card->thread_mask_lock, flags);
179 rc = (card->thread_running_mask & threads);
180 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
181 return rc;
182 }
183 EXPORT_SYMBOL_GPL(qeth_threads_running);
184
185 int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
186 {
187 return wait_event_interruptible(card->wait_q,
188 qeth_threads_running(card, threads) == 0);
189 }
190 EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
191
192 void qeth_clear_working_pool_list(struct qeth_card *card)
193 {
194 struct qeth_buffer_pool_entry *pool_entry, *tmp;
195
196 QETH_CARD_TEXT(card, 5, "clwrklst");
197 list_for_each_entry_safe(pool_entry, tmp,
198 &card->qdio.in_buf_pool.entry_list, list){
199 list_del(&pool_entry->list);
200 }
201 }
202 EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
203
204 static int qeth_alloc_buffer_pool(struct qeth_card *card)
205 {
206 struct qeth_buffer_pool_entry *pool_entry;
207 void *ptr;
208 int i, j;
209
210 QETH_CARD_TEXT(card, 5, "alocpool");
211 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
212 pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL);
213 if (!pool_entry) {
214 qeth_free_buffer_pool(card);
215 return -ENOMEM;
216 }
217 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
218 ptr = (void *) __get_free_page(GFP_KERNEL);
219 if (!ptr) {
220 while (j > 0)
221 free_page((unsigned long)
222 pool_entry->elements[--j]);
223 kfree(pool_entry);
224 qeth_free_buffer_pool(card);
225 return -ENOMEM;
226 }
227 pool_entry->elements[j] = ptr;
228 }
229 list_add(&pool_entry->init_list,
230 &card->qdio.init_pool.entry_list);
231 }
232 return 0;
233 }
234
235 int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
236 {
237 QETH_CARD_TEXT(card, 2, "realcbp");
238
239 if ((card->state != CARD_STATE_DOWN) &&
240 (card->state != CARD_STATE_RECOVER))
241 return -EPERM;
242
243 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
244 qeth_clear_working_pool_list(card);
245 qeth_free_buffer_pool(card);
246 card->qdio.in_buf_pool.buf_count = bufcnt;
247 card->qdio.init_pool.buf_count = bufcnt;
248 return qeth_alloc_buffer_pool(card);
249 }
250 EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
251
252 static inline int qeth_cq_init(struct qeth_card *card)
253 {
254 int rc;
255
256 if (card->options.cq == QETH_CQ_ENABLED) {
257 QETH_DBF_TEXT(SETUP, 2, "cqinit");
258 memset(card->qdio.c_q->qdio_bufs, 0,
259 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
260 card->qdio.c_q->next_buf_to_init = 127;
261 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT,
262 card->qdio.no_in_queues - 1, 0,
263 127);
264 if (rc) {
265 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
266 goto out;
267 }
268 }
269 rc = 0;
270 out:
271 return rc;
272 }
273
274 static inline int qeth_alloc_cq(struct qeth_card *card)
275 {
276 int rc;
277
278 if (card->options.cq == QETH_CQ_ENABLED) {
279 int i;
280 struct qdio_outbuf_state *outbuf_states;
281
282 QETH_DBF_TEXT(SETUP, 2, "cqon");
283 card->qdio.c_q = kzalloc(sizeof(struct qeth_qdio_q),
284 GFP_KERNEL);
285 if (!card->qdio.c_q) {
286 rc = -1;
287 goto kmsg_out;
288 }
289 QETH_DBF_HEX(SETUP, 2, &card->qdio.c_q, sizeof(void *));
290
291 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
292 card->qdio.c_q->bufs[i].buffer =
293 &card->qdio.c_q->qdio_bufs[i];
294 }
295
296 card->qdio.no_in_queues = 2;
297
298 card->qdio.out_bufstates = (struct qdio_outbuf_state *)
299 kzalloc(card->qdio.no_out_queues *
300 QDIO_MAX_BUFFERS_PER_Q *
301 sizeof(struct qdio_outbuf_state), GFP_KERNEL);
302 outbuf_states = card->qdio.out_bufstates;
303 if (outbuf_states == NULL) {
304 rc = -1;
305 goto free_cq_out;
306 }
307 for (i = 0; i < card->qdio.no_out_queues; ++i) {
308 card->qdio.out_qs[i]->bufstates = outbuf_states;
309 outbuf_states += QDIO_MAX_BUFFERS_PER_Q;
310 }
311 } else {
312 QETH_DBF_TEXT(SETUP, 2, "nocq");
313 card->qdio.c_q = NULL;
314 card->qdio.no_in_queues = 1;
315 }
316 QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues);
317 rc = 0;
318 out:
319 return rc;
320 free_cq_out:
321 kfree(card->qdio.c_q);
322 card->qdio.c_q = NULL;
323 kmsg_out:
324 dev_err(&card->gdev->dev, "Failed to create completion queue\n");
325 goto out;
326 }
327
328 static inline void qeth_free_cq(struct qeth_card *card)
329 {
330 if (card->qdio.c_q) {
331 --card->qdio.no_in_queues;
332 kfree(card->qdio.c_q);
333 card->qdio.c_q = NULL;
334 }
335 kfree(card->qdio.out_bufstates);
336 card->qdio.out_bufstates = NULL;
337 }
338
339 static inline enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15,
340 int delayed) {
341 enum iucv_tx_notify n;
342
343 switch (sbalf15) {
344 case 0:
345 n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK;
346 break;
347 case 4:
348 case 16:
349 case 17:
350 case 18:
351 n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE :
352 TX_NOTIFY_UNREACHABLE;
353 break;
354 default:
355 n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR :
356 TX_NOTIFY_GENERALERROR;
357 break;
358 }
359
360 return n;
361 }
362
363 static inline void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q,
364 int bidx, int forced_cleanup)
365 {
366 if (q->card->options.cq != QETH_CQ_ENABLED)
367 return;
368
369 if (q->bufs[bidx]->next_pending != NULL) {
370 struct qeth_qdio_out_buffer *head = q->bufs[bidx];
371 struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending;
372
373 while (c) {
374 if (forced_cleanup ||
375 atomic_read(&c->state) ==
376 QETH_QDIO_BUF_HANDLED_DELAYED) {
377 struct qeth_qdio_out_buffer *f = c;
378 QETH_CARD_TEXT(f->q->card, 5, "fp");
379 QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f);
380 /* release here to avoid interleaving between
381 outbound tasklet and inbound tasklet
382 regarding notifications and lifecycle */
383 qeth_release_skbs(c);
384
385 c = f->next_pending;
386 WARN_ON_ONCE(head->next_pending != f);
387 head->next_pending = c;
388 kmem_cache_free(qeth_qdio_outbuf_cache, f);
389 } else {
390 head = c;
391 c = c->next_pending;
392 }
393
394 }
395 }
396 if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) ==
397 QETH_QDIO_BUF_HANDLED_DELAYED)) {
398 /* for recovery situations */
399 q->bufs[bidx]->aob = q->bufstates[bidx].aob;
400 qeth_init_qdio_out_buf(q, bidx);
401 QETH_CARD_TEXT(q->card, 2, "clprecov");
402 }
403 }
404
405
406 static inline void qeth_qdio_handle_aob(struct qeth_card *card,
407 unsigned long phys_aob_addr) {
408 struct qaob *aob;
409 struct qeth_qdio_out_buffer *buffer;
410 enum iucv_tx_notify notification;
411
412 aob = (struct qaob *) phys_to_virt(phys_aob_addr);
413 QETH_CARD_TEXT(card, 5, "haob");
414 QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr);
415 buffer = (struct qeth_qdio_out_buffer *) aob->user1;
416 QETH_CARD_TEXT_(card, 5, "%lx", aob->user1);
417
418 if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED,
419 QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) {
420 notification = TX_NOTIFY_OK;
421 } else {
422 WARN_ON_ONCE(atomic_read(&buffer->state) !=
423 QETH_QDIO_BUF_PENDING);
424 atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ);
425 notification = TX_NOTIFY_DELAYED_OK;
426 }
427
428 if (aob->aorc != 0) {
429 QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc);
430 notification = qeth_compute_cq_notification(aob->aorc, 1);
431 }
432 qeth_notify_skbs(buffer->q, buffer, notification);
433
434 buffer->aob = NULL;
435 qeth_clear_output_buffer(buffer->q, buffer,
436 QETH_QDIO_BUF_HANDLED_DELAYED);
437
438 /* from here on: do not touch buffer anymore */
439 qdio_release_aob(aob);
440 }
441
442 static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue)
443 {
444 return card->options.cq == QETH_CQ_ENABLED &&
445 card->qdio.c_q != NULL &&
446 queue != 0 &&
447 queue == card->qdio.no_in_queues - 1;
448 }
449
450
451 static int qeth_issue_next_read(struct qeth_card *card)
452 {
453 int rc;
454 struct qeth_cmd_buffer *iob;
455
456 QETH_CARD_TEXT(card, 5, "issnxrd");
457 if (card->read.state != CH_STATE_UP)
458 return -EIO;
459 iob = qeth_get_buffer(&card->read);
460 if (!iob) {
461 dev_warn(&card->gdev->dev, "The qeth device driver "
462 "failed to recover an error on the device\n");
463 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
464 "available\n", dev_name(&card->gdev->dev));
465 return -ENOMEM;
466 }
467 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
468 QETH_CARD_TEXT(card, 6, "noirqpnd");
469 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
470 (addr_t) iob, 0, 0);
471 if (rc) {
472 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
473 "rc=%i\n", dev_name(&card->gdev->dev), rc);
474 atomic_set(&card->read.irq_pending, 0);
475 card->read_or_write_problem = 1;
476 qeth_schedule_recovery(card);
477 wake_up(&card->wait_q);
478 }
479 return rc;
480 }
481
482 static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
483 {
484 struct qeth_reply *reply;
485
486 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
487 if (reply) {
488 atomic_set(&reply->refcnt, 1);
489 atomic_set(&reply->received, 0);
490 reply->card = card;
491 }
492 return reply;
493 }
494
495 static void qeth_get_reply(struct qeth_reply *reply)
496 {
497 WARN_ON(atomic_read(&reply->refcnt) <= 0);
498 atomic_inc(&reply->refcnt);
499 }
500
501 static void qeth_put_reply(struct qeth_reply *reply)
502 {
503 WARN_ON(atomic_read(&reply->refcnt) <= 0);
504 if (atomic_dec_and_test(&reply->refcnt))
505 kfree(reply);
506 }
507
508 static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
509 struct qeth_card *card)
510 {
511 char *ipa_name;
512 int com = cmd->hdr.command;
513 ipa_name = qeth_get_ipa_cmd_name(com);
514 if (rc)
515 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned "
516 "x%X \"%s\"\n",
517 ipa_name, com, dev_name(&card->gdev->dev),
518 QETH_CARD_IFNAME(card), rc,
519 qeth_get_ipa_msg(rc));
520 else
521 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n",
522 ipa_name, com, dev_name(&card->gdev->dev),
523 QETH_CARD_IFNAME(card));
524 }
525
526 static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
527 struct qeth_cmd_buffer *iob)
528 {
529 struct qeth_ipa_cmd *cmd = NULL;
530
531 QETH_CARD_TEXT(card, 5, "chkipad");
532 if (IS_IPA(iob->data)) {
533 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
534 if (IS_IPA_REPLY(cmd)) {
535 if (cmd->hdr.command != IPA_CMD_SETCCID &&
536 cmd->hdr.command != IPA_CMD_DELCCID &&
537 cmd->hdr.command != IPA_CMD_MODCCID &&
538 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
539 qeth_issue_ipa_msg(cmd,
540 cmd->hdr.return_code, card);
541 return cmd;
542 } else {
543 switch (cmd->hdr.command) {
544 case IPA_CMD_STOPLAN:
545 dev_warn(&card->gdev->dev,
546 "The link for interface %s on CHPID"
547 " 0x%X failed\n",
548 QETH_CARD_IFNAME(card),
549 card->info.chpid);
550 card->lan_online = 0;
551 if (card->dev && netif_carrier_ok(card->dev))
552 netif_carrier_off(card->dev);
553 return NULL;
554 case IPA_CMD_STARTLAN:
555 dev_info(&card->gdev->dev,
556 "The link for %s on CHPID 0x%X has"
557 " been restored\n",
558 QETH_CARD_IFNAME(card),
559 card->info.chpid);
560 netif_carrier_on(card->dev);
561 card->lan_online = 1;
562 if (card->info.hwtrap)
563 card->info.hwtrap = 2;
564 qeth_schedule_recovery(card);
565 return NULL;
566 case IPA_CMD_MODCCID:
567 return cmd;
568 case IPA_CMD_REGISTER_LOCAL_ADDR:
569 QETH_CARD_TEXT(card, 3, "irla");
570 break;
571 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
572 QETH_CARD_TEXT(card, 3, "urla");
573 break;
574 default:
575 QETH_DBF_MESSAGE(2, "Received data is IPA "
576 "but not a reply!\n");
577 break;
578 }
579 }
580 }
581 return cmd;
582 }
583
584 void qeth_clear_ipacmd_list(struct qeth_card *card)
585 {
586 struct qeth_reply *reply, *r;
587 unsigned long flags;
588
589 QETH_CARD_TEXT(card, 4, "clipalst");
590
591 spin_lock_irqsave(&card->lock, flags);
592 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
593 qeth_get_reply(reply);
594 reply->rc = -EIO;
595 atomic_inc(&reply->received);
596 list_del_init(&reply->list);
597 wake_up(&reply->wait_q);
598 qeth_put_reply(reply);
599 }
600 spin_unlock_irqrestore(&card->lock, flags);
601 atomic_set(&card->write.irq_pending, 0);
602 }
603 EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
604
605 static int qeth_check_idx_response(struct qeth_card *card,
606 unsigned char *buffer)
607 {
608 if (!buffer)
609 return 0;
610
611 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
612 if ((buffer[2] & 0xc0) == 0xc0) {
613 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE "
614 "with cause code 0x%02x%s\n",
615 buffer[4],
616 ((buffer[4] == 0x22) ?
617 " -- try another portname" : ""));
618 QETH_CARD_TEXT(card, 2, "ckidxres");
619 QETH_CARD_TEXT(card, 2, " idxterm");
620 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
621 if (buffer[4] == 0xf6) {
622 dev_err(&card->gdev->dev,
623 "The qeth device is not configured "
624 "for the OSI layer required by z/VM\n");
625 return -EPERM;
626 }
627 return -EIO;
628 }
629 return 0;
630 }
631
632 static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
633 __u32 len)
634 {
635 struct qeth_card *card;
636
637 card = CARD_FROM_CDEV(channel->ccwdev);
638 QETH_CARD_TEXT(card, 4, "setupccw");
639 if (channel == &card->read)
640 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
641 else
642 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
643 channel->ccw.count = len;
644 channel->ccw.cda = (__u32) __pa(iob);
645 }
646
647 static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
648 {
649 __u8 index;
650
651 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff");
652 index = channel->io_buf_no;
653 do {
654 if (channel->iob[index].state == BUF_STATE_FREE) {
655 channel->iob[index].state = BUF_STATE_LOCKED;
656 channel->io_buf_no = (channel->io_buf_no + 1) %
657 QETH_CMD_BUFFER_NO;
658 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
659 return channel->iob + index;
660 }
661 index = (index + 1) % QETH_CMD_BUFFER_NO;
662 } while (index != channel->io_buf_no);
663
664 return NULL;
665 }
666
667 void qeth_release_buffer(struct qeth_channel *channel,
668 struct qeth_cmd_buffer *iob)
669 {
670 unsigned long flags;
671
672 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff");
673 spin_lock_irqsave(&channel->iob_lock, flags);
674 memset(iob->data, 0, QETH_BUFSIZE);
675 iob->state = BUF_STATE_FREE;
676 iob->callback = qeth_send_control_data_cb;
677 iob->rc = 0;
678 spin_unlock_irqrestore(&channel->iob_lock, flags);
679 wake_up(&channel->wait_q);
680 }
681 EXPORT_SYMBOL_GPL(qeth_release_buffer);
682
683 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
684 {
685 struct qeth_cmd_buffer *buffer = NULL;
686 unsigned long flags;
687
688 spin_lock_irqsave(&channel->iob_lock, flags);
689 buffer = __qeth_get_buffer(channel);
690 spin_unlock_irqrestore(&channel->iob_lock, flags);
691 return buffer;
692 }
693
694 struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
695 {
696 struct qeth_cmd_buffer *buffer;
697 wait_event(channel->wait_q,
698 ((buffer = qeth_get_buffer(channel)) != NULL));
699 return buffer;
700 }
701 EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
702
703 void qeth_clear_cmd_buffers(struct qeth_channel *channel)
704 {
705 int cnt;
706
707 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
708 qeth_release_buffer(channel, &channel->iob[cnt]);
709 channel->buf_no = 0;
710 channel->io_buf_no = 0;
711 }
712 EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
713
714 static void qeth_send_control_data_cb(struct qeth_channel *channel,
715 struct qeth_cmd_buffer *iob)
716 {
717 struct qeth_card *card;
718 struct qeth_reply *reply, *r;
719 struct qeth_ipa_cmd *cmd;
720 unsigned long flags;
721 int keep_reply;
722 int rc = 0;
723
724 card = CARD_FROM_CDEV(channel->ccwdev);
725 QETH_CARD_TEXT(card, 4, "sndctlcb");
726 rc = qeth_check_idx_response(card, iob->data);
727 switch (rc) {
728 case 0:
729 break;
730 case -EIO:
731 qeth_clear_ipacmd_list(card);
732 qeth_schedule_recovery(card);
733 /* fall through */
734 default:
735 goto out;
736 }
737
738 cmd = qeth_check_ipa_data(card, iob);
739 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
740 goto out;
741 /*in case of OSN : check if cmd is set */
742 if (card->info.type == QETH_CARD_TYPE_OSN &&
743 cmd &&
744 cmd->hdr.command != IPA_CMD_STARTLAN &&
745 card->osn_info.assist_cb != NULL) {
746 card->osn_info.assist_cb(card->dev, cmd);
747 goto out;
748 }
749
750 spin_lock_irqsave(&card->lock, flags);
751 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
752 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
753 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
754 qeth_get_reply(reply);
755 list_del_init(&reply->list);
756 spin_unlock_irqrestore(&card->lock, flags);
757 keep_reply = 0;
758 if (reply->callback != NULL) {
759 if (cmd) {
760 reply->offset = (__u16)((char *)cmd -
761 (char *)iob->data);
762 keep_reply = reply->callback(card,
763 reply,
764 (unsigned long)cmd);
765 } else
766 keep_reply = reply->callback(card,
767 reply,
768 (unsigned long)iob);
769 }
770 if (cmd)
771 reply->rc = (u16) cmd->hdr.return_code;
772 else if (iob->rc)
773 reply->rc = iob->rc;
774 if (keep_reply) {
775 spin_lock_irqsave(&card->lock, flags);
776 list_add_tail(&reply->list,
777 &card->cmd_waiter_list);
778 spin_unlock_irqrestore(&card->lock, flags);
779 } else {
780 atomic_inc(&reply->received);
781 wake_up(&reply->wait_q);
782 }
783 qeth_put_reply(reply);
784 goto out;
785 }
786 }
787 spin_unlock_irqrestore(&card->lock, flags);
788 out:
789 memcpy(&card->seqno.pdu_hdr_ack,
790 QETH_PDU_HEADER_SEQ_NO(iob->data),
791 QETH_SEQ_NO_LENGTH);
792 qeth_release_buffer(channel, iob);
793 }
794
795 static int qeth_setup_channel(struct qeth_channel *channel)
796 {
797 int cnt;
798
799 QETH_DBF_TEXT(SETUP, 2, "setupch");
800 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
801 channel->iob[cnt].data =
802 kzalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
803 if (channel->iob[cnt].data == NULL)
804 break;
805 channel->iob[cnt].state = BUF_STATE_FREE;
806 channel->iob[cnt].channel = channel;
807 channel->iob[cnt].callback = qeth_send_control_data_cb;
808 channel->iob[cnt].rc = 0;
809 }
810 if (cnt < QETH_CMD_BUFFER_NO) {
811 while (cnt-- > 0)
812 kfree(channel->iob[cnt].data);
813 return -ENOMEM;
814 }
815 channel->buf_no = 0;
816 channel->io_buf_no = 0;
817 atomic_set(&channel->irq_pending, 0);
818 spin_lock_init(&channel->iob_lock);
819
820 init_waitqueue_head(&channel->wait_q);
821 return 0;
822 }
823
824 static int qeth_set_thread_start_bit(struct qeth_card *card,
825 unsigned long thread)
826 {
827 unsigned long flags;
828
829 spin_lock_irqsave(&card->thread_mask_lock, flags);
830 if (!(card->thread_allowed_mask & thread) ||
831 (card->thread_start_mask & thread)) {
832 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
833 return -EPERM;
834 }
835 card->thread_start_mask |= thread;
836 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
837 return 0;
838 }
839
840 void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
841 {
842 unsigned long flags;
843
844 spin_lock_irqsave(&card->thread_mask_lock, flags);
845 card->thread_start_mask &= ~thread;
846 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
847 wake_up(&card->wait_q);
848 }
849 EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
850
851 void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
852 {
853 unsigned long flags;
854
855 spin_lock_irqsave(&card->thread_mask_lock, flags);
856 card->thread_running_mask &= ~thread;
857 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
858 wake_up(&card->wait_q);
859 }
860 EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
861
862 static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
863 {
864 unsigned long flags;
865 int rc = 0;
866
867 spin_lock_irqsave(&card->thread_mask_lock, flags);
868 if (card->thread_start_mask & thread) {
869 if ((card->thread_allowed_mask & thread) &&
870 !(card->thread_running_mask & thread)) {
871 rc = 1;
872 card->thread_start_mask &= ~thread;
873 card->thread_running_mask |= thread;
874 } else
875 rc = -EPERM;
876 }
877 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
878 return rc;
879 }
880
881 int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
882 {
883 int rc = 0;
884
885 wait_event(card->wait_q,
886 (rc = __qeth_do_run_thread(card, thread)) >= 0);
887 return rc;
888 }
889 EXPORT_SYMBOL_GPL(qeth_do_run_thread);
890
891 void qeth_schedule_recovery(struct qeth_card *card)
892 {
893 QETH_CARD_TEXT(card, 2, "startrec");
894 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
895 schedule_work(&card->kernel_thread_starter);
896 }
897 EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
898
899 static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
900 {
901 int dstat, cstat;
902 char *sense;
903 struct qeth_card *card;
904
905 sense = (char *) irb->ecw;
906 cstat = irb->scsw.cmd.cstat;
907 dstat = irb->scsw.cmd.dstat;
908 card = CARD_FROM_CDEV(cdev);
909
910 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
911 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
912 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
913 QETH_CARD_TEXT(card, 2, "CGENCHK");
914 dev_warn(&cdev->dev, "The qeth device driver "
915 "failed to recover an error on the device\n");
916 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n",
917 dev_name(&cdev->dev), dstat, cstat);
918 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
919 16, 1, irb, 64, 1);
920 return 1;
921 }
922
923 if (dstat & DEV_STAT_UNIT_CHECK) {
924 if (sense[SENSE_RESETTING_EVENT_BYTE] &
925 SENSE_RESETTING_EVENT_FLAG) {
926 QETH_CARD_TEXT(card, 2, "REVIND");
927 return 1;
928 }
929 if (sense[SENSE_COMMAND_REJECT_BYTE] &
930 SENSE_COMMAND_REJECT_FLAG) {
931 QETH_CARD_TEXT(card, 2, "CMDREJi");
932 return 1;
933 }
934 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
935 QETH_CARD_TEXT(card, 2, "AFFE");
936 return 1;
937 }
938 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
939 QETH_CARD_TEXT(card, 2, "ZEROSEN");
940 return 0;
941 }
942 QETH_CARD_TEXT(card, 2, "DGENCHK");
943 return 1;
944 }
945 return 0;
946 }
947
948 static long __qeth_check_irb_error(struct ccw_device *cdev,
949 unsigned long intparm, struct irb *irb)
950 {
951 struct qeth_card *card;
952
953 card = CARD_FROM_CDEV(cdev);
954
955 if (!IS_ERR(irb))
956 return 0;
957
958 switch (PTR_ERR(irb)) {
959 case -EIO:
960 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
961 dev_name(&cdev->dev));
962 QETH_CARD_TEXT(card, 2, "ckirberr");
963 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
964 break;
965 case -ETIMEDOUT:
966 dev_warn(&cdev->dev, "A hardware operation timed out"
967 " on the device\n");
968 QETH_CARD_TEXT(card, 2, "ckirberr");
969 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT);
970 if (intparm == QETH_RCD_PARM) {
971 if (card && (card->data.ccwdev == cdev)) {
972 card->data.state = CH_STATE_DOWN;
973 wake_up(&card->wait_q);
974 }
975 }
976 break;
977 default:
978 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
979 dev_name(&cdev->dev), PTR_ERR(irb));
980 QETH_CARD_TEXT(card, 2, "ckirberr");
981 QETH_CARD_TEXT(card, 2, " rc???");
982 }
983 return PTR_ERR(irb);
984 }
985
986 static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
987 struct irb *irb)
988 {
989 int rc;
990 int cstat, dstat;
991 struct qeth_cmd_buffer *buffer;
992 struct qeth_channel *channel;
993 struct qeth_card *card;
994 struct qeth_cmd_buffer *iob;
995 __u8 index;
996
997 if (__qeth_check_irb_error(cdev, intparm, irb))
998 return;
999 cstat = irb->scsw.cmd.cstat;
1000 dstat = irb->scsw.cmd.dstat;
1001
1002 card = CARD_FROM_CDEV(cdev);
1003 if (!card)
1004 return;
1005
1006 QETH_CARD_TEXT(card, 5, "irq");
1007
1008 if (card->read.ccwdev == cdev) {
1009 channel = &card->read;
1010 QETH_CARD_TEXT(card, 5, "read");
1011 } else if (card->write.ccwdev == cdev) {
1012 channel = &card->write;
1013 QETH_CARD_TEXT(card, 5, "write");
1014 } else {
1015 channel = &card->data;
1016 QETH_CARD_TEXT(card, 5, "data");
1017 }
1018 atomic_set(&channel->irq_pending, 0);
1019
1020 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
1021 channel->state = CH_STATE_STOPPED;
1022
1023 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
1024 channel->state = CH_STATE_HALTED;
1025
1026 /*let's wake up immediately on data channel*/
1027 if ((channel == &card->data) && (intparm != 0) &&
1028 (intparm != QETH_RCD_PARM))
1029 goto out;
1030
1031 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
1032 QETH_CARD_TEXT(card, 6, "clrchpar");
1033 /* we don't have to handle this further */
1034 intparm = 0;
1035 }
1036 if (intparm == QETH_HALT_CHANNEL_PARM) {
1037 QETH_CARD_TEXT(card, 6, "hltchpar");
1038 /* we don't have to handle this further */
1039 intparm = 0;
1040 }
1041 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
1042 (dstat & DEV_STAT_UNIT_CHECK) ||
1043 (cstat)) {
1044 if (irb->esw.esw0.erw.cons) {
1045 dev_warn(&channel->ccwdev->dev,
1046 "The qeth device driver failed to recover "
1047 "an error on the device\n");
1048 QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
1049 "0x%X dstat 0x%X\n",
1050 dev_name(&channel->ccwdev->dev), cstat, dstat);
1051 print_hex_dump(KERN_WARNING, "qeth: irb ",
1052 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
1053 print_hex_dump(KERN_WARNING, "qeth: sense data ",
1054 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
1055 }
1056 if (intparm == QETH_RCD_PARM) {
1057 channel->state = CH_STATE_DOWN;
1058 goto out;
1059 }
1060 rc = qeth_get_problem(cdev, irb);
1061 if (rc) {
1062 qeth_clear_ipacmd_list(card);
1063 qeth_schedule_recovery(card);
1064 goto out;
1065 }
1066 }
1067
1068 if (intparm == QETH_RCD_PARM) {
1069 channel->state = CH_STATE_RCD_DONE;
1070 goto out;
1071 }
1072 if (intparm) {
1073 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
1074 buffer->state = BUF_STATE_PROCESSED;
1075 }
1076 if (channel == &card->data)
1077 return;
1078 if (channel == &card->read &&
1079 channel->state == CH_STATE_UP)
1080 qeth_issue_next_read(card);
1081
1082 iob = channel->iob;
1083 index = channel->buf_no;
1084 while (iob[index].state == BUF_STATE_PROCESSED) {
1085 if (iob[index].callback != NULL)
1086 iob[index].callback(channel, iob + index);
1087
1088 index = (index + 1) % QETH_CMD_BUFFER_NO;
1089 }
1090 channel->buf_no = index;
1091 out:
1092 wake_up(&card->wait_q);
1093 return;
1094 }
1095
1096 static void qeth_notify_skbs(struct qeth_qdio_out_q *q,
1097 struct qeth_qdio_out_buffer *buf,
1098 enum iucv_tx_notify notification)
1099 {
1100 struct sk_buff *skb;
1101
1102 if (skb_queue_empty(&buf->skb_list))
1103 goto out;
1104 skb = skb_peek(&buf->skb_list);
1105 while (skb) {
1106 QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification);
1107 QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb);
1108 if (skb->protocol == ETH_P_AF_IUCV) {
1109 if (skb->sk) {
1110 struct iucv_sock *iucv = iucv_sk(skb->sk);
1111 iucv->sk_txnotify(skb, notification);
1112 }
1113 }
1114 if (skb_queue_is_last(&buf->skb_list, skb))
1115 skb = NULL;
1116 else
1117 skb = skb_queue_next(&buf->skb_list, skb);
1118 }
1119 out:
1120 return;
1121 }
1122
1123 static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf)
1124 {
1125 struct sk_buff *skb;
1126 struct iucv_sock *iucv;
1127 int notify_general_error = 0;
1128
1129 if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING)
1130 notify_general_error = 1;
1131
1132 /* release may never happen from within CQ tasklet scope */
1133 WARN_ON_ONCE(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ);
1134
1135 skb = skb_dequeue(&buf->skb_list);
1136 while (skb) {
1137 QETH_CARD_TEXT(buf->q->card, 5, "skbr");
1138 QETH_CARD_TEXT_(buf->q->card, 5, "%lx", (long) skb);
1139 if (notify_general_error && skb->protocol == ETH_P_AF_IUCV) {
1140 if (skb->sk) {
1141 iucv = iucv_sk(skb->sk);
1142 iucv->sk_txnotify(skb, TX_NOTIFY_GENERALERROR);
1143 }
1144 }
1145 atomic_dec(&skb->users);
1146 dev_kfree_skb_any(skb);
1147 skb = skb_dequeue(&buf->skb_list);
1148 }
1149 }
1150
1151 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
1152 struct qeth_qdio_out_buffer *buf,
1153 enum qeth_qdio_buffer_states newbufstate)
1154 {
1155 int i;
1156
1157 /* is PCI flag set on buffer? */
1158 if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ)
1159 atomic_dec(&queue->set_pci_flags_count);
1160
1161 if (newbufstate == QETH_QDIO_BUF_EMPTY) {
1162 qeth_release_skbs(buf);
1163 }
1164 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
1165 if (buf->buffer->element[i].addr && buf->is_header[i])
1166 kmem_cache_free(qeth_core_header_cache,
1167 buf->buffer->element[i].addr);
1168 buf->is_header[i] = 0;
1169 buf->buffer->element[i].length = 0;
1170 buf->buffer->element[i].addr = NULL;
1171 buf->buffer->element[i].eflags = 0;
1172 buf->buffer->element[i].sflags = 0;
1173 }
1174 buf->buffer->element[15].eflags = 0;
1175 buf->buffer->element[15].sflags = 0;
1176 buf->next_element_to_fill = 0;
1177 atomic_set(&buf->state, newbufstate);
1178 }
1179
1180 static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free)
1181 {
1182 int j;
1183
1184 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
1185 if (!q->bufs[j])
1186 continue;
1187 qeth_cleanup_handled_pending(q, j, 1);
1188 qeth_clear_output_buffer(q, q->bufs[j], QETH_QDIO_BUF_EMPTY);
1189 if (free) {
1190 kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]);
1191 q->bufs[j] = NULL;
1192 }
1193 }
1194 }
1195
1196 void qeth_clear_qdio_buffers(struct qeth_card *card)
1197 {
1198 int i;
1199
1200 QETH_CARD_TEXT(card, 2, "clearqdbf");
1201 /* clear outbound buffers to free skbs */
1202 for (i = 0; i < card->qdio.no_out_queues; ++i) {
1203 if (card->qdio.out_qs[i]) {
1204 qeth_clear_outq_buffers(card->qdio.out_qs[i], 0);
1205 }
1206 }
1207 }
1208 EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
1209
1210 static void qeth_free_buffer_pool(struct qeth_card *card)
1211 {
1212 struct qeth_buffer_pool_entry *pool_entry, *tmp;
1213 int i = 0;
1214 list_for_each_entry_safe(pool_entry, tmp,
1215 &card->qdio.init_pool.entry_list, init_list){
1216 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
1217 free_page((unsigned long)pool_entry->elements[i]);
1218 list_del(&pool_entry->init_list);
1219 kfree(pool_entry);
1220 }
1221 }
1222
1223 static void qeth_free_qdio_buffers(struct qeth_card *card)
1224 {
1225 int i, j;
1226
1227 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
1228 QETH_QDIO_UNINITIALIZED)
1229 return;
1230
1231 qeth_free_cq(card);
1232 cancel_delayed_work_sync(&card->buffer_reclaim_work);
1233 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
1234 dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb);
1235 kfree(card->qdio.in_q);
1236 card->qdio.in_q = NULL;
1237 /* inbound buffer pool */
1238 qeth_free_buffer_pool(card);
1239 /* free outbound qdio_qs */
1240 if (card->qdio.out_qs) {
1241 for (i = 0; i < card->qdio.no_out_queues; ++i) {
1242 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
1243 kfree(card->qdio.out_qs[i]);
1244 }
1245 kfree(card->qdio.out_qs);
1246 card->qdio.out_qs = NULL;
1247 }
1248 }
1249
1250 static void qeth_clean_channel(struct qeth_channel *channel)
1251 {
1252 int cnt;
1253
1254 QETH_DBF_TEXT(SETUP, 2, "freech");
1255 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
1256 kfree(channel->iob[cnt].data);
1257 }
1258
1259 static void qeth_set_single_write_queues(struct qeth_card *card)
1260 {
1261 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
1262 (card->qdio.no_out_queues == 4))
1263 qeth_free_qdio_buffers(card);
1264
1265 card->qdio.no_out_queues = 1;
1266 if (card->qdio.default_out_queue != 0)
1267 dev_info(&card->gdev->dev, "Priority Queueing not supported\n");
1268
1269 card->qdio.default_out_queue = 0;
1270 }
1271
1272 static void qeth_set_multiple_write_queues(struct qeth_card *card)
1273 {
1274 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
1275 (card->qdio.no_out_queues == 1)) {
1276 qeth_free_qdio_buffers(card);
1277 card->qdio.default_out_queue = 2;
1278 }
1279 card->qdio.no_out_queues = 4;
1280 }
1281
1282 static void qeth_update_from_chp_desc(struct qeth_card *card)
1283 {
1284 struct ccw_device *ccwdev;
1285 struct channelPath_dsc {
1286 u8 flags;
1287 u8 lsn;
1288 u8 desc;
1289 u8 chpid;
1290 u8 swla;
1291 u8 zeroes;
1292 u8 chla;
1293 u8 chpp;
1294 } *chp_dsc;
1295
1296 QETH_DBF_TEXT(SETUP, 2, "chp_desc");
1297
1298 ccwdev = card->data.ccwdev;
1299 chp_dsc = ccw_device_get_chp_desc(ccwdev, 0);
1300 if (!chp_dsc)
1301 goto out;
1302
1303 card->info.func_level = 0x4100 + chp_dsc->desc;
1304 if (card->info.type == QETH_CARD_TYPE_IQD)
1305 goto out;
1306
1307 /* CHPP field bit 6 == 1 -> single queue */
1308 if ((chp_dsc->chpp & 0x02) == 0x02)
1309 qeth_set_single_write_queues(card);
1310 else
1311 qeth_set_multiple_write_queues(card);
1312 out:
1313 kfree(chp_dsc);
1314 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues);
1315 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level);
1316 }
1317
1318 static void qeth_init_qdio_info(struct qeth_card *card)
1319 {
1320 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
1321 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1322 /* inbound */
1323 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1324 if (card->info.type == QETH_CARD_TYPE_IQD)
1325 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT;
1326 else
1327 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
1328 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1329 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1330 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1331 }
1332
1333 static void qeth_set_intial_options(struct qeth_card *card)
1334 {
1335 card->options.route4.type = NO_ROUTER;
1336 card->options.route6.type = NO_ROUTER;
1337 card->options.fake_broadcast = 0;
1338 card->options.add_hhlen = DEFAULT_ADD_HHLEN;
1339 card->options.performance_stats = 0;
1340 card->options.rx_sg_cb = QETH_RX_SG_CB;
1341 card->options.isolation = ISOLATION_MODE_NONE;
1342 card->options.cq = QETH_CQ_DISABLED;
1343 }
1344
1345 static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1346 {
1347 unsigned long flags;
1348 int rc = 0;
1349
1350 spin_lock_irqsave(&card->thread_mask_lock, flags);
1351 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x",
1352 (u8) card->thread_start_mask,
1353 (u8) card->thread_allowed_mask,
1354 (u8) card->thread_running_mask);
1355 rc = (card->thread_start_mask & thread);
1356 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1357 return rc;
1358 }
1359
1360 static void qeth_start_kernel_thread(struct work_struct *work)
1361 {
1362 struct task_struct *ts;
1363 struct qeth_card *card = container_of(work, struct qeth_card,
1364 kernel_thread_starter);
1365 QETH_CARD_TEXT(card , 2, "strthrd");
1366
1367 if (card->read.state != CH_STATE_UP &&
1368 card->write.state != CH_STATE_UP)
1369 return;
1370 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) {
1371 ts = kthread_run(card->discipline->recover, (void *)card,
1372 "qeth_recover");
1373 if (IS_ERR(ts)) {
1374 qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD);
1375 qeth_clear_thread_running_bit(card,
1376 QETH_RECOVER_THREAD);
1377 }
1378 }
1379 }
1380
1381 static int qeth_setup_card(struct qeth_card *card)
1382 {
1383
1384 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1385 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
1386
1387 card->read.state = CH_STATE_DOWN;
1388 card->write.state = CH_STATE_DOWN;
1389 card->data.state = CH_STATE_DOWN;
1390 card->state = CARD_STATE_DOWN;
1391 card->lan_online = 0;
1392 card->read_or_write_problem = 0;
1393 card->dev = NULL;
1394 spin_lock_init(&card->vlanlock);
1395 spin_lock_init(&card->mclock);
1396 spin_lock_init(&card->lock);
1397 spin_lock_init(&card->ip_lock);
1398 spin_lock_init(&card->thread_mask_lock);
1399 mutex_init(&card->conf_mutex);
1400 mutex_init(&card->discipline_mutex);
1401 card->thread_start_mask = 0;
1402 card->thread_allowed_mask = 0;
1403 card->thread_running_mask = 0;
1404 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
1405 INIT_LIST_HEAD(&card->ip_list);
1406 INIT_LIST_HEAD(card->ip_tbd_list);
1407 INIT_LIST_HEAD(&card->cmd_waiter_list);
1408 init_waitqueue_head(&card->wait_q);
1409 /* initial options */
1410 qeth_set_intial_options(card);
1411 /* IP address takeover */
1412 INIT_LIST_HEAD(&card->ipato.entries);
1413 card->ipato.enabled = 0;
1414 card->ipato.invert4 = 0;
1415 card->ipato.invert6 = 0;
1416 /* init QDIO stuff */
1417 qeth_init_qdio_info(card);
1418 INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work);
1419 return 0;
1420 }
1421
1422 static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
1423 {
1424 struct qeth_card *card = container_of(slr, struct qeth_card,
1425 qeth_service_level);
1426 if (card->info.mcl_level[0])
1427 seq_printf(m, "qeth: %s firmware level %s\n",
1428 CARD_BUS_ID(card), card->info.mcl_level);
1429 }
1430
1431 static struct qeth_card *qeth_alloc_card(void)
1432 {
1433 struct qeth_card *card;
1434
1435 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
1436 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1437 if (!card)
1438 goto out;
1439 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
1440 card->ip_tbd_list = kzalloc(sizeof(struct list_head), GFP_KERNEL);
1441 if (!card->ip_tbd_list) {
1442 QETH_DBF_TEXT(SETUP, 0, "iptbdnom");
1443 goto out_card;
1444 }
1445 if (qeth_setup_channel(&card->read))
1446 goto out_ip;
1447 if (qeth_setup_channel(&card->write))
1448 goto out_channel;
1449 card->options.layer2 = -1;
1450 card->qeth_service_level.seq_print = qeth_core_sl_print;
1451 register_service_level(&card->qeth_service_level);
1452 return card;
1453
1454 out_channel:
1455 qeth_clean_channel(&card->read);
1456 out_ip:
1457 kfree(card->ip_tbd_list);
1458 out_card:
1459 kfree(card);
1460 out:
1461 return NULL;
1462 }
1463
1464 static int qeth_determine_card_type(struct qeth_card *card)
1465 {
1466 int i = 0;
1467
1468 QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
1469
1470 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1471 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
1472 while (known_devices[i][QETH_DEV_MODEL_IND]) {
1473 if ((CARD_RDEV(card)->id.dev_type ==
1474 known_devices[i][QETH_DEV_TYPE_IND]) &&
1475 (CARD_RDEV(card)->id.dev_model ==
1476 known_devices[i][QETH_DEV_MODEL_IND])) {
1477 card->info.type = known_devices[i][QETH_DEV_MODEL_IND];
1478 card->qdio.no_out_queues =
1479 known_devices[i][QETH_QUEUE_NO_IND];
1480 card->qdio.no_in_queues = 1;
1481 card->info.is_multicast_different =
1482 known_devices[i][QETH_MULTICAST_IND];
1483 qeth_update_from_chp_desc(card);
1484 return 0;
1485 }
1486 i++;
1487 }
1488 card->info.type = QETH_CARD_TYPE_UNKNOWN;
1489 dev_err(&card->gdev->dev, "The adapter hardware is of an "
1490 "unknown type\n");
1491 return -ENOENT;
1492 }
1493
1494 static int qeth_clear_channel(struct qeth_channel *channel)
1495 {
1496 unsigned long flags;
1497 struct qeth_card *card;
1498 int rc;
1499
1500 card = CARD_FROM_CDEV(channel->ccwdev);
1501 QETH_CARD_TEXT(card, 3, "clearch");
1502 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1503 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1504 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1505
1506 if (rc)
1507 return rc;
1508 rc = wait_event_interruptible_timeout(card->wait_q,
1509 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1510 if (rc == -ERESTARTSYS)
1511 return rc;
1512 if (channel->state != CH_STATE_STOPPED)
1513 return -ETIME;
1514 channel->state = CH_STATE_DOWN;
1515 return 0;
1516 }
1517
1518 static int qeth_halt_channel(struct qeth_channel *channel)
1519 {
1520 unsigned long flags;
1521 struct qeth_card *card;
1522 int rc;
1523
1524 card = CARD_FROM_CDEV(channel->ccwdev);
1525 QETH_CARD_TEXT(card, 3, "haltch");
1526 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1527 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1528 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1529
1530 if (rc)
1531 return rc;
1532 rc = wait_event_interruptible_timeout(card->wait_q,
1533 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1534 if (rc == -ERESTARTSYS)
1535 return rc;
1536 if (channel->state != CH_STATE_HALTED)
1537 return -ETIME;
1538 return 0;
1539 }
1540
1541 static int qeth_halt_channels(struct qeth_card *card)
1542 {
1543 int rc1 = 0, rc2 = 0, rc3 = 0;
1544
1545 QETH_CARD_TEXT(card, 3, "haltchs");
1546 rc1 = qeth_halt_channel(&card->read);
1547 rc2 = qeth_halt_channel(&card->write);
1548 rc3 = qeth_halt_channel(&card->data);
1549 if (rc1)
1550 return rc1;
1551 if (rc2)
1552 return rc2;
1553 return rc3;
1554 }
1555
1556 static int qeth_clear_channels(struct qeth_card *card)
1557 {
1558 int rc1 = 0, rc2 = 0, rc3 = 0;
1559
1560 QETH_CARD_TEXT(card, 3, "clearchs");
1561 rc1 = qeth_clear_channel(&card->read);
1562 rc2 = qeth_clear_channel(&card->write);
1563 rc3 = qeth_clear_channel(&card->data);
1564 if (rc1)
1565 return rc1;
1566 if (rc2)
1567 return rc2;
1568 return rc3;
1569 }
1570
1571 static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1572 {
1573 int rc = 0;
1574
1575 QETH_CARD_TEXT(card, 3, "clhacrd");
1576
1577 if (halt)
1578 rc = qeth_halt_channels(card);
1579 if (rc)
1580 return rc;
1581 return qeth_clear_channels(card);
1582 }
1583
1584 int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1585 {
1586 int rc = 0;
1587
1588 QETH_CARD_TEXT(card, 3, "qdioclr");
1589 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1590 QETH_QDIO_CLEANING)) {
1591 case QETH_QDIO_ESTABLISHED:
1592 if (card->info.type == QETH_CARD_TYPE_IQD)
1593 rc = qdio_shutdown(CARD_DDEV(card),
1594 QDIO_FLAG_CLEANUP_USING_HALT);
1595 else
1596 rc = qdio_shutdown(CARD_DDEV(card),
1597 QDIO_FLAG_CLEANUP_USING_CLEAR);
1598 if (rc)
1599 QETH_CARD_TEXT_(card, 3, "1err%d", rc);
1600 qdio_free(CARD_DDEV(card));
1601 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1602 break;
1603 case QETH_QDIO_CLEANING:
1604 return rc;
1605 default:
1606 break;
1607 }
1608 rc = qeth_clear_halt_card(card, use_halt);
1609 if (rc)
1610 QETH_CARD_TEXT_(card, 3, "2err%d", rc);
1611 card->state = CARD_STATE_DOWN;
1612 return rc;
1613 }
1614 EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1615
1616 static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1617 int *length)
1618 {
1619 struct ciw *ciw;
1620 char *rcd_buf;
1621 int ret;
1622 struct qeth_channel *channel = &card->data;
1623 unsigned long flags;
1624
1625 /*
1626 * scan for RCD command in extended SenseID data
1627 */
1628 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1629 if (!ciw || ciw->cmd == 0)
1630 return -EOPNOTSUPP;
1631 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1632 if (!rcd_buf)
1633 return -ENOMEM;
1634
1635 channel->ccw.cmd_code = ciw->cmd;
1636 channel->ccw.cda = (__u32) __pa(rcd_buf);
1637 channel->ccw.count = ciw->count;
1638 channel->ccw.flags = CCW_FLAG_SLI;
1639 channel->state = CH_STATE_RCD;
1640 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1641 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1642 QETH_RCD_PARM, LPM_ANYPATH, 0,
1643 QETH_RCD_TIMEOUT);
1644 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1645 if (!ret)
1646 wait_event(card->wait_q,
1647 (channel->state == CH_STATE_RCD_DONE ||
1648 channel->state == CH_STATE_DOWN));
1649 if (channel->state == CH_STATE_DOWN)
1650 ret = -EIO;
1651 else
1652 channel->state = CH_STATE_DOWN;
1653 if (ret) {
1654 kfree(rcd_buf);
1655 *buffer = NULL;
1656 *length = 0;
1657 } else {
1658 *length = ciw->count;
1659 *buffer = rcd_buf;
1660 }
1661 return ret;
1662 }
1663
1664 static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
1665 {
1666 QETH_DBF_TEXT(SETUP, 2, "cfgunit");
1667 card->info.chpid = prcd[30];
1668 card->info.unit_addr2 = prcd[31];
1669 card->info.cula = prcd[63];
1670 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1671 (prcd[0x11] == _ascebc['M']));
1672 }
1673
1674 static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
1675 {
1676 QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
1677
1678 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 &&
1679 (prcd[76] == 0xF5 || prcd[76] == 0xF6)) {
1680 card->info.blkt.time_total = 250;
1681 card->info.blkt.inter_packet = 5;
1682 card->info.blkt.inter_packet_jumbo = 15;
1683 } else {
1684 card->info.blkt.time_total = 0;
1685 card->info.blkt.inter_packet = 0;
1686 card->info.blkt.inter_packet_jumbo = 0;
1687 }
1688 }
1689
1690 static void qeth_init_tokens(struct qeth_card *card)
1691 {
1692 card->token.issuer_rm_w = 0x00010103UL;
1693 card->token.cm_filter_w = 0x00010108UL;
1694 card->token.cm_connection_w = 0x0001010aUL;
1695 card->token.ulp_filter_w = 0x0001010bUL;
1696 card->token.ulp_connection_w = 0x0001010dUL;
1697 }
1698
1699 static void qeth_init_func_level(struct qeth_card *card)
1700 {
1701 switch (card->info.type) {
1702 case QETH_CARD_TYPE_IQD:
1703 card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD;
1704 break;
1705 case QETH_CARD_TYPE_OSD:
1706 case QETH_CARD_TYPE_OSN:
1707 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD;
1708 break;
1709 default:
1710 break;
1711 }
1712 }
1713
1714 static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1715 void (*idx_reply_cb)(struct qeth_channel *,
1716 struct qeth_cmd_buffer *))
1717 {
1718 struct qeth_cmd_buffer *iob;
1719 unsigned long flags;
1720 int rc;
1721 struct qeth_card *card;
1722
1723 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
1724 card = CARD_FROM_CDEV(channel->ccwdev);
1725 iob = qeth_get_buffer(channel);
1726 iob->callback = idx_reply_cb;
1727 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1728 channel->ccw.count = QETH_BUFSIZE;
1729 channel->ccw.cda = (__u32) __pa(iob->data);
1730
1731 wait_event(card->wait_q,
1732 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1733 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
1734 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1735 rc = ccw_device_start(channel->ccwdev,
1736 &channel->ccw, (addr_t) iob, 0, 0);
1737 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1738
1739 if (rc) {
1740 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
1741 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
1742 atomic_set(&channel->irq_pending, 0);
1743 wake_up(&card->wait_q);
1744 return rc;
1745 }
1746 rc = wait_event_interruptible_timeout(card->wait_q,
1747 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1748 if (rc == -ERESTARTSYS)
1749 return rc;
1750 if (channel->state != CH_STATE_UP) {
1751 rc = -ETIME;
1752 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
1753 qeth_clear_cmd_buffers(channel);
1754 } else
1755 rc = 0;
1756 return rc;
1757 }
1758
1759 static int qeth_idx_activate_channel(struct qeth_channel *channel,
1760 void (*idx_reply_cb)(struct qeth_channel *,
1761 struct qeth_cmd_buffer *))
1762 {
1763 struct qeth_card *card;
1764 struct qeth_cmd_buffer *iob;
1765 unsigned long flags;
1766 __u16 temp;
1767 __u8 tmp;
1768 int rc;
1769 struct ccw_dev_id temp_devid;
1770
1771 card = CARD_FROM_CDEV(channel->ccwdev);
1772
1773 QETH_DBF_TEXT(SETUP, 2, "idxactch");
1774
1775 iob = qeth_get_buffer(channel);
1776 iob->callback = idx_reply_cb;
1777 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1778 channel->ccw.count = IDX_ACTIVATE_SIZE;
1779 channel->ccw.cda = (__u32) __pa(iob->data);
1780 if (channel == &card->write) {
1781 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1782 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1783 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1784 card->seqno.trans_hdr++;
1785 } else {
1786 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1787 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1788 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1789 }
1790 tmp = ((__u8)card->info.portno) | 0x80;
1791 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1792 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1793 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1794 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1795 &card->info.func_level, sizeof(__u16));
1796 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1797 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
1798 temp = (card->info.cula << 8) + card->info.unit_addr2;
1799 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1800
1801 wait_event(card->wait_q,
1802 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1803 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
1804 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1805 rc = ccw_device_start(channel->ccwdev,
1806 &channel->ccw, (addr_t) iob, 0, 0);
1807 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1808
1809 if (rc) {
1810 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1811 rc);
1812 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
1813 atomic_set(&channel->irq_pending, 0);
1814 wake_up(&card->wait_q);
1815 return rc;
1816 }
1817 rc = wait_event_interruptible_timeout(card->wait_q,
1818 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1819 if (rc == -ERESTARTSYS)
1820 return rc;
1821 if (channel->state != CH_STATE_ACTIVATING) {
1822 dev_warn(&channel->ccwdev->dev, "The qeth device driver"
1823 " failed to recover an error on the device\n");
1824 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
1825 dev_name(&channel->ccwdev->dev));
1826 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
1827 qeth_clear_cmd_buffers(channel);
1828 return -ETIME;
1829 }
1830 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1831 }
1832
1833 static int qeth_peer_func_level(int level)
1834 {
1835 if ((level & 0xff) == 8)
1836 return (level & 0xff) + 0x400;
1837 if (((level >> 8) & 3) == 1)
1838 return (level & 0xff) + 0x200;
1839 return level;
1840 }
1841
1842 static void qeth_idx_write_cb(struct qeth_channel *channel,
1843 struct qeth_cmd_buffer *iob)
1844 {
1845 struct qeth_card *card;
1846 __u16 temp;
1847
1848 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
1849
1850 if (channel->state == CH_STATE_DOWN) {
1851 channel->state = CH_STATE_ACTIVATING;
1852 goto out;
1853 }
1854 card = CARD_FROM_CDEV(channel->ccwdev);
1855
1856 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1857 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL)
1858 dev_err(&card->write.ccwdev->dev,
1859 "The adapter is used exclusively by another "
1860 "host\n");
1861 else
1862 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
1863 " negative reply\n",
1864 dev_name(&card->write.ccwdev->dev));
1865 goto out;
1866 }
1867 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1868 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
1869 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
1870 "function level mismatch (sent: 0x%x, received: "
1871 "0x%x)\n", dev_name(&card->write.ccwdev->dev),
1872 card->info.func_level, temp);
1873 goto out;
1874 }
1875 channel->state = CH_STATE_UP;
1876 out:
1877 qeth_release_buffer(channel, iob);
1878 }
1879
1880 static void qeth_idx_read_cb(struct qeth_channel *channel,
1881 struct qeth_cmd_buffer *iob)
1882 {
1883 struct qeth_card *card;
1884 __u16 temp;
1885
1886 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
1887 if (channel->state == CH_STATE_DOWN) {
1888 channel->state = CH_STATE_ACTIVATING;
1889 goto out;
1890 }
1891
1892 card = CARD_FROM_CDEV(channel->ccwdev);
1893 if (qeth_check_idx_response(card, iob->data))
1894 goto out;
1895
1896 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1897 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
1898 case QETH_IDX_ACT_ERR_EXCL:
1899 dev_err(&card->write.ccwdev->dev,
1900 "The adapter is used exclusively by another "
1901 "host\n");
1902 break;
1903 case QETH_IDX_ACT_ERR_AUTH:
1904 case QETH_IDX_ACT_ERR_AUTH_USER:
1905 dev_err(&card->read.ccwdev->dev,
1906 "Setting the device online failed because of "
1907 "insufficient authorization\n");
1908 break;
1909 default:
1910 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
1911 " negative reply\n",
1912 dev_name(&card->read.ccwdev->dev));
1913 }
1914 QETH_CARD_TEXT_(card, 2, "idxread%c",
1915 QETH_IDX_ACT_CAUSE_CODE(iob->data));
1916 goto out;
1917 }
1918
1919 /**
1920 * * temporary fix for microcode bug
1921 * * to revert it,replace OR by AND
1922 * */
1923 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) ||
1924 (card->info.type == QETH_CARD_TYPE_OSD))
1925 card->info.portname_required = 1;
1926
1927 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1928 if (temp != qeth_peer_func_level(card->info.func_level)) {
1929 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
1930 "level mismatch (sent: 0x%x, received: 0x%x)\n",
1931 dev_name(&card->read.ccwdev->dev),
1932 card->info.func_level, temp);
1933 goto out;
1934 }
1935 memcpy(&card->token.issuer_rm_r,
1936 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1937 QETH_MPC_TOKEN_LENGTH);
1938 memcpy(&card->info.mcl_level[0],
1939 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
1940 channel->state = CH_STATE_UP;
1941 out:
1942 qeth_release_buffer(channel, iob);
1943 }
1944
1945 void qeth_prepare_control_data(struct qeth_card *card, int len,
1946 struct qeth_cmd_buffer *iob)
1947 {
1948 qeth_setup_ccw(&card->write, iob->data, len);
1949 iob->callback = qeth_release_buffer;
1950
1951 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1952 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1953 card->seqno.trans_hdr++;
1954 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
1955 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
1956 card->seqno.pdu_hdr++;
1957 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
1958 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
1959 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
1960 }
1961 EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
1962
1963 int qeth_send_control_data(struct qeth_card *card, int len,
1964 struct qeth_cmd_buffer *iob,
1965 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
1966 unsigned long),
1967 void *reply_param)
1968 {
1969 int rc;
1970 unsigned long flags;
1971 struct qeth_reply *reply = NULL;
1972 unsigned long timeout, event_timeout;
1973 struct qeth_ipa_cmd *cmd;
1974
1975 QETH_CARD_TEXT(card, 2, "sendctl");
1976
1977 if (card->read_or_write_problem) {
1978 qeth_release_buffer(iob->channel, iob);
1979 return -EIO;
1980 }
1981 reply = qeth_alloc_reply(card);
1982 if (!reply) {
1983 return -ENOMEM;
1984 }
1985 reply->callback = reply_cb;
1986 reply->param = reply_param;
1987 if (card->state == CARD_STATE_DOWN)
1988 reply->seqno = QETH_IDX_COMMAND_SEQNO;
1989 else
1990 reply->seqno = card->seqno.ipa++;
1991 init_waitqueue_head(&reply->wait_q);
1992 spin_lock_irqsave(&card->lock, flags);
1993 list_add_tail(&reply->list, &card->cmd_waiter_list);
1994 spin_unlock_irqrestore(&card->lock, flags);
1995 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
1996
1997 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
1998 qeth_prepare_control_data(card, len, iob);
1999
2000 if (IS_IPA(iob->data))
2001 event_timeout = QETH_IPA_TIMEOUT;
2002 else
2003 event_timeout = QETH_TIMEOUT;
2004 timeout = jiffies + event_timeout;
2005
2006 QETH_CARD_TEXT(card, 6, "noirqpnd");
2007 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
2008 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
2009 (addr_t) iob, 0, 0);
2010 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
2011 if (rc) {
2012 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
2013 "ccw_device_start rc = %i\n",
2014 dev_name(&card->write.ccwdev->dev), rc);
2015 QETH_CARD_TEXT_(card, 2, " err%d", rc);
2016 spin_lock_irqsave(&card->lock, flags);
2017 list_del_init(&reply->list);
2018 qeth_put_reply(reply);
2019 spin_unlock_irqrestore(&card->lock, flags);
2020 qeth_release_buffer(iob->channel, iob);
2021 atomic_set(&card->write.irq_pending, 0);
2022 wake_up(&card->wait_q);
2023 return rc;
2024 }
2025
2026 /* we have only one long running ipassist, since we can ensure
2027 process context of this command we can sleep */
2028 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2029 if ((cmd->hdr.command == IPA_CMD_SETIP) &&
2030 (cmd->hdr.prot_version == QETH_PROT_IPV4)) {
2031 if (!wait_event_timeout(reply->wait_q,
2032 atomic_read(&reply->received), event_timeout))
2033 goto time_err;
2034 } else {
2035 while (!atomic_read(&reply->received)) {
2036 if (time_after(jiffies, timeout))
2037 goto time_err;
2038 cpu_relax();
2039 }
2040 }
2041
2042 if (reply->rc == -EIO)
2043 goto error;
2044 rc = reply->rc;
2045 qeth_put_reply(reply);
2046 return rc;
2047
2048 time_err:
2049 reply->rc = -ETIME;
2050 spin_lock_irqsave(&reply->card->lock, flags);
2051 list_del_init(&reply->list);
2052 spin_unlock_irqrestore(&reply->card->lock, flags);
2053 atomic_inc(&reply->received);
2054 error:
2055 atomic_set(&card->write.irq_pending, 0);
2056 qeth_release_buffer(iob->channel, iob);
2057 card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO;
2058 rc = reply->rc;
2059 qeth_put_reply(reply);
2060 return rc;
2061 }
2062 EXPORT_SYMBOL_GPL(qeth_send_control_data);
2063
2064 static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2065 unsigned long data)
2066 {
2067 struct qeth_cmd_buffer *iob;
2068
2069 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
2070
2071 iob = (struct qeth_cmd_buffer *) data;
2072 memcpy(&card->token.cm_filter_r,
2073 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
2074 QETH_MPC_TOKEN_LENGTH);
2075 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
2076 return 0;
2077 }
2078
2079 static int qeth_cm_enable(struct qeth_card *card)
2080 {
2081 int rc;
2082 struct qeth_cmd_buffer *iob;
2083
2084 QETH_DBF_TEXT(SETUP, 2, "cmenable");
2085
2086 iob = qeth_wait_for_buffer(&card->write);
2087 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
2088 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
2089 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2090 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
2091 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
2092
2093 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
2094 qeth_cm_enable_cb, NULL);
2095 return rc;
2096 }
2097
2098 static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2099 unsigned long data)
2100 {
2101
2102 struct qeth_cmd_buffer *iob;
2103
2104 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
2105
2106 iob = (struct qeth_cmd_buffer *) data;
2107 memcpy(&card->token.cm_connection_r,
2108 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
2109 QETH_MPC_TOKEN_LENGTH);
2110 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
2111 return 0;
2112 }
2113
2114 static int qeth_cm_setup(struct qeth_card *card)
2115 {
2116 int rc;
2117 struct qeth_cmd_buffer *iob;
2118
2119 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
2120
2121 iob = qeth_wait_for_buffer(&card->write);
2122 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
2123 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
2124 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2125 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
2126 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
2127 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
2128 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
2129 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
2130 qeth_cm_setup_cb, NULL);
2131 return rc;
2132
2133 }
2134
2135 static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
2136 {
2137 switch (card->info.type) {
2138 case QETH_CARD_TYPE_UNKNOWN:
2139 return 1500;
2140 case QETH_CARD_TYPE_IQD:
2141 return card->info.max_mtu;
2142 case QETH_CARD_TYPE_OSD:
2143 switch (card->info.link_type) {
2144 case QETH_LINK_TYPE_HSTR:
2145 case QETH_LINK_TYPE_LANE_TR:
2146 return 2000;
2147 default:
2148 return 1492;
2149 }
2150 case QETH_CARD_TYPE_OSM:
2151 case QETH_CARD_TYPE_OSX:
2152 return 1492;
2153 default:
2154 return 1500;
2155 }
2156 }
2157
2158 static inline int qeth_get_mtu_outof_framesize(int framesize)
2159 {
2160 switch (framesize) {
2161 case 0x4000:
2162 return 8192;
2163 case 0x6000:
2164 return 16384;
2165 case 0xa000:
2166 return 32768;
2167 case 0xffff:
2168 return 57344;
2169 default:
2170 return 0;
2171 }
2172 }
2173
2174 static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
2175 {
2176 switch (card->info.type) {
2177 case QETH_CARD_TYPE_OSD:
2178 case QETH_CARD_TYPE_OSM:
2179 case QETH_CARD_TYPE_OSX:
2180 case QETH_CARD_TYPE_IQD:
2181 return ((mtu >= 576) &&
2182 (mtu <= card->info.max_mtu));
2183 case QETH_CARD_TYPE_OSN:
2184 case QETH_CARD_TYPE_UNKNOWN:
2185 default:
2186 return 1;
2187 }
2188 }
2189
2190 static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2191 unsigned long data)
2192 {
2193
2194 __u16 mtu, framesize;
2195 __u16 len;
2196 __u8 link_type;
2197 struct qeth_cmd_buffer *iob;
2198
2199 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
2200
2201 iob = (struct qeth_cmd_buffer *) data;
2202 memcpy(&card->token.ulp_filter_r,
2203 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
2204 QETH_MPC_TOKEN_LENGTH);
2205 if (card->info.type == QETH_CARD_TYPE_IQD) {
2206 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
2207 mtu = qeth_get_mtu_outof_framesize(framesize);
2208 if (!mtu) {
2209 iob->rc = -EINVAL;
2210 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
2211 return 0;
2212 }
2213 if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) {
2214 /* frame size has changed */
2215 if (card->dev &&
2216 ((card->dev->mtu == card->info.initial_mtu) ||
2217 (card->dev->mtu > mtu)))
2218 card->dev->mtu = mtu;
2219 qeth_free_qdio_buffers(card);
2220 }
2221 card->info.initial_mtu = mtu;
2222 card->info.max_mtu = mtu;
2223 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
2224 } else {
2225 card->info.initial_mtu = qeth_get_initial_mtu_for_card(card);
2226 card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU(
2227 iob->data);
2228 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
2229 }
2230
2231 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
2232 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
2233 memcpy(&link_type,
2234 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
2235 card->info.link_type = link_type;
2236 } else
2237 card->info.link_type = 0;
2238 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type);
2239 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
2240 return 0;
2241 }
2242
2243 static int qeth_ulp_enable(struct qeth_card *card)
2244 {
2245 int rc;
2246 char prot_type;
2247 struct qeth_cmd_buffer *iob;
2248
2249 /*FIXME: trace view callbacks*/
2250 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
2251
2252 iob = qeth_wait_for_buffer(&card->write);
2253 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
2254
2255 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
2256 (__u8) card->info.portno;
2257 if (card->options.layer2)
2258 if (card->info.type == QETH_CARD_TYPE_OSN)
2259 prot_type = QETH_PROT_OSN2;
2260 else
2261 prot_type = QETH_PROT_LAYER2;
2262 else
2263 prot_type = QETH_PROT_TCPIP;
2264
2265 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
2266 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
2267 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2268 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
2269 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
2270 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data),
2271 card->info.portname, 9);
2272 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
2273 qeth_ulp_enable_cb, NULL);
2274 return rc;
2275
2276 }
2277
2278 static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2279 unsigned long data)
2280 {
2281 struct qeth_cmd_buffer *iob;
2282
2283 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
2284
2285 iob = (struct qeth_cmd_buffer *) data;
2286 memcpy(&card->token.ulp_connection_r,
2287 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2288 QETH_MPC_TOKEN_LENGTH);
2289 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2290 3)) {
2291 QETH_DBF_TEXT(SETUP, 2, "olmlimit");
2292 dev_err(&card->gdev->dev, "A connection could not be "
2293 "established because of an OLM limit\n");
2294 iob->rc = -EMLINK;
2295 }
2296 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
2297 return 0;
2298 }
2299
2300 static int qeth_ulp_setup(struct qeth_card *card)
2301 {
2302 int rc;
2303 __u16 temp;
2304 struct qeth_cmd_buffer *iob;
2305 struct ccw_dev_id dev_id;
2306
2307 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
2308
2309 iob = qeth_wait_for_buffer(&card->write);
2310 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
2311
2312 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
2313 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2314 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
2315 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
2316 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
2317 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
2318
2319 ccw_device_get_id(CARD_DDEV(card), &dev_id);
2320 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
2321 temp = (card->info.cula << 8) + card->info.unit_addr2;
2322 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
2323 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
2324 qeth_ulp_setup_cb, NULL);
2325 return rc;
2326 }
2327
2328 static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx)
2329 {
2330 int rc;
2331 struct qeth_qdio_out_buffer *newbuf;
2332
2333 rc = 0;
2334 newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC);
2335 if (!newbuf) {
2336 rc = -ENOMEM;
2337 goto out;
2338 }
2339 newbuf->buffer = &q->qdio_bufs[bidx];
2340 skb_queue_head_init(&newbuf->skb_list);
2341 lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key);
2342 newbuf->q = q;
2343 newbuf->aob = NULL;
2344 newbuf->next_pending = q->bufs[bidx];
2345 atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY);
2346 q->bufs[bidx] = newbuf;
2347 if (q->bufstates) {
2348 q->bufstates[bidx].user = newbuf;
2349 QETH_CARD_TEXT_(q->card, 2, "nbs%d", bidx);
2350 QETH_CARD_TEXT_(q->card, 2, "%lx", (long) newbuf);
2351 QETH_CARD_TEXT_(q->card, 2, "%lx",
2352 (long) newbuf->next_pending);
2353 }
2354 out:
2355 return rc;
2356 }
2357
2358
2359 static int qeth_alloc_qdio_buffers(struct qeth_card *card)
2360 {
2361 int i, j;
2362
2363 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
2364
2365 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
2366 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
2367 return 0;
2368
2369 card->qdio.in_q = kzalloc(sizeof(struct qeth_qdio_q),
2370 GFP_KERNEL);
2371 if (!card->qdio.in_q)
2372 goto out_nomem;
2373 QETH_DBF_TEXT(SETUP, 2, "inq");
2374 QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *));
2375 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q));
2376 /* give inbound qeth_qdio_buffers their qdio_buffers */
2377 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
2378 card->qdio.in_q->bufs[i].buffer =
2379 &card->qdio.in_q->qdio_bufs[i];
2380 card->qdio.in_q->bufs[i].rx_skb = NULL;
2381 }
2382 /* inbound buffer pool */
2383 if (qeth_alloc_buffer_pool(card))
2384 goto out_freeinq;
2385
2386 /* outbound */
2387 card->qdio.out_qs =
2388 kzalloc(card->qdio.no_out_queues *
2389 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2390 if (!card->qdio.out_qs)
2391 goto out_freepool;
2392 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2393 card->qdio.out_qs[i] = kzalloc(sizeof(struct qeth_qdio_out_q),
2394 GFP_KERNEL);
2395 if (!card->qdio.out_qs[i])
2396 goto out_freeoutq;
2397 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2398 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
2399 card->qdio.out_qs[i]->queue_no = i;
2400 /* give outbound qeth_qdio_buffers their qdio_buffers */
2401 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2402 WARN_ON(card->qdio.out_qs[i]->bufs[j] != NULL);
2403 if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j))
2404 goto out_freeoutqbufs;
2405 }
2406 }
2407
2408 /* completion */
2409 if (qeth_alloc_cq(card))
2410 goto out_freeoutq;
2411
2412 return 0;
2413
2414 out_freeoutqbufs:
2415 while (j > 0) {
2416 --j;
2417 kmem_cache_free(qeth_qdio_outbuf_cache,
2418 card->qdio.out_qs[i]->bufs[j]);
2419 card->qdio.out_qs[i]->bufs[j] = NULL;
2420 }
2421 out_freeoutq:
2422 while (i > 0) {
2423 kfree(card->qdio.out_qs[--i]);
2424 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
2425 }
2426 kfree(card->qdio.out_qs);
2427 card->qdio.out_qs = NULL;
2428 out_freepool:
2429 qeth_free_buffer_pool(card);
2430 out_freeinq:
2431 kfree(card->qdio.in_q);
2432 card->qdio.in_q = NULL;
2433 out_nomem:
2434 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2435 return -ENOMEM;
2436 }
2437
2438 static void qeth_create_qib_param_field(struct qeth_card *card,
2439 char *param_field)
2440 {
2441
2442 param_field[0] = _ascebc['P'];
2443 param_field[1] = _ascebc['C'];
2444 param_field[2] = _ascebc['I'];
2445 param_field[3] = _ascebc['T'];
2446 *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
2447 *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
2448 *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
2449 }
2450
2451 static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2452 char *param_field)
2453 {
2454 param_field[16] = _ascebc['B'];
2455 param_field[17] = _ascebc['L'];
2456 param_field[18] = _ascebc['K'];
2457 param_field[19] = _ascebc['T'];
2458 *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
2459 *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
2460 *((unsigned int *) (&param_field[28])) =
2461 card->info.blkt.inter_packet_jumbo;
2462 }
2463
2464 static int qeth_qdio_activate(struct qeth_card *card)
2465 {
2466 QETH_DBF_TEXT(SETUP, 3, "qdioact");
2467 return qdio_activate(CARD_DDEV(card));
2468 }
2469
2470 static int qeth_dm_act(struct qeth_card *card)
2471 {
2472 int rc;
2473 struct qeth_cmd_buffer *iob;
2474
2475 QETH_DBF_TEXT(SETUP, 2, "dmact");
2476
2477 iob = qeth_wait_for_buffer(&card->write);
2478 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2479
2480 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2481 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2482 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2483 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2484 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2485 return rc;
2486 }
2487
2488 static int qeth_mpc_initialize(struct qeth_card *card)
2489 {
2490 int rc;
2491
2492 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
2493
2494 rc = qeth_issue_next_read(card);
2495 if (rc) {
2496 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
2497 return rc;
2498 }
2499 rc = qeth_cm_enable(card);
2500 if (rc) {
2501 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
2502 goto out_qdio;
2503 }
2504 rc = qeth_cm_setup(card);
2505 if (rc) {
2506 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
2507 goto out_qdio;
2508 }
2509 rc = qeth_ulp_enable(card);
2510 if (rc) {
2511 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
2512 goto out_qdio;
2513 }
2514 rc = qeth_ulp_setup(card);
2515 if (rc) {
2516 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
2517 goto out_qdio;
2518 }
2519 rc = qeth_alloc_qdio_buffers(card);
2520 if (rc) {
2521 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
2522 goto out_qdio;
2523 }
2524 rc = qeth_qdio_establish(card);
2525 if (rc) {
2526 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
2527 qeth_free_qdio_buffers(card);
2528 goto out_qdio;
2529 }
2530 rc = qeth_qdio_activate(card);
2531 if (rc) {
2532 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
2533 goto out_qdio;
2534 }
2535 rc = qeth_dm_act(card);
2536 if (rc) {
2537 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
2538 goto out_qdio;
2539 }
2540
2541 return 0;
2542 out_qdio:
2543 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
2544 return rc;
2545 }
2546
2547 static void qeth_print_status_with_portname(struct qeth_card *card)
2548 {
2549 char dbf_text[15];
2550 int i;
2551
2552 sprintf(dbf_text, "%s", card->info.portname + 1);
2553 for (i = 0; i < 8; i++)
2554 dbf_text[i] =
2555 (char) _ebcasc[(__u8) dbf_text[i]];
2556 dbf_text[8] = 0;
2557 dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n"
2558 "with link type %s (portname: %s)\n",
2559 qeth_get_cardname(card),
2560 (card->info.mcl_level[0]) ? " (level: " : "",
2561 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2562 (card->info.mcl_level[0]) ? ")" : "",
2563 qeth_get_cardname_short(card),
2564 dbf_text);
2565
2566 }
2567
2568 static void qeth_print_status_no_portname(struct qeth_card *card)
2569 {
2570 if (card->info.portname[0])
2571 dev_info(&card->gdev->dev, "Device is a%s "
2572 "card%s%s%s\nwith link type %s "
2573 "(no portname needed by interface).\n",
2574 qeth_get_cardname(card),
2575 (card->info.mcl_level[0]) ? " (level: " : "",
2576 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2577 (card->info.mcl_level[0]) ? ")" : "",
2578 qeth_get_cardname_short(card));
2579 else
2580 dev_info(&card->gdev->dev, "Device is a%s "
2581 "card%s%s%s\nwith link type %s.\n",
2582 qeth_get_cardname(card),
2583 (card->info.mcl_level[0]) ? " (level: " : "",
2584 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2585 (card->info.mcl_level[0]) ? ")" : "",
2586 qeth_get_cardname_short(card));
2587 }
2588
2589 void qeth_print_status_message(struct qeth_card *card)
2590 {
2591 switch (card->info.type) {
2592 case QETH_CARD_TYPE_OSD:
2593 case QETH_CARD_TYPE_OSM:
2594 case QETH_CARD_TYPE_OSX:
2595 /* VM will use a non-zero first character
2596 * to indicate a HiperSockets like reporting
2597 * of the level OSA sets the first character to zero
2598 * */
2599 if (!card->info.mcl_level[0]) {
2600 sprintf(card->info.mcl_level, "%02x%02x",
2601 card->info.mcl_level[2],
2602 card->info.mcl_level[3]);
2603
2604 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2605 break;
2606 }
2607 /* fallthrough */
2608 case QETH_CARD_TYPE_IQD:
2609 if ((card->info.guestlan) ||
2610 (card->info.mcl_level[0] & 0x80)) {
2611 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2612 card->info.mcl_level[0]];
2613 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2614 card->info.mcl_level[1]];
2615 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2616 card->info.mcl_level[2]];
2617 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2618 card->info.mcl_level[3]];
2619 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2620 }
2621 break;
2622 default:
2623 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2624 }
2625 if (card->info.portname_required)
2626 qeth_print_status_with_portname(card);
2627 else
2628 qeth_print_status_no_portname(card);
2629 }
2630 EXPORT_SYMBOL_GPL(qeth_print_status_message);
2631
2632 static void qeth_initialize_working_pool_list(struct qeth_card *card)
2633 {
2634 struct qeth_buffer_pool_entry *entry;
2635
2636 QETH_CARD_TEXT(card, 5, "inwrklst");
2637
2638 list_for_each_entry(entry,
2639 &card->qdio.init_pool.entry_list, init_list) {
2640 qeth_put_buffer_pool_entry(card, entry);
2641 }
2642 }
2643
2644 static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2645 struct qeth_card *card)
2646 {
2647 struct list_head *plh;
2648 struct qeth_buffer_pool_entry *entry;
2649 int i, free;
2650 struct page *page;
2651
2652 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2653 return NULL;
2654
2655 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2656 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2657 free = 1;
2658 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2659 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2660 free = 0;
2661 break;
2662 }
2663 }
2664 if (free) {
2665 list_del_init(&entry->list);
2666 return entry;
2667 }
2668 }
2669
2670 /* no free buffer in pool so take first one and swap pages */
2671 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2672 struct qeth_buffer_pool_entry, list);
2673 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2674 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2675 page = alloc_page(GFP_ATOMIC);
2676 if (!page) {
2677 return NULL;
2678 } else {
2679 free_page((unsigned long)entry->elements[i]);
2680 entry->elements[i] = page_address(page);
2681 if (card->options.performance_stats)
2682 card->perf_stats.sg_alloc_page_rx++;
2683 }
2684 }
2685 }
2686 list_del_init(&entry->list);
2687 return entry;
2688 }
2689
2690 static int qeth_init_input_buffer(struct qeth_card *card,
2691 struct qeth_qdio_buffer *buf)
2692 {
2693 struct qeth_buffer_pool_entry *pool_entry;
2694 int i;
2695
2696 if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) {
2697 buf->rx_skb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
2698 if (!buf->rx_skb)
2699 return 1;
2700 }
2701
2702 pool_entry = qeth_find_free_buffer_pool_entry(card);
2703 if (!pool_entry)
2704 return 1;
2705
2706 /*
2707 * since the buffer is accessed only from the input_tasklet
2708 * there shouldn't be a need to synchronize; also, since we use
2709 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2710 * buffers
2711 */
2712
2713 buf->pool_entry = pool_entry;
2714 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2715 buf->buffer->element[i].length = PAGE_SIZE;
2716 buf->buffer->element[i].addr = pool_entry->elements[i];
2717 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
2718 buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY;
2719 else
2720 buf->buffer->element[i].eflags = 0;
2721 buf->buffer->element[i].sflags = 0;
2722 }
2723 return 0;
2724 }
2725
2726 int qeth_init_qdio_queues(struct qeth_card *card)
2727 {
2728 int i, j;
2729 int rc;
2730
2731 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
2732
2733 /* inbound queue */
2734 memset(card->qdio.in_q->qdio_bufs, 0,
2735 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2736 qeth_initialize_working_pool_list(card);
2737 /*give only as many buffers to hardware as we have buffer pool entries*/
2738 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2739 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2740 card->qdio.in_q->next_buf_to_init =
2741 card->qdio.in_buf_pool.buf_count - 1;
2742 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
2743 card->qdio.in_buf_pool.buf_count - 1);
2744 if (rc) {
2745 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
2746 return rc;
2747 }
2748
2749 /* completion */
2750 rc = qeth_cq_init(card);
2751 if (rc) {
2752 return rc;
2753 }
2754
2755 /* outbound queue */
2756 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2757 memset(card->qdio.out_qs[i]->qdio_bufs, 0,
2758 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2759 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2760 qeth_clear_output_buffer(card->qdio.out_qs[i],
2761 card->qdio.out_qs[i]->bufs[j],
2762 QETH_QDIO_BUF_EMPTY);
2763 }
2764 card->qdio.out_qs[i]->card = card;
2765 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2766 card->qdio.out_qs[i]->do_pack = 0;
2767 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2768 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2769 atomic_set(&card->qdio.out_qs[i]->state,
2770 QETH_OUT_Q_UNLOCKED);
2771 }
2772 return 0;
2773 }
2774 EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2775
2776 static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
2777 {
2778 switch (link_type) {
2779 case QETH_LINK_TYPE_HSTR:
2780 return 2;
2781 default:
2782 return 1;
2783 }
2784 }
2785
2786 static void qeth_fill_ipacmd_header(struct qeth_card *card,
2787 struct qeth_ipa_cmd *cmd, __u8 command,
2788 enum qeth_prot_versions prot)
2789 {
2790 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2791 cmd->hdr.command = command;
2792 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2793 cmd->hdr.seqno = card->seqno.ipa;
2794 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2795 cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2796 if (card->options.layer2)
2797 cmd->hdr.prim_version_no = 2;
2798 else
2799 cmd->hdr.prim_version_no = 1;
2800 cmd->hdr.param_count = 1;
2801 cmd->hdr.prot_version = prot;
2802 cmd->hdr.ipa_supported = 0;
2803 cmd->hdr.ipa_enabled = 0;
2804 }
2805
2806 struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2807 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2808 {
2809 struct qeth_cmd_buffer *iob;
2810 struct qeth_ipa_cmd *cmd;
2811
2812 iob = qeth_wait_for_buffer(&card->write);
2813 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2814 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
2815
2816 return iob;
2817 }
2818 EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2819
2820 void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2821 char prot_type)
2822 {
2823 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2824 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2825 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2826 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2827 }
2828 EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2829
2830 int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2831 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2832 unsigned long),
2833 void *reply_param)
2834 {
2835 int rc;
2836 char prot_type;
2837
2838 QETH_CARD_TEXT(card, 4, "sendipa");
2839
2840 if (card->options.layer2)
2841 if (card->info.type == QETH_CARD_TYPE_OSN)
2842 prot_type = QETH_PROT_OSN2;
2843 else
2844 prot_type = QETH_PROT_LAYER2;
2845 else
2846 prot_type = QETH_PROT_TCPIP;
2847 qeth_prepare_ipa_cmd(card, iob, prot_type);
2848 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
2849 iob, reply_cb, reply_param);
2850 if (rc == -ETIME) {
2851 qeth_clear_ipacmd_list(card);
2852 qeth_schedule_recovery(card);
2853 }
2854 return rc;
2855 }
2856 EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2857
2858 int qeth_send_startlan(struct qeth_card *card)
2859 {
2860 int rc;
2861 struct qeth_cmd_buffer *iob;
2862
2863 QETH_DBF_TEXT(SETUP, 2, "strtlan");
2864
2865 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0);
2866 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
2867 return rc;
2868 }
2869 EXPORT_SYMBOL_GPL(qeth_send_startlan);
2870
2871 int qeth_default_setadapterparms_cb(struct qeth_card *card,
2872 struct qeth_reply *reply, unsigned long data)
2873 {
2874 struct qeth_ipa_cmd *cmd;
2875
2876 QETH_CARD_TEXT(card, 4, "defadpcb");
2877
2878 cmd = (struct qeth_ipa_cmd *) data;
2879 if (cmd->hdr.return_code == 0)
2880 cmd->hdr.return_code =
2881 cmd->data.setadapterparms.hdr.return_code;
2882 return 0;
2883 }
2884 EXPORT_SYMBOL_GPL(qeth_default_setadapterparms_cb);
2885
2886 static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2887 struct qeth_reply *reply, unsigned long data)
2888 {
2889 struct qeth_ipa_cmd *cmd;
2890
2891 QETH_CARD_TEXT(card, 3, "quyadpcb");
2892
2893 cmd = (struct qeth_ipa_cmd *) data;
2894 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) {
2895 card->info.link_type =
2896 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
2897 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type);
2898 }
2899 card->options.adp.supported_funcs =
2900 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
2901 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
2902 }
2903
2904 struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
2905 __u32 command, __u32 cmdlen)
2906 {
2907 struct qeth_cmd_buffer *iob;
2908 struct qeth_ipa_cmd *cmd;
2909
2910 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
2911 QETH_PROT_IPV4);
2912 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2913 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
2914 cmd->data.setadapterparms.hdr.command_code = command;
2915 cmd->data.setadapterparms.hdr.used_total = 1;
2916 cmd->data.setadapterparms.hdr.seq_no = 1;
2917
2918 return iob;
2919 }
2920 EXPORT_SYMBOL_GPL(qeth_get_adapter_cmd);
2921
2922 int qeth_query_setadapterparms(struct qeth_card *card)
2923 {
2924 int rc;
2925 struct qeth_cmd_buffer *iob;
2926
2927 QETH_CARD_TEXT(card, 3, "queryadp");
2928 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
2929 sizeof(struct qeth_ipacmd_setadpparms));
2930 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
2931 return rc;
2932 }
2933 EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
2934
2935 static int qeth_query_ipassists_cb(struct qeth_card *card,
2936 struct qeth_reply *reply, unsigned long data)
2937 {
2938 struct qeth_ipa_cmd *cmd;
2939
2940 QETH_DBF_TEXT(SETUP, 2, "qipasscb");
2941
2942 cmd = (struct qeth_ipa_cmd *) data;
2943
2944 switch (cmd->hdr.return_code) {
2945 case IPA_RC_NOTSUPP:
2946 case IPA_RC_L2_UNSUPPORTED_CMD:
2947 QETH_DBF_TEXT(SETUP, 2, "ipaunsup");
2948 card->options.ipa4.supported_funcs |= IPA_SETADAPTERPARMS;
2949 card->options.ipa6.supported_funcs |= IPA_SETADAPTERPARMS;
2950 return -0;
2951 default:
2952 if (cmd->hdr.return_code) {
2953 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Unhandled "
2954 "rc=%d\n",
2955 dev_name(&card->gdev->dev),
2956 cmd->hdr.return_code);
2957 return 0;
2958 }
2959 }
2960
2961 if (cmd->hdr.prot_version == QETH_PROT_IPV4) {
2962 card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported;
2963 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
2964 } else if (cmd->hdr.prot_version == QETH_PROT_IPV6) {
2965 card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported;
2966 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
2967 } else
2968 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Flawed LIC detected"
2969 "\n", dev_name(&card->gdev->dev));
2970 return 0;
2971 }
2972
2973 int qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot)
2974 {
2975 int rc;
2976 struct qeth_cmd_buffer *iob;
2977
2978 QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot);
2979 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot);
2980 rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL);
2981 return rc;
2982 }
2983 EXPORT_SYMBOL_GPL(qeth_query_ipassists);
2984
2985 static int qeth_query_setdiagass_cb(struct qeth_card *card,
2986 struct qeth_reply *reply, unsigned long data)
2987 {
2988 struct qeth_ipa_cmd *cmd;
2989 __u16 rc;
2990
2991 cmd = (struct qeth_ipa_cmd *)data;
2992 rc = cmd->hdr.return_code;
2993 if (rc)
2994 QETH_CARD_TEXT_(card, 2, "diagq:%x", rc);
2995 else
2996 card->info.diagass_support = cmd->data.diagass.ext;
2997 return 0;
2998 }
2999
3000 static int qeth_query_setdiagass(struct qeth_card *card)
3001 {
3002 struct qeth_cmd_buffer *iob;
3003 struct qeth_ipa_cmd *cmd;
3004
3005 QETH_DBF_TEXT(SETUP, 2, "qdiagass");
3006 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
3007 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3008 cmd->data.diagass.subcmd_len = 16;
3009 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY;
3010 return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL);
3011 }
3012
3013 static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid)
3014 {
3015 unsigned long info = get_zeroed_page(GFP_KERNEL);
3016 struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info;
3017 struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info;
3018 struct ccw_dev_id ccwid;
3019 int level;
3020
3021 tid->chpid = card->info.chpid;
3022 ccw_device_get_id(CARD_RDEV(card), &ccwid);
3023 tid->ssid = ccwid.ssid;
3024 tid->devno = ccwid.devno;
3025 if (!info)
3026 return;
3027 level = stsi(NULL, 0, 0, 0);
3028 if ((level >= 2) && (stsi(info222, 2, 2, 2) == 0))
3029 tid->lparnr = info222->lpar_number;
3030 if ((level >= 3) && (stsi(info322, 3, 2, 2) == 0)) {
3031 EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name));
3032 memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname));
3033 }
3034 free_page(info);
3035 return;
3036 }
3037
3038 static int qeth_hw_trap_cb(struct qeth_card *card,
3039 struct qeth_reply *reply, unsigned long data)
3040 {
3041 struct qeth_ipa_cmd *cmd;
3042 __u16 rc;
3043
3044 cmd = (struct qeth_ipa_cmd *)data;
3045 rc = cmd->hdr.return_code;
3046 if (rc)
3047 QETH_CARD_TEXT_(card, 2, "trapc:%x", rc);
3048 return 0;
3049 }
3050
3051 int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action)
3052 {
3053 struct qeth_cmd_buffer *iob;
3054 struct qeth_ipa_cmd *cmd;
3055
3056 QETH_DBF_TEXT(SETUP, 2, "diagtrap");
3057 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
3058 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3059 cmd->data.diagass.subcmd_len = 80;
3060 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP;
3061 cmd->data.diagass.type = 1;
3062 cmd->data.diagass.action = action;
3063 switch (action) {
3064 case QETH_DIAGS_TRAP_ARM:
3065 cmd->data.diagass.options = 0x0003;
3066 cmd->data.diagass.ext = 0x00010000 +
3067 sizeof(struct qeth_trap_id);
3068 qeth_get_trap_id(card,
3069 (struct qeth_trap_id *)cmd->data.diagass.cdata);
3070 break;
3071 case QETH_DIAGS_TRAP_DISARM:
3072 cmd->data.diagass.options = 0x0001;
3073 break;
3074 case QETH_DIAGS_TRAP_CAPTURE:
3075 break;
3076 }
3077 return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL);
3078 }
3079 EXPORT_SYMBOL_GPL(qeth_hw_trap);
3080
3081 int qeth_check_qdio_errors(struct qeth_card *card, struct qdio_buffer *buf,
3082 unsigned int qdio_error, const char *dbftext)
3083 {
3084 if (qdio_error) {
3085 QETH_CARD_TEXT(card, 2, dbftext);
3086 QETH_CARD_TEXT_(card, 2, " F15=%02X",
3087 buf->element[15].sflags);
3088 QETH_CARD_TEXT_(card, 2, " F14=%02X",
3089 buf->element[14].sflags);
3090 QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error);
3091 if ((buf->element[15].sflags) == 0x12) {
3092 card->stats.rx_dropped++;
3093 return 0;
3094 } else
3095 return 1;
3096 }
3097 return 0;
3098 }
3099 EXPORT_SYMBOL_GPL(qeth_check_qdio_errors);
3100
3101 void qeth_buffer_reclaim_work(struct work_struct *work)
3102 {
3103 struct qeth_card *card = container_of(work, struct qeth_card,
3104 buffer_reclaim_work.work);
3105
3106 QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index);
3107 qeth_queue_input_buffer(card, card->reclaim_index);
3108 }
3109
3110 void qeth_queue_input_buffer(struct qeth_card *card, int index)
3111 {
3112 struct qeth_qdio_q *queue = card->qdio.in_q;
3113 struct list_head *lh;
3114 int count;
3115 int i;
3116 int rc;
3117 int newcount = 0;
3118
3119 count = (index < queue->next_buf_to_init)?
3120 card->qdio.in_buf_pool.buf_count -
3121 (queue->next_buf_to_init - index) :
3122 card->qdio.in_buf_pool.buf_count -
3123 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
3124 /* only requeue at a certain threshold to avoid SIGAs */
3125 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
3126 for (i = queue->next_buf_to_init;
3127 i < queue->next_buf_to_init + count; ++i) {
3128 if (qeth_init_input_buffer(card,
3129 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
3130 break;
3131 } else {
3132 newcount++;
3133 }
3134 }
3135
3136 if (newcount < count) {
3137 /* we are in memory shortage so we switch back to
3138 traditional skb allocation and drop packages */
3139 atomic_set(&card->force_alloc_skb, 3);
3140 count = newcount;
3141 } else {
3142 atomic_add_unless(&card->force_alloc_skb, -1, 0);
3143 }
3144
3145 if (!count) {
3146 i = 0;
3147 list_for_each(lh, &card->qdio.in_buf_pool.entry_list)
3148 i++;
3149 if (i == card->qdio.in_buf_pool.buf_count) {
3150 QETH_CARD_TEXT(card, 2, "qsarbw");
3151 card->reclaim_index = index;
3152 schedule_delayed_work(
3153 &card->buffer_reclaim_work,
3154 QETH_RECLAIM_WORK_TIME);
3155 }
3156 return;
3157 }
3158
3159 /*
3160 * according to old code it should be avoided to requeue all
3161 * 128 buffers in order to benefit from PCI avoidance.
3162 * this function keeps at least one buffer (the buffer at
3163 * 'index') un-requeued -> this buffer is the first buffer that
3164 * will be requeued the next time
3165 */
3166 if (card->options.performance_stats) {
3167 card->perf_stats.inbound_do_qdio_cnt++;
3168 card->perf_stats.inbound_do_qdio_start_time =
3169 qeth_get_micros();
3170 }
3171 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
3172 queue->next_buf_to_init, count);
3173 if (card->options.performance_stats)
3174 card->perf_stats.inbound_do_qdio_time +=
3175 qeth_get_micros() -
3176 card->perf_stats.inbound_do_qdio_start_time;
3177 if (rc) {
3178 QETH_CARD_TEXT(card, 2, "qinberr");
3179 }
3180 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
3181 QDIO_MAX_BUFFERS_PER_Q;
3182 }
3183 }
3184 EXPORT_SYMBOL_GPL(qeth_queue_input_buffer);
3185
3186 static int qeth_handle_send_error(struct qeth_card *card,
3187 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
3188 {
3189 int sbalf15 = buffer->buffer->element[15].sflags;
3190
3191 QETH_CARD_TEXT(card, 6, "hdsnderr");
3192 if (card->info.type == QETH_CARD_TYPE_IQD) {
3193 if (sbalf15 == 0) {
3194 qdio_err = 0;
3195 } else {
3196 qdio_err = 1;
3197 }
3198 }
3199 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
3200
3201 if (!qdio_err)
3202 return QETH_SEND_ERROR_NONE;
3203
3204 if ((sbalf15 >= 15) && (sbalf15 <= 31))
3205 return QETH_SEND_ERROR_RETRY;
3206
3207 QETH_CARD_TEXT(card, 1, "lnkfail");
3208 QETH_CARD_TEXT_(card, 1, "%04x %02x",
3209 (u16)qdio_err, (u8)sbalf15);
3210 return QETH_SEND_ERROR_LINK_FAILURE;
3211 }
3212
3213 /*
3214 * Switched to packing state if the number of used buffers on a queue
3215 * reaches a certain limit.
3216 */
3217 static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
3218 {
3219 if (!queue->do_pack) {
3220 if (atomic_read(&queue->used_buffers)
3221 >= QETH_HIGH_WATERMARK_PACK){
3222 /* switch non-PACKING -> PACKING */
3223 QETH_CARD_TEXT(queue->card, 6, "np->pack");
3224 if (queue->card->options.performance_stats)
3225 queue->card->perf_stats.sc_dp_p++;
3226 queue->do_pack = 1;
3227 }
3228 }
3229 }
3230
3231 /*
3232 * Switches from packing to non-packing mode. If there is a packing
3233 * buffer on the queue this buffer will be prepared to be flushed.
3234 * In that case 1 is returned to inform the caller. If no buffer
3235 * has to be flushed, zero is returned.
3236 */
3237 static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
3238 {
3239 struct qeth_qdio_out_buffer *buffer;
3240 int flush_count = 0;
3241
3242 if (queue->do_pack) {
3243 if (atomic_read(&queue->used_buffers)
3244 <= QETH_LOW_WATERMARK_PACK) {
3245 /* switch PACKING -> non-PACKING */
3246 QETH_CARD_TEXT(queue->card, 6, "pack->np");
3247 if (queue->card->options.performance_stats)
3248 queue->card->perf_stats.sc_p_dp++;
3249 queue->do_pack = 0;
3250 /* flush packing buffers */
3251 buffer = queue->bufs[queue->next_buf_to_fill];
3252 if ((atomic_read(&buffer->state) ==
3253 QETH_QDIO_BUF_EMPTY) &&
3254 (buffer->next_element_to_fill > 0)) {
3255 atomic_set(&buffer->state,
3256 QETH_QDIO_BUF_PRIMED);
3257 flush_count++;
3258 queue->next_buf_to_fill =
3259 (queue->next_buf_to_fill + 1) %
3260 QDIO_MAX_BUFFERS_PER_Q;
3261 }
3262 }
3263 }
3264 return flush_count;
3265 }
3266
3267
3268 /*
3269 * Called to flush a packing buffer if no more pci flags are on the queue.
3270 * Checks if there is a packing buffer and prepares it to be flushed.
3271 * In that case returns 1, otherwise zero.
3272 */
3273 static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
3274 {
3275 struct qeth_qdio_out_buffer *buffer;
3276
3277 buffer = queue->bufs[queue->next_buf_to_fill];
3278 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
3279 (buffer->next_element_to_fill > 0)) {
3280 /* it's a packing buffer */
3281 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3282 queue->next_buf_to_fill =
3283 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
3284 return 1;
3285 }
3286 return 0;
3287 }
3288
3289 static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
3290 int count)
3291 {
3292 struct qeth_qdio_out_buffer *buf;
3293 int rc;
3294 int i;
3295 unsigned int qdio_flags;
3296
3297 for (i = index; i < index + count; ++i) {
3298 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3299 buf = queue->bufs[bidx];
3300 buf->buffer->element[buf->next_element_to_fill - 1].eflags |=
3301 SBAL_EFLAGS_LAST_ENTRY;
3302
3303 if (queue->bufstates)
3304 queue->bufstates[bidx].user = buf;
3305
3306 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
3307 continue;
3308
3309 if (!queue->do_pack) {
3310 if ((atomic_read(&queue->used_buffers) >=
3311 (QETH_HIGH_WATERMARK_PACK -
3312 QETH_WATERMARK_PACK_FUZZ)) &&
3313 !atomic_read(&queue->set_pci_flags_count)) {
3314 /* it's likely that we'll go to packing
3315 * mode soon */
3316 atomic_inc(&queue->set_pci_flags_count);
3317 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
3318 }
3319 } else {
3320 if (!atomic_read(&queue->set_pci_flags_count)) {
3321 /*
3322 * there's no outstanding PCI any more, so we
3323 * have to request a PCI to be sure the the PCI
3324 * will wake at some time in the future then we
3325 * can flush packed buffers that might still be
3326 * hanging around, which can happen if no
3327 * further send was requested by the stack
3328 */
3329 atomic_inc(&queue->set_pci_flags_count);
3330 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
3331 }
3332 }
3333 }
3334
3335 queue->card->dev->trans_start = jiffies;
3336 if (queue->card->options.performance_stats) {
3337 queue->card->perf_stats.outbound_do_qdio_cnt++;
3338 queue->card->perf_stats.outbound_do_qdio_start_time =
3339 qeth_get_micros();
3340 }
3341 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
3342 if (atomic_read(&queue->set_pci_flags_count))
3343 qdio_flags |= QDIO_FLAG_PCI_OUT;
3344 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
3345 queue->queue_no, index, count);
3346 if (queue->card->options.performance_stats)
3347 queue->card->perf_stats.outbound_do_qdio_time +=
3348 qeth_get_micros() -
3349 queue->card->perf_stats.outbound_do_qdio_start_time;
3350 atomic_add(count, &queue->used_buffers);
3351 if (rc) {
3352 queue->card->stats.tx_errors += count;
3353 /* ignore temporary SIGA errors without busy condition */
3354 if (rc == -ENOBUFS)
3355 return;
3356 QETH_CARD_TEXT(queue->card, 2, "flushbuf");
3357 QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no);
3358 QETH_CARD_TEXT_(queue->card, 2, " idx%d", index);
3359 QETH_CARD_TEXT_(queue->card, 2, " c%d", count);
3360 QETH_CARD_TEXT_(queue->card, 2, " err%d", rc);
3361
3362 /* this must not happen under normal circumstances. if it
3363 * happens something is really wrong -> recover */
3364 qeth_schedule_recovery(queue->card);
3365 return;
3366 }
3367 if (queue->card->options.performance_stats)
3368 queue->card->perf_stats.bufs_sent += count;
3369 }
3370
3371 static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
3372 {
3373 int index;
3374 int flush_cnt = 0;
3375 int q_was_packing = 0;
3376
3377 /*
3378 * check if weed have to switch to non-packing mode or if
3379 * we have to get a pci flag out on the queue
3380 */
3381 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
3382 !atomic_read(&queue->set_pci_flags_count)) {
3383 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
3384 QETH_OUT_Q_UNLOCKED) {
3385 /*
3386 * If we get in here, there was no action in
3387 * do_send_packet. So, we check if there is a
3388 * packing buffer to be flushed here.
3389 */
3390 netif_stop_queue(queue->card->dev);
3391 index = queue->next_buf_to_fill;
3392 q_was_packing = queue->do_pack;
3393 /* queue->do_pack may change */
3394 barrier();
3395 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
3396 if (!flush_cnt &&
3397 !atomic_read(&queue->set_pci_flags_count))
3398 flush_cnt +=
3399 qeth_flush_buffers_on_no_pci(queue);
3400 if (queue->card->options.performance_stats &&
3401 q_was_packing)
3402 queue->card->perf_stats.bufs_sent_pack +=
3403 flush_cnt;
3404 if (flush_cnt)
3405 qeth_flush_buffers(queue, index, flush_cnt);
3406 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3407 }
3408 }
3409 }
3410
3411 void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue,
3412 unsigned long card_ptr)
3413 {
3414 struct qeth_card *card = (struct qeth_card *)card_ptr;
3415
3416 if (card->dev && (card->dev->flags & IFF_UP))
3417 napi_schedule(&card->napi);
3418 }
3419 EXPORT_SYMBOL_GPL(qeth_qdio_start_poll);
3420
3421 int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq)
3422 {
3423 int rc;
3424
3425 if (card->options.cq == QETH_CQ_NOTAVAILABLE) {
3426 rc = -1;
3427 goto out;
3428 } else {
3429 if (card->options.cq == cq) {
3430 rc = 0;
3431 goto out;
3432 }
3433
3434 if (card->state != CARD_STATE_DOWN &&
3435 card->state != CARD_STATE_RECOVER) {
3436 rc = -1;
3437 goto out;
3438 }
3439
3440 qeth_free_qdio_buffers(card);
3441 card->options.cq = cq;
3442 rc = 0;
3443 }
3444 out:
3445 return rc;
3446
3447 }
3448 EXPORT_SYMBOL_GPL(qeth_configure_cq);
3449
3450
3451 static void qeth_qdio_cq_handler(struct qeth_card *card,
3452 unsigned int qdio_err,
3453 unsigned int queue, int first_element, int count) {
3454 struct qeth_qdio_q *cq = card->qdio.c_q;
3455 int i;
3456 int rc;
3457
3458 if (!qeth_is_cq(card, queue))
3459 goto out;
3460
3461 QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element);
3462 QETH_CARD_TEXT_(card, 5, "qcqhc%d", count);
3463 QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err);
3464
3465 if (qdio_err) {
3466 netif_stop_queue(card->dev);
3467 qeth_schedule_recovery(card);
3468 goto out;
3469 }
3470
3471 if (card->options.performance_stats) {
3472 card->perf_stats.cq_cnt++;
3473 card->perf_stats.cq_start_time = qeth_get_micros();
3474 }
3475
3476 for (i = first_element; i < first_element + count; ++i) {
3477 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3478 struct qdio_buffer *buffer = &cq->qdio_bufs[bidx];
3479 int e;
3480
3481 e = 0;
3482 while (buffer->element[e].addr) {
3483 unsigned long phys_aob_addr;
3484
3485 phys_aob_addr = (unsigned long) buffer->element[e].addr;
3486 qeth_qdio_handle_aob(card, phys_aob_addr);
3487 buffer->element[e].addr = NULL;
3488 buffer->element[e].eflags = 0;
3489 buffer->element[e].sflags = 0;
3490 buffer->element[e].length = 0;
3491
3492 ++e;
3493 }
3494
3495 buffer->element[15].eflags = 0;
3496 buffer->element[15].sflags = 0;
3497 }
3498 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue,
3499 card->qdio.c_q->next_buf_to_init,
3500 count);
3501 if (rc) {
3502 dev_warn(&card->gdev->dev,
3503 "QDIO reported an error, rc=%i\n", rc);
3504 QETH_CARD_TEXT(card, 2, "qcqherr");
3505 }
3506 card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init
3507 + count) % QDIO_MAX_BUFFERS_PER_Q;
3508
3509 netif_wake_queue(card->dev);
3510
3511 if (card->options.performance_stats) {
3512 int delta_t = qeth_get_micros();
3513 delta_t -= card->perf_stats.cq_start_time;
3514 card->perf_stats.cq_time += delta_t;
3515 }
3516 out:
3517 return;
3518 }
3519
3520 void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err,
3521 unsigned int queue, int first_elem, int count,
3522 unsigned long card_ptr)
3523 {
3524 struct qeth_card *card = (struct qeth_card *)card_ptr;
3525
3526 QETH_CARD_TEXT_(card, 2, "qihq%d", queue);
3527 QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err);
3528
3529 if (qeth_is_cq(card, queue))
3530 qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count);
3531 else if (qdio_err)
3532 qeth_schedule_recovery(card);
3533
3534
3535 }
3536 EXPORT_SYMBOL_GPL(qeth_qdio_input_handler);
3537
3538 void qeth_qdio_output_handler(struct ccw_device *ccwdev,
3539 unsigned int qdio_error, int __queue, int first_element,
3540 int count, unsigned long card_ptr)
3541 {
3542 struct qeth_card *card = (struct qeth_card *) card_ptr;
3543 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
3544 struct qeth_qdio_out_buffer *buffer;
3545 int i;
3546
3547 QETH_CARD_TEXT(card, 6, "qdouhdl");
3548 if (qdio_error & QDIO_ERROR_FATAL) {
3549 QETH_CARD_TEXT(card, 2, "achkcond");
3550 netif_stop_queue(card->dev);
3551 qeth_schedule_recovery(card);
3552 return;
3553 }
3554 if (card->options.performance_stats) {
3555 card->perf_stats.outbound_handler_cnt++;
3556 card->perf_stats.outbound_handler_start_time =
3557 qeth_get_micros();
3558 }
3559 for (i = first_element; i < (first_element + count); ++i) {
3560 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3561 buffer = queue->bufs[bidx];
3562 qeth_handle_send_error(card, buffer, qdio_error);
3563
3564 if (queue->bufstates &&
3565 (queue->bufstates[bidx].flags &
3566 QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) {
3567 WARN_ON_ONCE(card->options.cq != QETH_CQ_ENABLED);
3568
3569 if (atomic_cmpxchg(&buffer->state,
3570 QETH_QDIO_BUF_PRIMED,
3571 QETH_QDIO_BUF_PENDING) ==
3572 QETH_QDIO_BUF_PRIMED) {
3573 qeth_notify_skbs(queue, buffer,
3574 TX_NOTIFY_PENDING);
3575 }
3576 buffer->aob = queue->bufstates[bidx].aob;
3577 QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx);
3578 QETH_CARD_TEXT(queue->card, 5, "aob");
3579 QETH_CARD_TEXT_(queue->card, 5, "%lx",
3580 virt_to_phys(buffer->aob));
3581 if (qeth_init_qdio_out_buf(queue, bidx)) {
3582 QETH_CARD_TEXT(card, 2, "outofbuf");
3583 qeth_schedule_recovery(card);
3584 }
3585 } else {
3586 if (card->options.cq == QETH_CQ_ENABLED) {
3587 enum iucv_tx_notify n;
3588
3589 n = qeth_compute_cq_notification(
3590 buffer->buffer->element[15].sflags, 0);
3591 qeth_notify_skbs(queue, buffer, n);
3592 }
3593
3594 qeth_clear_output_buffer(queue, buffer,
3595 QETH_QDIO_BUF_EMPTY);
3596 }
3597 qeth_cleanup_handled_pending(queue, bidx, 0);
3598 }
3599 atomic_sub(count, &queue->used_buffers);
3600 /* check if we need to do something on this outbound queue */
3601 if (card->info.type != QETH_CARD_TYPE_IQD)
3602 qeth_check_outbound_queue(queue);
3603
3604 netif_wake_queue(queue->card->dev);
3605 if (card->options.performance_stats)
3606 card->perf_stats.outbound_handler_time += qeth_get_micros() -
3607 card->perf_stats.outbound_handler_start_time;
3608 }
3609 EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
3610
3611 int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
3612 int ipv, int cast_type)
3613 {
3614 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSD ||
3615 card->info.type == QETH_CARD_TYPE_OSX))
3616 return card->qdio.default_out_queue;
3617 switch (card->qdio.no_out_queues) {
3618 case 4:
3619 if (cast_type && card->info.is_multicast_different)
3620 return card->info.is_multicast_different &
3621 (card->qdio.no_out_queues - 1);
3622 if (card->qdio.do_prio_queueing && (ipv == 4)) {
3623 const u8 tos = ip_hdr(skb)->tos;
3624
3625 if (card->qdio.do_prio_queueing ==
3626 QETH_PRIO_Q_ING_TOS) {
3627 if (tos & IP_TOS_NOTIMPORTANT)
3628 return 3;
3629 if (tos & IP_TOS_HIGHRELIABILITY)
3630 return 2;
3631 if (tos & IP_TOS_HIGHTHROUGHPUT)
3632 return 1;
3633 if (tos & IP_TOS_LOWDELAY)
3634 return 0;
3635 }
3636 if (card->qdio.do_prio_queueing ==
3637 QETH_PRIO_Q_ING_PREC)
3638 return 3 - (tos >> 6);
3639 } else if (card->qdio.do_prio_queueing && (ipv == 6)) {
3640 /* TODO: IPv6!!! */
3641 }
3642 return card->qdio.default_out_queue;
3643 case 1: /* fallthrough for single-out-queue 1920-device */
3644 default:
3645 return card->qdio.default_out_queue;
3646 }
3647 }
3648 EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
3649
3650 int qeth_get_elements_no(struct qeth_card *card, void *hdr,
3651 struct sk_buff *skb, int elems)
3652 {
3653 int dlen = skb->len - skb->data_len;
3654 int elements_needed = PFN_UP((unsigned long)skb->data + dlen - 1) -
3655 PFN_DOWN((unsigned long)skb->data);
3656
3657 elements_needed += skb_shinfo(skb)->nr_frags;
3658 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
3659 QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
3660 "(Number=%d / Length=%d). Discarded.\n",
3661 (elements_needed+elems), skb->len);
3662 return 0;
3663 }
3664 return elements_needed;
3665 }
3666 EXPORT_SYMBOL_GPL(qeth_get_elements_no);
3667
3668 int qeth_hdr_chk_and_bounce(struct sk_buff *skb, int len)
3669 {
3670 int hroom, inpage, rest;
3671
3672 if (((unsigned long)skb->data & PAGE_MASK) !=
3673 (((unsigned long)skb->data + len - 1) & PAGE_MASK)) {
3674 hroom = skb_headroom(skb);
3675 inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE);
3676 rest = len - inpage;
3677 if (rest > hroom)
3678 return 1;
3679 memmove(skb->data - rest, skb->data, skb->len - skb->data_len);
3680 skb->data -= rest;
3681 QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest);
3682 }
3683 return 0;
3684 }
3685 EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce);
3686
3687 static inline void __qeth_fill_buffer(struct sk_buff *skb,
3688 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill,
3689 int offset)
3690 {
3691 int length = skb->len - skb->data_len;
3692 int length_here;
3693 int element;
3694 char *data;
3695 int first_lap, cnt;
3696 struct skb_frag_struct *frag;
3697
3698 element = *next_element_to_fill;
3699 data = skb->data;
3700 first_lap = (is_tso == 0 ? 1 : 0);
3701
3702 if (offset >= 0) {
3703 data = skb->data + offset;
3704 length -= offset;
3705 first_lap = 0;
3706 }
3707
3708 while (length > 0) {
3709 /* length_here is the remaining amount of data in this page */
3710 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3711 if (length < length_here)
3712 length_here = length;
3713
3714 buffer->element[element].addr = data;
3715 buffer->element[element].length = length_here;
3716 length -= length_here;
3717 if (!length) {
3718 if (first_lap)
3719 if (skb_shinfo(skb)->nr_frags)
3720 buffer->element[element].eflags =
3721 SBAL_EFLAGS_FIRST_FRAG;
3722 else
3723 buffer->element[element].eflags = 0;
3724 else
3725 buffer->element[element].eflags =
3726 SBAL_EFLAGS_MIDDLE_FRAG;
3727 } else {
3728 if (first_lap)
3729 buffer->element[element].eflags =
3730 SBAL_EFLAGS_FIRST_FRAG;
3731 else
3732 buffer->element[element].eflags =
3733 SBAL_EFLAGS_MIDDLE_FRAG;
3734 }
3735 data += length_here;
3736 element++;
3737 first_lap = 0;
3738 }
3739
3740 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
3741 frag = &skb_shinfo(skb)->frags[cnt];
3742 buffer->element[element].addr = (char *)
3743 page_to_phys(skb_frag_page(frag))
3744 + frag->page_offset;
3745 buffer->element[element].length = frag->size;
3746 buffer->element[element].eflags = SBAL_EFLAGS_MIDDLE_FRAG;
3747 element++;
3748 }
3749
3750 if (buffer->element[element - 1].eflags)
3751 buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG;
3752 *next_element_to_fill = element;
3753 }
3754
3755 static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
3756 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb,
3757 struct qeth_hdr *hdr, int offset, int hd_len)
3758 {
3759 struct qdio_buffer *buffer;
3760 int flush_cnt = 0, hdr_len, large_send = 0;
3761
3762 buffer = buf->buffer;
3763 atomic_inc(&skb->users);
3764 skb_queue_tail(&buf->skb_list, skb);
3765
3766 /*check first on TSO ....*/
3767 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) {
3768 int element = buf->next_element_to_fill;
3769
3770 hdr_len = sizeof(struct qeth_hdr_tso) +
3771 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len;
3772 /*fill first buffer entry only with header information */
3773 buffer->element[element].addr = skb->data;
3774 buffer->element[element].length = hdr_len;
3775 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
3776 buf->next_element_to_fill++;
3777 skb->data += hdr_len;
3778 skb->len -= hdr_len;
3779 large_send = 1;
3780 }
3781
3782 if (offset >= 0) {
3783 int element = buf->next_element_to_fill;
3784 buffer->element[element].addr = hdr;
3785 buffer->element[element].length = sizeof(struct qeth_hdr) +
3786 hd_len;
3787 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
3788 buf->is_header[element] = 1;
3789 buf->next_element_to_fill++;
3790 }
3791
3792 __qeth_fill_buffer(skb, buffer, large_send,
3793 (int *)&buf->next_element_to_fill, offset);
3794
3795 if (!queue->do_pack) {
3796 QETH_CARD_TEXT(queue->card, 6, "fillbfnp");
3797 /* set state to PRIMED -> will be flushed */
3798 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3799 flush_cnt = 1;
3800 } else {
3801 QETH_CARD_TEXT(queue->card, 6, "fillbfpa");
3802 if (queue->card->options.performance_stats)
3803 queue->card->perf_stats.skbs_sent_pack++;
3804 if (buf->next_element_to_fill >=
3805 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
3806 /*
3807 * packed buffer if full -> set state PRIMED
3808 * -> will be flushed
3809 */
3810 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3811 flush_cnt = 1;
3812 }
3813 }
3814 return flush_cnt;
3815 }
3816
3817 int qeth_do_send_packet_fast(struct qeth_card *card,
3818 struct qeth_qdio_out_q *queue, struct sk_buff *skb,
3819 struct qeth_hdr *hdr, int elements_needed,
3820 int offset, int hd_len)
3821 {
3822 struct qeth_qdio_out_buffer *buffer;
3823 int index;
3824
3825 /* spin until we get the queue ... */
3826 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3827 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3828 /* ... now we've got the queue */
3829 index = queue->next_buf_to_fill;
3830 buffer = queue->bufs[queue->next_buf_to_fill];
3831 /*
3832 * check if buffer is empty to make sure that we do not 'overtake'
3833 * ourselves and try to fill a buffer that is already primed
3834 */
3835 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
3836 goto out;
3837 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
3838 QDIO_MAX_BUFFERS_PER_Q;
3839 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3840 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
3841 qeth_flush_buffers(queue, index, 1);
3842 return 0;
3843 out:
3844 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3845 return -EBUSY;
3846 }
3847 EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
3848
3849 int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
3850 struct sk_buff *skb, struct qeth_hdr *hdr,
3851 int elements_needed)
3852 {
3853 struct qeth_qdio_out_buffer *buffer;
3854 int start_index;
3855 int flush_count = 0;
3856 int do_pack = 0;
3857 int tmp;
3858 int rc = 0;
3859
3860 /* spin until we get the queue ... */
3861 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3862 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3863 start_index = queue->next_buf_to_fill;
3864 buffer = queue->bufs[queue->next_buf_to_fill];
3865 /*
3866 * check if buffer is empty to make sure that we do not 'overtake'
3867 * ourselves and try to fill a buffer that is already primed
3868 */
3869 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
3870 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3871 return -EBUSY;
3872 }
3873 /* check if we need to switch packing state of this queue */
3874 qeth_switch_to_packing_if_needed(queue);
3875 if (queue->do_pack) {
3876 do_pack = 1;
3877 /* does packet fit in current buffer? */
3878 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
3879 buffer->next_element_to_fill) < elements_needed) {
3880 /* ... no -> set state PRIMED */
3881 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3882 flush_count++;
3883 queue->next_buf_to_fill =
3884 (queue->next_buf_to_fill + 1) %
3885 QDIO_MAX_BUFFERS_PER_Q;
3886 buffer = queue->bufs[queue->next_buf_to_fill];
3887 /* we did a step forward, so check buffer state
3888 * again */
3889 if (atomic_read(&buffer->state) !=
3890 QETH_QDIO_BUF_EMPTY) {
3891 qeth_flush_buffers(queue, start_index,
3892 flush_count);
3893 atomic_set(&queue->state,
3894 QETH_OUT_Q_UNLOCKED);
3895 return -EBUSY;
3896 }
3897 }
3898 }
3899 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0);
3900 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
3901 QDIO_MAX_BUFFERS_PER_Q;
3902 flush_count += tmp;
3903 if (flush_count)
3904 qeth_flush_buffers(queue, start_index, flush_count);
3905 else if (!atomic_read(&queue->set_pci_flags_count))
3906 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
3907 /*
3908 * queue->state will go from LOCKED -> UNLOCKED or from
3909 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
3910 * (switch packing state or flush buffer to get another pci flag out).
3911 * In that case we will enter this loop
3912 */
3913 while (atomic_dec_return(&queue->state)) {
3914 flush_count = 0;
3915 start_index = queue->next_buf_to_fill;
3916 /* check if we can go back to non-packing state */
3917 flush_count += qeth_switch_to_nonpacking_if_needed(queue);
3918 /*
3919 * check if we need to flush a packing buffer to get a pci
3920 * flag out on the queue
3921 */
3922 if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
3923 flush_count += qeth_flush_buffers_on_no_pci(queue);
3924 if (flush_count)
3925 qeth_flush_buffers(queue, start_index, flush_count);
3926 }
3927 /* at this point the queue is UNLOCKED again */
3928 if (queue->card->options.performance_stats && do_pack)
3929 queue->card->perf_stats.bufs_sent_pack += flush_count;
3930
3931 return rc;
3932 }
3933 EXPORT_SYMBOL_GPL(qeth_do_send_packet);
3934
3935 static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
3936 struct qeth_reply *reply, unsigned long data)
3937 {
3938 struct qeth_ipa_cmd *cmd;
3939 struct qeth_ipacmd_setadpparms *setparms;
3940
3941 QETH_CARD_TEXT(card, 4, "prmadpcb");
3942
3943 cmd = (struct qeth_ipa_cmd *) data;
3944 setparms = &(cmd->data.setadapterparms);
3945
3946 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
3947 if (cmd->hdr.return_code) {
3948 QETH_CARD_TEXT_(card, 4, "prmrc%2.2x", cmd->hdr.return_code);
3949 setparms->data.mode = SET_PROMISC_MODE_OFF;
3950 }
3951 card->info.promisc_mode = setparms->data.mode;
3952 return 0;
3953 }
3954
3955 void qeth_setadp_promisc_mode(struct qeth_card *card)
3956 {
3957 enum qeth_ipa_promisc_modes mode;
3958 struct net_device *dev = card->dev;
3959 struct qeth_cmd_buffer *iob;
3960 struct qeth_ipa_cmd *cmd;
3961
3962 QETH_CARD_TEXT(card, 4, "setprom");
3963
3964 if (((dev->flags & IFF_PROMISC) &&
3965 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
3966 (!(dev->flags & IFF_PROMISC) &&
3967 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
3968 return;
3969 mode = SET_PROMISC_MODE_OFF;
3970 if (dev->flags & IFF_PROMISC)
3971 mode = SET_PROMISC_MODE_ON;
3972 QETH_CARD_TEXT_(card, 4, "mode:%x", mode);
3973
3974 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
3975 sizeof(struct qeth_ipacmd_setadpparms));
3976 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
3977 cmd->data.setadapterparms.data.mode = mode;
3978 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
3979 }
3980 EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
3981
3982 int qeth_change_mtu(struct net_device *dev, int new_mtu)
3983 {
3984 struct qeth_card *card;
3985 char dbf_text[15];
3986
3987 card = dev->ml_priv;
3988
3989 QETH_CARD_TEXT(card, 4, "chgmtu");
3990 sprintf(dbf_text, "%8x", new_mtu);
3991 QETH_CARD_TEXT(card, 4, dbf_text);
3992
3993 if (new_mtu < 64)
3994 return -EINVAL;
3995 if (new_mtu > 65535)
3996 return -EINVAL;
3997 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
3998 (!qeth_mtu_is_valid(card, new_mtu)))
3999 return -EINVAL;
4000 dev->mtu = new_mtu;
4001 return 0;
4002 }
4003 EXPORT_SYMBOL_GPL(qeth_change_mtu);
4004
4005 struct net_device_stats *qeth_get_stats(struct net_device *dev)
4006 {
4007 struct qeth_card *card;
4008
4009 card = dev->ml_priv;
4010
4011 QETH_CARD_TEXT(card, 5, "getstat");
4012
4013 return &card->stats;
4014 }
4015 EXPORT_SYMBOL_GPL(qeth_get_stats);
4016
4017 static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
4018 struct qeth_reply *reply, unsigned long data)
4019 {
4020 struct qeth_ipa_cmd *cmd;
4021
4022 QETH_CARD_TEXT(card, 4, "chgmaccb");
4023
4024 cmd = (struct qeth_ipa_cmd *) data;
4025 if (!card->options.layer2 ||
4026 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
4027 memcpy(card->dev->dev_addr,
4028 &cmd->data.setadapterparms.data.change_addr.addr,
4029 OSA_ADDR_LEN);
4030 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
4031 }
4032 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
4033 return 0;
4034 }
4035
4036 int qeth_setadpparms_change_macaddr(struct qeth_card *card)
4037 {
4038 int rc;
4039 struct qeth_cmd_buffer *iob;
4040 struct qeth_ipa_cmd *cmd;
4041
4042 QETH_CARD_TEXT(card, 4, "chgmac");
4043
4044 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
4045 sizeof(struct qeth_ipacmd_setadpparms));
4046 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4047 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
4048 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
4049 memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
4050 card->dev->dev_addr, OSA_ADDR_LEN);
4051 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
4052 NULL);
4053 return rc;
4054 }
4055 EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
4056
4057 static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
4058 struct qeth_reply *reply, unsigned long data)
4059 {
4060 struct qeth_ipa_cmd *cmd;
4061 struct qeth_set_access_ctrl *access_ctrl_req;
4062
4063 QETH_CARD_TEXT(card, 4, "setaccb");
4064
4065 cmd = (struct qeth_ipa_cmd *) data;
4066 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4067 QETH_DBF_TEXT_(SETUP, 2, "setaccb");
4068 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4069 QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
4070 cmd->data.setadapterparms.hdr.return_code);
4071 switch (cmd->data.setadapterparms.hdr.return_code) {
4072 case SET_ACCESS_CTRL_RC_SUCCESS:
4073 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
4074 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
4075 {
4076 card->options.isolation = access_ctrl_req->subcmd_code;
4077 if (card->options.isolation == ISOLATION_MODE_NONE) {
4078 dev_info(&card->gdev->dev,
4079 "QDIO data connection isolation is deactivated\n");
4080 } else {
4081 dev_info(&card->gdev->dev,
4082 "QDIO data connection isolation is activated\n");
4083 }
4084 QETH_DBF_MESSAGE(3, "OK:SET_ACCESS_CTRL(%s, %d)==%d\n",
4085 card->gdev->dev.kobj.name,
4086 access_ctrl_req->subcmd_code,
4087 cmd->data.setadapterparms.hdr.return_code);
4088 break;
4089 }
4090 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
4091 {
4092 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
4093 card->gdev->dev.kobj.name,
4094 access_ctrl_req->subcmd_code,
4095 cmd->data.setadapterparms.hdr.return_code);
4096 dev_err(&card->gdev->dev, "Adapter does not "
4097 "support QDIO data connection isolation\n");
4098
4099 /* ensure isolation mode is "none" */
4100 card->options.isolation = ISOLATION_MODE_NONE;
4101 break;
4102 }
4103 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
4104 {
4105 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n",
4106 card->gdev->dev.kobj.name,
4107 access_ctrl_req->subcmd_code,
4108 cmd->data.setadapterparms.hdr.return_code);
4109 dev_err(&card->gdev->dev,
4110 "Adapter is dedicated. "
4111 "QDIO data connection isolation not supported\n");
4112
4113 /* ensure isolation mode is "none" */
4114 card->options.isolation = ISOLATION_MODE_NONE;
4115 break;
4116 }
4117 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
4118 {
4119 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n",
4120 card->gdev->dev.kobj.name,
4121 access_ctrl_req->subcmd_code,
4122 cmd->data.setadapterparms.hdr.return_code);
4123 dev_err(&card->gdev->dev,
4124 "TSO does not permit QDIO data connection isolation\n");
4125
4126 /* ensure isolation mode is "none" */
4127 card->options.isolation = ISOLATION_MODE_NONE;
4128 break;
4129 }
4130 default:
4131 {
4132 /* this should never happen */
4133 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d"
4134 "==UNKNOWN\n",
4135 card->gdev->dev.kobj.name,
4136 access_ctrl_req->subcmd_code,
4137 cmd->data.setadapterparms.hdr.return_code);
4138
4139 /* ensure isolation mode is "none" */
4140 card->options.isolation = ISOLATION_MODE_NONE;
4141 break;
4142 }
4143 }
4144 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
4145 return 0;
4146 }
4147
4148 static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
4149 enum qeth_ipa_isolation_modes isolation)
4150 {
4151 int rc;
4152 struct qeth_cmd_buffer *iob;
4153 struct qeth_ipa_cmd *cmd;
4154 struct qeth_set_access_ctrl *access_ctrl_req;
4155
4156 QETH_CARD_TEXT(card, 4, "setacctl");
4157
4158 QETH_DBF_TEXT_(SETUP, 2, "setacctl");
4159 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4160
4161 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
4162 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4163 sizeof(struct qeth_set_access_ctrl));
4164 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4165 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4166 access_ctrl_req->subcmd_code = isolation;
4167
4168 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
4169 NULL);
4170 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
4171 return rc;
4172 }
4173
4174 int qeth_set_access_ctrl_online(struct qeth_card *card)
4175 {
4176 int rc = 0;
4177
4178 QETH_CARD_TEXT(card, 4, "setactlo");
4179
4180 if ((card->info.type == QETH_CARD_TYPE_OSD ||
4181 card->info.type == QETH_CARD_TYPE_OSX) &&
4182 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
4183 rc = qeth_setadpparms_set_access_ctrl(card,
4184 card->options.isolation);
4185 if (rc) {
4186 QETH_DBF_MESSAGE(3,
4187 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n",
4188 card->gdev->dev.kobj.name,
4189 rc);
4190 }
4191 } else if (card->options.isolation != ISOLATION_MODE_NONE) {
4192 card->options.isolation = ISOLATION_MODE_NONE;
4193
4194 dev_err(&card->gdev->dev, "Adapter does not "
4195 "support QDIO data connection isolation\n");
4196 rc = -EOPNOTSUPP;
4197 }
4198 return rc;
4199 }
4200 EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
4201
4202 void qeth_tx_timeout(struct net_device *dev)
4203 {
4204 struct qeth_card *card;
4205
4206 card = dev->ml_priv;
4207 QETH_CARD_TEXT(card, 4, "txtimeo");
4208 card->stats.tx_errors++;
4209 qeth_schedule_recovery(card);
4210 }
4211 EXPORT_SYMBOL_GPL(qeth_tx_timeout);
4212
4213 int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
4214 {
4215 struct qeth_card *card = dev->ml_priv;
4216 int rc = 0;
4217
4218 switch (regnum) {
4219 case MII_BMCR: /* Basic mode control register */
4220 rc = BMCR_FULLDPLX;
4221 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
4222 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
4223 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
4224 rc |= BMCR_SPEED100;
4225 break;
4226 case MII_BMSR: /* Basic mode status register */
4227 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
4228 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
4229 BMSR_100BASE4;
4230 break;
4231 case MII_PHYSID1: /* PHYS ID 1 */
4232 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
4233 dev->dev_addr[2];
4234 rc = (rc >> 5) & 0xFFFF;
4235 break;
4236 case MII_PHYSID2: /* PHYS ID 2 */
4237 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
4238 break;
4239 case MII_ADVERTISE: /* Advertisement control reg */
4240 rc = ADVERTISE_ALL;
4241 break;
4242 case MII_LPA: /* Link partner ability reg */
4243 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
4244 LPA_100BASE4 | LPA_LPACK;
4245 break;
4246 case MII_EXPANSION: /* Expansion register */
4247 break;
4248 case MII_DCOUNTER: /* disconnect counter */
4249 break;
4250 case MII_FCSCOUNTER: /* false carrier counter */
4251 break;
4252 case MII_NWAYTEST: /* N-way auto-neg test register */
4253 break;
4254 case MII_RERRCOUNTER: /* rx error counter */
4255 rc = card->stats.rx_errors;
4256 break;
4257 case MII_SREVISION: /* silicon revision */
4258 break;
4259 case MII_RESV1: /* reserved 1 */
4260 break;
4261 case MII_LBRERROR: /* loopback, rx, bypass error */
4262 break;
4263 case MII_PHYADDR: /* physical address */
4264 break;
4265 case MII_RESV2: /* reserved 2 */
4266 break;
4267 case MII_TPISTATUS: /* TPI status for 10mbps */
4268 break;
4269 case MII_NCONFIG: /* network interface config */
4270 break;
4271 default:
4272 break;
4273 }
4274 return rc;
4275 }
4276 EXPORT_SYMBOL_GPL(qeth_mdio_read);
4277
4278 static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
4279 struct qeth_cmd_buffer *iob, int len,
4280 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
4281 unsigned long),
4282 void *reply_param)
4283 {
4284 u16 s1, s2;
4285
4286 QETH_CARD_TEXT(card, 4, "sendsnmp");
4287
4288 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
4289 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
4290 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
4291 /* adjust PDU length fields in IPA_PDU_HEADER */
4292 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
4293 s2 = (u32) len;
4294 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
4295 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
4296 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
4297 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
4298 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
4299 reply_cb, reply_param);
4300 }
4301
4302 static int qeth_snmp_command_cb(struct qeth_card *card,
4303 struct qeth_reply *reply, unsigned long sdata)
4304 {
4305 struct qeth_ipa_cmd *cmd;
4306 struct qeth_arp_query_info *qinfo;
4307 struct qeth_snmp_cmd *snmp;
4308 unsigned char *data;
4309 __u16 data_len;
4310
4311 QETH_CARD_TEXT(card, 3, "snpcmdcb");
4312
4313 cmd = (struct qeth_ipa_cmd *) sdata;
4314 data = (unsigned char *)((char *)cmd - reply->offset);
4315 qinfo = (struct qeth_arp_query_info *) reply->param;
4316 snmp = &cmd->data.setadapterparms.data.snmp;
4317
4318 if (cmd->hdr.return_code) {
4319 QETH_CARD_TEXT_(card, 4, "scer1%i", cmd->hdr.return_code);
4320 return 0;
4321 }
4322 if (cmd->data.setadapterparms.hdr.return_code) {
4323 cmd->hdr.return_code =
4324 cmd->data.setadapterparms.hdr.return_code;
4325 QETH_CARD_TEXT_(card, 4, "scer2%i", cmd->hdr.return_code);
4326 return 0;
4327 }
4328 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
4329 if (cmd->data.setadapterparms.hdr.seq_no == 1)
4330 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
4331 else
4332 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
4333
4334 /* check if there is enough room in userspace */
4335 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
4336 QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM);
4337 cmd->hdr.return_code = IPA_RC_ENOMEM;
4338 return 0;
4339 }
4340 QETH_CARD_TEXT_(card, 4, "snore%i",
4341 cmd->data.setadapterparms.hdr.used_total);
4342 QETH_CARD_TEXT_(card, 4, "sseqn%i",
4343 cmd->data.setadapterparms.hdr.seq_no);
4344 /*copy entries to user buffer*/
4345 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
4346 memcpy(qinfo->udata + qinfo->udata_offset,
4347 (char *)snmp,
4348 data_len + offsetof(struct qeth_snmp_cmd, data));
4349 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
4350 } else {
4351 memcpy(qinfo->udata + qinfo->udata_offset,
4352 (char *)&snmp->request, data_len);
4353 }
4354 qinfo->udata_offset += data_len;
4355 /* check if all replies received ... */
4356 QETH_CARD_TEXT_(card, 4, "srtot%i",
4357 cmd->data.setadapterparms.hdr.used_total);
4358 QETH_CARD_TEXT_(card, 4, "srseq%i",
4359 cmd->data.setadapterparms.hdr.seq_no);
4360 if (cmd->data.setadapterparms.hdr.seq_no <
4361 cmd->data.setadapterparms.hdr.used_total)
4362 return 1;
4363 return 0;
4364 }
4365
4366 int qeth_snmp_command(struct qeth_card *card, char __user *udata)
4367 {
4368 struct qeth_cmd_buffer *iob;
4369 struct qeth_ipa_cmd *cmd;
4370 struct qeth_snmp_ureq *ureq;
4371 int req_len;
4372 struct qeth_arp_query_info qinfo = {0, };
4373 int rc = 0;
4374
4375 QETH_CARD_TEXT(card, 3, "snmpcmd");
4376
4377 if (card->info.guestlan)
4378 return -EOPNOTSUPP;
4379
4380 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
4381 (!card->options.layer2)) {
4382 return -EOPNOTSUPP;
4383 }
4384 /* skip 4 bytes (data_len struct member) to get req_len */
4385 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
4386 return -EFAULT;
4387 ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr));
4388 if (IS_ERR(ureq)) {
4389 QETH_CARD_TEXT(card, 2, "snmpnome");
4390 return PTR_ERR(ureq);
4391 }
4392 qinfo.udata_len = ureq->hdr.data_len;
4393 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
4394 if (!qinfo.udata) {
4395 kfree(ureq);
4396 return -ENOMEM;
4397 }
4398 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
4399
4400 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
4401 QETH_SNMP_SETADP_CMDLENGTH + req_len);
4402 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4403 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
4404 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
4405 qeth_snmp_command_cb, (void *)&qinfo);
4406 if (rc)
4407 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
4408 QETH_CARD_IFNAME(card), rc);
4409 else {
4410 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
4411 rc = -EFAULT;
4412 }
4413
4414 kfree(ureq);
4415 kfree(qinfo.udata);
4416 return rc;
4417 }
4418 EXPORT_SYMBOL_GPL(qeth_snmp_command);
4419
4420 static int qeth_setadpparms_query_oat_cb(struct qeth_card *card,
4421 struct qeth_reply *reply, unsigned long data)
4422 {
4423 struct qeth_ipa_cmd *cmd;
4424 struct qeth_qoat_priv *priv;
4425 char *resdata;
4426 int resdatalen;
4427
4428 QETH_CARD_TEXT(card, 3, "qoatcb");
4429
4430 cmd = (struct qeth_ipa_cmd *)data;
4431 priv = (struct qeth_qoat_priv *)reply->param;
4432 resdatalen = cmd->data.setadapterparms.hdr.cmdlength;
4433 resdata = (char *)data + 28;
4434
4435 if (resdatalen > (priv->buffer_len - priv->response_len)) {
4436 cmd->hdr.return_code = IPA_RC_FFFF;
4437 return 0;
4438 }
4439
4440 memcpy((priv->buffer + priv->response_len), resdata,
4441 resdatalen);
4442 priv->response_len += resdatalen;
4443
4444 if (cmd->data.setadapterparms.hdr.seq_no <
4445 cmd->data.setadapterparms.hdr.used_total)
4446 return 1;
4447 return 0;
4448 }
4449
4450 int qeth_query_oat_command(struct qeth_card *card, char __user *udata)
4451 {
4452 int rc = 0;
4453 struct qeth_cmd_buffer *iob;
4454 struct qeth_ipa_cmd *cmd;
4455 struct qeth_query_oat *oat_req;
4456 struct qeth_query_oat_data oat_data;
4457 struct qeth_qoat_priv priv;
4458 void __user *tmp;
4459
4460 QETH_CARD_TEXT(card, 3, "qoatcmd");
4461
4462 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_OAT)) {
4463 rc = -EOPNOTSUPP;
4464 goto out;
4465 }
4466
4467 if (copy_from_user(&oat_data, udata,
4468 sizeof(struct qeth_query_oat_data))) {
4469 rc = -EFAULT;
4470 goto out;
4471 }
4472
4473 priv.buffer_len = oat_data.buffer_len;
4474 priv.response_len = 0;
4475 priv.buffer = kzalloc(oat_data.buffer_len, GFP_KERNEL);
4476 if (!priv.buffer) {
4477 rc = -ENOMEM;
4478 goto out;
4479 }
4480
4481 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT,
4482 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4483 sizeof(struct qeth_query_oat));
4484 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4485 oat_req = &cmd->data.setadapterparms.data.query_oat;
4486 oat_req->subcmd_code = oat_data.command;
4487
4488 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb,
4489 &priv);
4490 if (!rc) {
4491 if (is_compat_task())
4492 tmp = compat_ptr(oat_data.ptr);
4493 else
4494 tmp = (void __user *)(unsigned long)oat_data.ptr;
4495
4496 if (copy_to_user(tmp, priv.buffer,
4497 priv.response_len)) {
4498 rc = -EFAULT;
4499 goto out_free;
4500 }
4501
4502 oat_data.response_len = priv.response_len;
4503
4504 if (copy_to_user(udata, &oat_data,
4505 sizeof(struct qeth_query_oat_data)))
4506 rc = -EFAULT;
4507 } else
4508 if (rc == IPA_RC_FFFF)
4509 rc = -EFAULT;
4510
4511 out_free:
4512 kfree(priv.buffer);
4513 out:
4514 return rc;
4515 }
4516 EXPORT_SYMBOL_GPL(qeth_query_oat_command);
4517
4518 static inline int qeth_get_qdio_q_format(struct qeth_card *card)
4519 {
4520 switch (card->info.type) {
4521 case QETH_CARD_TYPE_IQD:
4522 return 2;
4523 default:
4524 return 0;
4525 }
4526 }
4527
4528 static void qeth_determine_capabilities(struct qeth_card *card)
4529 {
4530 int rc;
4531 int length;
4532 char *prcd;
4533 struct ccw_device *ddev;
4534 int ddev_offline = 0;
4535
4536 QETH_DBF_TEXT(SETUP, 2, "detcapab");
4537 ddev = CARD_DDEV(card);
4538 if (!ddev->online) {
4539 ddev_offline = 1;
4540 rc = ccw_device_set_online(ddev);
4541 if (rc) {
4542 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4543 goto out;
4544 }
4545 }
4546
4547 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
4548 if (rc) {
4549 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
4550 dev_name(&card->gdev->dev), rc);
4551 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4552 goto out_offline;
4553 }
4554 qeth_configure_unitaddr(card, prcd);
4555 if (ddev_offline)
4556 qeth_configure_blkt_default(card, prcd);
4557 kfree(prcd);
4558
4559 rc = qdio_get_ssqd_desc(ddev, &card->ssqd);
4560 if (rc)
4561 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4562
4563 QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt);
4564 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac1);
4565 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac3);
4566 QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt);
4567 if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) ||
4568 ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) ||
4569 ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) {
4570 dev_info(&card->gdev->dev,
4571 "Completion Queueing supported\n");
4572 } else {
4573 card->options.cq = QETH_CQ_NOTAVAILABLE;
4574 }
4575
4576
4577 out_offline:
4578 if (ddev_offline == 1)
4579 ccw_device_set_offline(ddev);
4580 out:
4581 return;
4582 }
4583
4584 static inline void qeth_qdio_establish_cq(struct qeth_card *card,
4585 struct qdio_buffer **in_sbal_ptrs,
4586 void (**queue_start_poll) (struct ccw_device *, int, unsigned long)) {
4587 int i;
4588
4589 if (card->options.cq == QETH_CQ_ENABLED) {
4590 int offset = QDIO_MAX_BUFFERS_PER_Q *
4591 (card->qdio.no_in_queues - 1);
4592 i = QDIO_MAX_BUFFERS_PER_Q * (card->qdio.no_in_queues - 1);
4593 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4594 in_sbal_ptrs[offset + i] = (struct qdio_buffer *)
4595 virt_to_phys(card->qdio.c_q->bufs[i].buffer);
4596 }
4597
4598 queue_start_poll[card->qdio.no_in_queues - 1] = NULL;
4599 }
4600 }
4601
4602 static int qeth_qdio_establish(struct qeth_card *card)
4603 {
4604 struct qdio_initialize init_data;
4605 char *qib_param_field;
4606 struct qdio_buffer **in_sbal_ptrs;
4607 void (**queue_start_poll) (struct ccw_device *, int, unsigned long);
4608 struct qdio_buffer **out_sbal_ptrs;
4609 int i, j, k;
4610 int rc = 0;
4611
4612 QETH_DBF_TEXT(SETUP, 2, "qdioest");
4613
4614 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
4615 GFP_KERNEL);
4616 if (!qib_param_field) {
4617 rc = -ENOMEM;
4618 goto out_free_nothing;
4619 }
4620
4621 qeth_create_qib_param_field(card, qib_param_field);
4622 qeth_create_qib_param_field_blkt(card, qib_param_field);
4623
4624 in_sbal_ptrs = kzalloc(card->qdio.no_in_queues *
4625 QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
4626 GFP_KERNEL);
4627 if (!in_sbal_ptrs) {
4628 rc = -ENOMEM;
4629 goto out_free_qib_param;
4630 }
4631 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4632 in_sbal_ptrs[i] = (struct qdio_buffer *)
4633 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
4634 }
4635
4636 queue_start_poll = kzalloc(sizeof(void *) * card->qdio.no_in_queues,
4637 GFP_KERNEL);
4638 if (!queue_start_poll) {
4639 rc = -ENOMEM;
4640 goto out_free_in_sbals;
4641 }
4642 for (i = 0; i < card->qdio.no_in_queues; ++i)
4643 queue_start_poll[i] = card->discipline->start_poll;
4644
4645 qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll);
4646
4647 out_sbal_ptrs =
4648 kzalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
4649 sizeof(void *), GFP_KERNEL);
4650 if (!out_sbal_ptrs) {
4651 rc = -ENOMEM;
4652 goto out_free_queue_start_poll;
4653 }
4654 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
4655 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
4656 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
4657 card->qdio.out_qs[i]->bufs[j]->buffer);
4658 }
4659
4660 memset(&init_data, 0, sizeof(struct qdio_initialize));
4661 init_data.cdev = CARD_DDEV(card);
4662 init_data.q_format = qeth_get_qdio_q_format(card);
4663 init_data.qib_param_field_format = 0;
4664 init_data.qib_param_field = qib_param_field;
4665 init_data.no_input_qs = card->qdio.no_in_queues;
4666 init_data.no_output_qs = card->qdio.no_out_queues;
4667 init_data.input_handler = card->discipline->input_handler;
4668 init_data.output_handler = card->discipline->output_handler;
4669 init_data.queue_start_poll_array = queue_start_poll;
4670 init_data.int_parm = (unsigned long) card;
4671 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
4672 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
4673 init_data.output_sbal_state_array = card->qdio.out_bufstates;
4674 init_data.scan_threshold =
4675 (card->info.type == QETH_CARD_TYPE_IQD) ? 8 : 32;
4676
4677 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
4678 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
4679 rc = qdio_allocate(&init_data);
4680 if (rc) {
4681 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
4682 goto out;
4683 }
4684 rc = qdio_establish(&init_data);
4685 if (rc) {
4686 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
4687 qdio_free(CARD_DDEV(card));
4688 }
4689 }
4690
4691 switch (card->options.cq) {
4692 case QETH_CQ_ENABLED:
4693 dev_info(&card->gdev->dev, "Completion Queue support enabled");
4694 break;
4695 case QETH_CQ_DISABLED:
4696 dev_info(&card->gdev->dev, "Completion Queue support disabled");
4697 break;
4698 default:
4699 break;
4700 }
4701 out:
4702 kfree(out_sbal_ptrs);
4703 out_free_queue_start_poll:
4704 kfree(queue_start_poll);
4705 out_free_in_sbals:
4706 kfree(in_sbal_ptrs);
4707 out_free_qib_param:
4708 kfree(qib_param_field);
4709 out_free_nothing:
4710 return rc;
4711 }
4712
4713 static void qeth_core_free_card(struct qeth_card *card)
4714 {
4715
4716 QETH_DBF_TEXT(SETUP, 2, "freecrd");
4717 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4718 qeth_clean_channel(&card->read);
4719 qeth_clean_channel(&card->write);
4720 if (card->dev)
4721 free_netdev(card->dev);
4722 kfree(card->ip_tbd_list);
4723 qeth_free_qdio_buffers(card);
4724 unregister_service_level(&card->qeth_service_level);
4725 kfree(card);
4726 }
4727
4728 void qeth_trace_features(struct qeth_card *card)
4729 {
4730 QETH_CARD_TEXT(card, 2, "features");
4731 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa4.supported_funcs);
4732 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa4.enabled_funcs);
4733 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa6.supported_funcs);
4734 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa6.enabled_funcs);
4735 QETH_CARD_TEXT_(card, 2, "%x", card->options.adp.supported_funcs);
4736 QETH_CARD_TEXT_(card, 2, "%x", card->options.adp.enabled_funcs);
4737 QETH_CARD_TEXT_(card, 2, "%x", card->info.diagass_support);
4738 }
4739 EXPORT_SYMBOL_GPL(qeth_trace_features);
4740
4741 static struct ccw_device_id qeth_ids[] = {
4742 {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01),
4743 .driver_info = QETH_CARD_TYPE_OSD},
4744 {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05),
4745 .driver_info = QETH_CARD_TYPE_IQD},
4746 {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06),
4747 .driver_info = QETH_CARD_TYPE_OSN},
4748 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03),
4749 .driver_info = QETH_CARD_TYPE_OSM},
4750 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02),
4751 .driver_info = QETH_CARD_TYPE_OSX},
4752 {},
4753 };
4754 MODULE_DEVICE_TABLE(ccw, qeth_ids);
4755
4756 static struct ccw_driver qeth_ccw_driver = {
4757 .driver = {
4758 .owner = THIS_MODULE,
4759 .name = "qeth",
4760 },
4761 .ids = qeth_ids,
4762 .probe = ccwgroup_probe_ccwdev,
4763 .remove = ccwgroup_remove_ccwdev,
4764 };
4765
4766 int qeth_core_hardsetup_card(struct qeth_card *card)
4767 {
4768 int retries = 0;
4769 int rc;
4770
4771 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
4772 atomic_set(&card->force_alloc_skb, 0);
4773 qeth_update_from_chp_desc(card);
4774 retry:
4775 if (retries)
4776 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
4777 dev_name(&card->gdev->dev));
4778 ccw_device_set_offline(CARD_DDEV(card));
4779 ccw_device_set_offline(CARD_WDEV(card));
4780 ccw_device_set_offline(CARD_RDEV(card));
4781 rc = ccw_device_set_online(CARD_RDEV(card));
4782 if (rc)
4783 goto retriable;
4784 rc = ccw_device_set_online(CARD_WDEV(card));
4785 if (rc)
4786 goto retriable;
4787 rc = ccw_device_set_online(CARD_DDEV(card));
4788 if (rc)
4789 goto retriable;
4790 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
4791 retriable:
4792 if (rc == -ERESTARTSYS) {
4793 QETH_DBF_TEXT(SETUP, 2, "break1");
4794 return rc;
4795 } else if (rc) {
4796 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4797 if (++retries > 3)
4798 goto out;
4799 else
4800 goto retry;
4801 }
4802 qeth_determine_capabilities(card);
4803 qeth_init_tokens(card);
4804 qeth_init_func_level(card);
4805 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
4806 if (rc == -ERESTARTSYS) {
4807 QETH_DBF_TEXT(SETUP, 2, "break2");
4808 return rc;
4809 } else if (rc) {
4810 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4811 if (--retries < 0)
4812 goto out;
4813 else
4814 goto retry;
4815 }
4816 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
4817 if (rc == -ERESTARTSYS) {
4818 QETH_DBF_TEXT(SETUP, 2, "break3");
4819 return rc;
4820 } else if (rc) {
4821 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4822 if (--retries < 0)
4823 goto out;
4824 else
4825 goto retry;
4826 }
4827 card->read_or_write_problem = 0;
4828 rc = qeth_mpc_initialize(card);
4829 if (rc) {
4830 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4831 goto out;
4832 }
4833
4834 card->options.ipa4.supported_funcs = 0;
4835 card->options.adp.supported_funcs = 0;
4836 card->info.diagass_support = 0;
4837 qeth_query_ipassists(card, QETH_PROT_IPV4);
4838 if (qeth_is_supported(card, IPA_SETADAPTERPARMS))
4839 qeth_query_setadapterparms(card);
4840 if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST))
4841 qeth_query_setdiagass(card);
4842 return 0;
4843 out:
4844 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
4845 "an error on the device\n");
4846 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
4847 dev_name(&card->gdev->dev), rc);
4848 return rc;
4849 }
4850 EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
4851
4852 static inline int qeth_create_skb_frag(struct qeth_qdio_buffer *qethbuffer,
4853 struct qdio_buffer_element *element,
4854 struct sk_buff **pskb, int offset, int *pfrag, int data_len)
4855 {
4856 struct page *page = virt_to_page(element->addr);
4857 if (*pskb == NULL) {
4858 if (qethbuffer->rx_skb) {
4859 /* only if qeth_card.options.cq == QETH_CQ_ENABLED */
4860 *pskb = qethbuffer->rx_skb;
4861 qethbuffer->rx_skb = NULL;
4862 } else {
4863 *pskb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
4864 if (!(*pskb))
4865 return -ENOMEM;
4866 }
4867
4868 skb_reserve(*pskb, ETH_HLEN);
4869 if (data_len <= QETH_RX_PULL_LEN) {
4870 memcpy(skb_put(*pskb, data_len), element->addr + offset,
4871 data_len);
4872 } else {
4873 get_page(page);
4874 memcpy(skb_put(*pskb, QETH_RX_PULL_LEN),
4875 element->addr + offset, QETH_RX_PULL_LEN);
4876 skb_fill_page_desc(*pskb, *pfrag, page,
4877 offset + QETH_RX_PULL_LEN,
4878 data_len - QETH_RX_PULL_LEN);
4879 (*pskb)->data_len += data_len - QETH_RX_PULL_LEN;
4880 (*pskb)->len += data_len - QETH_RX_PULL_LEN;
4881 (*pskb)->truesize += data_len - QETH_RX_PULL_LEN;
4882 (*pfrag)++;
4883 }
4884 } else {
4885 get_page(page);
4886 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
4887 (*pskb)->data_len += data_len;
4888 (*pskb)->len += data_len;
4889 (*pskb)->truesize += data_len;
4890 (*pfrag)++;
4891 }
4892
4893
4894 return 0;
4895 }
4896
4897 struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
4898 struct qeth_qdio_buffer *qethbuffer,
4899 struct qdio_buffer_element **__element, int *__offset,
4900 struct qeth_hdr **hdr)
4901 {
4902 struct qdio_buffer_element *element = *__element;
4903 struct qdio_buffer *buffer = qethbuffer->buffer;
4904 int offset = *__offset;
4905 struct sk_buff *skb = NULL;
4906 int skb_len = 0;
4907 void *data_ptr;
4908 int data_len;
4909 int headroom = 0;
4910 int use_rx_sg = 0;
4911 int frag = 0;
4912
4913 /* qeth_hdr must not cross element boundaries */
4914 if (element->length < offset + sizeof(struct qeth_hdr)) {
4915 if (qeth_is_last_sbale(element))
4916 return NULL;
4917 element++;
4918 offset = 0;
4919 if (element->length < sizeof(struct qeth_hdr))
4920 return NULL;
4921 }
4922 *hdr = element->addr + offset;
4923
4924 offset += sizeof(struct qeth_hdr);
4925 switch ((*hdr)->hdr.l2.id) {
4926 case QETH_HEADER_TYPE_LAYER2:
4927 skb_len = (*hdr)->hdr.l2.pkt_length;
4928 break;
4929 case QETH_HEADER_TYPE_LAYER3:
4930 skb_len = (*hdr)->hdr.l3.length;
4931 headroom = ETH_HLEN;
4932 break;
4933 case QETH_HEADER_TYPE_OSN:
4934 skb_len = (*hdr)->hdr.osn.pdu_length;
4935 headroom = sizeof(struct qeth_hdr);
4936 break;
4937 default:
4938 break;
4939 }
4940
4941 if (!skb_len)
4942 return NULL;
4943
4944 if (((skb_len >= card->options.rx_sg_cb) &&
4945 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
4946 (!atomic_read(&card->force_alloc_skb))) ||
4947 (card->options.cq == QETH_CQ_ENABLED)) {
4948 use_rx_sg = 1;
4949 } else {
4950 skb = dev_alloc_skb(skb_len + headroom);
4951 if (!skb)
4952 goto no_mem;
4953 if (headroom)
4954 skb_reserve(skb, headroom);
4955 }
4956
4957 data_ptr = element->addr + offset;
4958 while (skb_len) {
4959 data_len = min(skb_len, (int)(element->length - offset));
4960 if (data_len) {
4961 if (use_rx_sg) {
4962 if (qeth_create_skb_frag(qethbuffer, element,
4963 &skb, offset, &frag, data_len))
4964 goto no_mem;
4965 } else {
4966 memcpy(skb_put(skb, data_len), data_ptr,
4967 data_len);
4968 }
4969 }
4970 skb_len -= data_len;
4971 if (skb_len) {
4972 if (qeth_is_last_sbale(element)) {
4973 QETH_CARD_TEXT(card, 4, "unexeob");
4974 QETH_CARD_HEX(card, 2, buffer, sizeof(void *));
4975 dev_kfree_skb_any(skb);
4976 card->stats.rx_errors++;
4977 return NULL;
4978 }
4979 element++;
4980 offset = 0;
4981 data_ptr = element->addr;
4982 } else {
4983 offset += data_len;
4984 }
4985 }
4986 *__element = element;
4987 *__offset = offset;
4988 if (use_rx_sg && card->options.performance_stats) {
4989 card->perf_stats.sg_skbs_rx++;
4990 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
4991 }
4992 return skb;
4993 no_mem:
4994 if (net_ratelimit()) {
4995 QETH_CARD_TEXT(card, 2, "noskbmem");
4996 }
4997 card->stats.rx_dropped++;
4998 return NULL;
4999 }
5000 EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
5001
5002 static void qeth_unregister_dbf_views(void)
5003 {
5004 int x;
5005 for (x = 0; x < QETH_DBF_INFOS; x++) {
5006 debug_unregister(qeth_dbf[x].id);
5007 qeth_dbf[x].id = NULL;
5008 }
5009 }
5010
5011 void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...)
5012 {
5013 char dbf_txt_buf[32];
5014 va_list args;
5015
5016 if (level > id->level)
5017 return;
5018 va_start(args, fmt);
5019 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
5020 va_end(args);
5021 debug_text_event(id, level, dbf_txt_buf);
5022 }
5023 EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
5024
5025 static int qeth_register_dbf_views(void)
5026 {
5027 int ret;
5028 int x;
5029
5030 for (x = 0; x < QETH_DBF_INFOS; x++) {
5031 /* register the areas */
5032 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
5033 qeth_dbf[x].pages,
5034 qeth_dbf[x].areas,
5035 qeth_dbf[x].len);
5036 if (qeth_dbf[x].id == NULL) {
5037 qeth_unregister_dbf_views();
5038 return -ENOMEM;
5039 }
5040
5041 /* register a view */
5042 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
5043 if (ret) {
5044 qeth_unregister_dbf_views();
5045 return ret;
5046 }
5047
5048 /* set a passing level */
5049 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
5050 }
5051
5052 return 0;
5053 }
5054
5055 int qeth_core_load_discipline(struct qeth_card *card,
5056 enum qeth_discipline_id discipline)
5057 {
5058 int rc = 0;
5059 mutex_lock(&qeth_mod_mutex);
5060 switch (discipline) {
5061 case QETH_DISCIPLINE_LAYER3:
5062 card->discipline = try_then_request_module(
5063 symbol_get(qeth_l3_discipline), "qeth_l3");
5064 break;
5065 case QETH_DISCIPLINE_LAYER2:
5066 card->discipline = try_then_request_module(
5067 symbol_get(qeth_l2_discipline), "qeth_l2");
5068 break;
5069 }
5070 if (!card->discipline) {
5071 dev_err(&card->gdev->dev, "There is no kernel module to "
5072 "support discipline %d\n", discipline);
5073 rc = -EINVAL;
5074 }
5075 mutex_unlock(&qeth_mod_mutex);
5076 return rc;
5077 }
5078
5079 void qeth_core_free_discipline(struct qeth_card *card)
5080 {
5081 if (card->options.layer2)
5082 symbol_put(qeth_l2_discipline);
5083 else
5084 symbol_put(qeth_l3_discipline);
5085 card->discipline = NULL;
5086 }
5087
5088 static const struct device_type qeth_generic_devtype = {
5089 .name = "qeth_generic",
5090 .groups = qeth_generic_attr_groups,
5091 };
5092 static const struct device_type qeth_osn_devtype = {
5093 .name = "qeth_osn",
5094 .groups = qeth_osn_attr_groups,
5095 };
5096
5097 static int qeth_core_probe_device(struct ccwgroup_device *gdev)
5098 {
5099 struct qeth_card *card;
5100 struct device *dev;
5101 int rc;
5102 unsigned long flags;
5103 char dbf_name[20];
5104
5105 QETH_DBF_TEXT(SETUP, 2, "probedev");
5106
5107 dev = &gdev->dev;
5108 if (!get_device(dev))
5109 return -ENODEV;
5110
5111 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
5112
5113 card = qeth_alloc_card();
5114 if (!card) {
5115 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
5116 rc = -ENOMEM;
5117 goto err_dev;
5118 }
5119
5120 snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s",
5121 dev_name(&gdev->dev));
5122 card->debug = debug_register(dbf_name, 2, 1, 8);
5123 if (!card->debug) {
5124 QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf");
5125 rc = -ENOMEM;
5126 goto err_card;
5127 }
5128 debug_register_view(card->debug, &debug_hex_ascii_view);
5129
5130 card->read.ccwdev = gdev->cdev[0];
5131 card->write.ccwdev = gdev->cdev[1];
5132 card->data.ccwdev = gdev->cdev[2];
5133 dev_set_drvdata(&gdev->dev, card);
5134 card->gdev = gdev;
5135 gdev->cdev[0]->handler = qeth_irq;
5136 gdev->cdev[1]->handler = qeth_irq;
5137 gdev->cdev[2]->handler = qeth_irq;
5138
5139 rc = qeth_determine_card_type(card);
5140 if (rc) {
5141 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
5142 goto err_dbf;
5143 }
5144 rc = qeth_setup_card(card);
5145 if (rc) {
5146 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
5147 goto err_dbf;
5148 }
5149
5150 if (card->info.type == QETH_CARD_TYPE_OSN)
5151 gdev->dev.type = &qeth_osn_devtype;
5152 else
5153 gdev->dev.type = &qeth_generic_devtype;
5154
5155 switch (card->info.type) {
5156 case QETH_CARD_TYPE_OSN:
5157 case QETH_CARD_TYPE_OSM:
5158 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
5159 if (rc)
5160 goto err_dbf;
5161 rc = card->discipline->setup(card->gdev);
5162 if (rc)
5163 goto err_disc;
5164 case QETH_CARD_TYPE_OSD:
5165 case QETH_CARD_TYPE_OSX:
5166 default:
5167 break;
5168 }
5169
5170 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5171 list_add_tail(&card->list, &qeth_core_card_list.list);
5172 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
5173
5174 qeth_determine_capabilities(card);
5175 return 0;
5176
5177 err_disc:
5178 qeth_core_free_discipline(card);
5179 err_dbf:
5180 debug_unregister(card->debug);
5181 err_card:
5182 qeth_core_free_card(card);
5183 err_dev:
5184 put_device(dev);
5185 return rc;
5186 }
5187
5188 static void qeth_core_remove_device(struct ccwgroup_device *gdev)
5189 {
5190 unsigned long flags;
5191 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5192
5193 QETH_DBF_TEXT(SETUP, 2, "removedv");
5194
5195 if (card->discipline) {
5196 card->discipline->remove(gdev);
5197 qeth_core_free_discipline(card);
5198 }
5199
5200 debug_unregister(card->debug);
5201 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5202 list_del(&card->list);
5203 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
5204 qeth_core_free_card(card);
5205 dev_set_drvdata(&gdev->dev, NULL);
5206 put_device(&gdev->dev);
5207 return;
5208 }
5209
5210 static int qeth_core_set_online(struct ccwgroup_device *gdev)
5211 {
5212 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5213 int rc = 0;
5214 int def_discipline;
5215
5216 if (!card->discipline) {
5217 if (card->info.type == QETH_CARD_TYPE_IQD)
5218 def_discipline = QETH_DISCIPLINE_LAYER3;
5219 else
5220 def_discipline = QETH_DISCIPLINE_LAYER2;
5221 rc = qeth_core_load_discipline(card, def_discipline);
5222 if (rc)
5223 goto err;
5224 rc = card->discipline->setup(card->gdev);
5225 if (rc)
5226 goto err;
5227 }
5228 rc = card->discipline->set_online(gdev);
5229 err:
5230 return rc;
5231 }
5232
5233 static int qeth_core_set_offline(struct ccwgroup_device *gdev)
5234 {
5235 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5236 return card->discipline->set_offline(gdev);
5237 }
5238
5239 static void qeth_core_shutdown(struct ccwgroup_device *gdev)
5240 {
5241 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5242 if (card->discipline && card->discipline->shutdown)
5243 card->discipline->shutdown(gdev);
5244 }
5245
5246 static int qeth_core_prepare(struct ccwgroup_device *gdev)
5247 {
5248 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5249 if (card->discipline && card->discipline->prepare)
5250 return card->discipline->prepare(gdev);
5251 return 0;
5252 }
5253
5254 static void qeth_core_complete(struct ccwgroup_device *gdev)
5255 {
5256 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5257 if (card->discipline && card->discipline->complete)
5258 card->discipline->complete(gdev);
5259 }
5260
5261 static int qeth_core_freeze(struct ccwgroup_device *gdev)
5262 {
5263 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5264 if (card->discipline && card->discipline->freeze)
5265 return card->discipline->freeze(gdev);
5266 return 0;
5267 }
5268
5269 static int qeth_core_thaw(struct ccwgroup_device *gdev)
5270 {
5271 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5272 if (card->discipline && card->discipline->thaw)
5273 return card->discipline->thaw(gdev);
5274 return 0;
5275 }
5276
5277 static int qeth_core_restore(struct ccwgroup_device *gdev)
5278 {
5279 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5280 if (card->discipline && card->discipline->restore)
5281 return card->discipline->restore(gdev);
5282 return 0;
5283 }
5284
5285 static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
5286 .driver = {
5287 .owner = THIS_MODULE,
5288 .name = "qeth",
5289 },
5290 .setup = qeth_core_probe_device,
5291 .remove = qeth_core_remove_device,
5292 .set_online = qeth_core_set_online,
5293 .set_offline = qeth_core_set_offline,
5294 .shutdown = qeth_core_shutdown,
5295 .prepare = qeth_core_prepare,
5296 .complete = qeth_core_complete,
5297 .freeze = qeth_core_freeze,
5298 .thaw = qeth_core_thaw,
5299 .restore = qeth_core_restore,
5300 };
5301
5302 static ssize_t qeth_core_driver_group_store(struct device_driver *ddrv,
5303 const char *buf, size_t count)
5304 {
5305 int err;
5306
5307 err = ccwgroup_create_dev(qeth_core_root_dev,
5308 &qeth_core_ccwgroup_driver, 3, buf);
5309
5310 return err ? err : count;
5311 }
5312 static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
5313
5314 static struct attribute *qeth_drv_attrs[] = {
5315 &driver_attr_group.attr,
5316 NULL,
5317 };
5318 static struct attribute_group qeth_drv_attr_group = {
5319 .attrs = qeth_drv_attrs,
5320 };
5321 static const struct attribute_group *qeth_drv_attr_groups[] = {
5322 &qeth_drv_attr_group,
5323 NULL,
5324 };
5325
5326 static struct {
5327 const char str[ETH_GSTRING_LEN];
5328 } qeth_ethtool_stats_keys[] = {
5329 /* 0 */{"rx skbs"},
5330 {"rx buffers"},
5331 {"tx skbs"},
5332 {"tx buffers"},
5333 {"tx skbs no packing"},
5334 {"tx buffers no packing"},
5335 {"tx skbs packing"},
5336 {"tx buffers packing"},
5337 {"tx sg skbs"},
5338 {"tx sg frags"},
5339 /* 10 */{"rx sg skbs"},
5340 {"rx sg frags"},
5341 {"rx sg page allocs"},
5342 {"tx large kbytes"},
5343 {"tx large count"},
5344 {"tx pk state ch n->p"},
5345 {"tx pk state ch p->n"},
5346 {"tx pk watermark low"},
5347 {"tx pk watermark high"},
5348 {"queue 0 buffer usage"},
5349 /* 20 */{"queue 1 buffer usage"},
5350 {"queue 2 buffer usage"},
5351 {"queue 3 buffer usage"},
5352 {"rx poll time"},
5353 {"rx poll count"},
5354 {"rx do_QDIO time"},
5355 {"rx do_QDIO count"},
5356 {"tx handler time"},
5357 {"tx handler count"},
5358 {"tx time"},
5359 /* 30 */{"tx count"},
5360 {"tx do_QDIO time"},
5361 {"tx do_QDIO count"},
5362 {"tx csum"},
5363 {"tx lin"},
5364 {"cq handler count"},
5365 {"cq handler time"}
5366 };
5367
5368 int qeth_core_get_sset_count(struct net_device *dev, int stringset)
5369 {
5370 switch (stringset) {
5371 case ETH_SS_STATS:
5372 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
5373 default:
5374 return -EINVAL;
5375 }
5376 }
5377 EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
5378
5379 void qeth_core_get_ethtool_stats(struct net_device *dev,
5380 struct ethtool_stats *stats, u64 *data)
5381 {
5382 struct qeth_card *card = dev->ml_priv;
5383 data[0] = card->stats.rx_packets -
5384 card->perf_stats.initial_rx_packets;
5385 data[1] = card->perf_stats.bufs_rec;
5386 data[2] = card->stats.tx_packets -
5387 card->perf_stats.initial_tx_packets;
5388 data[3] = card->perf_stats.bufs_sent;
5389 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
5390 - card->perf_stats.skbs_sent_pack;
5391 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
5392 data[6] = card->perf_stats.skbs_sent_pack;
5393 data[7] = card->perf_stats.bufs_sent_pack;
5394 data[8] = card->perf_stats.sg_skbs_sent;
5395 data[9] = card->perf_stats.sg_frags_sent;
5396 data[10] = card->perf_stats.sg_skbs_rx;
5397 data[11] = card->perf_stats.sg_frags_rx;
5398 data[12] = card->perf_stats.sg_alloc_page_rx;
5399 data[13] = (card->perf_stats.large_send_bytes >> 10);
5400 data[14] = card->perf_stats.large_send_cnt;
5401 data[15] = card->perf_stats.sc_dp_p;
5402 data[16] = card->perf_stats.sc_p_dp;
5403 data[17] = QETH_LOW_WATERMARK_PACK;
5404 data[18] = QETH_HIGH_WATERMARK_PACK;
5405 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
5406 data[20] = (card->qdio.no_out_queues > 1) ?
5407 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
5408 data[21] = (card->qdio.no_out_queues > 2) ?
5409 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
5410 data[22] = (card->qdio.no_out_queues > 3) ?
5411 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
5412 data[23] = card->perf_stats.inbound_time;
5413 data[24] = card->perf_stats.inbound_cnt;
5414 data[25] = card->perf_stats.inbound_do_qdio_time;
5415 data[26] = card->perf_stats.inbound_do_qdio_cnt;
5416 data[27] = card->perf_stats.outbound_handler_time;
5417 data[28] = card->perf_stats.outbound_handler_cnt;
5418 data[29] = card->perf_stats.outbound_time;
5419 data[30] = card->perf_stats.outbound_cnt;
5420 data[31] = card->perf_stats.outbound_do_qdio_time;
5421 data[32] = card->perf_stats.outbound_do_qdio_cnt;
5422 data[33] = card->perf_stats.tx_csum;
5423 data[34] = card->perf_stats.tx_lin;
5424 data[35] = card->perf_stats.cq_cnt;
5425 data[36] = card->perf_stats.cq_time;
5426 }
5427 EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
5428
5429 void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
5430 {
5431 switch (stringset) {
5432 case ETH_SS_STATS:
5433 memcpy(data, &qeth_ethtool_stats_keys,
5434 sizeof(qeth_ethtool_stats_keys));
5435 break;
5436 default:
5437 WARN_ON(1);
5438 break;
5439 }
5440 }
5441 EXPORT_SYMBOL_GPL(qeth_core_get_strings);
5442
5443 void qeth_core_get_drvinfo(struct net_device *dev,
5444 struct ethtool_drvinfo *info)
5445 {
5446 struct qeth_card *card = dev->ml_priv;
5447 if (card->options.layer2)
5448 strcpy(info->driver, "qeth_l2");
5449 else
5450 strcpy(info->driver, "qeth_l3");
5451
5452 strcpy(info->version, "1.0");
5453 strcpy(info->fw_version, card->info.mcl_level);
5454 sprintf(info->bus_info, "%s/%s/%s",
5455 CARD_RDEV_ID(card),
5456 CARD_WDEV_ID(card),
5457 CARD_DDEV_ID(card));
5458 }
5459 EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
5460
5461 int qeth_core_ethtool_get_settings(struct net_device *netdev,
5462 struct ethtool_cmd *ecmd)
5463 {
5464 struct qeth_card *card = netdev->ml_priv;
5465 enum qeth_link_types link_type;
5466
5467 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
5468 link_type = QETH_LINK_TYPE_10GBIT_ETH;
5469 else
5470 link_type = card->info.link_type;
5471
5472 ecmd->transceiver = XCVR_INTERNAL;
5473 ecmd->supported = SUPPORTED_Autoneg;
5474 ecmd->advertising = ADVERTISED_Autoneg;
5475 ecmd->duplex = DUPLEX_FULL;
5476 ecmd->autoneg = AUTONEG_ENABLE;
5477
5478 switch (link_type) {
5479 case QETH_LINK_TYPE_FAST_ETH:
5480 case QETH_LINK_TYPE_LANE_ETH100:
5481 ecmd->supported |= SUPPORTED_10baseT_Half |
5482 SUPPORTED_10baseT_Full |
5483 SUPPORTED_100baseT_Half |
5484 SUPPORTED_100baseT_Full |
5485 SUPPORTED_TP;
5486 ecmd->advertising |= ADVERTISED_10baseT_Half |
5487 ADVERTISED_10baseT_Full |
5488 ADVERTISED_100baseT_Half |
5489 ADVERTISED_100baseT_Full |
5490 ADVERTISED_TP;
5491 ecmd->speed = SPEED_100;
5492 ecmd->port = PORT_TP;
5493 break;
5494
5495 case QETH_LINK_TYPE_GBIT_ETH:
5496 case QETH_LINK_TYPE_LANE_ETH1000:
5497 ecmd->supported |= SUPPORTED_10baseT_Half |
5498 SUPPORTED_10baseT_Full |
5499 SUPPORTED_100baseT_Half |
5500 SUPPORTED_100baseT_Full |
5501 SUPPORTED_1000baseT_Half |
5502 SUPPORTED_1000baseT_Full |
5503 SUPPORTED_FIBRE;
5504 ecmd->advertising |= ADVERTISED_10baseT_Half |
5505 ADVERTISED_10baseT_Full |
5506 ADVERTISED_100baseT_Half |
5507 ADVERTISED_100baseT_Full |
5508 ADVERTISED_1000baseT_Half |
5509 ADVERTISED_1000baseT_Full |
5510 ADVERTISED_FIBRE;
5511 ecmd->speed = SPEED_1000;
5512 ecmd->port = PORT_FIBRE;
5513 break;
5514
5515 case QETH_LINK_TYPE_10GBIT_ETH:
5516 ecmd->supported |= SUPPORTED_10baseT_Half |
5517 SUPPORTED_10baseT_Full |
5518 SUPPORTED_100baseT_Half |
5519 SUPPORTED_100baseT_Full |
5520 SUPPORTED_1000baseT_Half |
5521 SUPPORTED_1000baseT_Full |
5522 SUPPORTED_10000baseT_Full |
5523 SUPPORTED_FIBRE;
5524 ecmd->advertising |= ADVERTISED_10baseT_Half |
5525 ADVERTISED_10baseT_Full |
5526 ADVERTISED_100baseT_Half |
5527 ADVERTISED_100baseT_Full |
5528 ADVERTISED_1000baseT_Half |
5529 ADVERTISED_1000baseT_Full |
5530 ADVERTISED_10000baseT_Full |
5531 ADVERTISED_FIBRE;
5532 ecmd->speed = SPEED_10000;
5533 ecmd->port = PORT_FIBRE;
5534 break;
5535
5536 default:
5537 ecmd->supported |= SUPPORTED_10baseT_Half |
5538 SUPPORTED_10baseT_Full |
5539 SUPPORTED_TP;
5540 ecmd->advertising |= ADVERTISED_10baseT_Half |
5541 ADVERTISED_10baseT_Full |
5542 ADVERTISED_TP;
5543 ecmd->speed = SPEED_10;
5544 ecmd->port = PORT_TP;
5545 }
5546
5547 return 0;
5548 }
5549 EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings);
5550
5551 static int __init qeth_core_init(void)
5552 {
5553 int rc;
5554
5555 pr_info("loading core functions\n");
5556 INIT_LIST_HEAD(&qeth_core_card_list.list);
5557 rwlock_init(&qeth_core_card_list.rwlock);
5558 mutex_init(&qeth_mod_mutex);
5559
5560 rc = qeth_register_dbf_views();
5561 if (rc)
5562 goto out_err;
5563 qeth_core_root_dev = root_device_register("qeth");
5564 rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0;
5565 if (rc)
5566 goto register_err;
5567 qeth_core_header_cache = kmem_cache_create("qeth_hdr",
5568 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
5569 if (!qeth_core_header_cache) {
5570 rc = -ENOMEM;
5571 goto slab_err;
5572 }
5573 qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf",
5574 sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL);
5575 if (!qeth_qdio_outbuf_cache) {
5576 rc = -ENOMEM;
5577 goto cqslab_err;
5578 }
5579 rc = ccw_driver_register(&qeth_ccw_driver);
5580 if (rc)
5581 goto ccw_err;
5582 qeth_core_ccwgroup_driver.driver.groups = qeth_drv_attr_groups;
5583 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
5584 if (rc)
5585 goto ccwgroup_err;
5586
5587 return 0;
5588
5589 ccwgroup_err:
5590 ccw_driver_unregister(&qeth_ccw_driver);
5591 ccw_err:
5592 kmem_cache_destroy(qeth_qdio_outbuf_cache);
5593 cqslab_err:
5594 kmem_cache_destroy(qeth_core_header_cache);
5595 slab_err:
5596 root_device_unregister(qeth_core_root_dev);
5597 register_err:
5598 qeth_unregister_dbf_views();
5599 out_err:
5600 pr_err("Initializing the qeth device driver failed\n");
5601 return rc;
5602 }
5603
5604 static void __exit qeth_core_exit(void)
5605 {
5606 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
5607 ccw_driver_unregister(&qeth_ccw_driver);
5608 kmem_cache_destroy(qeth_qdio_outbuf_cache);
5609 kmem_cache_destroy(qeth_core_header_cache);
5610 root_device_unregister(qeth_core_root_dev);
5611 qeth_unregister_dbf_views();
5612 pr_info("core functions removed\n");
5613 }
5614
5615 module_init(qeth_core_init);
5616 module_exit(qeth_core_exit);
5617 MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
5618 MODULE_DESCRIPTION("qeth core functions");
5619 MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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