2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
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20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
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30 * modification, are permitted provided that the following conditions
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56 #include <linux/device.h>
57 #include "scic_controller.h"
59 #include "scic_port.h"
60 #include "scic_remote_device.h"
61 #include "scic_sds_controller.h"
62 #include "scu_registers.h"
63 #include "scic_sds_phy.h"
64 #include "scic_sds_port_configuration_agent.h"
65 #include "scic_sds_port.h"
66 #include "scic_sds_remote_device.h"
67 #include "scic_sds_request.h"
68 #include "sci_environment.h"
70 #include "scu_completion_codes.h"
71 #include "scu_constants.h"
72 #include "scu_event_codes.h"
73 #include "scu_remote_node_context.h"
74 #include "scu_task_context.h"
75 #include "scu_unsolicited_frame.h"
77 #define SCU_CONTEXT_RAM_INIT_STALL_TIME 200
80 * smu_dcc_get_max_ports() -
82 * This macro returns the maximum number of logical ports supported by the
83 * hardware. The caller passes in the value read from the device context
84 * capacity register and this macro will mash and shift the value appropriately.
86 #define smu_dcc_get_max_ports(dcc_value) \
88 (((dcc_value) & SMU_DEVICE_CONTEXT_CAPACITY_MAX_LP_MASK) \
89 >> SMU_DEVICE_CONTEXT_CAPACITY_MAX_LP_SHIFT) + 1 \
93 * smu_dcc_get_max_task_context() -
95 * This macro returns the maximum number of task contexts supported by the
96 * hardware. The caller passes in the value read from the device context
97 * capacity register and this macro will mash and shift the value appropriately.
99 #define smu_dcc_get_max_task_context(dcc_value) \
101 (((dcc_value) & SMU_DEVICE_CONTEXT_CAPACITY_MAX_TC_MASK) \
102 >> SMU_DEVICE_CONTEXT_CAPACITY_MAX_TC_SHIFT) + 1 \
106 * smu_dcc_get_max_remote_node_context() -
108 * This macro returns the maximum number of remote node contexts supported by
109 * the hardware. The caller passes in the value read from the device context
110 * capacity register and this macro will mash and shift the value appropriately.
112 #define smu_dcc_get_max_remote_node_context(dcc_value) \
114 (((dcc_value) & SMU_DEVICE_CONTEXT_CAPACITY_MAX_RNC_MASK) \
115 >> SMU_DEVICE_CONTEXT_CAPACITY_MAX_RNC_SHIFT) + 1 \
119 static void scic_sds_controller_power_control_timer_handler(
121 #define SCIC_SDS_CONTROLLER_MIN_TIMER_COUNT 3
122 #define SCIC_SDS_CONTROLLER_MAX_TIMER_COUNT 3
127 * The number of milliseconds to wait for a phy to start.
129 #define SCIC_SDS_CONTROLLER_PHY_START_TIMEOUT 100
134 * The number of milliseconds to wait while a given phy is consuming power
135 * before allowing another set of phys to consume power. Ultimately, this will
136 * be specified by OEM parameter.
138 #define SCIC_SDS_CONTROLLER_POWER_CONTROL_INTERVAL 500
141 * COMPLETION_QUEUE_CYCLE_BIT() -
143 * This macro will return the cycle bit of the completion queue entry
145 #define COMPLETION_QUEUE_CYCLE_BIT(x) ((x) & 0x80000000)
148 * NORMALIZE_GET_POINTER() -
150 * This macro will normalize the completion queue get pointer so its value can
151 * be used as an index into an array
153 #define NORMALIZE_GET_POINTER(x) \
154 ((x) & SMU_COMPLETION_QUEUE_GET_POINTER_MASK)
157 * NORMALIZE_PUT_POINTER() -
159 * This macro will normalize the completion queue put pointer so its value can
160 * be used as an array inde
162 #define NORMALIZE_PUT_POINTER(x) \
163 ((x) & SMU_COMPLETION_QUEUE_PUT_POINTER_MASK)
167 * NORMALIZE_GET_POINTER_CYCLE_BIT() -
169 * This macro will normalize the completion queue cycle pointer so it matches
170 * the completion queue cycle bit
172 #define NORMALIZE_GET_POINTER_CYCLE_BIT(x) \
173 ((SMU_CQGR_CYCLE_BIT & (x)) << (31 - SMU_COMPLETION_QUEUE_GET_CYCLE_BIT_SHIFT))
176 * NORMALIZE_EVENT_POINTER() -
178 * This macro will normalize the completion queue event entry so its value can
179 * be used as an index.
181 #define NORMALIZE_EVENT_POINTER(x) \
183 ((x) & SMU_COMPLETION_QUEUE_GET_EVENT_POINTER_MASK) \
184 >> SMU_COMPLETION_QUEUE_GET_EVENT_POINTER_SHIFT \
188 * INCREMENT_COMPLETION_QUEUE_GET() -
190 * This macro will increment the controllers completion queue index value and
191 * possibly toggle the cycle bit if the completion queue index wraps back to 0.
193 #define INCREMENT_COMPLETION_QUEUE_GET(controller, index, cycle) \
194 INCREMENT_QUEUE_GET(\
197 (controller)->completion_queue_entries, \
202 * INCREMENT_EVENT_QUEUE_GET() -
204 * This macro will increment the controllers event queue index value and
205 * possibly toggle the event cycle bit if the event queue index wraps back to 0.
207 #define INCREMENT_EVENT_QUEUE_GET(controller, index, cycle) \
208 INCREMENT_QUEUE_GET(\
211 (controller)->completion_event_entries, \
212 SMU_CQGR_EVENT_CYCLE_BIT \
215 static void scic_sds_controller_initialize_power_control(struct scic_sds_controller
*scic
)
217 struct isci_host
*ihost
= sci_object_get_association(scic
);
218 scic
->power_control
.timer
= isci_timer_create(ihost
,
220 scic_sds_controller_power_control_timer_handler
);
222 memset(scic
->power_control
.requesters
, 0,
223 sizeof(scic
->power_control
.requesters
));
225 scic
->power_control
.phys_waiting
= 0;
226 scic
->power_control
.phys_granted_power
= 0;
229 int scic_controller_mem_init(struct scic_sds_controller
*scic
)
231 struct device
*dev
= scic_to_dev(scic
);
232 dma_addr_t dma_handle
;
233 enum sci_status result
;
235 scic
->completion_queue
= dmam_alloc_coherent(dev
,
236 scic
->completion_queue_entries
* sizeof(u32
),
237 &dma_handle
, GFP_KERNEL
);
238 if (!scic
->completion_queue
)
241 writel(lower_32_bits(dma_handle
),
242 &scic
->smu_registers
->completion_queue_lower
);
243 writel(upper_32_bits(dma_handle
),
244 &scic
->smu_registers
->completion_queue_upper
);
246 scic
->remote_node_context_table
= dmam_alloc_coherent(dev
,
247 scic
->remote_node_entries
*
248 sizeof(union scu_remote_node_context
),
249 &dma_handle
, GFP_KERNEL
);
250 if (!scic
->remote_node_context_table
)
253 writel(lower_32_bits(dma_handle
),
254 &scic
->smu_registers
->remote_node_context_lower
);
255 writel(upper_32_bits(dma_handle
),
256 &scic
->smu_registers
->remote_node_context_upper
);
258 scic
->task_context_table
= dmam_alloc_coherent(dev
,
259 scic
->task_context_entries
*
260 sizeof(struct scu_task_context
),
261 &dma_handle
, GFP_KERNEL
);
262 if (!scic
->task_context_table
)
265 writel(lower_32_bits(dma_handle
),
266 &scic
->smu_registers
->host_task_table_lower
);
267 writel(upper_32_bits(dma_handle
),
268 &scic
->smu_registers
->host_task_table_upper
);
270 result
= scic_sds_unsolicited_frame_control_construct(scic
);
275 * Inform the silicon as to the location of the UF headers and
278 writel(lower_32_bits(scic
->uf_control
.headers
.physical_address
),
279 &scic
->scu_registers
->sdma
.uf_header_base_address_lower
);
280 writel(upper_32_bits(scic
->uf_control
.headers
.physical_address
),
281 &scic
->scu_registers
->sdma
.uf_header_base_address_upper
);
283 writel(lower_32_bits(scic
->uf_control
.address_table
.physical_address
),
284 &scic
->scu_registers
->sdma
.uf_address_table_lower
);
285 writel(upper_32_bits(scic
->uf_control
.address_table
.physical_address
),
286 &scic
->scu_registers
->sdma
.uf_address_table_upper
);
292 * This method initializes the task context data for the controller.
297 scic_sds_controller_assign_task_entries(struct scic_sds_controller
*controller
)
302 * Assign all the TCs to function 0
303 * TODO: Do we actually need to read this register to write it back?
307 readl(&controller
->smu_registers
->task_context_assignment
[0]);
309 task_assignment
|= (SMU_TCA_GEN_VAL(STARTING
, 0)) |
310 (SMU_TCA_GEN_VAL(ENDING
, controller
->task_context_entries
- 1)) |
311 (SMU_TCA_GEN_BIT(RANGE_CHECK_ENABLE
));
313 writel(task_assignment
,
314 &controller
->smu_registers
->task_context_assignment
[0]);
319 * This method initializes the hardware completion queue.
323 static void scic_sds_controller_initialize_completion_queue(
324 struct scic_sds_controller
*this_controller
)
327 u32 completion_queue_control_value
;
328 u32 completion_queue_get_value
;
329 u32 completion_queue_put_value
;
331 this_controller
->completion_queue_get
= 0;
333 completion_queue_control_value
= (
334 SMU_CQC_QUEUE_LIMIT_SET(this_controller
->completion_queue_entries
- 1)
335 | SMU_CQC_EVENT_LIMIT_SET(this_controller
->completion_event_entries
- 1)
338 writel(completion_queue_control_value
,
339 &this_controller
->smu_registers
->completion_queue_control
);
342 /* Set the completion queue get pointer and enable the queue */
343 completion_queue_get_value
= (
344 (SMU_CQGR_GEN_VAL(POINTER
, 0))
345 | (SMU_CQGR_GEN_VAL(EVENT_POINTER
, 0))
346 | (SMU_CQGR_GEN_BIT(ENABLE
))
347 | (SMU_CQGR_GEN_BIT(EVENT_ENABLE
))
350 writel(completion_queue_get_value
,
351 &this_controller
->smu_registers
->completion_queue_get
);
353 /* Set the completion queue put pointer */
354 completion_queue_put_value
= (
355 (SMU_CQPR_GEN_VAL(POINTER
, 0))
356 | (SMU_CQPR_GEN_VAL(EVENT_POINTER
, 0))
359 writel(completion_queue_put_value
,
360 &this_controller
->smu_registers
->completion_queue_put
);
363 /* Initialize the cycle bit of the completion queue entries */
364 for (index
= 0; index
< this_controller
->completion_queue_entries
; index
++) {
366 * If get.cycle_bit != completion_queue.cycle_bit
367 * its not a valid completion queue entry
368 * so at system start all entries are invalid */
369 this_controller
->completion_queue
[index
] = 0x80000000;
374 * This method initializes the hardware unsolicited frame queue.
378 static void scic_sds_controller_initialize_unsolicited_frame_queue(
379 struct scic_sds_controller
*this_controller
)
381 u32 frame_queue_control_value
;
382 u32 frame_queue_get_value
;
383 u32 frame_queue_put_value
;
385 /* Write the queue size */
386 frame_queue_control_value
=
387 SCU_UFQC_GEN_VAL(QUEUE_SIZE
, this_controller
->uf_control
.address_table
.count
);
389 writel(frame_queue_control_value
,
390 &this_controller
->scu_registers
->sdma
.unsolicited_frame_queue_control
);
392 /* Setup the get pointer for the unsolicited frame queue */
393 frame_queue_get_value
= (
394 SCU_UFQGP_GEN_VAL(POINTER
, 0)
395 | SCU_UFQGP_GEN_BIT(ENABLE_BIT
)
398 writel(frame_queue_get_value
,
399 &this_controller
->scu_registers
->sdma
.unsolicited_frame_get_pointer
);
400 /* Setup the put pointer for the unsolicited frame queue */
401 frame_queue_put_value
= SCU_UFQPP_GEN_VAL(POINTER
, 0);
402 writel(frame_queue_put_value
,
403 &this_controller
->scu_registers
->sdma
.unsolicited_frame_put_pointer
);
407 * This method enables the hardware port task scheduler.
411 static void scic_sds_controller_enable_port_task_scheduler(
412 struct scic_sds_controller
*this_controller
)
414 u32 port_task_scheduler_value
;
416 port_task_scheduler_value
=
417 readl(&this_controller
->scu_registers
->peg0
.ptsg
.control
);
418 port_task_scheduler_value
|=
419 (SCU_PTSGCR_GEN_BIT(ETM_ENABLE
) | SCU_PTSGCR_GEN_BIT(PTSG_ENABLE
));
420 writel(port_task_scheduler_value
,
421 &this_controller
->scu_registers
->peg0
.ptsg
.control
);
427 * This macro is used to delay between writes to the AFE registers during AFE
430 #define AFE_REGISTER_WRITE_DELAY 10
432 /* Initialize the AFE for this phy index. We need to read the AFE setup from
433 * the OEM parameters none
435 static void scic_sds_controller_afe_initialization(struct scic_sds_controller
*scic
)
437 const struct scic_sds_oem_params
*oem
= &scic
->oem_parameters
.sds1
;
441 /* Clear DFX Status registers */
442 writel(0x0081000f, &scic
->scu_registers
->afe
.afe_dfx_master_control0
);
443 udelay(AFE_REGISTER_WRITE_DELAY
);
445 /* Configure bias currents to normal */
447 writel(0x00005500, &scic
->scu_registers
->afe
.afe_bias_control
);
449 writel(0x00005A00, &scic
->scu_registers
->afe
.afe_bias_control
);
451 udelay(AFE_REGISTER_WRITE_DELAY
);
455 writel(0x80040A08, &scic
->scu_registers
->afe
.afe_pll_control0
);
457 writel(0x80040908, &scic
->scu_registers
->afe
.afe_pll_control0
);
459 udelay(AFE_REGISTER_WRITE_DELAY
);
461 /* Wait for the PLL to lock */
463 afe_status
= readl(&scic
->scu_registers
->afe
.afe_common_block_status
);
464 udelay(AFE_REGISTER_WRITE_DELAY
);
465 } while ((afe_status
& 0x00001000) == 0);
468 /* Shorten SAS SNW lock time (RxLock timer value from 76 us to 50 us) */
469 writel(0x7bcc96ad, &scic
->scu_registers
->afe
.afe_pmsn_master_control0
);
470 udelay(AFE_REGISTER_WRITE_DELAY
);
473 for (phy_id
= 0; phy_id
< SCI_MAX_PHYS
; phy_id
++) {
474 const struct sci_phy_oem_params
*oem_phy
= &oem
->phys
[phy_id
];
477 /* Configure transmitter SSC parameters */
478 writel(0x00030000, &scic
->scu_registers
->afe
.scu_afe_xcvr
[phy_id
].afe_tx_ssc_control
);
479 udelay(AFE_REGISTER_WRITE_DELAY
);
482 * All defaults, except the Receive Word Alignament/Comma Detect
483 * Enable....(0xe800) */
484 writel(0x00004512, &scic
->scu_registers
->afe
.scu_afe_xcvr
[phy_id
].afe_xcvr_control0
);
485 udelay(AFE_REGISTER_WRITE_DELAY
);
487 writel(0x0050100F, &scic
->scu_registers
->afe
.scu_afe_xcvr
[phy_id
].afe_xcvr_control1
);
488 udelay(AFE_REGISTER_WRITE_DELAY
);
492 * Power up TX and RX out from power down (PWRDNTX and PWRDNRX)
493 * & increase TX int & ext bias 20%....(0xe85c) */
495 writel(0x000003D4, &scic
->scu_registers
->afe
.scu_afe_xcvr
[phy_id
].afe_channel_control
);
497 writel(0x000003F0, &scic
->scu_registers
->afe
.scu_afe_xcvr
[phy_id
].afe_channel_control
);
499 /* Power down TX and RX (PWRDNTX and PWRDNRX) */
500 writel(0x000003d7, &scic
->scu_registers
->afe
.scu_afe_xcvr
[phy_id
].afe_channel_control
);
501 udelay(AFE_REGISTER_WRITE_DELAY
);
504 * Power up TX and RX out from power down (PWRDNTX and PWRDNRX)
505 * & increase TX int & ext bias 20%....(0xe85c) */
506 writel(0x000003d4, &scic
->scu_registers
->afe
.scu_afe_xcvr
[phy_id
].afe_channel_control
);
508 udelay(AFE_REGISTER_WRITE_DELAY
);
510 if (is_a0() || is_a2()) {
511 /* Enable TX equalization (0xe824) */
512 writel(0x00040000, &scic
->scu_registers
->afe
.scu_afe_xcvr
[phy_id
].afe_tx_control
);
513 udelay(AFE_REGISTER_WRITE_DELAY
);
517 * RDPI=0x0(RX Power On), RXOOBDETPDNC=0x0, TPD=0x0(TX Power On),
518 * RDD=0x0(RX Detect Enabled) ....(0xe800) */
519 writel(0x00004100, &scic
->scu_registers
->afe
.scu_afe_xcvr
[phy_id
].afe_xcvr_control0
);
520 udelay(AFE_REGISTER_WRITE_DELAY
);
522 /* Leave DFE/FFE on */
524 writel(0x3F09983F, &scic
->scu_registers
->afe
.scu_afe_xcvr
[phy_id
].afe_rx_ssc_control0
);
526 writel(0x3F11103F, &scic
->scu_registers
->afe
.scu_afe_xcvr
[phy_id
].afe_rx_ssc_control0
);
528 writel(0x3F11103F, &scic
->scu_registers
->afe
.scu_afe_xcvr
[phy_id
].afe_rx_ssc_control0
);
529 udelay(AFE_REGISTER_WRITE_DELAY
);
530 /* Enable TX equalization (0xe824) */
531 writel(0x00040000, &scic
->scu_registers
->afe
.scu_afe_xcvr
[phy_id
].afe_tx_control
);
533 udelay(AFE_REGISTER_WRITE_DELAY
);
535 writel(oem_phy
->afe_tx_amp_control0
,
536 &scic
->scu_registers
->afe
.scu_afe_xcvr
[phy_id
].afe_tx_amp_control0
);
537 udelay(AFE_REGISTER_WRITE_DELAY
);
539 writel(oem_phy
->afe_tx_amp_control1
,
540 &scic
->scu_registers
->afe
.scu_afe_xcvr
[phy_id
].afe_tx_amp_control1
);
541 udelay(AFE_REGISTER_WRITE_DELAY
);
543 writel(oem_phy
->afe_tx_amp_control2
,
544 &scic
->scu_registers
->afe
.scu_afe_xcvr
[phy_id
].afe_tx_amp_control2
);
545 udelay(AFE_REGISTER_WRITE_DELAY
);
547 writel(oem_phy
->afe_tx_amp_control3
,
548 &scic
->scu_registers
->afe
.scu_afe_xcvr
[phy_id
].afe_tx_amp_control3
);
549 udelay(AFE_REGISTER_WRITE_DELAY
);
552 /* Transfer control to the PEs */
553 writel(0x00010f00, &scic
->scu_registers
->afe
.afe_dfx_master_control0
);
554 udelay(AFE_REGISTER_WRITE_DELAY
);
558 * ****************************************************************************-
559 * * SCIC SDS Controller Internal Start/Stop Routines
560 * ****************************************************************************- */
564 * This method will attempt to transition into the ready state for the
565 * controller and indicate that the controller start operation has completed
566 * if all criteria are met.
567 * @this_controller: This parameter indicates the controller object for which
568 * to transition to ready.
569 * @status: This parameter indicates the status value to be pass into the call
570 * to scic_cb_controller_start_complete().
574 static void scic_sds_controller_transition_to_ready(
575 struct scic_sds_controller
*scic
,
576 enum sci_status status
)
578 struct isci_host
*ihost
= sci_object_get_association(scic
);
580 if (scic
->state_machine
.current_state_id
==
581 SCI_BASE_CONTROLLER_STATE_STARTING
) {
583 * We move into the ready state, because some of the phys/ports
584 * may be up and operational.
586 sci_base_state_machine_change_state(&scic
->state_machine
,
587 SCI_BASE_CONTROLLER_STATE_READY
);
589 isci_host_start_complete(ihost
, status
);
593 static void scic_sds_controller_timeout_handler(void *_scic
)
595 struct scic_sds_controller
*scic
= _scic
;
596 struct isci_host
*ihost
= sci_object_get_association(scic
);
597 struct sci_base_state_machine
*sm
= &scic
->state_machine
;
599 if (sm
->current_state_id
== SCI_BASE_CONTROLLER_STATE_STARTING
)
600 scic_sds_controller_transition_to_ready(scic
, SCI_FAILURE_TIMEOUT
);
601 else if (sm
->current_state_id
== SCI_BASE_CONTROLLER_STATE_STOPPING
) {
602 sci_base_state_machine_change_state(sm
, SCI_BASE_CONTROLLER_STATE_FAILED
);
603 isci_host_stop_complete(ihost
, SCI_FAILURE_TIMEOUT
);
604 } else /* / @todo Now what do we want to do in this case? */
605 dev_err(scic_to_dev(scic
),
606 "%s: Controller timer fired when controller was not "
607 "in a state being timed.\n",
611 static enum sci_status
scic_sds_controller_stop_ports(struct scic_sds_controller
*scic
)
614 enum sci_status port_status
;
615 enum sci_status status
= SCI_SUCCESS
;
617 for (index
= 0; index
< scic
->logical_port_entries
; index
++) {
618 struct scic_sds_port
*sci_port
= &scic
->port_table
[index
];
619 scic_sds_port_handler_t stop
;
621 stop
= sci_port
->state_handlers
->stop_handler
;
622 port_status
= stop(sci_port
);
624 if ((port_status
!= SCI_SUCCESS
) &&
625 (port_status
!= SCI_FAILURE_INVALID_STATE
)) {
626 status
= SCI_FAILURE
;
628 dev_warn(scic_to_dev(scic
),
629 "%s: Controller stop operation failed to "
630 "stop port %d because of status %d.\n",
632 sci_port
->logical_port_index
,
640 static inline void scic_sds_controller_phy_timer_start(
641 struct scic_sds_controller
*scic
)
643 isci_timer_start(scic
->phy_startup_timer
,
644 SCIC_SDS_CONTROLLER_PHY_START_TIMEOUT
);
646 scic
->phy_startup_timer_pending
= true;
649 static void scic_sds_controller_phy_timer_stop(struct scic_sds_controller
*scic
)
651 isci_timer_stop(scic
->phy_startup_timer
);
653 scic
->phy_startup_timer_pending
= false;
657 * scic_sds_controller_start_next_phy - start phy
660 * If all the phys have been started, then attempt to transition the
661 * controller to the READY state and inform the user
662 * (scic_cb_controller_start_complete()).
664 static enum sci_status
scic_sds_controller_start_next_phy(struct scic_sds_controller
*scic
)
666 struct scic_sds_oem_params
*oem
= &scic
->oem_parameters
.sds1
;
667 struct scic_sds_phy
*sci_phy
;
668 enum sci_status status
;
670 status
= SCI_SUCCESS
;
672 if (scic
->phy_startup_timer_pending
)
675 if (scic
->next_phy_to_start
>= SCI_MAX_PHYS
) {
676 bool is_controller_start_complete
= true;
680 for (index
= 0; index
< SCI_MAX_PHYS
; index
++) {
681 sci_phy
= &scic
->phy_table
[index
];
682 state
= sci_phy
->state_machine
.current_state_id
;
684 if (!scic_sds_phy_get_port(sci_phy
))
687 /* The controller start operation is complete iff:
688 * - all links have been given an opportunity to start
689 * - have no indication of a connected device
690 * - have an indication of a connected device and it has
691 * finished the link training process.
693 if ((sci_phy
->is_in_link_training
== false &&
694 state
== SCI_BASE_PHY_STATE_INITIAL
) ||
695 (sci_phy
->is_in_link_training
== false &&
696 state
== SCI_BASE_PHY_STATE_STOPPED
) ||
697 (sci_phy
->is_in_link_training
== true &&
698 state
== SCI_BASE_PHY_STATE_STARTING
)) {
699 is_controller_start_complete
= false;
705 * The controller has successfully finished the start process.
706 * Inform the SCI Core user and transition to the READY state. */
707 if (is_controller_start_complete
== true) {
708 scic_sds_controller_transition_to_ready(scic
, SCI_SUCCESS
);
709 scic_sds_controller_phy_timer_stop(scic
);
712 sci_phy
= &scic
->phy_table
[scic
->next_phy_to_start
];
714 if (oem
->controller
.mode_type
== SCIC_PORT_MANUAL_CONFIGURATION_MODE
) {
715 if (scic_sds_phy_get_port(sci_phy
) == NULL
) {
716 scic
->next_phy_to_start
++;
718 /* Caution recursion ahead be forwarned
720 * The PHY was never added to a PORT in MPC mode
721 * so start the next phy in sequence This phy
722 * will never go link up and will not draw power
723 * the OEM parameters either configured the phy
724 * incorrectly for the PORT or it was never
727 return scic_sds_controller_start_next_phy(scic
);
731 status
= scic_sds_phy_start(sci_phy
);
733 if (status
== SCI_SUCCESS
) {
734 scic_sds_controller_phy_timer_start(scic
);
736 dev_warn(scic_to_dev(scic
),
737 "%s: Controller stop operation failed "
738 "to stop phy %d because of status "
741 scic
->phy_table
[scic
->next_phy_to_start
].phy_index
,
745 scic
->next_phy_to_start
++;
751 static void scic_sds_controller_phy_startup_timeout_handler(void *_scic
)
753 struct scic_sds_controller
*scic
= _scic
;
754 enum sci_status status
;
756 scic
->phy_startup_timer_pending
= false;
757 status
= SCI_FAILURE
;
758 while (status
!= SCI_SUCCESS
)
759 status
= scic_sds_controller_start_next_phy(scic
);
762 static enum sci_status
scic_sds_controller_initialize_phy_startup(struct scic_sds_controller
*scic
)
764 struct isci_host
*ihost
= sci_object_get_association(scic
);
766 scic
->phy_startup_timer
= isci_timer_create(ihost
,
768 scic_sds_controller_phy_startup_timeout_handler
);
770 if (scic
->phy_startup_timer
== NULL
)
771 return SCI_FAILURE_INSUFFICIENT_RESOURCES
;
773 scic
->next_phy_to_start
= 0;
774 scic
->phy_startup_timer_pending
= false;
780 static enum sci_status
scic_sds_controller_stop_phys(struct scic_sds_controller
*scic
)
783 enum sci_status status
;
784 enum sci_status phy_status
;
786 status
= SCI_SUCCESS
;
788 for (index
= 0; index
< SCI_MAX_PHYS
; index
++) {
789 phy_status
= scic_sds_phy_stop(&scic
->phy_table
[index
]);
792 (phy_status
!= SCI_SUCCESS
)
793 && (phy_status
!= SCI_FAILURE_INVALID_STATE
)
795 status
= SCI_FAILURE
;
797 dev_warn(scic_to_dev(scic
),
798 "%s: Controller stop operation failed to stop "
799 "phy %d because of status %d.\n",
801 scic
->phy_table
[index
].phy_index
, phy_status
);
808 static enum sci_status
scic_sds_controller_stop_devices(struct scic_sds_controller
*scic
)
811 enum sci_status status
;
812 enum sci_status device_status
;
814 status
= SCI_SUCCESS
;
816 for (index
= 0; index
< scic
->remote_node_entries
; index
++) {
817 if (scic
->device_table
[index
] != NULL
) {
818 /* / @todo What timeout value do we want to provide to this request? */
819 device_status
= scic_remote_device_stop(scic
->device_table
[index
], 0);
821 if ((device_status
!= SCI_SUCCESS
) &&
822 (device_status
!= SCI_FAILURE_INVALID_STATE
)) {
823 dev_warn(scic_to_dev(scic
),
824 "%s: Controller stop operation failed "
825 "to stop device 0x%p because of "
828 scic
->device_table
[index
], device_status
);
836 static void scic_sds_controller_power_control_timer_start(struct scic_sds_controller
*scic
)
838 isci_timer_start(scic
->power_control
.timer
,
839 SCIC_SDS_CONTROLLER_POWER_CONTROL_INTERVAL
);
841 scic
->power_control
.timer_started
= true;
844 static void scic_sds_controller_power_control_timer_stop(struct scic_sds_controller
*scic
)
846 if (scic
->power_control
.timer_started
) {
847 isci_timer_stop(scic
->power_control
.timer
);
848 scic
->power_control
.timer_started
= false;
852 static void scic_sds_controller_power_control_timer_restart(struct scic_sds_controller
*scic
)
854 scic_sds_controller_power_control_timer_stop(scic
);
855 scic_sds_controller_power_control_timer_start(scic
);
858 static void scic_sds_controller_power_control_timer_handler(
861 struct scic_sds_controller
*this_controller
;
863 this_controller
= (struct scic_sds_controller
*)controller
;
865 this_controller
->power_control
.phys_granted_power
= 0;
867 if (this_controller
->power_control
.phys_waiting
== 0) {
868 this_controller
->power_control
.timer_started
= false;
870 struct scic_sds_phy
*the_phy
= NULL
;
875 && (this_controller
->power_control
.phys_waiting
!= 0);
877 if (this_controller
->power_control
.requesters
[i
] != NULL
) {
878 if (this_controller
->power_control
.phys_granted_power
<
879 this_controller
->oem_parameters
.sds1
.controller
.max_concurrent_dev_spin_up
) {
880 the_phy
= this_controller
->power_control
.requesters
[i
];
881 this_controller
->power_control
.requesters
[i
] = NULL
;
882 this_controller
->power_control
.phys_waiting
--;
883 this_controller
->power_control
.phys_granted_power
++;
884 scic_sds_phy_consume_power_handler(the_phy
);
892 * It doesn't matter if the power list is empty, we need to start the
893 * timer in case another phy becomes ready.
895 scic_sds_controller_power_control_timer_start(this_controller
);
900 * This method inserts the phy in the stagger spinup control queue.
905 void scic_sds_controller_power_control_queue_insert(
906 struct scic_sds_controller
*this_controller
,
907 struct scic_sds_phy
*the_phy
)
909 BUG_ON(the_phy
== NULL
);
911 if (this_controller
->power_control
.phys_granted_power
<
912 this_controller
->oem_parameters
.sds1
.controller
.max_concurrent_dev_spin_up
) {
913 this_controller
->power_control
.phys_granted_power
++;
914 scic_sds_phy_consume_power_handler(the_phy
);
917 * stop and start the power_control timer. When the timer fires, the
918 * no_of_phys_granted_power will be set to 0
920 scic_sds_controller_power_control_timer_restart(this_controller
);
922 /* Add the phy in the waiting list */
923 this_controller
->power_control
.requesters
[the_phy
->phy_index
] = the_phy
;
924 this_controller
->power_control
.phys_waiting
++;
929 * This method removes the phy from the stagger spinup control queue.
934 void scic_sds_controller_power_control_queue_remove(
935 struct scic_sds_controller
*this_controller
,
936 struct scic_sds_phy
*the_phy
)
938 BUG_ON(the_phy
== NULL
);
940 if (this_controller
->power_control
.requesters
[the_phy
->phy_index
] != NULL
) {
941 this_controller
->power_control
.phys_waiting
--;
944 this_controller
->power_control
.requesters
[the_phy
->phy_index
] = NULL
;
948 * ****************************************************************************-
949 * * SCIC SDS Controller Completion Routines
950 * ****************************************************************************- */
953 * This method returns a true value if the completion queue has entries that
957 * bool true if the completion queue has entries to process false if the
958 * completion queue has no entries to process
960 static bool scic_sds_controller_completion_queue_has_entries(
961 struct scic_sds_controller
*this_controller
)
963 u32 get_value
= this_controller
->completion_queue_get
;
964 u32 get_index
= get_value
& SMU_COMPLETION_QUEUE_GET_POINTER_MASK
;
967 NORMALIZE_GET_POINTER_CYCLE_BIT(get_value
)
968 == COMPLETION_QUEUE_CYCLE_BIT(this_controller
->completion_queue
[get_index
])
977 * This method processes a task completion notification. This is called from
978 * within the controller completion handler.
983 static void scic_sds_controller_task_completion(
984 struct scic_sds_controller
*this_controller
,
985 u32 completion_entry
)
988 struct scic_sds_request
*io_request
;
990 index
= SCU_GET_COMPLETION_INDEX(completion_entry
);
991 io_request
= this_controller
->io_request_table
[index
];
993 /* Make sure that we really want to process this IO request */
996 && (io_request
->io_tag
!= SCI_CONTROLLER_INVALID_IO_TAG
)
998 scic_sds_io_tag_get_sequence(io_request
->io_tag
)
999 == this_controller
->io_request_sequence
[index
]
1002 /* Yep this is a valid io request pass it along to the io request handler */
1003 scic_sds_io_request_tc_completion(io_request
, completion_entry
);
1008 * This method processes an SDMA completion event. This is called from within
1009 * the controller completion handler.
1011 * @completion_entry:
1014 static void scic_sds_controller_sdma_completion(
1015 struct scic_sds_controller
*this_controller
,
1016 u32 completion_entry
)
1019 struct scic_sds_request
*io_request
;
1020 struct scic_sds_remote_device
*device
;
1022 index
= SCU_GET_COMPLETION_INDEX(completion_entry
);
1024 switch (scu_get_command_request_type(completion_entry
)) {
1025 case SCU_CONTEXT_COMMAND_REQUEST_TYPE_POST_TC
:
1026 case SCU_CONTEXT_COMMAND_REQUEST_TYPE_DUMP_TC
:
1027 io_request
= this_controller
->io_request_table
[index
];
1028 dev_warn(scic_to_dev(this_controller
),
1029 "%s: SCIC SDS Completion type SDMA %x for io request "
1034 /* @todo For a post TC operation we need to fail the IO
1039 case SCU_CONTEXT_COMMAND_REQUEST_TYPE_DUMP_RNC
:
1040 case SCU_CONTEXT_COMMAND_REQUEST_TYPE_OTHER_RNC
:
1041 case SCU_CONTEXT_COMMAND_REQUEST_TYPE_POST_RNC
:
1042 device
= this_controller
->device_table
[index
];
1043 dev_warn(scic_to_dev(this_controller
),
1044 "%s: SCIC SDS Completion type SDMA %x for remote "
1049 /* @todo For a port RNC operation we need to fail the
1055 dev_warn(scic_to_dev(this_controller
),
1056 "%s: SCIC SDS Completion unknown SDMA completion "
1068 * @completion_entry:
1070 * This method processes an unsolicited frame message. This is called from
1071 * within the controller completion handler. none
1073 static void scic_sds_controller_unsolicited_frame(
1074 struct scic_sds_controller
*this_controller
,
1075 u32 completion_entry
)
1080 struct scu_unsolicited_frame_header
*frame_header
;
1081 struct scic_sds_phy
*phy
;
1082 struct scic_sds_remote_device
*device
;
1084 enum sci_status result
= SCI_FAILURE
;
1086 frame_index
= SCU_GET_FRAME_INDEX(completion_entry
);
1089 = this_controller
->uf_control
.buffers
.array
[frame_index
].header
;
1090 this_controller
->uf_control
.buffers
.array
[frame_index
].state
1091 = UNSOLICITED_FRAME_IN_USE
;
1093 if (SCU_GET_FRAME_ERROR(completion_entry
)) {
1095 * / @todo If the IAF frame or SIGNATURE FIS frame has an error will
1096 * / this cause a problem? We expect the phy initialization will
1097 * / fail if there is an error in the frame. */
1098 scic_sds_controller_release_frame(this_controller
, frame_index
);
1102 if (frame_header
->is_address_frame
) {
1103 index
= SCU_GET_PROTOCOL_ENGINE_INDEX(completion_entry
);
1104 phy
= &this_controller
->phy_table
[index
];
1106 result
= scic_sds_phy_frame_handler(phy
, frame_index
);
1110 index
= SCU_GET_COMPLETION_INDEX(completion_entry
);
1112 if (index
== SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX
) {
1114 * This is a signature fis or a frame from a direct attached SATA
1115 * device that has not yet been created. In either case forwared
1116 * the frame to the PE and let it take care of the frame data. */
1117 index
= SCU_GET_PROTOCOL_ENGINE_INDEX(completion_entry
);
1118 phy
= &this_controller
->phy_table
[index
];
1119 result
= scic_sds_phy_frame_handler(phy
, frame_index
);
1121 if (index
< this_controller
->remote_node_entries
)
1122 device
= this_controller
->device_table
[index
];
1127 result
= scic_sds_remote_device_frame_handler(device
, frame_index
);
1129 scic_sds_controller_release_frame(this_controller
, frame_index
);
1133 if (result
!= SCI_SUCCESS
) {
1135 * / @todo Is there any reason to report some additional error message
1136 * / when we get this failure notifiction? */
1141 * This method processes an event completion entry. This is called from within
1142 * the controller completion handler.
1144 * @completion_entry:
1147 static void scic_sds_controller_event_completion(
1148 struct scic_sds_controller
*this_controller
,
1149 u32 completion_entry
)
1152 struct scic_sds_request
*io_request
;
1153 struct scic_sds_remote_device
*device
;
1154 struct scic_sds_phy
*phy
;
1156 index
= SCU_GET_COMPLETION_INDEX(completion_entry
);
1158 switch (scu_get_event_type(completion_entry
)) {
1159 case SCU_EVENT_TYPE_SMU_COMMAND_ERROR
:
1160 /* / @todo The driver did something wrong and we need to fix the condtion. */
1161 dev_err(scic_to_dev(this_controller
),
1162 "%s: SCIC Controller 0x%p received SMU command error "
1169 case SCU_EVENT_TYPE_SMU_PCQ_ERROR
:
1170 case SCU_EVENT_TYPE_SMU_ERROR
:
1171 case SCU_EVENT_TYPE_FATAL_MEMORY_ERROR
:
1173 * / @todo This is a hardware failure and its likely that we want to
1174 * / reset the controller. */
1175 dev_err(scic_to_dev(this_controller
),
1176 "%s: SCIC Controller 0x%p received fatal controller "
1183 case SCU_EVENT_TYPE_TRANSPORT_ERROR
:
1184 io_request
= this_controller
->io_request_table
[index
];
1185 scic_sds_io_request_event_handler(io_request
, completion_entry
);
1188 case SCU_EVENT_TYPE_PTX_SCHEDULE_EVENT
:
1189 switch (scu_get_event_specifier(completion_entry
)) {
1190 case SCU_EVENT_SPECIFIC_SMP_RESPONSE_NO_PE
:
1191 case SCU_EVENT_SPECIFIC_TASK_TIMEOUT
:
1192 io_request
= this_controller
->io_request_table
[index
];
1193 if (io_request
!= NULL
)
1194 scic_sds_io_request_event_handler(io_request
, completion_entry
);
1196 dev_warn(scic_to_dev(this_controller
),
1197 "%s: SCIC Controller 0x%p received "
1198 "event 0x%x for io request object "
1199 "that doesnt exist.\n",
1206 case SCU_EVENT_SPECIFIC_IT_NEXUS_TIMEOUT
:
1207 device
= this_controller
->device_table
[index
];
1209 scic_sds_remote_device_event_handler(device
, completion_entry
);
1211 dev_warn(scic_to_dev(this_controller
),
1212 "%s: SCIC Controller 0x%p received "
1213 "event 0x%x for remote device object "
1214 "that doesnt exist.\n",
1223 case SCU_EVENT_TYPE_BROADCAST_CHANGE
:
1225 * direct the broadcast change event to the phy first and then let
1226 * the phy redirect the broadcast change to the port object */
1227 case SCU_EVENT_TYPE_ERR_CNT_EVENT
:
1229 * direct error counter event to the phy object since that is where
1230 * we get the event notification. This is a type 4 event. */
1231 case SCU_EVENT_TYPE_OSSP_EVENT
:
1232 index
= SCU_GET_PROTOCOL_ENGINE_INDEX(completion_entry
);
1233 phy
= &this_controller
->phy_table
[index
];
1234 scic_sds_phy_event_handler(phy
, completion_entry
);
1237 case SCU_EVENT_TYPE_RNC_SUSPEND_TX
:
1238 case SCU_EVENT_TYPE_RNC_SUSPEND_TX_RX
:
1239 case SCU_EVENT_TYPE_RNC_OPS_MISC
:
1240 if (index
< this_controller
->remote_node_entries
) {
1241 device
= this_controller
->device_table
[index
];
1244 scic_sds_remote_device_event_handler(device
, completion_entry
);
1246 dev_err(scic_to_dev(this_controller
),
1247 "%s: SCIC Controller 0x%p received event 0x%x "
1248 "for remote device object 0x%0x that doesnt "
1258 dev_warn(scic_to_dev(this_controller
),
1259 "%s: SCIC Controller received unknown event code %x\n",
1267 * This method is a private routine for processing the completion queue entries.
1271 static void scic_sds_controller_process_completions(
1272 struct scic_sds_controller
*this_controller
)
1274 u32 completion_count
= 0;
1275 u32 completion_entry
;
1281 dev_dbg(scic_to_dev(this_controller
),
1282 "%s: completion queue begining get:0x%08x\n",
1284 this_controller
->completion_queue_get
);
1286 /* Get the component parts of the completion queue */
1287 get_index
= NORMALIZE_GET_POINTER(this_controller
->completion_queue_get
);
1288 get_cycle
= SMU_CQGR_CYCLE_BIT
& this_controller
->completion_queue_get
;
1290 event_index
= NORMALIZE_EVENT_POINTER(this_controller
->completion_queue_get
);
1291 event_cycle
= SMU_CQGR_EVENT_CYCLE_BIT
& this_controller
->completion_queue_get
;
1294 NORMALIZE_GET_POINTER_CYCLE_BIT(get_cycle
)
1295 == COMPLETION_QUEUE_CYCLE_BIT(this_controller
->completion_queue
[get_index
])
1299 completion_entry
= this_controller
->completion_queue
[get_index
];
1300 INCREMENT_COMPLETION_QUEUE_GET(this_controller
, get_index
, get_cycle
);
1302 dev_dbg(scic_to_dev(this_controller
),
1303 "%s: completion queue entry:0x%08x\n",
1307 switch (SCU_GET_COMPLETION_TYPE(completion_entry
)) {
1308 case SCU_COMPLETION_TYPE_TASK
:
1309 scic_sds_controller_task_completion(this_controller
, completion_entry
);
1312 case SCU_COMPLETION_TYPE_SDMA
:
1313 scic_sds_controller_sdma_completion(this_controller
, completion_entry
);
1316 case SCU_COMPLETION_TYPE_UFI
:
1317 scic_sds_controller_unsolicited_frame(this_controller
, completion_entry
);
1320 case SCU_COMPLETION_TYPE_EVENT
:
1321 INCREMENT_EVENT_QUEUE_GET(this_controller
, event_index
, event_cycle
);
1322 scic_sds_controller_event_completion(this_controller
, completion_entry
);
1325 case SCU_COMPLETION_TYPE_NOTIFY
:
1327 * Presently we do the same thing with a notify event that we do with the
1328 * other event codes. */
1329 INCREMENT_EVENT_QUEUE_GET(this_controller
, event_index
, event_cycle
);
1330 scic_sds_controller_event_completion(this_controller
, completion_entry
);
1334 dev_warn(scic_to_dev(this_controller
),
1335 "%s: SCIC Controller received unknown "
1336 "completion type %x\n",
1343 /* Update the get register if we completed one or more entries */
1344 if (completion_count
> 0) {
1345 this_controller
->completion_queue_get
=
1346 SMU_CQGR_GEN_BIT(ENABLE
)
1347 | SMU_CQGR_GEN_BIT(EVENT_ENABLE
)
1348 | event_cycle
| SMU_CQGR_GEN_VAL(EVENT_POINTER
, event_index
)
1349 | get_cycle
| SMU_CQGR_GEN_VAL(POINTER
, get_index
);
1351 writel(this_controller
->completion_queue_get
,
1352 &this_controller
->smu_registers
->completion_queue_get
);
1356 dev_dbg(scic_to_dev(this_controller
),
1357 "%s: completion queue ending get:0x%08x\n",
1359 this_controller
->completion_queue_get
);
1363 bool scic_sds_controller_isr(struct scic_sds_controller
*scic
)
1365 if (scic_sds_controller_completion_queue_has_entries(scic
)) {
1369 * we have a spurious interrupt it could be that we have already
1370 * emptied the completion queue from a previous interrupt */
1371 writel(SMU_ISR_COMPLETION
, &scic
->smu_registers
->interrupt_status
);
1374 * There is a race in the hardware that could cause us not to be notified
1375 * of an interrupt completion if we do not take this step. We will mask
1376 * then unmask the interrupts so if there is another interrupt pending
1377 * the clearing of the interrupt source we get the next interrupt message. */
1378 writel(0xFF000000, &scic
->smu_registers
->interrupt_mask
);
1379 writel(0, &scic
->smu_registers
->interrupt_mask
);
1385 void scic_sds_controller_completion_handler(struct scic_sds_controller
*scic
)
1387 /* Empty out the completion queue */
1388 if (scic_sds_controller_completion_queue_has_entries(scic
))
1389 scic_sds_controller_process_completions(scic
);
1391 /* Clear the interrupt and enable all interrupts again */
1392 writel(SMU_ISR_COMPLETION
, &scic
->smu_registers
->interrupt_status
);
1393 /* Could we write the value of SMU_ISR_COMPLETION? */
1394 writel(0xFF000000, &scic
->smu_registers
->interrupt_mask
);
1395 writel(0, &scic
->smu_registers
->interrupt_mask
);
1398 bool scic_sds_controller_error_isr(struct scic_sds_controller
*scic
)
1400 u32 interrupt_status
;
1403 readl(&scic
->smu_registers
->interrupt_status
);
1404 interrupt_status
&= (SMU_ISR_QUEUE_ERROR
| SMU_ISR_QUEUE_SUSPEND
);
1406 if (interrupt_status
!= 0) {
1408 * There is an error interrupt pending so let it through and handle
1409 * in the callback */
1414 * There is a race in the hardware that could cause us not to be notified
1415 * of an interrupt completion if we do not take this step. We will mask
1416 * then unmask the error interrupts so if there was another interrupt
1417 * pending we will be notified.
1418 * Could we write the value of (SMU_ISR_QUEUE_ERROR | SMU_ISR_QUEUE_SUSPEND)? */
1419 writel(0xff, &scic
->smu_registers
->interrupt_mask
);
1420 writel(0, &scic
->smu_registers
->interrupt_mask
);
1425 void scic_sds_controller_error_handler(struct scic_sds_controller
*scic
)
1427 u32 interrupt_status
;
1430 readl(&scic
->smu_registers
->interrupt_status
);
1432 if ((interrupt_status
& SMU_ISR_QUEUE_SUSPEND
) &&
1433 scic_sds_controller_completion_queue_has_entries(scic
)) {
1435 scic_sds_controller_process_completions(scic
);
1436 writel(SMU_ISR_QUEUE_SUSPEND
, &scic
->smu_registers
->interrupt_status
);
1438 dev_err(scic_to_dev(scic
), "%s: status: %#x\n", __func__
,
1441 sci_base_state_machine_change_state(&scic
->state_machine
,
1442 SCI_BASE_CONTROLLER_STATE_FAILED
);
1447 /* If we dont process any completions I am not sure that we want to do this.
1448 * We are in the middle of a hardware fault and should probably be reset.
1450 writel(0, &scic
->smu_registers
->interrupt_mask
);
1456 void scic_sds_controller_link_up(struct scic_sds_controller
*scic
,
1457 struct scic_sds_port
*port
, struct scic_sds_phy
*phy
)
1459 switch (scic
->state_machine
.current_state_id
) {
1460 case SCI_BASE_CONTROLLER_STATE_STARTING
:
1461 scic_sds_controller_phy_timer_stop(scic
);
1462 scic
->port_agent
.link_up_handler(scic
, &scic
->port_agent
,
1464 scic_sds_controller_start_next_phy(scic
);
1466 case SCI_BASE_CONTROLLER_STATE_READY
:
1467 scic
->port_agent
.link_up_handler(scic
, &scic
->port_agent
,
1471 dev_dbg(scic_to_dev(scic
),
1472 "%s: SCIC Controller linkup event from phy %d in "
1473 "unexpected state %d\n", __func__
, phy
->phy_index
,
1474 scic
->state_machine
.current_state_id
);
1478 void scic_sds_controller_link_down(struct scic_sds_controller
*scic
,
1479 struct scic_sds_port
*port
, struct scic_sds_phy
*phy
)
1481 switch (scic
->state_machine
.current_state_id
) {
1482 case SCI_BASE_CONTROLLER_STATE_STARTING
:
1483 case SCI_BASE_CONTROLLER_STATE_READY
:
1484 scic
->port_agent
.link_down_handler(scic
, &scic
->port_agent
,
1488 dev_dbg(scic_to_dev(scic
),
1489 "%s: SCIC Controller linkdown event from phy %d in "
1490 "unexpected state %d\n",
1493 scic
->state_machine
.current_state_id
);
1498 * This is a helper method to determine if any remote devices on this
1499 * controller are still in the stopping state.
1502 static bool scic_sds_controller_has_remote_devices_stopping(
1503 struct scic_sds_controller
*controller
)
1507 for (index
= 0; index
< controller
->remote_node_entries
; index
++) {
1508 if ((controller
->device_table
[index
] != NULL
) &&
1509 (controller
->device_table
[index
]->state_machine
.current_state_id
1510 == SCI_BASE_REMOTE_DEVICE_STATE_STOPPING
))
1518 * This method is called by the remote device to inform the controller
1519 * object that the remote device has stopped.
1521 void scic_sds_controller_remote_device_stopped(struct scic_sds_controller
*scic
,
1522 struct scic_sds_remote_device
*sci_dev
)
1524 if (scic
->state_machine
.current_state_id
!=
1525 SCI_BASE_CONTROLLER_STATE_STOPPING
) {
1526 dev_dbg(scic_to_dev(scic
),
1527 "SCIC Controller 0x%p remote device stopped event "
1528 "from device 0x%p in unexpected state %d\n",
1530 scic
->state_machine
.current_state_id
);
1534 if (!scic_sds_controller_has_remote_devices_stopping(scic
)) {
1535 sci_base_state_machine_change_state(&scic
->state_machine
,
1536 SCI_BASE_CONTROLLER_STATE_STOPPED
);
1541 * This method will write to the SCU PCP register the request value. The method
1542 * is used to suspend/resume ports, devices, and phys.
1547 void scic_sds_controller_post_request(
1548 struct scic_sds_controller
*this_controller
,
1551 dev_dbg(scic_to_dev(this_controller
),
1552 "%s: SCIC Controller 0x%p post request 0x%08x\n",
1557 writel(request
, &this_controller
->smu_registers
->post_context_port
);
1561 * This method will copy the soft copy of the task context into the physical
1562 * memory accessible by the controller.
1563 * @this_controller: This parameter specifies the controller for which to copy
1565 * @this_request: This parameter specifies the request for which the task
1566 * context is being copied.
1568 * After this call is made the SCIC_SDS_IO_REQUEST object will always point to
1569 * the physical memory version of the task context. Thus, all subsequent
1570 * updates to the task context are performed in the TC table (i.e. DMAable
1573 void scic_sds_controller_copy_task_context(
1574 struct scic_sds_controller
*this_controller
,
1575 struct scic_sds_request
*this_request
)
1577 struct scu_task_context
*task_context_buffer
;
1579 task_context_buffer
= scic_sds_controller_get_task_context_buffer(
1580 this_controller
, this_request
->io_tag
1584 task_context_buffer
,
1585 this_request
->task_context_buffer
,
1586 SCI_FIELD_OFFSET(struct scu_task_context
, sgl_snapshot_ac
)
1590 * Now that the soft copy of the TC has been copied into the TC
1591 * table accessible by the silicon. Thus, any further changes to
1592 * the TC (e.g. TC termination) occur in the appropriate location. */
1593 this_request
->task_context_buffer
= task_context_buffer
;
1597 * This method returns the task context buffer for the given io tag.
1601 * struct scu_task_context*
1603 struct scu_task_context
*scic_sds_controller_get_task_context_buffer(
1604 struct scic_sds_controller
*this_controller
,
1607 u16 task_index
= scic_sds_io_tag_get_index(io_tag
);
1609 if (task_index
< this_controller
->task_context_entries
) {
1610 return &this_controller
->task_context_table
[task_index
];
1617 * This method returnst the sequence value from the io tag value
1625 * This method returns the IO request associated with the tag value
1629 * SCIC_SDS_IO_REQUEST_T* NULL if there is no valid IO request at the tag value
1631 struct scic_sds_request
*scic_sds_controller_get_io_request_from_tag(
1632 struct scic_sds_controller
*this_controller
,
1638 task_index
= scic_sds_io_tag_get_index(io_tag
);
1640 if (task_index
< this_controller
->task_context_entries
) {
1641 if (this_controller
->io_request_table
[task_index
] != NULL
) {
1642 task_sequence
= scic_sds_io_tag_get_sequence(io_tag
);
1644 if (task_sequence
== this_controller
->io_request_sequence
[task_index
]) {
1645 return this_controller
->io_request_table
[task_index
];
1654 * This method allocates remote node index and the reserves the remote node
1655 * context space for use. This method can fail if there are no more remote
1656 * node index available.
1657 * @this_controller: This is the controller object which contains the set of
1658 * free remote node ids
1659 * @the_devce: This is the device object which is requesting the a remote node
1661 * @node_id: This is the remote node id that is assinged to the device if one
1664 * enum sci_status SCI_FAILURE_OUT_OF_RESOURCES if there are no available remote
1665 * node index available.
1667 enum sci_status
scic_sds_controller_allocate_remote_node_context(
1668 struct scic_sds_controller
*this_controller
,
1669 struct scic_sds_remote_device
*the_device
,
1673 u32 remote_node_count
= scic_sds_remote_device_node_count(the_device
);
1675 node_index
= scic_sds_remote_node_table_allocate_remote_node(
1676 &this_controller
->available_remote_nodes
, remote_node_count
1679 if (node_index
!= SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX
) {
1680 this_controller
->device_table
[node_index
] = the_device
;
1682 *node_id
= node_index
;
1687 return SCI_FAILURE_INSUFFICIENT_RESOURCES
;
1691 * This method frees the remote node index back to the available pool. Once
1692 * this is done the remote node context buffer is no longer valid and can
1699 void scic_sds_controller_free_remote_node_context(
1700 struct scic_sds_controller
*this_controller
,
1701 struct scic_sds_remote_device
*the_device
,
1704 u32 remote_node_count
= scic_sds_remote_device_node_count(the_device
);
1706 if (this_controller
->device_table
[node_id
] == the_device
) {
1707 this_controller
->device_table
[node_id
] = NULL
;
1709 scic_sds_remote_node_table_release_remote_node_index(
1710 &this_controller
->available_remote_nodes
, remote_node_count
, node_id
1716 * This method returns the union scu_remote_node_context for the specified remote
1721 * union scu_remote_node_context*
1723 union scu_remote_node_context
*scic_sds_controller_get_remote_node_context_buffer(
1724 struct scic_sds_controller
*this_controller
,
1728 (node_id
< this_controller
->remote_node_entries
)
1729 && (this_controller
->device_table
[node_id
] != NULL
)
1731 return &this_controller
->remote_node_context_table
[node_id
];
1739 * @resposne_buffer: This is the buffer into which the D2H register FIS will be
1741 * @frame_header: This is the frame header returned by the hardware.
1742 * @frame_buffer: This is the frame buffer returned by the hardware.
1744 * This method will combind the frame header and frame buffer to create a SATA
1745 * D2H register FIS none
1747 void scic_sds_controller_copy_sata_response(
1748 void *response_buffer
,
1759 (char *)((char *)response_buffer
+ sizeof(u32
)),
1761 sizeof(struct sata_fis_reg_d2h
) - sizeof(u32
)
1766 * This method releases the frame once this is done the frame is available for
1767 * re-use by the hardware. The data contained in the frame header and frame
1768 * buffer is no longer valid. The UF queue get pointer is only updated if UF
1769 * control indicates this is appropriate.
1774 void scic_sds_controller_release_frame(
1775 struct scic_sds_controller
*this_controller
,
1778 if (scic_sds_unsolicited_frame_control_release_frame(
1779 &this_controller
->uf_control
, frame_index
) == true)
1780 writel(this_controller
->uf_control
.get
,
1781 &this_controller
->scu_registers
->sdma
.unsolicited_frame_get_pointer
);
1785 * This method sets user parameters and OEM parameters to default values.
1786 * Users can override these values utilizing the scic_user_parameters_set()
1787 * and scic_oem_parameters_set() methods.
1788 * @scic: This parameter specifies the controller for which to set the
1789 * configuration parameters to their default values.
1792 static void scic_sds_controller_set_default_config_parameters(struct scic_sds_controller
*scic
)
1794 struct isci_host
*ihost
= sci_object_get_association(scic
);
1797 /* Default to APC mode. */
1798 scic
->oem_parameters
.sds1
.controller
.mode_type
= SCIC_PORT_AUTOMATIC_CONFIGURATION_MODE
;
1800 /* Default to APC mode. */
1801 scic
->oem_parameters
.sds1
.controller
.max_concurrent_dev_spin_up
= 1;
1803 /* Default to no SSC operation. */
1804 scic
->oem_parameters
.sds1
.controller
.do_enable_ssc
= false;
1806 /* Initialize all of the port parameter information to narrow ports. */
1807 for (index
= 0; index
< SCI_MAX_PORTS
; index
++) {
1808 scic
->oem_parameters
.sds1
.ports
[index
].phy_mask
= 0;
1811 /* Initialize all of the phy parameter information. */
1812 for (index
= 0; index
< SCI_MAX_PHYS
; index
++) {
1813 /* Default to 6G (i.e. Gen 3) for now. */
1814 scic
->user_parameters
.sds1
.phys
[index
].max_speed_generation
= 3;
1816 /* the frequencies cannot be 0 */
1817 scic
->user_parameters
.sds1
.phys
[index
].align_insertion_frequency
= 0x7f;
1818 scic
->user_parameters
.sds1
.phys
[index
].in_connection_align_insertion_frequency
= 0xff;
1819 scic
->user_parameters
.sds1
.phys
[index
].notify_enable_spin_up_insertion_frequency
= 0x33;
1822 * Previous Vitesse based expanders had a arbitration issue that
1823 * is worked around by having the upper 32-bits of SAS address
1824 * with a value greater then the Vitesse company identifier.
1825 * Hence, usage of 0x5FCFFFFF. */
1826 scic
->oem_parameters
.sds1
.phys
[index
].sas_address
.low
= 0x1 + ihost
->id
;
1827 scic
->oem_parameters
.sds1
.phys
[index
].sas_address
.high
= 0x5FCFFFFF;
1830 scic
->user_parameters
.sds1
.stp_inactivity_timeout
= 5;
1831 scic
->user_parameters
.sds1
.ssp_inactivity_timeout
= 5;
1832 scic
->user_parameters
.sds1
.stp_max_occupancy_timeout
= 5;
1833 scic
->user_parameters
.sds1
.ssp_max_occupancy_timeout
= 20;
1834 scic
->user_parameters
.sds1
.no_outbound_task_timeout
= 20;
1838 * scic_controller_get_suggested_start_timeout() - This method returns the
1839 * suggested scic_controller_start() timeout amount. The user is free to
1840 * use any timeout value, but this method provides the suggested minimum
1841 * start timeout value. The returned value is based upon empirical
1842 * information determined as a result of interoperability testing.
1843 * @controller: the handle to the controller object for which to return the
1844 * suggested start timeout.
1846 * This method returns the number of milliseconds for the suggested start
1847 * operation timeout.
1849 u32
scic_controller_get_suggested_start_timeout(
1850 struct scic_sds_controller
*sc
)
1852 /* Validate the user supplied parameters. */
1857 * The suggested minimum timeout value for a controller start operation:
1859 * Signature FIS Timeout
1860 * + Phy Start Timeout
1861 * + Number of Phy Spin Up Intervals
1862 * ---------------------------------
1863 * Number of milliseconds for the controller start operation.
1865 * NOTE: The number of phy spin up intervals will be equivalent
1866 * to the number of phys divided by the number phys allowed
1867 * per interval - 1 (once OEM parameters are supported).
1868 * Currently we assume only 1 phy per interval. */
1870 return SCIC_SDS_SIGNATURE_FIS_TIMEOUT
1871 + SCIC_SDS_CONTROLLER_PHY_START_TIMEOUT
1872 + ((SCI_MAX_PHYS
- 1) * SCIC_SDS_CONTROLLER_POWER_CONTROL_INTERVAL
);
1876 * scic_controller_stop() - This method will stop an individual controller
1877 * object.This method will invoke the associated user callback upon
1878 * completion. The completion callback is called when the following
1879 * conditions are met: -# the method return status is SCI_SUCCESS. -# the
1880 * controller has been quiesced. This method will ensure that all IO
1881 * requests are quiesced, phys are stopped, and all additional operation by
1882 * the hardware is halted.
1883 * @controller: the handle to the controller object to stop.
1884 * @timeout: This parameter specifies the number of milliseconds in which the
1885 * stop operation should complete.
1887 * The controller must be in the STARTED or STOPPED state. Indicate if the
1888 * controller stop method succeeded or failed in some way. SCI_SUCCESS if the
1889 * stop operation successfully began. SCI_WARNING_ALREADY_IN_STATE if the
1890 * controller is already in the STOPPED state. SCI_FAILURE_INVALID_STATE if the
1891 * controller is not either in the STARTED or STOPPED states.
1893 enum sci_status
scic_controller_stop(
1894 struct scic_sds_controller
*scic
,
1897 if (scic
->state_machine
.current_state_id
!=
1898 SCI_BASE_CONTROLLER_STATE_READY
) {
1899 dev_warn(scic_to_dev(scic
),
1900 "SCIC Controller stop operation requested in "
1902 return SCI_FAILURE_INVALID_STATE
;
1905 isci_timer_start(scic
->timeout_timer
, timeout
);
1906 sci_base_state_machine_change_state(&scic
->state_machine
,
1907 SCI_BASE_CONTROLLER_STATE_STOPPING
);
1912 * scic_controller_reset() - This method will reset the supplied core
1913 * controller regardless of the state of said controller. This operation is
1914 * considered destructive. In other words, all current operations are wiped
1915 * out. No IO completions for outstanding devices occur. Outstanding IO
1916 * requests are not aborted or completed at the actual remote device.
1917 * @controller: the handle to the controller object to reset.
1919 * Indicate if the controller reset method succeeded or failed in some way.
1920 * SCI_SUCCESS if the reset operation successfully started. SCI_FATAL_ERROR if
1921 * the controller reset operation is unable to complete.
1923 enum sci_status
scic_controller_reset(
1924 struct scic_sds_controller
*scic
)
1926 switch (scic
->state_machine
.current_state_id
) {
1927 case SCI_BASE_CONTROLLER_STATE_RESET
:
1928 case SCI_BASE_CONTROLLER_STATE_READY
:
1929 case SCI_BASE_CONTROLLER_STATE_STOPPED
:
1930 case SCI_BASE_CONTROLLER_STATE_FAILED
:
1932 * The reset operation is not a graceful cleanup, just
1933 * perform the state transition.
1935 sci_base_state_machine_change_state(&scic
->state_machine
,
1936 SCI_BASE_CONTROLLER_STATE_RESETTING
);
1939 dev_warn(scic_to_dev(scic
),
1940 "SCIC Controller reset operation requested in "
1942 return SCI_FAILURE_INVALID_STATE
;
1947 * scic_controller_start_io() - This method is called by the SCI user to
1948 * send/start an IO request. If the method invocation is successful, then
1949 * the IO request has been queued to the hardware for processing.
1950 * @controller: the handle to the controller object for which to start an IO
1952 * @remote_device: the handle to the remote device object for which to start an
1954 * @io_request: the handle to the io request object to start.
1955 * @io_tag: This parameter specifies a previously allocated IO tag that the
1956 * user desires to be utilized for this request. This parameter is optional.
1957 * The user is allowed to supply SCI_CONTROLLER_INVALID_IO_TAG as the value
1958 * for this parameter.
1960 * - IO tags are a protected resource. It is incumbent upon the SCI Core user
1961 * to ensure that each of the methods that may allocate or free available IO
1962 * tags are handled in a mutually exclusive manner. This method is one of said
1963 * methods requiring proper critical code section protection (e.g. semaphore,
1964 * spin-lock, etc.). - For SATA, the user is required to manage NCQ tags. As a
1965 * result, it is expected the user will have set the NCQ tag field in the host
1966 * to device register FIS prior to calling this method. There is also a
1967 * requirement for the user to call scic_stp_io_set_ncq_tag() prior to invoking
1968 * the scic_controller_start_io() method. scic_controller_allocate_tag() for
1969 * more information on allocating a tag. Indicate if the controller
1970 * successfully started the IO request. SCI_IO_SUCCESS if the IO request was
1971 * successfully started. Determine the failure situations and return values.
1973 enum sci_io_status
scic_controller_start_io(
1974 struct scic_sds_controller
*scic
,
1975 struct scic_sds_remote_device
*rdev
,
1976 struct scic_sds_request
*req
,
1979 enum sci_status status
;
1981 if (scic
->state_machine
.current_state_id
!=
1982 SCI_BASE_CONTROLLER_STATE_READY
) {
1983 dev_warn(scic_to_dev(scic
), "invalid state to start I/O");
1984 return SCI_FAILURE_INVALID_STATE
;
1987 status
= scic_sds_remote_device_start_io(scic
, rdev
, req
);
1988 if (status
!= SCI_SUCCESS
)
1991 scic
->io_request_table
[scic_sds_io_tag_get_index(req
->io_tag
)] = req
;
1992 scic_sds_controller_post_request(scic
, scic_sds_request_get_post_context(req
));
1997 * scic_controller_terminate_request() - This method is called by the SCI Core
1998 * user to terminate an ongoing (i.e. started) core IO request. This does
1999 * not abort the IO request at the target, but rather removes the IO request
2000 * from the host controller.
2001 * @controller: the handle to the controller object for which to terminate a
2003 * @remote_device: the handle to the remote device object for which to
2004 * terminate a request.
2005 * @request: the handle to the io or task management request object to
2008 * Indicate if the controller successfully began the terminate process for the
2009 * IO request. SCI_SUCCESS if the terminate process was successfully started
2010 * for the request. Determine the failure situations and return values.
2012 enum sci_status
scic_controller_terminate_request(
2013 struct scic_sds_controller
*scic
,
2014 struct scic_sds_remote_device
*rdev
,
2015 struct scic_sds_request
*req
)
2017 enum sci_status status
;
2019 if (scic
->state_machine
.current_state_id
!=
2020 SCI_BASE_CONTROLLER_STATE_READY
) {
2021 dev_warn(scic_to_dev(scic
),
2022 "invalid state to terminate request\n");
2023 return SCI_FAILURE_INVALID_STATE
;
2026 status
= scic_sds_io_request_terminate(req
);
2027 if (status
!= SCI_SUCCESS
)
2031 * Utilize the original post context command and or in the POST_TC_ABORT
2034 scic_sds_controller_post_request(scic
,
2035 scic_sds_request_get_post_context(req
) |
2036 SCU_CONTEXT_COMMAND_REQUEST_POST_TC_ABORT
);
2041 * scic_controller_complete_io() - This method will perform core specific
2042 * completion operations for an IO request. After this method is invoked,
2043 * the user should consider the IO request as invalid until it is properly
2044 * reused (i.e. re-constructed).
2045 * @controller: The handle to the controller object for which to complete the
2047 * @remote_device: The handle to the remote device object for which to complete
2049 * @io_request: the handle to the io request object to complete.
2051 * - IO tags are a protected resource. It is incumbent upon the SCI Core user
2052 * to ensure that each of the methods that may allocate or free available IO
2053 * tags are handled in a mutually exclusive manner. This method is one of said
2054 * methods requiring proper critical code section protection (e.g. semaphore,
2055 * spin-lock, etc.). - If the IO tag for a request was allocated, by the SCI
2056 * Core user, using the scic_controller_allocate_io_tag() method, then it is
2057 * the responsibility of the caller to invoke the scic_controller_free_io_tag()
2058 * method to free the tag (i.e. this method will not free the IO tag). Indicate
2059 * if the controller successfully completed the IO request. SCI_SUCCESS if the
2060 * completion process was successful.
2062 enum sci_status
scic_controller_complete_io(
2063 struct scic_sds_controller
*scic
,
2064 struct scic_sds_remote_device
*rdev
,
2065 struct scic_sds_request
*request
)
2067 enum sci_status status
;
2070 switch (scic
->state_machine
.current_state_id
) {
2071 case SCI_BASE_CONTROLLER_STATE_STOPPING
:
2072 /* XXX: Implement this function */
2074 case SCI_BASE_CONTROLLER_STATE_READY
:
2075 status
= scic_sds_remote_device_complete_io(scic
, rdev
, request
);
2076 if (status
!= SCI_SUCCESS
)
2079 index
= scic_sds_io_tag_get_index(request
->io_tag
);
2080 scic
->io_request_table
[index
] = NULL
;
2083 dev_warn(scic_to_dev(scic
), "invalid state to complete I/O");
2084 return SCI_FAILURE_INVALID_STATE
;
2089 enum sci_status
scic_controller_continue_io(struct scic_sds_request
*sci_req
)
2091 struct scic_sds_controller
*scic
= sci_req
->owning_controller
;
2093 if (scic
->state_machine
.current_state_id
!=
2094 SCI_BASE_CONTROLLER_STATE_READY
) {
2095 dev_warn(scic_to_dev(scic
), "invalid state to continue I/O");
2096 return SCI_FAILURE_INVALID_STATE
;
2099 scic
->io_request_table
[scic_sds_io_tag_get_index(sci_req
->io_tag
)] = sci_req
;
2100 scic_sds_controller_post_request(scic
, scic_sds_request_get_post_context(sci_req
));
2105 * scic_controller_start_task() - This method is called by the SCIC user to
2106 * send/start a framework task management request.
2107 * @controller: the handle to the controller object for which to start the task
2108 * management request.
2109 * @remote_device: the handle to the remote device object for which to start
2110 * the task management request.
2111 * @task_request: the handle to the task request object to start.
2112 * @io_tag: This parameter specifies a previously allocated IO tag that the
2113 * user desires to be utilized for this request. Note this not the io_tag
2114 * of the request being managed. It is to be utilized for the task request
2115 * itself. This parameter is optional. The user is allowed to supply
2116 * SCI_CONTROLLER_INVALID_IO_TAG as the value for this parameter.
2118 * - IO tags are a protected resource. It is incumbent upon the SCI Core user
2119 * to ensure that each of the methods that may allocate or free available IO
2120 * tags are handled in a mutually exclusive manner. This method is one of said
2121 * methods requiring proper critical code section protection (e.g. semaphore,
2122 * spin-lock, etc.). - The user must synchronize this task with completion
2123 * queue processing. If they are not synchronized then it is possible for the
2124 * io requests that are being managed by the task request can complete before
2125 * starting the task request. scic_controller_allocate_tag() for more
2126 * information on allocating a tag. Indicate if the controller successfully
2127 * started the IO request. SCI_TASK_SUCCESS if the task request was
2128 * successfully started. SCI_TASK_FAILURE_REQUIRES_SCSI_ABORT This value is
2129 * returned if there is/are task(s) outstanding that require termination or
2130 * completion before this request can succeed.
2132 enum sci_task_status
scic_controller_start_task(
2133 struct scic_sds_controller
*scic
,
2134 struct scic_sds_remote_device
*rdev
,
2135 struct scic_sds_request
*req
,
2138 enum sci_status status
;
2140 if (scic
->state_machine
.current_state_id
!=
2141 SCI_BASE_CONTROLLER_STATE_READY
) {
2142 dev_warn(scic_to_dev(scic
),
2143 "%s: SCIC Controller starting task from invalid "
2146 return SCI_TASK_FAILURE_INVALID_STATE
;
2149 status
= scic_sds_remote_device_start_task(scic
, rdev
, req
);
2151 case SCI_FAILURE_RESET_DEVICE_PARTIAL_SUCCESS
:
2152 scic
->io_request_table
[scic_sds_io_tag_get_index(req
->io_tag
)] = req
;
2155 * We will let framework know this task request started successfully,
2156 * although core is still woring on starting the request (to post tc when
2161 scic
->io_request_table
[scic_sds_io_tag_get_index(req
->io_tag
)] = req
;
2163 scic_sds_controller_post_request(scic
,
2164 scic_sds_request_get_post_context(req
));
2174 * scic_controller_get_port_handle() - This method simply provides the user
2175 * with a unique handle for a given SAS/SATA core port index.
2176 * @controller: This parameter represents the handle to the controller object
2177 * from which to retrieve a port (SAS or SATA) handle.
2178 * @port_index: This parameter specifies the port index in the controller for
2179 * which to retrieve the port handle. 0 <= port_index < maximum number of
2181 * @port_handle: This parameter specifies the retrieved port handle to be
2182 * provided to the caller.
2184 * Indicate if the retrieval of the port handle was successful. SCI_SUCCESS
2185 * This value is returned if the retrieval was successful.
2186 * SCI_FAILURE_INVALID_PORT This value is returned if the supplied port id is
2187 * not in the supported range.
2189 enum sci_status
scic_controller_get_port_handle(
2190 struct scic_sds_controller
*scic
,
2192 struct scic_sds_port
**port_handle
)
2194 if (port_index
< scic
->logical_port_entries
) {
2195 *port_handle
= &scic
->port_table
[port_index
];
2200 return SCI_FAILURE_INVALID_PORT
;
2204 * scic_controller_get_phy_handle() - This method simply provides the user with
2205 * a unique handle for a given SAS/SATA phy index/identifier.
2206 * @controller: This parameter represents the handle to the controller object
2207 * from which to retrieve a phy (SAS or SATA) handle.
2208 * @phy_index: This parameter specifies the phy index in the controller for
2209 * which to retrieve the phy handle. 0 <= phy_index < maximum number of phys.
2210 * @phy_handle: This parameter specifies the retrieved phy handle to be
2211 * provided to the caller.
2213 * Indicate if the retrieval of the phy handle was successful. SCI_SUCCESS This
2214 * value is returned if the retrieval was successful. SCI_FAILURE_INVALID_PHY
2215 * This value is returned if the supplied phy id is not in the supported range.
2217 enum sci_status
scic_controller_get_phy_handle(
2218 struct scic_sds_controller
*scic
,
2220 struct scic_sds_phy
**phy_handle
)
2222 if (phy_index
< ARRAY_SIZE(scic
->phy_table
)) {
2223 *phy_handle
= &scic
->phy_table
[phy_index
];
2228 dev_err(scic_to_dev(scic
),
2229 "%s: Controller:0x%p PhyId:0x%x invalid phy index\n",
2230 __func__
, scic
, phy_index
);
2232 return SCI_FAILURE_INVALID_PHY
;
2236 * scic_controller_allocate_io_tag() - This method will allocate a tag from the
2237 * pool of free IO tags. Direct allocation of IO tags by the SCI Core user
2238 * is optional. The scic_controller_start_io() method will allocate an IO
2239 * tag if this method is not utilized and the tag is not supplied to the IO
2240 * construct routine. Direct allocation of IO tags may provide additional
2241 * performance improvements in environments capable of supporting this usage
2242 * model. Additionally, direct allocation of IO tags also provides
2243 * additional flexibility to the SCI Core user. Specifically, the user may
2244 * retain IO tags across the lives of multiple IO requests.
2245 * @controller: the handle to the controller object for which to allocate the
2248 * IO tags are a protected resource. It is incumbent upon the SCI Core user to
2249 * ensure that each of the methods that may allocate or free available IO tags
2250 * are handled in a mutually exclusive manner. This method is one of said
2251 * methods requiring proper critical code section protection (e.g. semaphore,
2252 * spin-lock, etc.). An unsigned integer representing an available IO tag.
2253 * SCI_CONTROLLER_INVALID_IO_TAG This value is returned if there are no
2254 * currently available tags to be allocated. All return other values indicate a
2257 u16
scic_controller_allocate_io_tag(
2258 struct scic_sds_controller
*scic
)
2263 if (!sci_pool_empty(scic
->tci_pool
)) {
2264 sci_pool_get(scic
->tci_pool
, task_context
);
2266 sequence_count
= scic
->io_request_sequence
[task_context
];
2268 return scic_sds_io_tag_construct(sequence_count
, task_context
);
2271 return SCI_CONTROLLER_INVALID_IO_TAG
;
2275 * scic_controller_free_io_tag() - This method will free an IO tag to the pool
2276 * of free IO tags. This method provides the SCI Core user more flexibility
2277 * with regards to IO tags. The user may desire to keep an IO tag after an
2278 * IO request has completed, because they plan on re-using the tag for a
2279 * subsequent IO request. This method is only legal if the tag was
2280 * allocated via scic_controller_allocate_io_tag().
2281 * @controller: This parameter specifies the handle to the controller object
2282 * for which to free/return the tag.
2283 * @io_tag: This parameter represents the tag to be freed to the pool of
2286 * - IO tags are a protected resource. It is incumbent upon the SCI Core user
2287 * to ensure that each of the methods that may allocate or free available IO
2288 * tags are handled in a mutually exclusive manner. This method is one of said
2289 * methods requiring proper critical code section protection (e.g. semaphore,
2290 * spin-lock, etc.). - If the IO tag for a request was allocated, by the SCI
2291 * Core user, using the scic_controller_allocate_io_tag() method, then it is
2292 * the responsibility of the caller to invoke this method to free the tag. This
2293 * method returns an indication of whether the tag was successfully put back
2294 * (freed) to the pool of available tags. SCI_SUCCESS This return value
2295 * indicates the tag was successfully placed into the pool of available IO
2296 * tags. SCI_FAILURE_INVALID_IO_TAG This value is returned if the supplied tag
2297 * is not a valid IO tag value.
2299 enum sci_status
scic_controller_free_io_tag(
2300 struct scic_sds_controller
*scic
,
2306 BUG_ON(io_tag
== SCI_CONTROLLER_INVALID_IO_TAG
);
2308 sequence
= scic_sds_io_tag_get_sequence(io_tag
);
2309 index
= scic_sds_io_tag_get_index(io_tag
);
2311 if (!sci_pool_full(scic
->tci_pool
)) {
2312 if (sequence
== scic
->io_request_sequence
[index
]) {
2313 scic_sds_io_sequence_increment(
2314 scic
->io_request_sequence
[index
]);
2316 sci_pool_put(scic
->tci_pool
, index
);
2322 return SCI_FAILURE_INVALID_IO_TAG
;
2325 void scic_controller_enable_interrupts(
2326 struct scic_sds_controller
*scic
)
2328 BUG_ON(scic
->smu_registers
== NULL
);
2329 writel(0, &scic
->smu_registers
->interrupt_mask
);
2332 void scic_controller_disable_interrupts(
2333 struct scic_sds_controller
*scic
)
2335 BUG_ON(scic
->smu_registers
== NULL
);
2336 writel(0xffffffff, &scic
->smu_registers
->interrupt_mask
);
2339 static enum sci_status
scic_controller_set_mode(
2340 struct scic_sds_controller
*scic
,
2341 enum sci_controller_mode operating_mode
)
2343 enum sci_status status
= SCI_SUCCESS
;
2345 if ((scic
->state_machine
.current_state_id
==
2346 SCI_BASE_CONTROLLER_STATE_INITIALIZING
) ||
2347 (scic
->state_machine
.current_state_id
==
2348 SCI_BASE_CONTROLLER_STATE_INITIALIZED
)) {
2349 switch (operating_mode
) {
2350 case SCI_MODE_SPEED
:
2351 scic
->remote_node_entries
= SCI_MAX_REMOTE_DEVICES
;
2352 scic
->task_context_entries
= SCU_IO_REQUEST_COUNT
;
2353 scic
->uf_control
.buffers
.count
=
2354 SCU_UNSOLICITED_FRAME_COUNT
;
2355 scic
->completion_event_entries
= SCU_EVENT_COUNT
;
2356 scic
->completion_queue_entries
=
2357 SCU_COMPLETION_QUEUE_COUNT
;
2361 scic
->remote_node_entries
= SCI_MIN_REMOTE_DEVICES
;
2362 scic
->task_context_entries
= SCI_MIN_IO_REQUESTS
;
2363 scic
->uf_control
.buffers
.count
=
2364 SCU_MIN_UNSOLICITED_FRAMES
;
2365 scic
->completion_event_entries
= SCU_MIN_EVENTS
;
2366 scic
->completion_queue_entries
=
2367 SCU_MIN_COMPLETION_QUEUE_ENTRIES
;
2371 status
= SCI_FAILURE_INVALID_PARAMETER_VALUE
;
2375 status
= SCI_FAILURE_INVALID_STATE
;
2381 * scic_sds_controller_reset_hardware() -
2383 * This method will reset the controller hardware.
2385 static void scic_sds_controller_reset_hardware(
2386 struct scic_sds_controller
*scic
)
2388 /* Disable interrupts so we dont take any spurious interrupts */
2389 scic_controller_disable_interrupts(scic
);
2392 writel(0xFFFFFFFF, &scic
->smu_registers
->soft_reset_control
);
2394 /* Delay for 1ms to before clearing the CQP and UFQPR. */
2397 /* The write to the CQGR clears the CQP */
2398 writel(0x00000000, &scic
->smu_registers
->completion_queue_get
);
2400 /* The write to the UFQGP clears the UFQPR */
2401 writel(0, &scic
->scu_registers
->sdma
.unsolicited_frame_get_pointer
);
2404 enum sci_status
scic_user_parameters_set(
2405 struct scic_sds_controller
*scic
,
2406 union scic_user_parameters
*scic_parms
)
2408 u32 state
= scic
->state_machine
.current_state_id
;
2410 if (state
== SCI_BASE_CONTROLLER_STATE_RESET
||
2411 state
== SCI_BASE_CONTROLLER_STATE_INITIALIZING
||
2412 state
== SCI_BASE_CONTROLLER_STATE_INITIALIZED
) {
2416 * Validate the user parameters. If they are not legal, then
2419 for (index
= 0; index
< SCI_MAX_PHYS
; index
++) {
2420 struct sci_phy_user_params
*user_phy
;
2422 user_phy
= &scic_parms
->sds1
.phys
[index
];
2424 if (!((user_phy
->max_speed_generation
<=
2425 SCIC_SDS_PARM_MAX_SPEED
) &&
2426 (user_phy
->max_speed_generation
>
2427 SCIC_SDS_PARM_NO_SPEED
)))
2428 return SCI_FAILURE_INVALID_PARAMETER_VALUE
;
2430 if (user_phy
->in_connection_align_insertion_frequency
<
2432 return SCI_FAILURE_INVALID_PARAMETER_VALUE
;
2434 if ((user_phy
->in_connection_align_insertion_frequency
<
2436 (user_phy
->align_insertion_frequency
== 0) ||
2438 notify_enable_spin_up_insertion_frequency
==
2440 return SCI_FAILURE_INVALID_PARAMETER_VALUE
;
2443 if ((scic_parms
->sds1
.stp_inactivity_timeout
== 0) ||
2444 (scic_parms
->sds1
.ssp_inactivity_timeout
== 0) ||
2445 (scic_parms
->sds1
.stp_max_occupancy_timeout
== 0) ||
2446 (scic_parms
->sds1
.ssp_max_occupancy_timeout
== 0) ||
2447 (scic_parms
->sds1
.no_outbound_task_timeout
== 0))
2448 return SCI_FAILURE_INVALID_PARAMETER_VALUE
;
2450 memcpy(&scic
->user_parameters
, scic_parms
, sizeof(*scic_parms
));
2455 return SCI_FAILURE_INVALID_STATE
;
2458 enum sci_status
scic_oem_parameters_set(
2459 struct scic_sds_controller
*scic
,
2460 union scic_oem_parameters
*scic_parms
)
2462 u32 state
= scic
->state_machine
.current_state_id
;
2464 if (state
== SCI_BASE_CONTROLLER_STATE_RESET
||
2465 state
== SCI_BASE_CONTROLLER_STATE_INITIALIZING
||
2466 state
== SCI_BASE_CONTROLLER_STATE_INITIALIZED
) {
2468 u8 combined_phy_mask
= 0;
2471 * Validate the oem parameters. If they are not legal, then
2472 * return a failure. */
2473 for (index
= 0; index
< SCI_MAX_PORTS
; index
++) {
2474 if (scic_parms
->sds1
.ports
[index
].phy_mask
> SCIC_SDS_PARM_PHY_MASK_MAX
)
2475 return SCI_FAILURE_INVALID_PARAMETER_VALUE
;
2478 for (index
= 0; index
< SCI_MAX_PHYS
; index
++) {
2479 if ((scic_parms
->sds1
.phys
[index
].sas_address
.high
== 0) &&
2480 (scic_parms
->sds1
.phys
[index
].sas_address
.low
== 0))
2481 return SCI_FAILURE_INVALID_PARAMETER_VALUE
;
2484 if (scic_parms
->sds1
.controller
.mode_type
==
2485 SCIC_PORT_AUTOMATIC_CONFIGURATION_MODE
) {
2486 for (index
= 0; index
< SCI_MAX_PHYS
; index
++) {
2487 if (scic_parms
->sds1
.ports
[index
].phy_mask
!= 0)
2488 return SCI_FAILURE_INVALID_PARAMETER_VALUE
;
2490 } else if (scic_parms
->sds1
.controller
.mode_type
==
2491 SCIC_PORT_MANUAL_CONFIGURATION_MODE
) {
2492 for (index
= 0; index
< SCI_MAX_PHYS
; index
++)
2493 combined_phy_mask
|= scic_parms
->sds1
.ports
[index
].phy_mask
;
2495 if (combined_phy_mask
== 0)
2496 return SCI_FAILURE_INVALID_PARAMETER_VALUE
;
2498 return SCI_FAILURE_INVALID_PARAMETER_VALUE
;
2500 if (scic_parms
->sds1
.controller
.max_concurrent_dev_spin_up
>
2501 MAX_CONCURRENT_DEVICE_SPIN_UP_COUNT
)
2502 return SCI_FAILURE_INVALID_PARAMETER_VALUE
;
2504 scic
->oem_parameters
.sds1
= scic_parms
->sds1
;
2509 return SCI_FAILURE_INVALID_STATE
;
2512 void scic_oem_parameters_get(
2513 struct scic_sds_controller
*scic
,
2514 union scic_oem_parameters
*scic_parms
)
2516 memcpy(scic_parms
, (&scic
->oem_parameters
), sizeof(*scic_parms
));
2519 #define INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_LOWER_BOUND_NS 853
2520 #define INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_UPPER_BOUND_NS 1280
2521 #define INTERRUPT_COALESCE_TIMEOUT_MAX_US 2700000
2522 #define INTERRUPT_COALESCE_NUMBER_MAX 256
2523 #define INTERRUPT_COALESCE_TIMEOUT_ENCODE_MIN 7
2524 #define INTERRUPT_COALESCE_TIMEOUT_ENCODE_MAX 28
2527 * scic_controller_set_interrupt_coalescence() - This method allows the user to
2528 * configure the interrupt coalescence.
2529 * @controller: This parameter represents the handle to the controller object
2530 * for which its interrupt coalesce register is overridden.
2531 * @coalesce_number: Used to control the number of entries in the Completion
2532 * Queue before an interrupt is generated. If the number of entries exceed
2533 * this number, an interrupt will be generated. The valid range of the input
2534 * is [0, 256]. A setting of 0 results in coalescing being disabled.
2535 * @coalesce_timeout: Timeout value in microseconds. The valid range of the
2536 * input is [0, 2700000] . A setting of 0 is allowed and results in no
2537 * interrupt coalescing timeout.
2539 * Indicate if the user successfully set the interrupt coalesce parameters.
2540 * SCI_SUCCESS The user successfully updated the interrutp coalescence.
2541 * SCI_FAILURE_INVALID_PARAMETER_VALUE The user input value is out of range.
2543 static enum sci_status
scic_controller_set_interrupt_coalescence(
2544 struct scic_sds_controller
*scic_controller
,
2545 u32 coalesce_number
,
2546 u32 coalesce_timeout
)
2548 u8 timeout_encode
= 0;
2552 /* Check if the input parameters fall in the range. */
2553 if (coalesce_number
> INTERRUPT_COALESCE_NUMBER_MAX
)
2554 return SCI_FAILURE_INVALID_PARAMETER_VALUE
;
2557 * Defined encoding for interrupt coalescing timeout:
2558 * Value Min Max Units
2559 * ----- --- --- -----
2589 * Others Undefined */
2592 * Use the table above to decide the encode of interrupt coalescing timeout
2593 * value for register writing. */
2594 if (coalesce_timeout
== 0)
2597 /* make the timeout value in unit of (10 ns). */
2598 coalesce_timeout
= coalesce_timeout
* 100;
2599 min
= INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_LOWER_BOUND_NS
/ 10;
2600 max
= INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_UPPER_BOUND_NS
/ 10;
2602 /* get the encode of timeout for register writing. */
2603 for (timeout_encode
= INTERRUPT_COALESCE_TIMEOUT_ENCODE_MIN
;
2604 timeout_encode
<= INTERRUPT_COALESCE_TIMEOUT_ENCODE_MAX
;
2606 if (min
<= coalesce_timeout
&& max
> coalesce_timeout
)
2608 else if (coalesce_timeout
>= max
&& coalesce_timeout
< min
* 2
2609 && coalesce_timeout
<= INTERRUPT_COALESCE_TIMEOUT_MAX_US
* 100) {
2610 if ((coalesce_timeout
- max
) < (2 * min
- coalesce_timeout
))
2622 if (timeout_encode
== INTERRUPT_COALESCE_TIMEOUT_ENCODE_MAX
+ 1)
2623 /* the value is out of range. */
2624 return SCI_FAILURE_INVALID_PARAMETER_VALUE
;
2627 writel(SMU_ICC_GEN_VAL(NUMBER
, coalesce_number
) |
2628 SMU_ICC_GEN_VAL(TIMER
, timeout_encode
),
2629 &scic_controller
->smu_registers
->interrupt_coalesce_control
);
2632 scic_controller
->interrupt_coalesce_number
= (u16
)coalesce_number
;
2633 scic_controller
->interrupt_coalesce_timeout
= coalesce_timeout
/ 100;
2639 struct scic_sds_controller
*scic_controller_alloc(struct device
*dev
)
2641 return devm_kzalloc(dev
, sizeof(struct scic_sds_controller
), GFP_KERNEL
);
2644 enum sci_status
scic_controller_initialize(
2645 struct scic_sds_controller
*scic
)
2647 struct sci_base_state_machine
*sm
= &scic
->state_machine
;
2648 enum sci_status result
= SCI_SUCCESS
;
2649 struct isci_host
*ihost
;
2652 if (scic
->state_machine
.current_state_id
!=
2653 SCI_BASE_CONTROLLER_STATE_RESET
) {
2654 dev_warn(scic_to_dev(scic
),
2655 "SCIC Controller initialize operation requested "
2656 "in invalid state\n");
2657 return SCI_FAILURE_INVALID_STATE
;
2661 ihost
= sci_object_get_association(scic
);
2663 sci_base_state_machine_change_state(sm
, SCI_BASE_CONTROLLER_STATE_INITIALIZING
);
2665 scic
->timeout_timer
= isci_timer_create(ihost
,
2667 scic_sds_controller_timeout_handler
);
2669 scic_sds_controller_initialize_phy_startup(scic
);
2671 scic_sds_controller_initialize_power_control(scic
);
2674 * There is nothing to do here for B0 since we do not have to
2675 * program the AFE registers.
2676 * / @todo The AFE settings are supposed to be correct for the B0 but
2677 * / presently they seem to be wrong. */
2678 scic_sds_controller_afe_initialization(scic
);
2680 if (result
== SCI_SUCCESS
) {
2684 /* Take the hardware out of reset */
2685 writel(0, &scic
->smu_registers
->soft_reset_control
);
2688 * / @todo Provide meaningfull error code for hardware failure
2689 * result = SCI_FAILURE_CONTROLLER_HARDWARE; */
2690 result
= SCI_FAILURE
;
2691 terminate_loop
= 100;
2693 while (terminate_loop
-- && (result
!= SCI_SUCCESS
)) {
2694 /* Loop until the hardware reports success */
2695 udelay(SCU_CONTEXT_RAM_INIT_STALL_TIME
);
2696 status
= readl(&scic
->smu_registers
->control_status
);
2698 if ((status
& SCU_RAM_INIT_COMPLETED
) ==
2699 SCU_RAM_INIT_COMPLETED
)
2700 result
= SCI_SUCCESS
;
2704 if (result
== SCI_SUCCESS
) {
2705 u32 max_supported_ports
;
2706 u32 max_supported_devices
;
2707 u32 max_supported_io_requests
;
2708 u32 device_context_capacity
;
2711 * Determine what are the actaul device capacities that the
2712 * hardware will support */
2713 device_context_capacity
=
2714 readl(&scic
->smu_registers
->device_context_capacity
);
2717 max_supported_ports
= smu_dcc_get_max_ports(device_context_capacity
);
2718 max_supported_devices
= smu_dcc_get_max_remote_node_context(device_context_capacity
);
2719 max_supported_io_requests
= smu_dcc_get_max_task_context(device_context_capacity
);
2722 * Make all PEs that are unassigned match up with the
2725 for (index
= 0; index
< max_supported_ports
; index
++) {
2726 struct scu_port_task_scheduler_group_registers
*ptsg
=
2727 &scic
->scu_registers
->peg0
.ptsg
;
2729 writel(index
, &ptsg
->protocol_engine
[index
]);
2732 /* Record the smaller of the two capacity values */
2733 scic
->logical_port_entries
=
2734 min(max_supported_ports
, scic
->logical_port_entries
);
2736 scic
->task_context_entries
=
2737 min(max_supported_io_requests
,
2738 scic
->task_context_entries
);
2740 scic
->remote_node_entries
=
2741 min(max_supported_devices
, scic
->remote_node_entries
);
2744 * Now that we have the correct hardware reported minimum values
2745 * build the MDL for the controller. Default to a performance
2748 scic_controller_set_mode(scic
, SCI_MODE_SPEED
);
2751 /* Initialize hardware PCI Relaxed ordering in DMA engines */
2752 if (result
== SCI_SUCCESS
) {
2753 u32 dma_configuration
;
2755 /* Configure the payload DMA */
2757 readl(&scic
->scu_registers
->sdma
.pdma_configuration
);
2758 dma_configuration
|=
2759 SCU_PDMACR_GEN_BIT(PCI_RELAXED_ORDERING_ENABLE
);
2760 writel(dma_configuration
,
2761 &scic
->scu_registers
->sdma
.pdma_configuration
);
2763 /* Configure the control DMA */
2765 readl(&scic
->scu_registers
->sdma
.cdma_configuration
);
2766 dma_configuration
|=
2767 SCU_CDMACR_GEN_BIT(PCI_RELAXED_ORDERING_ENABLE
);
2768 writel(dma_configuration
,
2769 &scic
->scu_registers
->sdma
.cdma_configuration
);
2773 * Initialize the PHYs before the PORTs because the PHY registers
2774 * are accessed during the port initialization.
2776 if (result
== SCI_SUCCESS
) {
2777 /* Initialize the phys */
2779 (result
== SCI_SUCCESS
) && (index
< SCI_MAX_PHYS
);
2781 result
= scic_sds_phy_initialize(
2782 &scic
->phy_table
[index
],
2783 &scic
->scu_registers
->peg0
.pe
[index
].tl
,
2784 &scic
->scu_registers
->peg0
.pe
[index
].ll
);
2788 if (result
== SCI_SUCCESS
) {
2789 /* Initialize the logical ports */
2791 (index
< scic
->logical_port_entries
) &&
2792 (result
== SCI_SUCCESS
);
2794 result
= scic_sds_port_initialize(
2795 &scic
->port_table
[index
],
2796 &scic
->scu_registers
->peg0
.ptsg
.port
[index
],
2797 &scic
->scu_registers
->peg0
.ptsg
.protocol_engine
,
2798 &scic
->scu_registers
->peg0
.viit
[index
]);
2802 if (result
== SCI_SUCCESS
)
2803 result
= scic_sds_port_configuration_agent_initialize(
2807 /* Advance the controller state machine */
2808 if (result
== SCI_SUCCESS
)
2809 state
= SCI_BASE_CONTROLLER_STATE_INITIALIZED
;
2811 state
= SCI_BASE_CONTROLLER_STATE_FAILED
;
2812 sci_base_state_machine_change_state(sm
, state
);
2817 enum sci_status
scic_controller_start(struct scic_sds_controller
*scic
,
2820 enum sci_status result
;
2823 if (scic
->state_machine
.current_state_id
!=
2824 SCI_BASE_CONTROLLER_STATE_INITIALIZED
) {
2825 dev_warn(scic_to_dev(scic
),
2826 "SCIC Controller start operation requested in "
2828 return SCI_FAILURE_INVALID_STATE
;
2831 /* Build the TCi free pool */
2832 sci_pool_initialize(scic
->tci_pool
);
2833 for (index
= 0; index
< scic
->task_context_entries
; index
++)
2834 sci_pool_put(scic
->tci_pool
, index
);
2836 /* Build the RNi free pool */
2837 scic_sds_remote_node_table_initialize(
2838 &scic
->available_remote_nodes
,
2839 scic
->remote_node_entries
);
2842 * Before anything else lets make sure we will not be
2843 * interrupted by the hardware.
2845 scic_controller_disable_interrupts(scic
);
2847 /* Enable the port task scheduler */
2848 scic_sds_controller_enable_port_task_scheduler(scic
);
2850 /* Assign all the task entries to scic physical function */
2851 scic_sds_controller_assign_task_entries(scic
);
2853 /* Now initialze the completion queue */
2854 scic_sds_controller_initialize_completion_queue(scic
);
2856 /* Initialize the unsolicited frame queue for use */
2857 scic_sds_controller_initialize_unsolicited_frame_queue(scic
);
2859 /* Start all of the ports on this controller */
2860 for (index
= 0; index
< scic
->logical_port_entries
; index
++) {
2861 struct scic_sds_port
*sci_port
= &scic
->port_table
[index
];
2863 result
= sci_port
->state_handlers
->start_handler(
2869 scic_sds_controller_start_next_phy(scic
);
2871 isci_timer_start(scic
->timeout_timer
, timeout
);
2873 sci_base_state_machine_change_state(&scic
->state_machine
,
2874 SCI_BASE_CONTROLLER_STATE_STARTING
);
2881 * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller
2884 * This method implements the actions taken by the struct scic_sds_controller on entry
2885 * to the SCI_BASE_CONTROLLER_STATE_INITIAL. - Set the state handlers to the
2886 * controllers initial state. none This function should initialze the
2887 * controller object.
2889 static void scic_sds_controller_initial_state_enter(
2890 struct sci_base_object
*object
)
2892 struct scic_sds_controller
*this_controller
;
2894 this_controller
= (struct scic_sds_controller
*)object
;
2896 sci_base_state_machine_change_state(&this_controller
->state_machine
,
2897 SCI_BASE_CONTROLLER_STATE_RESET
);
2902 * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller
2905 * This method implements the actions taken by the struct scic_sds_controller on exit
2906 * from the SCI_BASE_CONTROLLER_STATE_STARTING. - This function stops the
2907 * controller starting timeout timer. none
2909 static inline void scic_sds_controller_starting_state_exit(
2910 struct sci_base_object
*object
)
2912 struct scic_sds_controller
*scic
= (struct scic_sds_controller
*)object
;
2914 isci_timer_stop(scic
->timeout_timer
);
2919 * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller
2922 * This method implements the actions taken by the struct scic_sds_controller on entry
2923 * to the SCI_BASE_CONTROLLER_STATE_READY. - Set the state handlers to the
2924 * controllers ready state. none
2926 static void scic_sds_controller_ready_state_enter(
2927 struct sci_base_object
*object
)
2929 struct scic_sds_controller
*this_controller
;
2931 this_controller
= (struct scic_sds_controller
*)object
;
2933 /* set the default interrupt coalescence number and timeout value. */
2934 scic_controller_set_interrupt_coalescence(
2935 this_controller
, 0x10, 250);
2940 * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller
2943 * This method implements the actions taken by the struct scic_sds_controller on exit
2944 * from the SCI_BASE_CONTROLLER_STATE_READY. - This function does nothing. none
2946 static void scic_sds_controller_ready_state_exit(
2947 struct sci_base_object
*object
)
2949 struct scic_sds_controller
*this_controller
;
2951 this_controller
= (struct scic_sds_controller
*)object
;
2953 /* disable interrupt coalescence. */
2954 scic_controller_set_interrupt_coalescence(this_controller
, 0, 0);
2959 * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller
2962 * This method implements the actions taken by the struct scic_sds_controller on entry
2963 * to the SCI_BASE_CONTROLLER_STATE_READY. - Set the state handlers to the
2964 * controllers ready state. - Stop the phys on this controller - Stop the ports
2965 * on this controller - Stop all of the remote devices on this controller none
2967 static void scic_sds_controller_stopping_state_enter(
2968 struct sci_base_object
*object
)
2970 struct scic_sds_controller
*this_controller
;
2972 this_controller
= (struct scic_sds_controller
*)object
;
2974 /* Stop all of the components for this controller */
2975 scic_sds_controller_stop_phys(this_controller
);
2976 scic_sds_controller_stop_ports(this_controller
);
2977 scic_sds_controller_stop_devices(this_controller
);
2982 * @object: This is the struct sci_base_object which is cast to a struct
2983 * scic_sds_controller object.
2985 * This funciton implements the actions taken by the struct scic_sds_controller
2986 * on exit from the SCI_BASE_CONTROLLER_STATE_STOPPING. -
2987 * This function stops the controller stopping timeout timer.
2989 static inline void scic_sds_controller_stopping_state_exit(
2990 struct sci_base_object
*object
)
2992 struct scic_sds_controller
*scic
=
2993 (struct scic_sds_controller
*)object
;
2995 isci_timer_stop(scic
->timeout_timer
);
2998 static void scic_sds_controller_resetting_state_enter(struct sci_base_object
*object
)
3000 struct scic_sds_controller
*scic
;
3002 scic
= container_of(object
, typeof(*scic
), parent
);
3003 scic_sds_controller_reset_hardware(scic
);
3004 sci_base_state_machine_change_state(&scic
->state_machine
,
3005 SCI_BASE_CONTROLLER_STATE_RESET
);
3008 static const struct sci_base_state scic_sds_controller_state_table
[] = {
3009 [SCI_BASE_CONTROLLER_STATE_INITIAL
] = {
3010 .enter_state
= scic_sds_controller_initial_state_enter
,
3012 [SCI_BASE_CONTROLLER_STATE_RESET
] = {},
3013 [SCI_BASE_CONTROLLER_STATE_INITIALIZING
] = {},
3014 [SCI_BASE_CONTROLLER_STATE_INITIALIZED
] = {},
3015 [SCI_BASE_CONTROLLER_STATE_STARTING
] = {
3016 .exit_state
= scic_sds_controller_starting_state_exit
,
3018 [SCI_BASE_CONTROLLER_STATE_READY
] = {
3019 .enter_state
= scic_sds_controller_ready_state_enter
,
3020 .exit_state
= scic_sds_controller_ready_state_exit
,
3022 [SCI_BASE_CONTROLLER_STATE_RESETTING
] = {
3023 .enter_state
= scic_sds_controller_resetting_state_enter
,
3025 [SCI_BASE_CONTROLLER_STATE_STOPPING
] = {
3026 .enter_state
= scic_sds_controller_stopping_state_enter
,
3027 .exit_state
= scic_sds_controller_stopping_state_exit
,
3029 [SCI_BASE_CONTROLLER_STATE_STOPPED
] = {},
3030 [SCI_BASE_CONTROLLER_STATE_FAILED
] = {}
3034 * scic_controller_construct() - This method will attempt to construct a
3035 * controller object utilizing the supplied parameter information.
3036 * @c: This parameter specifies the controller to be constructed.
3037 * @scu_base: mapped base address of the scu registers
3038 * @smu_base: mapped base address of the smu registers
3040 * Indicate if the controller was successfully constructed or if it failed in
3041 * some way. SCI_SUCCESS This value is returned if the controller was
3042 * successfully constructed. SCI_WARNING_TIMER_CONFLICT This value is returned
3043 * if the interrupt coalescence timer may cause SAS compliance issues for SMP
3044 * Target mode response processing. SCI_FAILURE_UNSUPPORTED_CONTROLLER_TYPE
3045 * This value is returned if the controller does not support the supplied type.
3046 * SCI_FAILURE_UNSUPPORTED_INIT_DATA_VERSION This value is returned if the
3047 * controller does not support the supplied initialization data version.
3049 enum sci_status
scic_controller_construct(struct scic_sds_controller
*scic
,
3050 void __iomem
*scu_base
,
3051 void __iomem
*smu_base
)
3055 sci_base_state_machine_construct(&scic
->state_machine
,
3056 &scic
->parent
, scic_sds_controller_state_table
,
3057 SCI_BASE_CONTROLLER_STATE_INITIAL
);
3059 sci_base_state_machine_start(&scic
->state_machine
);
3061 scic
->scu_registers
= scu_base
;
3062 scic
->smu_registers
= smu_base
;
3064 scic_sds_port_configuration_agent_construct(&scic
->port_agent
);
3066 /* Construct the ports for this controller */
3067 for (i
= 0; i
< SCI_MAX_PORTS
; i
++)
3068 scic_sds_port_construct(&scic
->port_table
[i
], i
, scic
);
3069 scic_sds_port_construct(&scic
->port_table
[i
], SCIC_SDS_DUMMY_PORT
, scic
);
3071 /* Construct the phys for this controller */
3072 for (i
= 0; i
< SCI_MAX_PHYS
; i
++) {
3073 /* Add all the PHYs to the dummy port */
3074 scic_sds_phy_construct(&scic
->phy_table
[i
],
3075 &scic
->port_table
[SCI_MAX_PORTS
], i
);
3078 scic
->invalid_phy_mask
= 0;
3080 /* Set the default maximum values */
3081 scic
->completion_event_entries
= SCU_EVENT_COUNT
;
3082 scic
->completion_queue_entries
= SCU_COMPLETION_QUEUE_COUNT
;
3083 scic
->remote_node_entries
= SCI_MAX_REMOTE_DEVICES
;
3084 scic
->logical_port_entries
= SCI_MAX_PORTS
;
3085 scic
->task_context_entries
= SCU_IO_REQUEST_COUNT
;
3086 scic
->uf_control
.buffers
.count
= SCU_UNSOLICITED_FRAME_COUNT
;
3087 scic
->uf_control
.address_table
.count
= SCU_UNSOLICITED_FRAME_COUNT
;
3089 /* Initialize the User and OEM parameters to default values. */
3090 scic_sds_controller_set_default_config_parameters(scic
);
3092 return scic_controller_reset(scic
);