9266fbee79e710f5759c00f35e01194498ec5148
[deliverable/linux.git] / drivers / scsi / isci / core / scic_sds_controller.c
1 /*
2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
4 *
5 * GPL LICENSE SUMMARY
6 *
7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * BSD LICENSE
25 *
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
27 * All rights reserved.
28 *
29 * Redistribution and use in source and binary forms, with or without
30 * modification, are permitted provided that the following conditions
31 * are met:
32 *
33 * * Redistributions of source code must retain the above copyright
34 * notice, this list of conditions and the following disclaimer.
35 * * Redistributions in binary form must reproduce the above copyright
36 * notice, this list of conditions and the following disclaimer in
37 * the documentation and/or other materials provided with the
38 * distribution.
39 * * Neither the name of Intel Corporation nor the names of its
40 * contributors may be used to endorse or promote products derived
41 * from this software without specific prior written permission.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */
55
56 #include <linux/device.h>
57 #include "scic_controller.h"
58 #include "scic_phy.h"
59 #include "scic_port.h"
60 #include "scic_remote_device.h"
61 #include "scic_sds_controller.h"
62 #include "scic_sds_controller_registers.h"
63 #include "scic_sds_pci.h"
64 #include "scic_sds_phy.h"
65 #include "scic_sds_port_configuration_agent.h"
66 #include "scic_sds_port.h"
67 #include "scic_sds_remote_device.h"
68 #include "scic_sds_request.h"
69 #include "sci_environment.h"
70 #include "sci_util.h"
71 #include "scu_completion_codes.h"
72 #include "scu_constants.h"
73 #include "scu_event_codes.h"
74 #include "scu_remote_node_context.h"
75 #include "scu_task_context.h"
76 #include "scu_unsolicited_frame.h"
77
78 #define SCU_CONTEXT_RAM_INIT_STALL_TIME 200
79
80 /**
81 * smu_dcc_get_max_ports() -
82 *
83 * This macro returns the maximum number of logical ports supported by the
84 * hardware. The caller passes in the value read from the device context
85 * capacity register and this macro will mash and shift the value appropriately.
86 */
87 #define smu_dcc_get_max_ports(dcc_value) \
88 (\
89 (((dcc_value) & SMU_DEVICE_CONTEXT_CAPACITY_MAX_LP_MASK) \
90 >> SMU_DEVICE_CONTEXT_CAPACITY_MAX_LP_SHIFT) + 1 \
91 )
92
93 /**
94 * smu_dcc_get_max_task_context() -
95 *
96 * This macro returns the maximum number of task contexts supported by the
97 * hardware. The caller passes in the value read from the device context
98 * capacity register and this macro will mash and shift the value appropriately.
99 */
100 #define smu_dcc_get_max_task_context(dcc_value) \
101 (\
102 (((dcc_value) & SMU_DEVICE_CONTEXT_CAPACITY_MAX_TC_MASK) \
103 >> SMU_DEVICE_CONTEXT_CAPACITY_MAX_TC_SHIFT) + 1 \
104 )
105
106 /**
107 * smu_dcc_get_max_remote_node_context() -
108 *
109 * This macro returns the maximum number of remote node contexts supported by
110 * the hardware. The caller passes in the value read from the device context
111 * capacity register and this macro will mash and shift the value appropriately.
112 */
113 #define smu_dcc_get_max_remote_node_context(dcc_value) \
114 (\
115 (((dcc_value) & SMU_DEVICE_CONTEXT_CAPACITY_MAX_RNC_MASK) \
116 >> SMU_DEVICE_CONTEXT_CAPACITY_MAX_RNC_SHIFT) + 1 \
117 )
118
119
120 static void scic_sds_controller_power_control_timer_handler(
121 void *controller);
122 #define SCIC_SDS_CONTROLLER_MIN_TIMER_COUNT 3
123 #define SCIC_SDS_CONTROLLER_MAX_TIMER_COUNT 3
124
125 /**
126 *
127 *
128 * The number of milliseconds to wait for a phy to start.
129 */
130 #define SCIC_SDS_CONTROLLER_PHY_START_TIMEOUT 100
131
132 /**
133 *
134 *
135 * The number of milliseconds to wait while a given phy is consuming power
136 * before allowing another set of phys to consume power. Ultimately, this will
137 * be specified by OEM parameter.
138 */
139 #define SCIC_SDS_CONTROLLER_POWER_CONTROL_INTERVAL 500
140
141 /**
142 * COMPLETION_QUEUE_CYCLE_BIT() -
143 *
144 * This macro will return the cycle bit of the completion queue entry
145 */
146 #define COMPLETION_QUEUE_CYCLE_BIT(x) ((x) & 0x80000000)
147
148 /**
149 * NORMALIZE_GET_POINTER() -
150 *
151 * This macro will normalize the completion queue get pointer so its value can
152 * be used as an index into an array
153 */
154 #define NORMALIZE_GET_POINTER(x) \
155 ((x) & SMU_COMPLETION_QUEUE_GET_POINTER_MASK)
156
157 /**
158 * NORMALIZE_PUT_POINTER() -
159 *
160 * This macro will normalize the completion queue put pointer so its value can
161 * be used as an array inde
162 */
163 #define NORMALIZE_PUT_POINTER(x) \
164 ((x) & SMU_COMPLETION_QUEUE_PUT_POINTER_MASK)
165
166
167 /**
168 * NORMALIZE_GET_POINTER_CYCLE_BIT() -
169 *
170 * This macro will normalize the completion queue cycle pointer so it matches
171 * the completion queue cycle bit
172 */
173 #define NORMALIZE_GET_POINTER_CYCLE_BIT(x) \
174 ((SMU_CQGR_CYCLE_BIT & (x)) << (31 - SMU_COMPLETION_QUEUE_GET_CYCLE_BIT_SHIFT))
175
176 /**
177 * NORMALIZE_EVENT_POINTER() -
178 *
179 * This macro will normalize the completion queue event entry so its value can
180 * be used as an index.
181 */
182 #define NORMALIZE_EVENT_POINTER(x) \
183 (\
184 ((x) & SMU_COMPLETION_QUEUE_GET_EVENT_POINTER_MASK) \
185 >> SMU_COMPLETION_QUEUE_GET_EVENT_POINTER_SHIFT \
186 )
187
188 /**
189 * INCREMENT_COMPLETION_QUEUE_GET() -
190 *
191 * This macro will increment the controllers completion queue index value and
192 * possibly toggle the cycle bit if the completion queue index wraps back to 0.
193 */
194 #define INCREMENT_COMPLETION_QUEUE_GET(controller, index, cycle) \
195 INCREMENT_QUEUE_GET(\
196 (index), \
197 (cycle), \
198 (controller)->completion_queue_entries, \
199 SMU_CQGR_CYCLE_BIT \
200 )
201
202 /**
203 * INCREMENT_EVENT_QUEUE_GET() -
204 *
205 * This macro will increment the controllers event queue index value and
206 * possibly toggle the event cycle bit if the event queue index wraps back to 0.
207 */
208 #define INCREMENT_EVENT_QUEUE_GET(controller, index, cycle) \
209 INCREMENT_QUEUE_GET(\
210 (index), \
211 (cycle), \
212 (controller)->completion_event_entries, \
213 SMU_CQGR_EVENT_CYCLE_BIT \
214 )
215
216 struct sci_base_memory_descriptor_list *
217 sci_controller_get_memory_descriptor_list_handle(struct scic_sds_controller *scic)
218 {
219 return &scic->parent.mdl;
220 }
221
222 static void scic_sds_controller_initialize_power_control(struct scic_sds_controller *scic)
223 {
224 struct isci_host *ihost = sci_object_get_association(scic);
225 scic->power_control.timer = isci_timer_create(ihost,
226 scic,
227 scic_sds_controller_power_control_timer_handler);
228
229 memset(scic->power_control.requesters, 0,
230 sizeof(scic->power_control.requesters));
231
232 scic->power_control.phys_waiting = 0;
233 scic->power_control.phys_granted_power = 0;
234 }
235
236 #define SCU_REMOTE_NODE_CONTEXT_ALIGNMENT (32)
237 #define SCU_TASK_CONTEXT_ALIGNMENT (256)
238 #define SCU_UNSOLICITED_FRAME_ADDRESS_ALIGNMENT (64)
239 #define SCU_UNSOLICITED_FRAME_BUFFER_ALIGNMENT (1024)
240 #define SCU_UNSOLICITED_FRAME_HEADER_ALIGNMENT (64)
241
242 /**
243 * This method builds the memory descriptor table for this controller.
244 * @this_controller: This parameter specifies the controller object for which
245 * to build the memory table.
246 *
247 */
248 static void scic_sds_controller_build_memory_descriptor_table(
249 struct scic_sds_controller *this_controller)
250 {
251 sci_base_mde_construct(
252 &this_controller->memory_descriptors[SCU_MDE_COMPLETION_QUEUE],
253 SCU_COMPLETION_RAM_ALIGNMENT,
254 (sizeof(u32) * this_controller->completion_queue_entries),
255 (SCI_MDE_ATTRIBUTE_CACHEABLE | SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS)
256 );
257
258 sci_base_mde_construct(
259 &this_controller->memory_descriptors[SCU_MDE_REMOTE_NODE_CONTEXT],
260 SCU_REMOTE_NODE_CONTEXT_ALIGNMENT,
261 this_controller->remote_node_entries * sizeof(union scu_remote_node_context),
262 SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS
263 );
264
265 sci_base_mde_construct(
266 &this_controller->memory_descriptors[SCU_MDE_TASK_CONTEXT],
267 SCU_TASK_CONTEXT_ALIGNMENT,
268 this_controller->task_context_entries * sizeof(struct scu_task_context),
269 SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS
270 );
271
272 /*
273 * The UF buffer address table size must be programmed to a power
274 * of 2. Find the first power of 2 that is equal to or greater then
275 * the number of unsolicited frame buffers to be utilized. */
276 scic_sds_unsolicited_frame_control_set_address_table_count(
277 &this_controller->uf_control
278 );
279
280 sci_base_mde_construct(
281 &this_controller->memory_descriptors[SCU_MDE_UF_BUFFER],
282 SCU_UNSOLICITED_FRAME_BUFFER_ALIGNMENT,
283 scic_sds_unsolicited_frame_control_get_mde_size(this_controller->uf_control),
284 SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS
285 );
286 }
287
288 /**
289 * This method validates the driver supplied memory descriptor table.
290 * @this_controller:
291 *
292 * enum sci_status
293 */
294 static enum sci_status scic_sds_controller_validate_memory_descriptor_table(
295 struct scic_sds_controller *this_controller)
296 {
297 bool mde_list_valid;
298
299 mde_list_valid = sci_base_mde_is_valid(
300 &this_controller->memory_descriptors[SCU_MDE_COMPLETION_QUEUE],
301 SCU_COMPLETION_RAM_ALIGNMENT,
302 (sizeof(u32) * this_controller->completion_queue_entries),
303 (SCI_MDE_ATTRIBUTE_CACHEABLE | SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS)
304 );
305
306 if (mde_list_valid == false)
307 return SCI_FAILURE_UNSUPPORTED_INFORMATION_FIELD;
308
309 mde_list_valid = sci_base_mde_is_valid(
310 &this_controller->memory_descriptors[SCU_MDE_REMOTE_NODE_CONTEXT],
311 SCU_REMOTE_NODE_CONTEXT_ALIGNMENT,
312 this_controller->remote_node_entries * sizeof(union scu_remote_node_context),
313 SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS
314 );
315
316 if (mde_list_valid == false)
317 return SCI_FAILURE_UNSUPPORTED_INFORMATION_FIELD;
318
319 mde_list_valid = sci_base_mde_is_valid(
320 &this_controller->memory_descriptors[SCU_MDE_TASK_CONTEXT],
321 SCU_TASK_CONTEXT_ALIGNMENT,
322 this_controller->task_context_entries * sizeof(struct scu_task_context),
323 SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS
324 );
325
326 if (mde_list_valid == false)
327 return SCI_FAILURE_UNSUPPORTED_INFORMATION_FIELD;
328
329 mde_list_valid = sci_base_mde_is_valid(
330 &this_controller->memory_descriptors[SCU_MDE_UF_BUFFER],
331 SCU_UNSOLICITED_FRAME_BUFFER_ALIGNMENT,
332 scic_sds_unsolicited_frame_control_get_mde_size(this_controller->uf_control),
333 SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS
334 );
335
336 if (mde_list_valid == false)
337 return SCI_FAILURE_UNSUPPORTED_INFORMATION_FIELD;
338
339 return SCI_SUCCESS;
340 }
341
342 /**
343 * This method initializes the controller with the physical memory addresses
344 * that are used to communicate with the driver.
345 * @this_controller:
346 *
347 */
348 static void scic_sds_controller_ram_initialization(
349 struct scic_sds_controller *this_controller)
350 {
351 struct sci_physical_memory_descriptor *mde;
352
353 /*
354 * The completion queue is actually placed in cacheable memory
355 * Therefore it no longer comes out of memory in the MDL. */
356 mde = &this_controller->memory_descriptors[SCU_MDE_COMPLETION_QUEUE];
357 this_controller->completion_queue = (u32 *)mde->virtual_address;
358 SMU_CQBAR_WRITE(this_controller, mde->physical_address);
359
360 /*
361 * Program the location of the Remote Node Context table
362 * into the SCU. */
363 mde = &this_controller->memory_descriptors[SCU_MDE_REMOTE_NODE_CONTEXT];
364 this_controller->remote_node_context_table = (union scu_remote_node_context *)
365 mde->virtual_address;
366 SMU_RNCBAR_WRITE(this_controller, mde->physical_address);
367
368 /* Program the location of the Task Context table into the SCU. */
369 mde = &this_controller->memory_descriptors[SCU_MDE_TASK_CONTEXT];
370 this_controller->task_context_table = (struct scu_task_context *)
371 mde->virtual_address;
372 SMU_HTTBAR_WRITE(this_controller, mde->physical_address);
373
374 mde = &this_controller->memory_descriptors[SCU_MDE_UF_BUFFER];
375 scic_sds_unsolicited_frame_control_construct(
376 &this_controller->uf_control, mde, this_controller
377 );
378
379 /*
380 * Inform the silicon as to the location of the UF headers and
381 * address table. */
382 SCU_UFHBAR_WRITE(
383 this_controller,
384 this_controller->uf_control.headers.physical_address);
385 SCU_PUFATHAR_WRITE(
386 this_controller,
387 this_controller->uf_control.address_table.physical_address);
388 }
389
390 /**
391 * This method initializes the task context data for the controller.
392 * @this_controller:
393 *
394 */
395 static void scic_sds_controller_assign_task_entries(
396 struct scic_sds_controller *this_controller)
397 {
398 u32 task_assignment;
399
400 /*
401 * Assign all the TCs to function 0
402 * TODO: Do we actually need to read this register to write it back? */
403 task_assignment = SMU_TCA_READ(this_controller, 0);
404
405 task_assignment =
406 (
407 task_assignment
408 | (SMU_TCA_GEN_VAL(STARTING, 0))
409 | (SMU_TCA_GEN_VAL(ENDING, this_controller->task_context_entries - 1))
410 | (SMU_TCA_GEN_BIT(RANGE_CHECK_ENABLE))
411 );
412
413 SMU_TCA_WRITE(this_controller, 0, task_assignment);
414 }
415
416 /**
417 * This method initializes the hardware completion queue.
418 *
419 *
420 */
421 static void scic_sds_controller_initialize_completion_queue(
422 struct scic_sds_controller *this_controller)
423 {
424 u32 index;
425 u32 completion_queue_control_value;
426 u32 completion_queue_get_value;
427 u32 completion_queue_put_value;
428
429 this_controller->completion_queue_get = 0;
430
431 completion_queue_control_value = (
432 SMU_CQC_QUEUE_LIMIT_SET(this_controller->completion_queue_entries - 1)
433 | SMU_CQC_EVENT_LIMIT_SET(this_controller->completion_event_entries - 1)
434 );
435
436 SMU_CQC_WRITE(this_controller, completion_queue_control_value);
437
438 /* Set the completion queue get pointer and enable the queue */
439 completion_queue_get_value = (
440 (SMU_CQGR_GEN_VAL(POINTER, 0))
441 | (SMU_CQGR_GEN_VAL(EVENT_POINTER, 0))
442 | (SMU_CQGR_GEN_BIT(ENABLE))
443 | (SMU_CQGR_GEN_BIT(EVENT_ENABLE))
444 );
445
446 SMU_CQGR_WRITE(this_controller, completion_queue_get_value);
447
448 /* Set the completion queue put pointer */
449 completion_queue_put_value = (
450 (SMU_CQPR_GEN_VAL(POINTER, 0))
451 | (SMU_CQPR_GEN_VAL(EVENT_POINTER, 0))
452 );
453
454 SMU_CQPR_WRITE(this_controller, completion_queue_put_value);
455
456 /* Initialize the cycle bit of the completion queue entries */
457 for (index = 0; index < this_controller->completion_queue_entries; index++) {
458 /*
459 * If get.cycle_bit != completion_queue.cycle_bit
460 * its not a valid completion queue entry
461 * so at system start all entries are invalid */
462 this_controller->completion_queue[index] = 0x80000000;
463 }
464 }
465
466 /**
467 * This method initializes the hardware unsolicited frame queue.
468 *
469 *
470 */
471 static void scic_sds_controller_initialize_unsolicited_frame_queue(
472 struct scic_sds_controller *this_controller)
473 {
474 u32 frame_queue_control_value;
475 u32 frame_queue_get_value;
476 u32 frame_queue_put_value;
477
478 /* Write the queue size */
479 frame_queue_control_value =
480 SCU_UFQC_GEN_VAL(QUEUE_SIZE, this_controller->uf_control.address_table.count);
481
482 SCU_UFQC_WRITE(this_controller, frame_queue_control_value);
483
484 /* Setup the get pointer for the unsolicited frame queue */
485 frame_queue_get_value = (
486 SCU_UFQGP_GEN_VAL(POINTER, 0)
487 | SCU_UFQGP_GEN_BIT(ENABLE_BIT)
488 );
489
490 SCU_UFQGP_WRITE(this_controller, frame_queue_get_value);
491
492 /* Setup the put pointer for the unsolicited frame queue */
493 frame_queue_put_value = SCU_UFQPP_GEN_VAL(POINTER, 0);
494
495 SCU_UFQPP_WRITE(this_controller, frame_queue_put_value);
496 }
497
498 /**
499 * This method enables the hardware port task scheduler.
500 *
501 *
502 */
503 static void scic_sds_controller_enable_port_task_scheduler(
504 struct scic_sds_controller *this_controller)
505 {
506 u32 port_task_scheduler_value;
507
508 port_task_scheduler_value = SCU_PTSGCR_READ(this_controller);
509
510 port_task_scheduler_value |=
511 (SCU_PTSGCR_GEN_BIT(ETM_ENABLE) | SCU_PTSGCR_GEN_BIT(PTSG_ENABLE));
512
513 SCU_PTSGCR_WRITE(this_controller, port_task_scheduler_value);
514 }
515
516 /**
517 *
518 *
519 * This macro is used to delay between writes to the AFE registers during AFE
520 * initialization.
521 */
522 #define AFE_REGISTER_WRITE_DELAY 10
523
524 /* Initialize the AFE for this phy index. We need to read the AFE setup from
525 * the OEM parameters none
526 */
527 static void scic_sds_controller_afe_initialization(struct scic_sds_controller *scic)
528 {
529 const struct scic_sds_oem_params *oem = &scic->oem_parameters.sds1;
530 u32 afe_status;
531 u32 phy_id;
532
533 /* Clear DFX Status registers */
534 scu_afe_register_write(scic, afe_dfx_master_control0, 0x0081000f);
535 udelay(AFE_REGISTER_WRITE_DELAY);
536
537 /* Configure bias currents to normal */
538 if (is_a0())
539 scu_afe_register_write(scic, afe_bias_control, 0x00005500);
540 else
541 scu_afe_register_write(scic, afe_bias_control, 0x00005A00);
542
543 udelay(AFE_REGISTER_WRITE_DELAY);
544
545 /* Enable PLL */
546 if (is_b0())
547 scu_afe_register_write(scic, afe_pll_control0, 0x80040A08);
548 else
549 scu_afe_register_write(scic, afe_pll_control0, 0x80040908);
550
551 udelay(AFE_REGISTER_WRITE_DELAY);
552
553 /* Wait for the PLL to lock */
554 do {
555 afe_status = scu_afe_register_read(
556 scic, afe_common_block_status);
557 udelay(AFE_REGISTER_WRITE_DELAY);
558 } while ((afe_status & 0x00001000) == 0);
559
560 if (is_b0()) {
561 /* Shorten SAS SNW lock time (RxLock timer value from 76 us to 50 us) */
562 scu_afe_register_write(scic, afe_pmsn_master_control0, 0x7bcc96ad);
563 udelay(AFE_REGISTER_WRITE_DELAY);
564 }
565
566 for (phy_id = 0; phy_id < SCI_MAX_PHYS; phy_id++) {
567 const struct sci_phy_oem_params *oem_phy = &oem->phys[phy_id];
568
569 if (is_b0()) {
570 /* Configure transmitter SSC parameters */
571 scu_afe_txreg_write(scic, phy_id, afe_tx_ssc_control, 0x00030000);
572 udelay(AFE_REGISTER_WRITE_DELAY);
573 } else {
574 /*
575 * All defaults, except the Receive Word Alignament/Comma Detect
576 * Enable....(0xe800) */
577 scu_afe_txreg_write(scic, phy_id, afe_xcvr_control0, 0x00004512);
578 udelay(AFE_REGISTER_WRITE_DELAY);
579
580 scu_afe_txreg_write(scic, phy_id, afe_xcvr_control1, 0x0050100F);
581 udelay(AFE_REGISTER_WRITE_DELAY);
582 }
583
584 /*
585 * Power up TX and RX out from power down (PWRDNTX and PWRDNRX)
586 * & increase TX int & ext bias 20%....(0xe85c) */
587 if (is_a0())
588 scu_afe_txreg_write(scic, phy_id, afe_channel_control, 0x000003D4);
589 else if (is_a2())
590 scu_afe_txreg_write(scic, phy_id, afe_channel_control, 0x000003F0);
591 else {
592 /* Power down TX and RX (PWRDNTX and PWRDNRX) */
593 scu_afe_txreg_write(scic, phy_id, afe_channel_control, 0x000003d7);
594 udelay(AFE_REGISTER_WRITE_DELAY);
595
596 /*
597 * Power up TX and RX out from power down (PWRDNTX and PWRDNRX)
598 * & increase TX int & ext bias 20%....(0xe85c) */
599 scu_afe_txreg_write(scic, phy_id, afe_channel_control, 0x000003d4);
600 }
601 udelay(AFE_REGISTER_WRITE_DELAY);
602
603 if (is_a0() || is_a2()) {
604 /* Enable TX equalization (0xe824) */
605 scu_afe_txreg_write(scic, phy_id, afe_tx_control, 0x00040000);
606 udelay(AFE_REGISTER_WRITE_DELAY);
607 }
608
609 /*
610 * RDPI=0x0(RX Power On), RXOOBDETPDNC=0x0, TPD=0x0(TX Power On),
611 * RDD=0x0(RX Detect Enabled) ....(0xe800) */
612 scu_afe_txreg_write(scic, phy_id, afe_xcvr_control0, 0x00004100);
613 udelay(AFE_REGISTER_WRITE_DELAY);
614
615 /* Leave DFE/FFE on */
616 if (is_a0())
617 scu_afe_txreg_write(scic, phy_id, afe_rx_ssc_control0, 0x3F09983F);
618 else if (is_a2())
619 scu_afe_txreg_write(scic, phy_id, afe_rx_ssc_control0, 0x3F11103F);
620 else {
621 scu_afe_txreg_write(scic, phy_id, afe_rx_ssc_control0, 0x3F11103F);
622 udelay(AFE_REGISTER_WRITE_DELAY);
623 /* Enable TX equalization (0xe824) */
624 scu_afe_txreg_write(scic, phy_id, afe_tx_control, 0x00040000);
625 }
626 udelay(AFE_REGISTER_WRITE_DELAY);
627
628 scu_afe_txreg_write(scic, phy_id, afe_tx_amp_control0, oem_phy->afe_tx_amp_control0);
629 udelay(AFE_REGISTER_WRITE_DELAY);
630
631 scu_afe_txreg_write(scic, phy_id, afe_tx_amp_control0, oem_phy->afe_tx_amp_control1);
632 udelay(AFE_REGISTER_WRITE_DELAY);
633
634 scu_afe_txreg_write(scic, phy_id, afe_tx_amp_control0, oem_phy->afe_tx_amp_control2);
635 udelay(AFE_REGISTER_WRITE_DELAY);
636
637 scu_afe_txreg_write(scic, phy_id, afe_tx_amp_control0, oem_phy->afe_tx_amp_control3);
638 udelay(AFE_REGISTER_WRITE_DELAY);
639 }
640
641 /* Transfer control to the PEs */
642 scu_afe_register_write(scic, afe_dfx_master_control0, 0x00010f00);
643 udelay(AFE_REGISTER_WRITE_DELAY);
644 }
645
646 /*
647 * ****************************************************************************-
648 * * SCIC SDS Controller Internal Start/Stop Routines
649 * ****************************************************************************- */
650
651
652 /**
653 * This method will attempt to transition into the ready state for the
654 * controller and indicate that the controller start operation has completed
655 * if all criteria are met.
656 * @this_controller: This parameter indicates the controller object for which
657 * to transition to ready.
658 * @status: This parameter indicates the status value to be pass into the call
659 * to scic_cb_controller_start_complete().
660 *
661 * none.
662 */
663 static void scic_sds_controller_transition_to_ready(
664 struct scic_sds_controller *scic,
665 enum sci_status status)
666 {
667 struct isci_host *ihost = sci_object_get_association(scic);
668
669 if (scic->parent.state_machine.current_state_id ==
670 SCI_BASE_CONTROLLER_STATE_STARTING) {
671 /*
672 * We move into the ready state, because some of the phys/ports
673 * may be up and operational.
674 */
675 sci_base_state_machine_change_state(&scic->parent.state_machine,
676 SCI_BASE_CONTROLLER_STATE_READY);
677
678 isci_host_start_complete(ihost, status);
679 }
680 }
681
682 static void scic_sds_controller_timeout_handler(void *_scic)
683 {
684 struct scic_sds_controller *scic = _scic;
685 struct isci_host *ihost = sci_object_get_association(scic);
686 struct sci_base_state_machine *sm = &scic->parent.state_machine;
687
688 if (sm->current_state_id == SCI_BASE_CONTROLLER_STATE_STARTING)
689 scic_sds_controller_transition_to_ready(scic, SCI_FAILURE_TIMEOUT);
690 else if (sm->current_state_id == SCI_BASE_CONTROLLER_STATE_STOPPING) {
691 sci_base_state_machine_change_state(sm, SCI_BASE_CONTROLLER_STATE_FAILED);
692 isci_host_stop_complete(ihost, SCI_FAILURE_TIMEOUT);
693 } else /* / @todo Now what do we want to do in this case? */
694 dev_err(scic_to_dev(scic),
695 "%s: Controller timer fired when controller was not "
696 "in a state being timed.\n",
697 __func__);
698 }
699
700 static enum sci_status scic_sds_controller_stop_ports(struct scic_sds_controller *scic)
701 {
702 u32 index;
703 enum sci_status port_status;
704 enum sci_status status = SCI_SUCCESS;
705
706 for (index = 0; index < scic->logical_port_entries; index++) {
707 struct scic_sds_port *sci_port = &scic->port_table[index];
708 sci_base_port_handler_t stop;
709
710 stop = sci_port->state_handlers->parent.stop_handler;
711 port_status = stop(&sci_port->parent);
712
713 if ((port_status != SCI_SUCCESS) &&
714 (port_status != SCI_FAILURE_INVALID_STATE)) {
715 status = SCI_FAILURE;
716
717 dev_warn(scic_to_dev(scic),
718 "%s: Controller stop operation failed to "
719 "stop port %d because of status %d.\n",
720 __func__,
721 sci_port->logical_port_index,
722 port_status);
723 }
724 }
725
726 return status;
727 }
728
729 static inline void scic_sds_controller_phy_timer_start(
730 struct scic_sds_controller *scic)
731 {
732 isci_timer_start(scic->phy_startup_timer,
733 SCIC_SDS_CONTROLLER_PHY_START_TIMEOUT);
734
735 scic->phy_startup_timer_pending = true;
736 }
737
738 static void scic_sds_controller_phy_timer_stop(struct scic_sds_controller *scic)
739 {
740 isci_timer_stop(scic->phy_startup_timer);
741
742 scic->phy_startup_timer_pending = false;
743 }
744
745 /**
746 * scic_sds_controller_start_next_phy - start phy
747 * @scic: controller
748 *
749 * If all the phys have been started, then attempt to transition the
750 * controller to the READY state and inform the user
751 * (scic_cb_controller_start_complete()).
752 */
753 static enum sci_status scic_sds_controller_start_next_phy(struct scic_sds_controller *scic)
754 {
755 struct scic_sds_oem_params *oem = &scic->oem_parameters.sds1;
756 struct scic_sds_phy *sci_phy;
757 enum sci_status status;
758
759 status = SCI_SUCCESS;
760
761 if (scic->phy_startup_timer_pending)
762 return status;
763
764 if (scic->next_phy_to_start >= SCI_MAX_PHYS) {
765 bool is_controller_start_complete = true;
766 u32 state;
767 u8 index;
768
769 for (index = 0; index < SCI_MAX_PHYS; index++) {
770 sci_phy = &scic->phy_table[index];
771 state = sci_phy->parent.state_machine.current_state_id;
772
773 if (!scic_sds_phy_get_port(sci_phy))
774 continue;
775
776 /* The controller start operation is complete iff:
777 * - all links have been given an opportunity to start
778 * - have no indication of a connected device
779 * - have an indication of a connected device and it has
780 * finished the link training process.
781 */
782 if ((sci_phy->is_in_link_training == false &&
783 state == SCI_BASE_PHY_STATE_INITIAL) ||
784 (sci_phy->is_in_link_training == false &&
785 state == SCI_BASE_PHY_STATE_STOPPED) ||
786 (sci_phy->is_in_link_training == true &&
787 state == SCI_BASE_PHY_STATE_STARTING)) {
788 is_controller_start_complete = false;
789 break;
790 }
791 }
792
793 /*
794 * The controller has successfully finished the start process.
795 * Inform the SCI Core user and transition to the READY state. */
796 if (is_controller_start_complete == true) {
797 scic_sds_controller_transition_to_ready(scic, SCI_SUCCESS);
798 scic_sds_controller_phy_timer_stop(scic);
799 }
800 } else {
801 sci_phy = &scic->phy_table[scic->next_phy_to_start];
802
803 if (oem->controller.mode_type == SCIC_PORT_MANUAL_CONFIGURATION_MODE) {
804 if (scic_sds_phy_get_port(sci_phy) == NULL) {
805 scic->next_phy_to_start++;
806
807 /* Caution recursion ahead be forwarned
808 *
809 * The PHY was never added to a PORT in MPC mode
810 * so start the next phy in sequence This phy
811 * will never go link up and will not draw power
812 * the OEM parameters either configured the phy
813 * incorrectly for the PORT or it was never
814 * assigned to a PORT
815 */
816 return scic_sds_controller_start_next_phy(scic);
817 }
818 }
819
820 status = scic_sds_phy_start(sci_phy);
821
822 if (status == SCI_SUCCESS) {
823 scic_sds_controller_phy_timer_start(scic);
824 } else {
825 dev_warn(scic_to_dev(scic),
826 "%s: Controller stop operation failed "
827 "to stop phy %d because of status "
828 "%d.\n",
829 __func__,
830 scic->phy_table[scic->next_phy_to_start].phy_index,
831 status);
832 }
833
834 scic->next_phy_to_start++;
835 }
836
837 return status;
838 }
839
840 static void scic_sds_controller_phy_startup_timeout_handler(void *_scic)
841 {
842 struct scic_sds_controller *scic = _scic;
843 enum sci_status status;
844
845 scic->phy_startup_timer_pending = false;
846 status = SCI_FAILURE;
847 while (status != SCI_SUCCESS)
848 status = scic_sds_controller_start_next_phy(scic);
849 }
850
851 static enum sci_status scic_sds_controller_initialize_phy_startup(struct scic_sds_controller *scic)
852 {
853 struct isci_host *ihost = sci_object_get_association(scic);
854
855 scic->phy_startup_timer = isci_timer_create(ihost,
856 scic,
857 scic_sds_controller_phy_startup_timeout_handler);
858
859 if (scic->phy_startup_timer == NULL)
860 return SCI_FAILURE_INSUFFICIENT_RESOURCES;
861 else {
862 scic->next_phy_to_start = 0;
863 scic->phy_startup_timer_pending = false;
864 }
865
866 return SCI_SUCCESS;
867 }
868
869 static enum sci_status scic_sds_controller_stop_phys(struct scic_sds_controller *scic)
870 {
871 u32 index;
872 enum sci_status status;
873 enum sci_status phy_status;
874
875 status = SCI_SUCCESS;
876
877 for (index = 0; index < SCI_MAX_PHYS; index++) {
878 phy_status = scic_sds_phy_stop(&scic->phy_table[index]);
879
880 if (
881 (phy_status != SCI_SUCCESS)
882 && (phy_status != SCI_FAILURE_INVALID_STATE)
883 ) {
884 status = SCI_FAILURE;
885
886 dev_warn(scic_to_dev(scic),
887 "%s: Controller stop operation failed to stop "
888 "phy %d because of status %d.\n",
889 __func__,
890 scic->phy_table[index].phy_index, phy_status);
891 }
892 }
893
894 return status;
895 }
896
897 static enum sci_status scic_sds_controller_stop_devices(struct scic_sds_controller *scic)
898 {
899 u32 index;
900 enum sci_status status;
901 enum sci_status device_status;
902
903 status = SCI_SUCCESS;
904
905 for (index = 0; index < scic->remote_node_entries; index++) {
906 if (scic->device_table[index] != NULL) {
907 /* / @todo What timeout value do we want to provide to this request? */
908 device_status = scic_remote_device_stop(scic->device_table[index], 0);
909
910 if ((device_status != SCI_SUCCESS) &&
911 (device_status != SCI_FAILURE_INVALID_STATE)) {
912 dev_warn(scic_to_dev(scic),
913 "%s: Controller stop operation failed "
914 "to stop device 0x%p because of "
915 "status %d.\n",
916 __func__,
917 scic->device_table[index], device_status);
918 }
919 }
920 }
921
922 return status;
923 }
924
925 static void scic_sds_controller_power_control_timer_start(struct scic_sds_controller *scic)
926 {
927 isci_timer_start(scic->power_control.timer,
928 SCIC_SDS_CONTROLLER_POWER_CONTROL_INTERVAL);
929
930 scic->power_control.timer_started = true;
931 }
932
933 static void scic_sds_controller_power_control_timer_stop(struct scic_sds_controller *scic)
934 {
935 if (scic->power_control.timer_started) {
936 isci_timer_stop(scic->power_control.timer);
937 scic->power_control.timer_started = false;
938 }
939 }
940
941 static void scic_sds_controller_power_control_timer_restart(struct scic_sds_controller *scic)
942 {
943 scic_sds_controller_power_control_timer_stop(scic);
944 scic_sds_controller_power_control_timer_start(scic);
945 }
946
947 static void scic_sds_controller_power_control_timer_handler(
948 void *controller)
949 {
950 struct scic_sds_controller *this_controller;
951
952 this_controller = (struct scic_sds_controller *)controller;
953
954 this_controller->power_control.phys_granted_power = 0;
955
956 if (this_controller->power_control.phys_waiting == 0) {
957 this_controller->power_control.timer_started = false;
958 } else {
959 struct scic_sds_phy *the_phy = NULL;
960 u8 i;
961
962 for (i = 0;
963 (i < SCI_MAX_PHYS)
964 && (this_controller->power_control.phys_waiting != 0);
965 i++) {
966 if (this_controller->power_control.requesters[i] != NULL) {
967 if (this_controller->power_control.phys_granted_power <
968 this_controller->oem_parameters.sds1.controller.max_concurrent_dev_spin_up) {
969 the_phy = this_controller->power_control.requesters[i];
970 this_controller->power_control.requesters[i] = NULL;
971 this_controller->power_control.phys_waiting--;
972 this_controller->power_control.phys_granted_power++;
973 scic_sds_phy_consume_power_handler(the_phy);
974 } else {
975 break;
976 }
977 }
978 }
979
980 /*
981 * It doesn't matter if the power list is empty, we need to start the
982 * timer in case another phy becomes ready.
983 */
984 scic_sds_controller_power_control_timer_start(this_controller);
985 }
986 }
987
988 /**
989 * This method inserts the phy in the stagger spinup control queue.
990 * @this_controller:
991 *
992 *
993 */
994 void scic_sds_controller_power_control_queue_insert(
995 struct scic_sds_controller *this_controller,
996 struct scic_sds_phy *the_phy)
997 {
998 BUG_ON(the_phy == NULL);
999
1000 if (this_controller->power_control.phys_granted_power <
1001 this_controller->oem_parameters.sds1.controller.max_concurrent_dev_spin_up) {
1002 this_controller->power_control.phys_granted_power++;
1003 scic_sds_phy_consume_power_handler(the_phy);
1004
1005 /*
1006 * stop and start the power_control timer. When the timer fires, the
1007 * no_of_phys_granted_power will be set to 0
1008 */
1009 scic_sds_controller_power_control_timer_restart(this_controller);
1010 } else {
1011 /* Add the phy in the waiting list */
1012 this_controller->power_control.requesters[the_phy->phy_index] = the_phy;
1013 this_controller->power_control.phys_waiting++;
1014 }
1015 }
1016
1017 /**
1018 * This method removes the phy from the stagger spinup control queue.
1019 * @this_controller:
1020 *
1021 *
1022 */
1023 void scic_sds_controller_power_control_queue_remove(
1024 struct scic_sds_controller *this_controller,
1025 struct scic_sds_phy *the_phy)
1026 {
1027 BUG_ON(the_phy == NULL);
1028
1029 if (this_controller->power_control.requesters[the_phy->phy_index] != NULL) {
1030 this_controller->power_control.phys_waiting--;
1031 }
1032
1033 this_controller->power_control.requesters[the_phy->phy_index] = NULL;
1034 }
1035
1036 /*
1037 * ****************************************************************************-
1038 * * SCIC SDS Controller Completion Routines
1039 * ****************************************************************************- */
1040
1041 /**
1042 * This method returns a true value if the completion queue has entries that
1043 * can be processed
1044 * @this_controller:
1045 *
1046 * bool true if the completion queue has entries to process false if the
1047 * completion queue has no entries to process
1048 */
1049 static bool scic_sds_controller_completion_queue_has_entries(
1050 struct scic_sds_controller *this_controller)
1051 {
1052 u32 get_value = this_controller->completion_queue_get;
1053 u32 get_index = get_value & SMU_COMPLETION_QUEUE_GET_POINTER_MASK;
1054
1055 if (
1056 NORMALIZE_GET_POINTER_CYCLE_BIT(get_value)
1057 == COMPLETION_QUEUE_CYCLE_BIT(this_controller->completion_queue[get_index])
1058 ) {
1059 return true;
1060 }
1061
1062 return false;
1063 }
1064
1065 /**
1066 * This method processes a task completion notification. This is called from
1067 * within the controller completion handler.
1068 * @this_controller:
1069 * @completion_entry:
1070 *
1071 */
1072 static void scic_sds_controller_task_completion(
1073 struct scic_sds_controller *this_controller,
1074 u32 completion_entry)
1075 {
1076 u32 index;
1077 struct scic_sds_request *io_request;
1078
1079 index = SCU_GET_COMPLETION_INDEX(completion_entry);
1080 io_request = this_controller->io_request_table[index];
1081
1082 /* Make sure that we really want to process this IO request */
1083 if (
1084 (io_request != NULL)
1085 && (io_request->io_tag != SCI_CONTROLLER_INVALID_IO_TAG)
1086 && (
1087 scic_sds_io_tag_get_sequence(io_request->io_tag)
1088 == this_controller->io_request_sequence[index]
1089 )
1090 ) {
1091 /* Yep this is a valid io request pass it along to the io request handler */
1092 scic_sds_io_request_tc_completion(io_request, completion_entry);
1093 }
1094 }
1095
1096 /**
1097 * This method processes an SDMA completion event. This is called from within
1098 * the controller completion handler.
1099 * @this_controller:
1100 * @completion_entry:
1101 *
1102 */
1103 static void scic_sds_controller_sdma_completion(
1104 struct scic_sds_controller *this_controller,
1105 u32 completion_entry)
1106 {
1107 u32 index;
1108 struct scic_sds_request *io_request;
1109 struct scic_sds_remote_device *device;
1110
1111 index = SCU_GET_COMPLETION_INDEX(completion_entry);
1112
1113 switch (scu_get_command_request_type(completion_entry)) {
1114 case SCU_CONTEXT_COMMAND_REQUEST_TYPE_POST_TC:
1115 case SCU_CONTEXT_COMMAND_REQUEST_TYPE_DUMP_TC:
1116 io_request = this_controller->io_request_table[index];
1117 dev_warn(scic_to_dev(this_controller),
1118 "%s: SCIC SDS Completion type SDMA %x for io request "
1119 "%p\n",
1120 __func__,
1121 completion_entry,
1122 io_request);
1123 /* @todo For a post TC operation we need to fail the IO
1124 * request
1125 */
1126 break;
1127
1128 case SCU_CONTEXT_COMMAND_REQUEST_TYPE_DUMP_RNC:
1129 case SCU_CONTEXT_COMMAND_REQUEST_TYPE_OTHER_RNC:
1130 case SCU_CONTEXT_COMMAND_REQUEST_TYPE_POST_RNC:
1131 device = this_controller->device_table[index];
1132 dev_warn(scic_to_dev(this_controller),
1133 "%s: SCIC SDS Completion type SDMA %x for remote "
1134 "device %p\n",
1135 __func__,
1136 completion_entry,
1137 device);
1138 /* @todo For a port RNC operation we need to fail the
1139 * device
1140 */
1141 break;
1142
1143 default:
1144 dev_warn(scic_to_dev(this_controller),
1145 "%s: SCIC SDS Completion unknown SDMA completion "
1146 "type %x\n",
1147 __func__,
1148 completion_entry);
1149 break;
1150
1151 }
1152 }
1153
1154 /**
1155 *
1156 * @this_controller:
1157 * @completion_entry:
1158 *
1159 * This method processes an unsolicited frame message. This is called from
1160 * within the controller completion handler. none
1161 */
1162 static void scic_sds_controller_unsolicited_frame(
1163 struct scic_sds_controller *this_controller,
1164 u32 completion_entry)
1165 {
1166 u32 index;
1167 u32 frame_index;
1168
1169 struct scu_unsolicited_frame_header *frame_header;
1170 struct scic_sds_phy *phy;
1171 struct scic_sds_remote_device *device;
1172
1173 enum sci_status result = SCI_FAILURE;
1174
1175 frame_index = SCU_GET_FRAME_INDEX(completion_entry);
1176
1177 frame_header
1178 = this_controller->uf_control.buffers.array[frame_index].header;
1179 this_controller->uf_control.buffers.array[frame_index].state
1180 = UNSOLICITED_FRAME_IN_USE;
1181
1182 if (SCU_GET_FRAME_ERROR(completion_entry)) {
1183 /*
1184 * / @todo If the IAF frame or SIGNATURE FIS frame has an error will
1185 * / this cause a problem? We expect the phy initialization will
1186 * / fail if there is an error in the frame. */
1187 scic_sds_controller_release_frame(this_controller, frame_index);
1188 return;
1189 }
1190
1191 if (frame_header->is_address_frame) {
1192 index = SCU_GET_PROTOCOL_ENGINE_INDEX(completion_entry);
1193 phy = &this_controller->phy_table[index];
1194 if (phy != NULL) {
1195 result = scic_sds_phy_frame_handler(phy, frame_index);
1196 }
1197 } else {
1198
1199 index = SCU_GET_COMPLETION_INDEX(completion_entry);
1200
1201 if (index == SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX) {
1202 /*
1203 * This is a signature fis or a frame from a direct attached SATA
1204 * device that has not yet been created. In either case forwared
1205 * the frame to the PE and let it take care of the frame data. */
1206 index = SCU_GET_PROTOCOL_ENGINE_INDEX(completion_entry);
1207 phy = &this_controller->phy_table[index];
1208 result = scic_sds_phy_frame_handler(phy, frame_index);
1209 } else {
1210 if (index < this_controller->remote_node_entries)
1211 device = this_controller->device_table[index];
1212 else
1213 device = NULL;
1214
1215 if (device != NULL)
1216 result = scic_sds_remote_device_frame_handler(device, frame_index);
1217 else
1218 scic_sds_controller_release_frame(this_controller, frame_index);
1219 }
1220 }
1221
1222 if (result != SCI_SUCCESS) {
1223 /*
1224 * / @todo Is there any reason to report some additional error message
1225 * / when we get this failure notifiction? */
1226 }
1227 }
1228
1229 /**
1230 * This method processes an event completion entry. This is called from within
1231 * the controller completion handler.
1232 * @this_controller:
1233 * @completion_entry:
1234 *
1235 */
1236 static void scic_sds_controller_event_completion(
1237 struct scic_sds_controller *this_controller,
1238 u32 completion_entry)
1239 {
1240 u32 index;
1241 struct scic_sds_request *io_request;
1242 struct scic_sds_remote_device *device;
1243 struct scic_sds_phy *phy;
1244
1245 index = SCU_GET_COMPLETION_INDEX(completion_entry);
1246
1247 switch (scu_get_event_type(completion_entry)) {
1248 case SCU_EVENT_TYPE_SMU_COMMAND_ERROR:
1249 /* / @todo The driver did something wrong and we need to fix the condtion. */
1250 dev_err(scic_to_dev(this_controller),
1251 "%s: SCIC Controller 0x%p received SMU command error "
1252 "0x%x\n",
1253 __func__,
1254 this_controller,
1255 completion_entry);
1256 break;
1257
1258 case SCU_EVENT_TYPE_SMU_PCQ_ERROR:
1259 case SCU_EVENT_TYPE_SMU_ERROR:
1260 case SCU_EVENT_TYPE_FATAL_MEMORY_ERROR:
1261 /*
1262 * / @todo This is a hardware failure and its likely that we want to
1263 * / reset the controller. */
1264 dev_err(scic_to_dev(this_controller),
1265 "%s: SCIC Controller 0x%p received fatal controller "
1266 "event 0x%x\n",
1267 __func__,
1268 this_controller,
1269 completion_entry);
1270 break;
1271
1272 case SCU_EVENT_TYPE_TRANSPORT_ERROR:
1273 io_request = this_controller->io_request_table[index];
1274 scic_sds_io_request_event_handler(io_request, completion_entry);
1275 break;
1276
1277 case SCU_EVENT_TYPE_PTX_SCHEDULE_EVENT:
1278 switch (scu_get_event_specifier(completion_entry)) {
1279 case SCU_EVENT_SPECIFIC_SMP_RESPONSE_NO_PE:
1280 case SCU_EVENT_SPECIFIC_TASK_TIMEOUT:
1281 io_request = this_controller->io_request_table[index];
1282 if (io_request != NULL)
1283 scic_sds_io_request_event_handler(io_request, completion_entry);
1284 else
1285 dev_warn(scic_to_dev(this_controller),
1286 "%s: SCIC Controller 0x%p received "
1287 "event 0x%x for io request object "
1288 "that doesnt exist.\n",
1289 __func__,
1290 this_controller,
1291 completion_entry);
1292
1293 break;
1294
1295 case SCU_EVENT_SPECIFIC_IT_NEXUS_TIMEOUT:
1296 device = this_controller->device_table[index];
1297 if (device != NULL)
1298 scic_sds_remote_device_event_handler(device, completion_entry);
1299 else
1300 dev_warn(scic_to_dev(this_controller),
1301 "%s: SCIC Controller 0x%p received "
1302 "event 0x%x for remote device object "
1303 "that doesnt exist.\n",
1304 __func__,
1305 this_controller,
1306 completion_entry);
1307
1308 break;
1309 }
1310 break;
1311
1312 case SCU_EVENT_TYPE_BROADCAST_CHANGE:
1313 /*
1314 * direct the broadcast change event to the phy first and then let
1315 * the phy redirect the broadcast change to the port object */
1316 case SCU_EVENT_TYPE_ERR_CNT_EVENT:
1317 /*
1318 * direct error counter event to the phy object since that is where
1319 * we get the event notification. This is a type 4 event. */
1320 case SCU_EVENT_TYPE_OSSP_EVENT:
1321 index = SCU_GET_PROTOCOL_ENGINE_INDEX(completion_entry);
1322 phy = &this_controller->phy_table[index];
1323 scic_sds_phy_event_handler(phy, completion_entry);
1324 break;
1325
1326 case SCU_EVENT_TYPE_RNC_SUSPEND_TX:
1327 case SCU_EVENT_TYPE_RNC_SUSPEND_TX_RX:
1328 case SCU_EVENT_TYPE_RNC_OPS_MISC:
1329 if (index < this_controller->remote_node_entries) {
1330 device = this_controller->device_table[index];
1331
1332 if (device != NULL)
1333 scic_sds_remote_device_event_handler(device, completion_entry);
1334 } else
1335 dev_err(scic_to_dev(this_controller),
1336 "%s: SCIC Controller 0x%p received event 0x%x "
1337 "for remote device object 0x%0x that doesnt "
1338 "exist.\n",
1339 __func__,
1340 this_controller,
1341 completion_entry,
1342 index);
1343
1344 break;
1345
1346 default:
1347 dev_warn(scic_to_dev(this_controller),
1348 "%s: SCIC Controller received unknown event code %x\n",
1349 __func__,
1350 completion_entry);
1351 break;
1352 }
1353 }
1354
1355 /**
1356 * This method is a private routine for processing the completion queue entries.
1357 * @this_controller:
1358 *
1359 */
1360 static void scic_sds_controller_process_completions(
1361 struct scic_sds_controller *this_controller)
1362 {
1363 u32 completion_count = 0;
1364 u32 completion_entry;
1365 u32 get_index;
1366 u32 get_cycle;
1367 u32 event_index;
1368 u32 event_cycle;
1369
1370 dev_dbg(scic_to_dev(this_controller),
1371 "%s: completion queue begining get:0x%08x\n",
1372 __func__,
1373 this_controller->completion_queue_get);
1374
1375 /* Get the component parts of the completion queue */
1376 get_index = NORMALIZE_GET_POINTER(this_controller->completion_queue_get);
1377 get_cycle = SMU_CQGR_CYCLE_BIT & this_controller->completion_queue_get;
1378
1379 event_index = NORMALIZE_EVENT_POINTER(this_controller->completion_queue_get);
1380 event_cycle = SMU_CQGR_EVENT_CYCLE_BIT & this_controller->completion_queue_get;
1381
1382 while (
1383 NORMALIZE_GET_POINTER_CYCLE_BIT(get_cycle)
1384 == COMPLETION_QUEUE_CYCLE_BIT(this_controller->completion_queue[get_index])
1385 ) {
1386 completion_count++;
1387
1388 completion_entry = this_controller->completion_queue[get_index];
1389 INCREMENT_COMPLETION_QUEUE_GET(this_controller, get_index, get_cycle);
1390
1391 dev_dbg(scic_to_dev(this_controller),
1392 "%s: completion queue entry:0x%08x\n",
1393 __func__,
1394 completion_entry);
1395
1396 switch (SCU_GET_COMPLETION_TYPE(completion_entry)) {
1397 case SCU_COMPLETION_TYPE_TASK:
1398 scic_sds_controller_task_completion(this_controller, completion_entry);
1399 break;
1400
1401 case SCU_COMPLETION_TYPE_SDMA:
1402 scic_sds_controller_sdma_completion(this_controller, completion_entry);
1403 break;
1404
1405 case SCU_COMPLETION_TYPE_UFI:
1406 scic_sds_controller_unsolicited_frame(this_controller, completion_entry);
1407 break;
1408
1409 case SCU_COMPLETION_TYPE_EVENT:
1410 INCREMENT_EVENT_QUEUE_GET(this_controller, event_index, event_cycle);
1411 scic_sds_controller_event_completion(this_controller, completion_entry);
1412 break;
1413
1414 case SCU_COMPLETION_TYPE_NOTIFY:
1415 /*
1416 * Presently we do the same thing with a notify event that we do with the
1417 * other event codes. */
1418 INCREMENT_EVENT_QUEUE_GET(this_controller, event_index, event_cycle);
1419 scic_sds_controller_event_completion(this_controller, completion_entry);
1420 break;
1421
1422 default:
1423 dev_warn(scic_to_dev(this_controller),
1424 "%s: SCIC Controller received unknown "
1425 "completion type %x\n",
1426 __func__,
1427 completion_entry);
1428 break;
1429 }
1430 }
1431
1432 /* Update the get register if we completed one or more entries */
1433 if (completion_count > 0) {
1434 this_controller->completion_queue_get =
1435 SMU_CQGR_GEN_BIT(ENABLE)
1436 | SMU_CQGR_GEN_BIT(EVENT_ENABLE)
1437 | event_cycle | SMU_CQGR_GEN_VAL(EVENT_POINTER, event_index)
1438 | get_cycle | SMU_CQGR_GEN_VAL(POINTER, get_index);
1439
1440 SMU_CQGR_WRITE(this_controller,
1441 this_controller->completion_queue_get);
1442 }
1443
1444 dev_dbg(scic_to_dev(this_controller),
1445 "%s: completion queue ending get:0x%08x\n",
1446 __func__,
1447 this_controller->completion_queue_get);
1448
1449 }
1450
1451 bool scic_sds_controller_isr(struct scic_sds_controller *scic)
1452 {
1453 if (scic_sds_controller_completion_queue_has_entries(scic)) {
1454 return true;
1455 } else {
1456 /*
1457 * we have a spurious interrupt it could be that we have already
1458 * emptied the completion queue from a previous interrupt */
1459 SMU_ISR_WRITE(scic, SMU_ISR_COMPLETION);
1460
1461 /*
1462 * There is a race in the hardware that could cause us not to be notified
1463 * of an interrupt completion if we do not take this step. We will mask
1464 * then unmask the interrupts so if there is another interrupt pending
1465 * the clearing of the interrupt source we get the next interrupt message. */
1466 SMU_IMR_WRITE(scic, 0xFF000000);
1467 SMU_IMR_WRITE(scic, 0x00000000);
1468 }
1469
1470 return false;
1471 }
1472
1473 void scic_sds_controller_completion_handler(struct scic_sds_controller *scic)
1474 {
1475 /* Empty out the completion queue */
1476 if (scic_sds_controller_completion_queue_has_entries(scic))
1477 scic_sds_controller_process_completions(scic);
1478
1479 /* Clear the interrupt and enable all interrupts again */
1480 SMU_ISR_WRITE(scic, SMU_ISR_COMPLETION);
1481 /* Could we write the value of SMU_ISR_COMPLETION? */
1482 SMU_IMR_WRITE(scic, 0xFF000000);
1483 SMU_IMR_WRITE(scic, 0x00000000);
1484 }
1485
1486 bool scic_sds_controller_error_isr(struct scic_sds_controller *scic)
1487 {
1488 u32 interrupt_status;
1489
1490 interrupt_status = SMU_ISR_READ(scic);
1491
1492 interrupt_status &= (SMU_ISR_QUEUE_ERROR | SMU_ISR_QUEUE_SUSPEND);
1493
1494 if (interrupt_status != 0) {
1495 /*
1496 * There is an error interrupt pending so let it through and handle
1497 * in the callback */
1498 return true;
1499 }
1500
1501 /*
1502 * There is a race in the hardware that could cause us not to be notified
1503 * of an interrupt completion if we do not take this step. We will mask
1504 * then unmask the error interrupts so if there was another interrupt
1505 * pending we will be notified.
1506 * Could we write the value of (SMU_ISR_QUEUE_ERROR | SMU_ISR_QUEUE_SUSPEND)? */
1507 SMU_IMR_WRITE(scic, 0x000000FF);
1508 SMU_IMR_WRITE(scic, 0x00000000);
1509
1510 return false;
1511 }
1512
1513 void scic_sds_controller_error_handler(struct scic_sds_controller *scic)
1514 {
1515 u32 interrupt_status;
1516
1517 interrupt_status = SMU_ISR_READ(scic);
1518
1519 if ((interrupt_status & SMU_ISR_QUEUE_SUSPEND) &&
1520 scic_sds_controller_completion_queue_has_entries(scic)) {
1521
1522 scic_sds_controller_process_completions(scic);
1523 SMU_ISR_WRITE(scic, SMU_ISR_QUEUE_SUSPEND);
1524
1525 } else {
1526 dev_err(scic_to_dev(scic), "%s: status: %#x\n", __func__,
1527 interrupt_status);
1528
1529 sci_base_state_machine_change_state(&scic->parent.state_machine,
1530 SCI_BASE_CONTROLLER_STATE_FAILED);
1531
1532 return;
1533 }
1534
1535 /* If we dont process any completions I am not sure that we want to do this.
1536 * We are in the middle of a hardware fault and should probably be reset.
1537 */
1538 SMU_IMR_WRITE(scic, 0x00000000);
1539 }
1540
1541
1542
1543
1544 void scic_sds_controller_link_up(
1545 struct scic_sds_controller *scic,
1546 struct scic_sds_port *sci_port,
1547 struct scic_sds_phy *sci_phy)
1548 {
1549 scic_sds_controller_phy_handler_t link_up;
1550 u32 state;
1551
1552 state = scic->parent.state_machine.current_state_id;
1553 link_up = scic_sds_controller_state_handler_table[state].link_up;
1554
1555 if (link_up)
1556 link_up(scic, sci_port, sci_phy);
1557 else
1558 dev_dbg(scic_to_dev(scic),
1559 "%s: SCIC Controller linkup event from phy %d in "
1560 "unexpected state %d\n", __func__, sci_phy->phy_index,
1561 state);
1562 }
1563
1564
1565 void scic_sds_controller_link_down(
1566 struct scic_sds_controller *scic,
1567 struct scic_sds_port *sci_port,
1568 struct scic_sds_phy *sci_phy)
1569 {
1570 u32 state;
1571 scic_sds_controller_phy_handler_t link_down;
1572
1573 state = scic->parent.state_machine.current_state_id;
1574 link_down = scic_sds_controller_state_handler_table[state].link_down;
1575
1576 if (link_down)
1577 link_down(scic, sci_port, sci_phy);
1578 else
1579 dev_dbg(scic_to_dev(scic),
1580 "%s: SCIC Controller linkdown event from phy %d in "
1581 "unexpected state %d\n",
1582 __func__,
1583 sci_phy->phy_index, state);
1584 }
1585
1586 /**
1587 * This is a helper method to determine if any remote devices on this
1588 * controller are still in the stopping state.
1589 *
1590 */
1591 static bool scic_sds_controller_has_remote_devices_stopping(
1592 struct scic_sds_controller *this_controller)
1593 {
1594 u32 index;
1595
1596 for (index = 0; index < this_controller->remote_node_entries; index++) {
1597 if ((this_controller->device_table[index] != NULL) &&
1598 (this_controller->device_table[index]->parent.state_machine.current_state_id
1599 == SCI_BASE_REMOTE_DEVICE_STATE_STOPPING))
1600 return true;
1601 }
1602
1603 return false;
1604 }
1605
1606 /**
1607 * This method is called by the remote device to inform the controller
1608 * object that the remote device has stopped.
1609 *
1610 */
1611
1612 void scic_sds_controller_remote_device_stopped(struct scic_sds_controller *scic,
1613 struct scic_sds_remote_device *sci_dev)
1614 {
1615
1616 u32 state;
1617 scic_sds_controller_device_handler_t stopped;
1618
1619 state = scic->parent.state_machine.current_state_id;
1620 stopped = scic_sds_controller_state_handler_table[state].device_stopped;
1621
1622 if (stopped)
1623 stopped(scic, sci_dev);
1624 else {
1625 dev_dbg(scic_to_dev(scic),
1626 "%s: SCIC Controller 0x%p remote device stopped event "
1627 "from device 0x%p in unexpected state %d\n",
1628 __func__, scic, sci_dev, state);
1629 }
1630 }
1631
1632
1633
1634 /**
1635 * This method will write to the SCU PCP register the request value. The method
1636 * is used to suspend/resume ports, devices, and phys.
1637 * @this_controller:
1638 *
1639 *
1640 */
1641 void scic_sds_controller_post_request(
1642 struct scic_sds_controller *this_controller,
1643 u32 request)
1644 {
1645 dev_dbg(scic_to_dev(this_controller),
1646 "%s: SCIC Controller 0x%p post request 0x%08x\n",
1647 __func__,
1648 this_controller,
1649 request);
1650
1651 SMU_PCP_WRITE(this_controller, request);
1652 }
1653
1654 /**
1655 * This method will copy the soft copy of the task context into the physical
1656 * memory accessible by the controller.
1657 * @this_controller: This parameter specifies the controller for which to copy
1658 * the task context.
1659 * @this_request: This parameter specifies the request for which the task
1660 * context is being copied.
1661 *
1662 * After this call is made the SCIC_SDS_IO_REQUEST object will always point to
1663 * the physical memory version of the task context. Thus, all subsequent
1664 * updates to the task context are performed in the TC table (i.e. DMAable
1665 * memory). none
1666 */
1667 void scic_sds_controller_copy_task_context(
1668 struct scic_sds_controller *this_controller,
1669 struct scic_sds_request *this_request)
1670 {
1671 struct scu_task_context *task_context_buffer;
1672
1673 task_context_buffer = scic_sds_controller_get_task_context_buffer(
1674 this_controller, this_request->io_tag
1675 );
1676
1677 memcpy(
1678 task_context_buffer,
1679 this_request->task_context_buffer,
1680 SCI_FIELD_OFFSET(struct scu_task_context, sgl_snapshot_ac)
1681 );
1682
1683 /*
1684 * Now that the soft copy of the TC has been copied into the TC
1685 * table accessible by the silicon. Thus, any further changes to
1686 * the TC (e.g. TC termination) occur in the appropriate location. */
1687 this_request->task_context_buffer = task_context_buffer;
1688 }
1689
1690 /**
1691 * This method returns the task context buffer for the given io tag.
1692 * @this_controller:
1693 * @io_tag:
1694 *
1695 * struct scu_task_context*
1696 */
1697 struct scu_task_context *scic_sds_controller_get_task_context_buffer(
1698 struct scic_sds_controller *this_controller,
1699 u16 io_tag
1700 ) {
1701 u16 task_index = scic_sds_io_tag_get_index(io_tag);
1702
1703 if (task_index < this_controller->task_context_entries) {
1704 return &this_controller->task_context_table[task_index];
1705 }
1706
1707 return NULL;
1708 }
1709
1710 /**
1711 * This method returnst the sequence value from the io tag value
1712 * @this_controller:
1713 * @io_tag:
1714 *
1715 * u16
1716 */
1717
1718 /**
1719 * This method returns the IO request associated with the tag value
1720 * @this_controller:
1721 * @io_tag:
1722 *
1723 * SCIC_SDS_IO_REQUEST_T* NULL if there is no valid IO request at the tag value
1724 */
1725 struct scic_sds_request *scic_sds_controller_get_io_request_from_tag(
1726 struct scic_sds_controller *this_controller,
1727 u16 io_tag
1728 ) {
1729 u16 task_index;
1730 u16 task_sequence;
1731
1732 task_index = scic_sds_io_tag_get_index(io_tag);
1733
1734 if (task_index < this_controller->task_context_entries) {
1735 if (this_controller->io_request_table[task_index] != NULL) {
1736 task_sequence = scic_sds_io_tag_get_sequence(io_tag);
1737
1738 if (task_sequence == this_controller->io_request_sequence[task_index]) {
1739 return this_controller->io_request_table[task_index];
1740 }
1741 }
1742 }
1743
1744 return NULL;
1745 }
1746
1747 /**
1748 * This method allocates remote node index and the reserves the remote node
1749 * context space for use. This method can fail if there are no more remote
1750 * node index available.
1751 * @this_controller: This is the controller object which contains the set of
1752 * free remote node ids
1753 * @the_devce: This is the device object which is requesting the a remote node
1754 * id
1755 * @node_id: This is the remote node id that is assinged to the device if one
1756 * is available
1757 *
1758 * enum sci_status SCI_FAILURE_OUT_OF_RESOURCES if there are no available remote
1759 * node index available.
1760 */
1761 enum sci_status scic_sds_controller_allocate_remote_node_context(
1762 struct scic_sds_controller *this_controller,
1763 struct scic_sds_remote_device *the_device,
1764 u16 *node_id)
1765 {
1766 u16 node_index;
1767 u32 remote_node_count = scic_sds_remote_device_node_count(the_device);
1768
1769 node_index = scic_sds_remote_node_table_allocate_remote_node(
1770 &this_controller->available_remote_nodes, remote_node_count
1771 );
1772
1773 if (node_index != SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX) {
1774 this_controller->device_table[node_index] = the_device;
1775
1776 *node_id = node_index;
1777
1778 return SCI_SUCCESS;
1779 }
1780
1781 return SCI_FAILURE_INSUFFICIENT_RESOURCES;
1782 }
1783
1784 /**
1785 * This method frees the remote node index back to the available pool. Once
1786 * this is done the remote node context buffer is no longer valid and can
1787 * not be used.
1788 * @this_controller:
1789 * @the_device:
1790 * @node_id:
1791 *
1792 */
1793 void scic_sds_controller_free_remote_node_context(
1794 struct scic_sds_controller *this_controller,
1795 struct scic_sds_remote_device *the_device,
1796 u16 node_id)
1797 {
1798 u32 remote_node_count = scic_sds_remote_device_node_count(the_device);
1799
1800 if (this_controller->device_table[node_id] == the_device) {
1801 this_controller->device_table[node_id] = NULL;
1802
1803 scic_sds_remote_node_table_release_remote_node_index(
1804 &this_controller->available_remote_nodes, remote_node_count, node_id
1805 );
1806 }
1807 }
1808
1809 /**
1810 * This method returns the union scu_remote_node_context for the specified remote
1811 * node id.
1812 * @this_controller:
1813 * @node_id:
1814 *
1815 * union scu_remote_node_context*
1816 */
1817 union scu_remote_node_context *scic_sds_controller_get_remote_node_context_buffer(
1818 struct scic_sds_controller *this_controller,
1819 u16 node_id
1820 ) {
1821 if (
1822 (node_id < this_controller->remote_node_entries)
1823 && (this_controller->device_table[node_id] != NULL)
1824 ) {
1825 return &this_controller->remote_node_context_table[node_id];
1826 }
1827
1828 return NULL;
1829 }
1830
1831 /**
1832 *
1833 * @resposne_buffer: This is the buffer into which the D2H register FIS will be
1834 * constructed.
1835 * @frame_header: This is the frame header returned by the hardware.
1836 * @frame_buffer: This is the frame buffer returned by the hardware.
1837 *
1838 * This method will combind the frame header and frame buffer to create a SATA
1839 * D2H register FIS none
1840 */
1841 void scic_sds_controller_copy_sata_response(
1842 void *response_buffer,
1843 void *frame_header,
1844 void *frame_buffer)
1845 {
1846 memcpy(
1847 response_buffer,
1848 frame_header,
1849 sizeof(u32)
1850 );
1851
1852 memcpy(
1853 (char *)((char *)response_buffer + sizeof(u32)),
1854 frame_buffer,
1855 sizeof(struct sata_fis_reg_d2h) - sizeof(u32)
1856 );
1857 }
1858
1859 /**
1860 * This method releases the frame once this is done the frame is available for
1861 * re-use by the hardware. The data contained in the frame header and frame
1862 * buffer is no longer valid. The UF queue get pointer is only updated if UF
1863 * control indicates this is appropriate.
1864 * @this_controller:
1865 * @frame_index:
1866 *
1867 */
1868 void scic_sds_controller_release_frame(
1869 struct scic_sds_controller *this_controller,
1870 u32 frame_index)
1871 {
1872 if (scic_sds_unsolicited_frame_control_release_frame(
1873 &this_controller->uf_control, frame_index) == true)
1874 SCU_UFQGP_WRITE(this_controller, this_controller->uf_control.get);
1875 }
1876
1877 /**
1878 * This method sets user parameters and OEM parameters to default values.
1879 * Users can override these values utilizing the scic_user_parameters_set()
1880 * and scic_oem_parameters_set() methods.
1881 * @scic: This parameter specifies the controller for which to set the
1882 * configuration parameters to their default values.
1883 *
1884 */
1885 static void scic_sds_controller_set_default_config_parameters(struct scic_sds_controller *scic)
1886 {
1887 struct isci_host *ihost = sci_object_get_association(scic);
1888 u16 index;
1889
1890 /* Default to APC mode. */
1891 scic->oem_parameters.sds1.controller.mode_type = SCIC_PORT_AUTOMATIC_CONFIGURATION_MODE;
1892
1893 /* Default to APC mode. */
1894 scic->oem_parameters.sds1.controller.max_concurrent_dev_spin_up = 1;
1895
1896 /* Default to no SSC operation. */
1897 scic->oem_parameters.sds1.controller.do_enable_ssc = false;
1898
1899 /* Initialize all of the port parameter information to narrow ports. */
1900 for (index = 0; index < SCI_MAX_PORTS; index++) {
1901 scic->oem_parameters.sds1.ports[index].phy_mask = 0;
1902 }
1903
1904 /* Initialize all of the phy parameter information. */
1905 for (index = 0; index < SCI_MAX_PHYS; index++) {
1906 /* Default to 6G (i.e. Gen 3) for now. */
1907 scic->user_parameters.sds1.phys[index].max_speed_generation = 3;
1908
1909 /* the frequencies cannot be 0 */
1910 scic->user_parameters.sds1.phys[index].align_insertion_frequency = 0x7f;
1911 scic->user_parameters.sds1.phys[index].in_connection_align_insertion_frequency = 0xff;
1912 scic->user_parameters.sds1.phys[index].notify_enable_spin_up_insertion_frequency = 0x33;
1913
1914 /*
1915 * Previous Vitesse based expanders had a arbitration issue that
1916 * is worked around by having the upper 32-bits of SAS address
1917 * with a value greater then the Vitesse company identifier.
1918 * Hence, usage of 0x5FCFFFFF. */
1919 scic->oem_parameters.sds1.phys[index].sas_address.low = 0x1 + ihost->id;
1920 scic->oem_parameters.sds1.phys[index].sas_address.high = 0x5FCFFFFF;
1921 }
1922
1923 scic->user_parameters.sds1.stp_inactivity_timeout = 5;
1924 scic->user_parameters.sds1.ssp_inactivity_timeout = 5;
1925 scic->user_parameters.sds1.stp_max_occupancy_timeout = 5;
1926 scic->user_parameters.sds1.ssp_max_occupancy_timeout = 20;
1927 scic->user_parameters.sds1.no_outbound_task_timeout = 20;
1928 }
1929
1930 /**
1931 * scic_controller_initialize() - This method will initialize the controller
1932 * hardware managed by the supplied core controller object. This method
1933 * will bring the physical controller hardware out of reset and enable the
1934 * core to determine the capabilities of the hardware being managed. Thus,
1935 * the core controller can determine it's exact physical (DMA capable)
1936 * memory requirements.
1937 * @controller: This parameter specifies the controller to be initialized.
1938 *
1939 * The SCI Core user must have called scic_controller_construct() on the
1940 * supplied controller object previously. Indicate if the controller was
1941 * successfully initialized or if it failed in some way. SCI_SUCCESS This value
1942 * is returned if the controller hardware was successfully initialized.
1943 */
1944 enum sci_status scic_controller_initialize(
1945 struct scic_sds_controller *scic)
1946 {
1947 enum sci_status status = SCI_FAILURE_INVALID_STATE;
1948 sci_base_controller_handler_t initialize;
1949 u32 state;
1950
1951 state = scic->parent.state_machine.current_state_id;
1952 initialize = scic_sds_controller_state_handler_table[state].base.initialize;
1953
1954 if (initialize)
1955 status = initialize(&scic->parent);
1956 else
1957 dev_warn(scic_to_dev(scic),
1958 "%s: SCIC Controller initialize operation requested "
1959 "in invalid state %d\n", __func__, state);
1960
1961 return status;
1962 }
1963
1964 /**
1965 * scic_controller_get_suggested_start_timeout() - This method returns the
1966 * suggested scic_controller_start() timeout amount. The user is free to
1967 * use any timeout value, but this method provides the suggested minimum
1968 * start timeout value. The returned value is based upon empirical
1969 * information determined as a result of interoperability testing.
1970 * @controller: the handle to the controller object for which to return the
1971 * suggested start timeout.
1972 *
1973 * This method returns the number of milliseconds for the suggested start
1974 * operation timeout.
1975 */
1976 u32 scic_controller_get_suggested_start_timeout(
1977 struct scic_sds_controller *sc)
1978 {
1979 /* Validate the user supplied parameters. */
1980 if (sc == NULL)
1981 return 0;
1982
1983 /*
1984 * The suggested minimum timeout value for a controller start operation:
1985 *
1986 * Signature FIS Timeout
1987 * + Phy Start Timeout
1988 * + Number of Phy Spin Up Intervals
1989 * ---------------------------------
1990 * Number of milliseconds for the controller start operation.
1991 *
1992 * NOTE: The number of phy spin up intervals will be equivalent
1993 * to the number of phys divided by the number phys allowed
1994 * per interval - 1 (once OEM parameters are supported).
1995 * Currently we assume only 1 phy per interval. */
1996
1997 return SCIC_SDS_SIGNATURE_FIS_TIMEOUT
1998 + SCIC_SDS_CONTROLLER_PHY_START_TIMEOUT
1999 + ((SCI_MAX_PHYS - 1) * SCIC_SDS_CONTROLLER_POWER_CONTROL_INTERVAL);
2000 }
2001
2002 /**
2003 * scic_controller_start() - This method will start the supplied core
2004 * controller. This method will start the staggered spin up operation. The
2005 * SCI User completion callback is called when the following conditions are
2006 * met: -# the return status of this method is SCI_SUCCESS. -# after all of
2007 * the phys have successfully started or been given the opportunity to start.
2008 * @controller: the handle to the controller object to start.
2009 * @timeout: This parameter specifies the number of milliseconds in which the
2010 * start operation should complete.
2011 *
2012 * The SCI Core user must have filled in the physical memory descriptor
2013 * structure via the sci_controller_get_memory_descriptor_list() method. The
2014 * SCI Core user must have invoked the scic_controller_initialize() method
2015 * prior to invoking this method. The controller must be in the INITIALIZED or
2016 * STARTED state. Indicate if the controller start method succeeded or failed
2017 * in some way. SCI_SUCCESS if the start operation succeeded.
2018 * SCI_WARNING_ALREADY_IN_STATE if the controller is already in the STARTED
2019 * state. SCI_FAILURE_INVALID_STATE if the controller is not either in the
2020 * INITIALIZED or STARTED states. SCI_FAILURE_INVALID_MEMORY_DESCRIPTOR if
2021 * there are inconsistent or invalid values in the supplied
2022 * struct sci_physical_memory_descriptor array.
2023 */
2024 enum sci_status scic_controller_start(
2025 struct scic_sds_controller *scic,
2026 u32 timeout)
2027 {
2028 enum sci_status status = SCI_FAILURE_INVALID_STATE;
2029 sci_base_controller_timed_handler_t start;
2030 u32 state;
2031
2032 state = scic->parent.state_machine.current_state_id;
2033 start = scic_sds_controller_state_handler_table[state].base.start;
2034
2035 if (start)
2036 status = start(&scic->parent, timeout);
2037 else
2038 dev_warn(scic_to_dev(scic),
2039 "%s: SCIC Controller start operation requested in "
2040 "invalid state %d\n", __func__, state);
2041
2042 return status;
2043 }
2044
2045 /**
2046 * scic_controller_stop() - This method will stop an individual controller
2047 * object.This method will invoke the associated user callback upon
2048 * completion. The completion callback is called when the following
2049 * conditions are met: -# the method return status is SCI_SUCCESS. -# the
2050 * controller has been quiesced. This method will ensure that all IO
2051 * requests are quiesced, phys are stopped, and all additional operation by
2052 * the hardware is halted.
2053 * @controller: the handle to the controller object to stop.
2054 * @timeout: This parameter specifies the number of milliseconds in which the
2055 * stop operation should complete.
2056 *
2057 * The controller must be in the STARTED or STOPPED state. Indicate if the
2058 * controller stop method succeeded or failed in some way. SCI_SUCCESS if the
2059 * stop operation successfully began. SCI_WARNING_ALREADY_IN_STATE if the
2060 * controller is already in the STOPPED state. SCI_FAILURE_INVALID_STATE if the
2061 * controller is not either in the STARTED or STOPPED states.
2062 */
2063 enum sci_status scic_controller_stop(
2064 struct scic_sds_controller *scic,
2065 u32 timeout)
2066 {
2067 enum sci_status status = SCI_FAILURE_INVALID_STATE;
2068 sci_base_controller_timed_handler_t stop;
2069 u32 state;
2070
2071 state = scic->parent.state_machine.current_state_id;
2072 stop = scic_sds_controller_state_handler_table[state].base.stop;
2073
2074 if (stop)
2075 status = stop(&scic->parent, timeout);
2076 else
2077 dev_warn(scic_to_dev(scic),
2078 "%s: SCIC Controller stop operation requested in "
2079 "invalid state %d\n", __func__, state);
2080
2081 return status;
2082 }
2083
2084 /**
2085 * scic_controller_reset() - This method will reset the supplied core
2086 * controller regardless of the state of said controller. This operation is
2087 * considered destructive. In other words, all current operations are wiped
2088 * out. No IO completions for outstanding devices occur. Outstanding IO
2089 * requests are not aborted or completed at the actual remote device.
2090 * @controller: the handle to the controller object to reset.
2091 *
2092 * Indicate if the controller reset method succeeded or failed in some way.
2093 * SCI_SUCCESS if the reset operation successfully started. SCI_FATAL_ERROR if
2094 * the controller reset operation is unable to complete.
2095 */
2096 enum sci_status scic_controller_reset(
2097 struct scic_sds_controller *scic)
2098 {
2099 enum sci_status status = SCI_FAILURE_INVALID_STATE;
2100 sci_base_controller_handler_t reset;
2101 u32 state;
2102
2103 state = scic->parent.state_machine.current_state_id;
2104 reset = scic_sds_controller_state_handler_table[state].base.reset;
2105
2106 if (reset)
2107 status = reset(&scic->parent);
2108 else
2109 dev_warn(scic_to_dev(scic),
2110 "%s: SCIC Controller reset operation requested in "
2111 "invalid state %d\n", __func__, state);
2112
2113 return status;
2114 }
2115
2116 /**
2117 * scic_controller_start_io() - This method is called by the SCI user to
2118 * send/start an IO request. If the method invocation is successful, then
2119 * the IO request has been queued to the hardware for processing.
2120 * @controller: the handle to the controller object for which to start an IO
2121 * request.
2122 * @remote_device: the handle to the remote device object for which to start an
2123 * IO request.
2124 * @io_request: the handle to the io request object to start.
2125 * @io_tag: This parameter specifies a previously allocated IO tag that the
2126 * user desires to be utilized for this request. This parameter is optional.
2127 * The user is allowed to supply SCI_CONTROLLER_INVALID_IO_TAG as the value
2128 * for this parameter.
2129 *
2130 * - IO tags are a protected resource. It is incumbent upon the SCI Core user
2131 * to ensure that each of the methods that may allocate or free available IO
2132 * tags are handled in a mutually exclusive manner. This method is one of said
2133 * methods requiring proper critical code section protection (e.g. semaphore,
2134 * spin-lock, etc.). - For SATA, the user is required to manage NCQ tags. As a
2135 * result, it is expected the user will have set the NCQ tag field in the host
2136 * to device register FIS prior to calling this method. There is also a
2137 * requirement for the user to call scic_stp_io_set_ncq_tag() prior to invoking
2138 * the scic_controller_start_io() method. scic_controller_allocate_tag() for
2139 * more information on allocating a tag. Indicate if the controller
2140 * successfully started the IO request. SCI_IO_SUCCESS if the IO request was
2141 * successfully started. Determine the failure situations and return values.
2142 */
2143 enum sci_io_status scic_controller_start_io(
2144 struct scic_sds_controller *scic,
2145 struct scic_sds_remote_device *remote_device,
2146 struct scic_sds_request *io_request,
2147 u16 io_tag)
2148 {
2149 u32 state;
2150 sci_base_controller_start_request_handler_t start_io;
2151
2152 state = scic->parent.state_machine.current_state_id;
2153 start_io = scic_sds_controller_state_handler_table[state].base.start_io;
2154
2155 return start_io(&scic->parent,
2156 (struct sci_base_remote_device *) remote_device,
2157 (struct sci_base_request *)io_request, io_tag);
2158 }
2159
2160 /**
2161 * scic_controller_terminate_request() - This method is called by the SCI Core
2162 * user to terminate an ongoing (i.e. started) core IO request. This does
2163 * not abort the IO request at the target, but rather removes the IO request
2164 * from the host controller.
2165 * @controller: the handle to the controller object for which to terminate a
2166 * request.
2167 * @remote_device: the handle to the remote device object for which to
2168 * terminate a request.
2169 * @request: the handle to the io or task management request object to
2170 * terminate.
2171 *
2172 * Indicate if the controller successfully began the terminate process for the
2173 * IO request. SCI_SUCCESS if the terminate process was successfully started
2174 * for the request. Determine the failure situations and return values.
2175 */
2176 enum sci_status scic_controller_terminate_request(
2177 struct scic_sds_controller *scic,
2178 struct scic_sds_remote_device *remote_device,
2179 struct scic_sds_request *request)
2180 {
2181 sci_base_controller_request_handler_t terminate_request;
2182 u32 state;
2183
2184 state = scic->parent.state_machine.current_state_id;
2185 terminate_request = scic_sds_controller_state_handler_table[state].terminate_request;
2186
2187 return terminate_request(&scic->parent,
2188 (struct sci_base_remote_device *)remote_device,
2189 (struct sci_base_request *)request);
2190 }
2191
2192 /**
2193 * scic_controller_complete_io() - This method will perform core specific
2194 * completion operations for an IO request. After this method is invoked,
2195 * the user should consider the IO request as invalid until it is properly
2196 * reused (i.e. re-constructed).
2197 * @controller: The handle to the controller object for which to complete the
2198 * IO request.
2199 * @remote_device: The handle to the remote device object for which to complete
2200 * the IO request.
2201 * @io_request: the handle to the io request object to complete.
2202 *
2203 * - IO tags are a protected resource. It is incumbent upon the SCI Core user
2204 * to ensure that each of the methods that may allocate or free available IO
2205 * tags are handled in a mutually exclusive manner. This method is one of said
2206 * methods requiring proper critical code section protection (e.g. semaphore,
2207 * spin-lock, etc.). - If the IO tag for a request was allocated, by the SCI
2208 * Core user, using the scic_controller_allocate_io_tag() method, then it is
2209 * the responsibility of the caller to invoke the scic_controller_free_io_tag()
2210 * method to free the tag (i.e. this method will not free the IO tag). Indicate
2211 * if the controller successfully completed the IO request. SCI_SUCCESS if the
2212 * completion process was successful.
2213 */
2214 enum sci_status scic_controller_complete_io(
2215 struct scic_sds_controller *scic,
2216 struct scic_sds_remote_device *remote_device,
2217 struct scic_sds_request *io_request)
2218 {
2219 u32 state;
2220 sci_base_controller_request_handler_t complete_io;
2221
2222 state = scic->parent.state_machine.current_state_id;
2223 complete_io = scic_sds_controller_state_handler_table[state].base.complete_io;
2224
2225 return complete_io(&scic->parent,
2226 (struct sci_base_remote_device *)remote_device,
2227 (struct sci_base_request *)io_request);
2228 }
2229
2230 /**
2231 * scic_controller_start_task() - This method is called by the SCIC user to
2232 * send/start a framework task management request.
2233 * @controller: the handle to the controller object for which to start the task
2234 * management request.
2235 * @remote_device: the handle to the remote device object for which to start
2236 * the task management request.
2237 * @task_request: the handle to the task request object to start.
2238 * @io_tag: This parameter specifies a previously allocated IO tag that the
2239 * user desires to be utilized for this request. Note this not the io_tag
2240 * of the request being managed. It is to be utilized for the task request
2241 * itself. This parameter is optional. The user is allowed to supply
2242 * SCI_CONTROLLER_INVALID_IO_TAG as the value for this parameter.
2243 *
2244 * - IO tags are a protected resource. It is incumbent upon the SCI Core user
2245 * to ensure that each of the methods that may allocate or free available IO
2246 * tags are handled in a mutually exclusive manner. This method is one of said
2247 * methods requiring proper critical code section protection (e.g. semaphore,
2248 * spin-lock, etc.). - The user must synchronize this task with completion
2249 * queue processing. If they are not synchronized then it is possible for the
2250 * io requests that are being managed by the task request can complete before
2251 * starting the task request. scic_controller_allocate_tag() for more
2252 * information on allocating a tag. Indicate if the controller successfully
2253 * started the IO request. SCI_TASK_SUCCESS if the task request was
2254 * successfully started. SCI_TASK_FAILURE_REQUIRES_SCSI_ABORT This value is
2255 * returned if there is/are task(s) outstanding that require termination or
2256 * completion before this request can succeed.
2257 */
2258 enum sci_task_status scic_controller_start_task(
2259 struct scic_sds_controller *scic,
2260 struct scic_sds_remote_device *remote_device,
2261 struct scic_sds_request *task_request,
2262 u16 task_tag)
2263 {
2264 u32 state;
2265 sci_base_controller_start_request_handler_t start_task;
2266 enum sci_task_status status = SCI_TASK_FAILURE_INVALID_STATE;
2267
2268 state = scic->parent.state_machine.current_state_id;
2269 start_task = scic_sds_controller_state_handler_table[state].base.start_task;
2270
2271 if (start_task)
2272 status = start_task(&scic->parent,
2273 (struct sci_base_remote_device *)remote_device,
2274 (struct sci_base_request *)task_request,
2275 task_tag);
2276 else
2277 dev_warn(scic_to_dev(scic),
2278 "%s: SCIC Controller starting task from invalid "
2279 "state\n",
2280 __func__);
2281
2282 return status;
2283 }
2284
2285 /**
2286 * scic_controller_complete_task() - This method will perform core specific
2287 * completion operations for task management request. After this method is
2288 * invoked, the user should consider the task request as invalid until it is
2289 * properly reused (i.e. re-constructed).
2290 * @controller: The handle to the controller object for which to complete the
2291 * task management request.
2292 * @remote_device: The handle to the remote device object for which to complete
2293 * the task management request.
2294 * @task_request: the handle to the task management request object to complete.
2295 *
2296 * Indicate if the controller successfully completed the task management
2297 * request. SCI_SUCCESS if the completion process was successful.
2298 */
2299 enum sci_status scic_controller_complete_task(
2300 struct scic_sds_controller *scic,
2301 struct scic_sds_remote_device *remote_device,
2302 struct scic_sds_request *task_request)
2303 {
2304 u32 state;
2305 sci_base_controller_request_handler_t complete_task;
2306 enum sci_status status = SCI_FAILURE_INVALID_STATE;
2307
2308 state = scic->parent.state_machine.current_state_id;
2309 complete_task = scic_sds_controller_state_handler_table[state].base.complete_task;
2310
2311 if (complete_task)
2312 status = complete_task(&scic->parent,
2313 (struct sci_base_remote_device *)remote_device,
2314 (struct sci_base_request *)task_request);
2315 else
2316 dev_warn(scic_to_dev(scic),
2317 "%s: SCIC Controller completing task from invalid "
2318 "state\n",
2319 __func__);
2320
2321 return status;
2322 }
2323
2324
2325 /**
2326 * scic_controller_get_port_handle() - This method simply provides the user
2327 * with a unique handle for a given SAS/SATA core port index.
2328 * @controller: This parameter represents the handle to the controller object
2329 * from which to retrieve a port (SAS or SATA) handle.
2330 * @port_index: This parameter specifies the port index in the controller for
2331 * which to retrieve the port handle. 0 <= port_index < maximum number of
2332 * phys.
2333 * @port_handle: This parameter specifies the retrieved port handle to be
2334 * provided to the caller.
2335 *
2336 * Indicate if the retrieval of the port handle was successful. SCI_SUCCESS
2337 * This value is returned if the retrieval was successful.
2338 * SCI_FAILURE_INVALID_PORT This value is returned if the supplied port id is
2339 * not in the supported range.
2340 */
2341 enum sci_status scic_controller_get_port_handle(
2342 struct scic_sds_controller *scic,
2343 u8 port_index,
2344 struct scic_sds_port **port_handle)
2345 {
2346 if (port_index < scic->logical_port_entries) {
2347 *port_handle = &scic->port_table[port_index];
2348
2349 return SCI_SUCCESS;
2350 }
2351
2352 return SCI_FAILURE_INVALID_PORT;
2353 }
2354
2355 /**
2356 * scic_controller_get_phy_handle() - This method simply provides the user with
2357 * a unique handle for a given SAS/SATA phy index/identifier.
2358 * @controller: This parameter represents the handle to the controller object
2359 * from which to retrieve a phy (SAS or SATA) handle.
2360 * @phy_index: This parameter specifies the phy index in the controller for
2361 * which to retrieve the phy handle. 0 <= phy_index < maximum number of phys.
2362 * @phy_handle: This parameter specifies the retrieved phy handle to be
2363 * provided to the caller.
2364 *
2365 * Indicate if the retrieval of the phy handle was successful. SCI_SUCCESS This
2366 * value is returned if the retrieval was successful. SCI_FAILURE_INVALID_PHY
2367 * This value is returned if the supplied phy id is not in the supported range.
2368 */
2369 enum sci_status scic_controller_get_phy_handle(
2370 struct scic_sds_controller *scic,
2371 u8 phy_index,
2372 struct scic_sds_phy **phy_handle)
2373 {
2374 if (phy_index < ARRAY_SIZE(scic->phy_table)) {
2375 *phy_handle = &scic->phy_table[phy_index];
2376
2377 return SCI_SUCCESS;
2378 }
2379
2380 dev_err(scic_to_dev(scic),
2381 "%s: Controller:0x%p PhyId:0x%x invalid phy index\n",
2382 __func__, scic, phy_index);
2383
2384 return SCI_FAILURE_INVALID_PHY;
2385 }
2386
2387 /**
2388 * scic_controller_allocate_io_tag() - This method will allocate a tag from the
2389 * pool of free IO tags. Direct allocation of IO tags by the SCI Core user
2390 * is optional. The scic_controller_start_io() method will allocate an IO
2391 * tag if this method is not utilized and the tag is not supplied to the IO
2392 * construct routine. Direct allocation of IO tags may provide additional
2393 * performance improvements in environments capable of supporting this usage
2394 * model. Additionally, direct allocation of IO tags also provides
2395 * additional flexibility to the SCI Core user. Specifically, the user may
2396 * retain IO tags across the lives of multiple IO requests.
2397 * @controller: the handle to the controller object for which to allocate the
2398 * tag.
2399 *
2400 * IO tags are a protected resource. It is incumbent upon the SCI Core user to
2401 * ensure that each of the methods that may allocate or free available IO tags
2402 * are handled in a mutually exclusive manner. This method is one of said
2403 * methods requiring proper critical code section protection (e.g. semaphore,
2404 * spin-lock, etc.). An unsigned integer representing an available IO tag.
2405 * SCI_CONTROLLER_INVALID_IO_TAG This value is returned if there are no
2406 * currently available tags to be allocated. All return other values indicate a
2407 * legitimate tag.
2408 */
2409 u16 scic_controller_allocate_io_tag(
2410 struct scic_sds_controller *scic)
2411 {
2412 u16 task_context;
2413 u16 sequence_count;
2414
2415 if (!sci_pool_empty(scic->tci_pool)) {
2416 sci_pool_get(scic->tci_pool, task_context);
2417
2418 sequence_count = scic->io_request_sequence[task_context];
2419
2420 return scic_sds_io_tag_construct(sequence_count, task_context);
2421 }
2422
2423 return SCI_CONTROLLER_INVALID_IO_TAG;
2424 }
2425
2426 /**
2427 * scic_controller_free_io_tag() - This method will free an IO tag to the pool
2428 * of free IO tags. This method provides the SCI Core user more flexibility
2429 * with regards to IO tags. The user may desire to keep an IO tag after an
2430 * IO request has completed, because they plan on re-using the tag for a
2431 * subsequent IO request. This method is only legal if the tag was
2432 * allocated via scic_controller_allocate_io_tag().
2433 * @controller: This parameter specifies the handle to the controller object
2434 * for which to free/return the tag.
2435 * @io_tag: This parameter represents the tag to be freed to the pool of
2436 * available tags.
2437 *
2438 * - IO tags are a protected resource. It is incumbent upon the SCI Core user
2439 * to ensure that each of the methods that may allocate or free available IO
2440 * tags are handled in a mutually exclusive manner. This method is one of said
2441 * methods requiring proper critical code section protection (e.g. semaphore,
2442 * spin-lock, etc.). - If the IO tag for a request was allocated, by the SCI
2443 * Core user, using the scic_controller_allocate_io_tag() method, then it is
2444 * the responsibility of the caller to invoke this method to free the tag. This
2445 * method returns an indication of whether the tag was successfully put back
2446 * (freed) to the pool of available tags. SCI_SUCCESS This return value
2447 * indicates the tag was successfully placed into the pool of available IO
2448 * tags. SCI_FAILURE_INVALID_IO_TAG This value is returned if the supplied tag
2449 * is not a valid IO tag value.
2450 */
2451 enum sci_status scic_controller_free_io_tag(
2452 struct scic_sds_controller *scic,
2453 u16 io_tag)
2454 {
2455 u16 sequence;
2456 u16 index;
2457
2458 BUG_ON(io_tag == SCI_CONTROLLER_INVALID_IO_TAG);
2459
2460 sequence = scic_sds_io_tag_get_sequence(io_tag);
2461 index = scic_sds_io_tag_get_index(io_tag);
2462
2463 if (!sci_pool_full(scic->tci_pool)) {
2464 if (sequence == scic->io_request_sequence[index]) {
2465 scic_sds_io_sequence_increment(
2466 scic->io_request_sequence[index]);
2467
2468 sci_pool_put(scic->tci_pool, index);
2469
2470 return SCI_SUCCESS;
2471 }
2472 }
2473
2474 return SCI_FAILURE_INVALID_IO_TAG;
2475 }
2476
2477 void scic_controller_enable_interrupts(
2478 struct scic_sds_controller *scic)
2479 {
2480 BUG_ON(scic->smu_registers == NULL);
2481 SMU_IMR_WRITE(scic, 0x00000000);
2482 }
2483
2484 void scic_controller_disable_interrupts(
2485 struct scic_sds_controller *scic)
2486 {
2487 BUG_ON(scic->smu_registers == NULL);
2488 SMU_IMR_WRITE(scic, 0xffffffff);
2489 }
2490
2491 static enum sci_status scic_controller_set_mode(
2492 struct scic_sds_controller *scic,
2493 enum sci_controller_mode operating_mode)
2494 {
2495 enum sci_status status = SCI_SUCCESS;
2496
2497 if ((scic->parent.state_machine.current_state_id ==
2498 SCI_BASE_CONTROLLER_STATE_INITIALIZING) ||
2499 (scic->parent.state_machine.current_state_id ==
2500 SCI_BASE_CONTROLLER_STATE_INITIALIZED)) {
2501 switch (operating_mode) {
2502 case SCI_MODE_SPEED:
2503 scic->remote_node_entries = SCI_MAX_REMOTE_DEVICES;
2504 scic->task_context_entries = SCU_IO_REQUEST_COUNT;
2505 scic->uf_control.buffers.count =
2506 SCU_UNSOLICITED_FRAME_COUNT;
2507 scic->completion_event_entries = SCU_EVENT_COUNT;
2508 scic->completion_queue_entries =
2509 SCU_COMPLETION_QUEUE_COUNT;
2510 scic_sds_controller_build_memory_descriptor_table(scic);
2511 break;
2512
2513 case SCI_MODE_SIZE:
2514 scic->remote_node_entries = SCI_MIN_REMOTE_DEVICES;
2515 scic->task_context_entries = SCI_MIN_IO_REQUESTS;
2516 scic->uf_control.buffers.count =
2517 SCU_MIN_UNSOLICITED_FRAMES;
2518 scic->completion_event_entries = SCU_MIN_EVENTS;
2519 scic->completion_queue_entries =
2520 SCU_MIN_COMPLETION_QUEUE_ENTRIES;
2521 scic_sds_controller_build_memory_descriptor_table(scic);
2522 break;
2523
2524 default:
2525 status = SCI_FAILURE_INVALID_PARAMETER_VALUE;
2526 break;
2527 }
2528 } else
2529 status = SCI_FAILURE_INVALID_STATE;
2530
2531 return status;
2532 }
2533
2534 /**
2535 * scic_sds_controller_reset_hardware() -
2536 *
2537 * This method will reset the controller hardware.
2538 */
2539 static void scic_sds_controller_reset_hardware(
2540 struct scic_sds_controller *scic)
2541 {
2542 /* Disable interrupts so we dont take any spurious interrupts */
2543 scic_controller_disable_interrupts(scic);
2544
2545 /* Reset the SCU */
2546 SMU_SMUSRCR_WRITE(scic, 0xFFFFFFFF);
2547
2548 /* Delay for 1ms to before clearing the CQP and UFQPR. */
2549 udelay(1000);
2550
2551 /* The write to the CQGR clears the CQP */
2552 SMU_CQGR_WRITE(scic, 0x00000000);
2553
2554 /* The write to the UFQGP clears the UFQPR */
2555 SCU_UFQGP_WRITE(scic, 0x00000000);
2556 }
2557
2558 enum sci_status scic_user_parameters_set(
2559 struct scic_sds_controller *scic,
2560 union scic_user_parameters *scic_parms)
2561 {
2562 u32 state = scic->parent.state_machine.current_state_id;
2563
2564 if (state == SCI_BASE_CONTROLLER_STATE_RESET ||
2565 state == SCI_BASE_CONTROLLER_STATE_INITIALIZING ||
2566 state == SCI_BASE_CONTROLLER_STATE_INITIALIZED) {
2567 u16 index;
2568
2569 /*
2570 * Validate the user parameters. If they are not legal, then
2571 * return a failure.
2572 */
2573 for (index = 0; index < SCI_MAX_PHYS; index++) {
2574 struct sci_phy_user_params *user_phy;
2575
2576 user_phy = &scic_parms->sds1.phys[index];
2577
2578 if (!((user_phy->max_speed_generation <=
2579 SCIC_SDS_PARM_MAX_SPEED) &&
2580 (user_phy->max_speed_generation >
2581 SCIC_SDS_PARM_NO_SPEED)))
2582 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2583
2584 if (user_phy->in_connection_align_insertion_frequency <
2585 3)
2586 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2587
2588 if ((user_phy->in_connection_align_insertion_frequency <
2589 3) ||
2590 (user_phy->align_insertion_frequency == 0) ||
2591 (user_phy->
2592 notify_enable_spin_up_insertion_frequency ==
2593 0))
2594 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2595 }
2596
2597 if ((scic_parms->sds1.stp_inactivity_timeout == 0) ||
2598 (scic_parms->sds1.ssp_inactivity_timeout == 0) ||
2599 (scic_parms->sds1.stp_max_occupancy_timeout == 0) ||
2600 (scic_parms->sds1.ssp_max_occupancy_timeout == 0) ||
2601 (scic_parms->sds1.no_outbound_task_timeout == 0))
2602 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2603
2604 memcpy(&scic->user_parameters, scic_parms, sizeof(*scic_parms));
2605
2606 return SCI_SUCCESS;
2607 }
2608
2609 return SCI_FAILURE_INVALID_STATE;
2610 }
2611
2612 enum sci_status scic_oem_parameters_set(
2613 struct scic_sds_controller *scic,
2614 union scic_oem_parameters *scic_parms)
2615 {
2616 u32 state = scic->parent.state_machine.current_state_id;
2617
2618 if (state == SCI_BASE_CONTROLLER_STATE_RESET ||
2619 state == SCI_BASE_CONTROLLER_STATE_INITIALIZING ||
2620 state == SCI_BASE_CONTROLLER_STATE_INITIALIZED) {
2621 u16 index;
2622 u8 combined_phy_mask = 0;
2623
2624 /*
2625 * Validate the oem parameters. If they are not legal, then
2626 * return a failure. */
2627 for (index = 0; index < SCI_MAX_PORTS; index++) {
2628 if (scic_parms->sds1.ports[index].phy_mask > SCIC_SDS_PARM_PHY_MASK_MAX)
2629 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2630 }
2631
2632 for (index = 0; index < SCI_MAX_PHYS; index++) {
2633 if ((scic_parms->sds1.phys[index].sas_address.high == 0) &&
2634 (scic_parms->sds1.phys[index].sas_address.low == 0))
2635 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2636 }
2637
2638 if (scic_parms->sds1.controller.mode_type ==
2639 SCIC_PORT_AUTOMATIC_CONFIGURATION_MODE) {
2640 for (index = 0; index < SCI_MAX_PHYS; index++) {
2641 if (scic_parms->sds1.ports[index].phy_mask != 0)
2642 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2643 }
2644 } else if (scic_parms->sds1.controller.mode_type ==
2645 SCIC_PORT_MANUAL_CONFIGURATION_MODE) {
2646 for (index = 0; index < SCI_MAX_PHYS; index++)
2647 combined_phy_mask |= scic_parms->sds1.ports[index].phy_mask;
2648
2649 if (combined_phy_mask == 0)
2650 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2651 } else
2652 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2653
2654 if (scic_parms->sds1.controller.max_concurrent_dev_spin_up >
2655 MAX_CONCURRENT_DEVICE_SPIN_UP_COUNT)
2656 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2657
2658 scic->oem_parameters.sds1 = scic_parms->sds1;
2659
2660 return SCI_SUCCESS;
2661 }
2662
2663 return SCI_FAILURE_INVALID_STATE;
2664 }
2665
2666 void scic_oem_parameters_get(
2667 struct scic_sds_controller *scic,
2668 union scic_oem_parameters *scic_parms)
2669 {
2670 memcpy(scic_parms, (&scic->oem_parameters), sizeof(*scic_parms));
2671 }
2672
2673 #define INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_LOWER_BOUND_NS 853
2674 #define INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_UPPER_BOUND_NS 1280
2675 #define INTERRUPT_COALESCE_TIMEOUT_MAX_US 2700000
2676 #define INTERRUPT_COALESCE_NUMBER_MAX 256
2677 #define INTERRUPT_COALESCE_TIMEOUT_ENCODE_MIN 7
2678 #define INTERRUPT_COALESCE_TIMEOUT_ENCODE_MAX 28
2679
2680 /**
2681 * scic_controller_set_interrupt_coalescence() - This method allows the user to
2682 * configure the interrupt coalescence.
2683 * @controller: This parameter represents the handle to the controller object
2684 * for which its interrupt coalesce register is overridden.
2685 * @coalesce_number: Used to control the number of entries in the Completion
2686 * Queue before an interrupt is generated. If the number of entries exceed
2687 * this number, an interrupt will be generated. The valid range of the input
2688 * is [0, 256]. A setting of 0 results in coalescing being disabled.
2689 * @coalesce_timeout: Timeout value in microseconds. The valid range of the
2690 * input is [0, 2700000] . A setting of 0 is allowed and results in no
2691 * interrupt coalescing timeout.
2692 *
2693 * Indicate if the user successfully set the interrupt coalesce parameters.
2694 * SCI_SUCCESS The user successfully updated the interrutp coalescence.
2695 * SCI_FAILURE_INVALID_PARAMETER_VALUE The user input value is out of range.
2696 */
2697 static enum sci_status scic_controller_set_interrupt_coalescence(
2698 struct scic_sds_controller *scic_controller,
2699 u32 coalesce_number,
2700 u32 coalesce_timeout)
2701 {
2702 u8 timeout_encode = 0;
2703 u32 min = 0;
2704 u32 max = 0;
2705
2706 /* Check if the input parameters fall in the range. */
2707 if (coalesce_number > INTERRUPT_COALESCE_NUMBER_MAX)
2708 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2709
2710 /*
2711 * Defined encoding for interrupt coalescing timeout:
2712 * Value Min Max Units
2713 * ----- --- --- -----
2714 * 0 - - Disabled
2715 * 1 13.3 20.0 ns
2716 * 2 26.7 40.0
2717 * 3 53.3 80.0
2718 * 4 106.7 160.0
2719 * 5 213.3 320.0
2720 * 6 426.7 640.0
2721 * 7 853.3 1280.0
2722 * 8 1.7 2.6 us
2723 * 9 3.4 5.1
2724 * 10 6.8 10.2
2725 * 11 13.7 20.5
2726 * 12 27.3 41.0
2727 * 13 54.6 81.9
2728 * 14 109.2 163.8
2729 * 15 218.5 327.7
2730 * 16 436.9 655.4
2731 * 17 873.8 1310.7
2732 * 18 1.7 2.6 ms
2733 * 19 3.5 5.2
2734 * 20 7.0 10.5
2735 * 21 14.0 21.0
2736 * 22 28.0 41.9
2737 * 23 55.9 83.9
2738 * 24 111.8 167.8
2739 * 25 223.7 335.5
2740 * 26 447.4 671.1
2741 * 27 894.8 1342.2
2742 * 28 1.8 2.7 s
2743 * Others Undefined */
2744
2745 /*
2746 * Use the table above to decide the encode of interrupt coalescing timeout
2747 * value for register writing. */
2748 if (coalesce_timeout == 0)
2749 timeout_encode = 0;
2750 else{
2751 /* make the timeout value in unit of (10 ns). */
2752 coalesce_timeout = coalesce_timeout * 100;
2753 min = INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_LOWER_BOUND_NS / 10;
2754 max = INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_UPPER_BOUND_NS / 10;
2755
2756 /* get the encode of timeout for register writing. */
2757 for (timeout_encode = INTERRUPT_COALESCE_TIMEOUT_ENCODE_MIN;
2758 timeout_encode <= INTERRUPT_COALESCE_TIMEOUT_ENCODE_MAX;
2759 timeout_encode++) {
2760 if (min <= coalesce_timeout && max > coalesce_timeout)
2761 break;
2762 else if (coalesce_timeout >= max && coalesce_timeout < min * 2
2763 && coalesce_timeout <= INTERRUPT_COALESCE_TIMEOUT_MAX_US * 100) {
2764 if ((coalesce_timeout - max) < (2 * min - coalesce_timeout))
2765 break;
2766 else{
2767 timeout_encode++;
2768 break;
2769 }
2770 } else {
2771 max = max * 2;
2772 min = min * 2;
2773 }
2774 }
2775
2776 if (timeout_encode == INTERRUPT_COALESCE_TIMEOUT_ENCODE_MAX + 1)
2777 /* the value is out of range. */
2778 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2779 }
2780
2781 SMU_ICC_WRITE(
2782 scic_controller,
2783 (SMU_ICC_GEN_VAL(NUMBER, coalesce_number) |
2784 SMU_ICC_GEN_VAL(TIMER, timeout_encode))
2785 );
2786
2787 scic_controller->interrupt_coalesce_number = (u16)coalesce_number;
2788 scic_controller->interrupt_coalesce_timeout = coalesce_timeout / 100;
2789
2790 return SCI_SUCCESS;
2791 }
2792
2793
2794 struct scic_sds_controller *scic_controller_alloc(struct device *dev)
2795 {
2796 return devm_kzalloc(dev, sizeof(struct scic_sds_controller), GFP_KERNEL);
2797 }
2798
2799 static enum sci_status default_controller_handler(struct sci_base_controller *base_scic,
2800 const char *func)
2801 {
2802 struct scic_sds_controller *scic = container_of(base_scic, typeof(*scic), parent);
2803 u32 state = base_scic->state_machine.current_state_id;
2804
2805 dev_warn(scic_to_dev(scic), "%s: invalid state %d\n", func, state);
2806
2807 return SCI_FAILURE_INVALID_STATE;
2808 }
2809
2810 static enum sci_status scic_sds_controller_default_start_operation_handler(
2811 struct sci_base_controller *base_scic,
2812 struct sci_base_remote_device *remote_device,
2813 struct sci_base_request *io_request,
2814 u16 io_tag)
2815 {
2816 return default_controller_handler(base_scic, __func__);
2817 }
2818
2819 static enum sci_status scic_sds_controller_default_request_handler(
2820 struct sci_base_controller *base_scic,
2821 struct sci_base_remote_device *remote_device,
2822 struct sci_base_request *io_request)
2823 {
2824 return default_controller_handler(base_scic, __func__);
2825 }
2826
2827 static enum sci_status scic_sds_controller_general_reset_handler(struct sci_base_controller *base_scic)
2828 {
2829 /* The reset operation is not a graceful cleanup just perform the state
2830 * transition.
2831 */
2832 sci_base_state_machine_change_state(&base_scic->state_machine,
2833 SCI_BASE_CONTROLLER_STATE_RESETTING);
2834
2835 return SCI_SUCCESS;
2836 }
2837
2838 static enum sci_status scic_sds_controller_reset_state_initialize_handler(struct sci_base_controller *base_scic)
2839 {
2840 struct sci_base_state_machine *sm = &base_scic->state_machine;
2841 enum sci_status result = SCI_SUCCESS;
2842 struct scic_sds_controller *scic;
2843 struct isci_host *ihost;
2844 u32 index, state;
2845
2846 scic = container_of(base_scic, typeof(*scic), parent);
2847 ihost = sci_object_get_association(scic);
2848
2849 sci_base_state_machine_change_state(sm, SCI_BASE_CONTROLLER_STATE_INITIALIZING);
2850
2851 scic->timeout_timer = isci_timer_create(ihost,
2852 scic,
2853 scic_sds_controller_timeout_handler);
2854
2855 scic_sds_controller_initialize_phy_startup(scic);
2856
2857 scic_sds_controller_initialize_power_control(scic);
2858
2859 /*
2860 * There is nothing to do here for B0 since we do not have to
2861 * program the AFE registers.
2862 * / @todo The AFE settings are supposed to be correct for the B0 but
2863 * / presently they seem to be wrong. */
2864 scic_sds_controller_afe_initialization(scic);
2865
2866 if (result == SCI_SUCCESS) {
2867 u32 status;
2868 u32 terminate_loop;
2869
2870 /* Take the hardware out of reset */
2871 SMU_SMUSRCR_WRITE(scic, 0x00000000);
2872
2873 /*
2874 * / @todo Provide meaningfull error code for hardware failure
2875 * result = SCI_FAILURE_CONTROLLER_HARDWARE; */
2876 result = SCI_FAILURE;
2877 terminate_loop = 100;
2878
2879 while (terminate_loop-- && (result != SCI_SUCCESS)) {
2880 /* Loop until the hardware reports success */
2881 udelay(SCU_CONTEXT_RAM_INIT_STALL_TIME);
2882 status = SMU_SMUCSR_READ(scic);
2883
2884 if ((status & SCU_RAM_INIT_COMPLETED) ==
2885 SCU_RAM_INIT_COMPLETED)
2886 result = SCI_SUCCESS;
2887 }
2888 }
2889
2890 if (result == SCI_SUCCESS) {
2891 u32 max_supported_ports;
2892 u32 max_supported_devices;
2893 u32 max_supported_io_requests;
2894 u32 device_context_capacity;
2895
2896 /*
2897 * Determine what are the actaul device capacities that the
2898 * hardware will support */
2899 device_context_capacity = SMU_DCC_READ(scic);
2900
2901 max_supported_ports = smu_dcc_get_max_ports(device_context_capacity);
2902 max_supported_devices = smu_dcc_get_max_remote_node_context(device_context_capacity);
2903 max_supported_io_requests = smu_dcc_get_max_task_context(device_context_capacity);
2904
2905 /*
2906 * Make all PEs that are unassigned match up with the
2907 * logical ports
2908 */
2909 for (index = 0; index < max_supported_ports; index++) {
2910 struct scu_port_task_scheduler_group_registers *ptsg =
2911 &scic->scu_registers->peg0.ptsg;
2912
2913 scu_register_write(scic,
2914 ptsg->protocol_engine[index],
2915 index);
2916 }
2917
2918 /* Record the smaller of the two capacity values */
2919 scic->logical_port_entries =
2920 min(max_supported_ports, scic->logical_port_entries);
2921
2922 scic->task_context_entries =
2923 min(max_supported_io_requests,
2924 scic->task_context_entries);
2925
2926 scic->remote_node_entries =
2927 min(max_supported_devices, scic->remote_node_entries);
2928
2929 /*
2930 * Now that we have the correct hardware reported minimum values
2931 * build the MDL for the controller. Default to a performance
2932 * configuration.
2933 */
2934 scic_controller_set_mode(scic, SCI_MODE_SPEED);
2935 }
2936
2937 /* Initialize hardware PCI Relaxed ordering in DMA engines */
2938 if (result == SCI_SUCCESS) {
2939 u32 dma_configuration;
2940
2941 /* Configure the payload DMA */
2942 dma_configuration = SCU_PDMACR_READ(scic);
2943 dma_configuration |=
2944 SCU_PDMACR_GEN_BIT(PCI_RELAXED_ORDERING_ENABLE);
2945 SCU_PDMACR_WRITE(scic, dma_configuration);
2946
2947 /* Configure the control DMA */
2948 dma_configuration = SCU_CDMACR_READ(scic);
2949 dma_configuration |=
2950 SCU_CDMACR_GEN_BIT(PCI_RELAXED_ORDERING_ENABLE);
2951 SCU_CDMACR_WRITE(scic, dma_configuration);
2952 }
2953
2954 /*
2955 * Initialize the PHYs before the PORTs because the PHY registers
2956 * are accessed during the port initialization.
2957 */
2958 if (result == SCI_SUCCESS) {
2959 /* Initialize the phys */
2960 for (index = 0;
2961 (result == SCI_SUCCESS) && (index < SCI_MAX_PHYS);
2962 index++) {
2963 result = scic_sds_phy_initialize(
2964 &scic->phy_table[index],
2965 &scic->scu_registers->peg0.pe[index].tl,
2966 &scic->scu_registers->peg0.pe[index].ll);
2967 }
2968 }
2969
2970 if (result == SCI_SUCCESS) {
2971 /* Initialize the logical ports */
2972 for (index = 0;
2973 (index < scic->logical_port_entries) &&
2974 (result == SCI_SUCCESS);
2975 index++) {
2976 result = scic_sds_port_initialize(
2977 &scic->port_table[index],
2978 &scic->scu_registers->peg0.ptsg.port[index],
2979 &scic->scu_registers->peg0.ptsg.protocol_engine,
2980 &scic->scu_registers->peg0.viit[index]);
2981 }
2982 }
2983
2984 if (result == SCI_SUCCESS)
2985 result = scic_sds_port_configuration_agent_initialize(
2986 scic,
2987 &scic->port_agent);
2988
2989 /* Advance the controller state machine */
2990 if (result == SCI_SUCCESS)
2991 state = SCI_BASE_CONTROLLER_STATE_INITIALIZED;
2992 else
2993 state = SCI_BASE_CONTROLLER_STATE_FAILED;
2994 sci_base_state_machine_change_state(sm, state);
2995
2996 return result;
2997 }
2998
2999 /*
3000 * *****************************************************************************
3001 * * INITIALIZED STATE HANDLERS
3002 * ***************************************************************************** */
3003
3004 /**
3005 *
3006 * @controller: This is the struct sci_base_controller object which is cast
3007 * into a struct scic_sds_controller object.
3008 * @timeout: This is the allowed time for the controller object to reach the
3009 * started state.
3010 *
3011 * This function is the struct scic_sds_controller start handler for the
3012 * initialized state.
3013 * - Validate we have a good memory descriptor table - Initialze the
3014 * physical memory before programming the hardware - Program the SCU hardware
3015 * with the physical memory addresses passed in the memory descriptor table. -
3016 * Initialzie the TCi pool - Initialize the RNi pool - Initialize the
3017 * completion queue - Initialize the unsolicited frame data - Take the SCU port
3018 * task scheduler out of reset - Start the first phy object. - Transition to
3019 * SCI_BASE_CONTROLLER_STATE_STARTING. enum sci_status SCI_SUCCESS if all of the
3020 * controller start operations complete
3021 * SCI_FAILURE_UNSUPPORTED_INFORMATION_FIELD if one or more of the memory
3022 * descriptor fields is invalid.
3023 */
3024 static enum sci_status scic_sds_controller_initialized_state_start_handler(
3025 struct sci_base_controller *base_scic,
3026 u32 timeout)
3027 {
3028 u16 index;
3029 enum sci_status result;
3030 struct scic_sds_controller *scic;
3031
3032 scic = container_of(base_scic, typeof(*scic), parent);
3033
3034 /*
3035 * Make sure that the SCI User filled in the memory descriptor
3036 * table correctly
3037 */
3038 result = scic_sds_controller_validate_memory_descriptor_table(scic);
3039
3040 if (result == SCI_SUCCESS) {
3041 /*
3042 * The memory descriptor list looks good so program the
3043 * hardware
3044 */
3045 scic_sds_controller_ram_initialization(scic);
3046 }
3047
3048 if (result == SCI_SUCCESS) {
3049 /* Build the TCi free pool */
3050 sci_pool_initialize(scic->tci_pool);
3051 for (index = 0; index < scic->task_context_entries; index++)
3052 sci_pool_put(scic->tci_pool, index);
3053
3054 /* Build the RNi free pool */
3055 scic_sds_remote_node_table_initialize(
3056 &scic->available_remote_nodes,
3057 scic->remote_node_entries);
3058 }
3059
3060 if (result == SCI_SUCCESS) {
3061 /*
3062 * Before anything else lets make sure we will not be
3063 * interrupted by the hardware.
3064 */
3065 scic_controller_disable_interrupts(scic);
3066
3067 /* Enable the port task scheduler */
3068 scic_sds_controller_enable_port_task_scheduler(scic);
3069
3070 /* Assign all the task entries to scic physical function */
3071 scic_sds_controller_assign_task_entries(scic);
3072
3073 /* Now initialze the completion queue */
3074 scic_sds_controller_initialize_completion_queue(scic);
3075
3076 /* Initialize the unsolicited frame queue for use */
3077 scic_sds_controller_initialize_unsolicited_frame_queue(scic);
3078 }
3079
3080 /* Start all of the ports on this controller */
3081 for (index = 0;
3082 (index < scic->logical_port_entries) && (result == SCI_SUCCESS);
3083 index++) {
3084 struct scic_sds_port *sci_port = &scic->port_table[index];
3085
3086 result = sci_port->state_handlers->parent.start_handler(
3087 &sci_port->parent);
3088 }
3089
3090 if (result == SCI_SUCCESS) {
3091 scic_sds_controller_start_next_phy(scic);
3092
3093 isci_timer_start(scic->timeout_timer, timeout);
3094
3095 sci_base_state_machine_change_state(&base_scic->state_machine,
3096 SCI_BASE_CONTROLLER_STATE_STARTING);
3097 }
3098
3099 return result;
3100 }
3101
3102 /*
3103 * *****************************************************************************
3104 * * INITIALIZED STATE HANDLERS
3105 * ***************************************************************************** */
3106
3107 /**
3108 *
3109 * @controller: This is struct scic_sds_controller which receives the link up
3110 * notification.
3111 * @port: This is struct scic_sds_port with which the phy is associated.
3112 * @phy: This is the struct scic_sds_phy which has gone link up.
3113 *
3114 * This method is called when the struct scic_sds_controller is in the starting state
3115 * link up handler is called. This method will perform the following: - Stop
3116 * the phy timer - Start the next phy - Report the link up condition to the
3117 * port object none
3118 */
3119 static void scic_sds_controller_starting_state_link_up_handler(
3120 struct scic_sds_controller *this_controller,
3121 struct scic_sds_port *port,
3122 struct scic_sds_phy *phy)
3123 {
3124 scic_sds_controller_phy_timer_stop(this_controller);
3125
3126 this_controller->port_agent.link_up_handler(
3127 this_controller, &this_controller->port_agent, port, phy
3128 );
3129 /* scic_sds_port_link_up(port, phy); */
3130
3131 scic_sds_controller_start_next_phy(this_controller);
3132 }
3133
3134 /**
3135 *
3136 * @controller: This is struct scic_sds_controller which receives the link down
3137 * notification.
3138 * @port: This is struct scic_sds_port with which the phy is associated.
3139 * @phy: This is the struct scic_sds_phy which has gone link down.
3140 *
3141 * This method is called when the struct scic_sds_controller is in the starting state
3142 * link down handler is called. - Report the link down condition to the port
3143 * object none
3144 */
3145 static void scic_sds_controller_starting_state_link_down_handler(
3146 struct scic_sds_controller *this_controller,
3147 struct scic_sds_port *port,
3148 struct scic_sds_phy *phy)
3149 {
3150 this_controller->port_agent.link_down_handler(
3151 this_controller, &this_controller->port_agent, port, phy
3152 );
3153 /* scic_sds_port_link_down(port, phy); */
3154 }
3155
3156 static enum sci_status scic_sds_controller_ready_state_stop_handler(struct sci_base_controller *base_scic,
3157 u32 timeout)
3158 {
3159 struct scic_sds_controller *scic;
3160
3161 scic = container_of(base_scic, typeof(*scic), parent);
3162 isci_timer_start(scic->timeout_timer, timeout);
3163 sci_base_state_machine_change_state(&base_scic->state_machine,
3164 SCI_BASE_CONTROLLER_STATE_STOPPING);
3165
3166 return SCI_SUCCESS;
3167 }
3168
3169 /**
3170 *
3171 * @controller: This is struct sci_base_controller object which is cast into a
3172 * struct scic_sds_controller object.
3173 * @remote_device: This is struct sci_base_remote_device which is cast to a
3174 * struct scic_sds_remote_device object.
3175 * @io_request: This is the struct sci_base_request which is cast to a
3176 * SCIC_SDS_IO_REQUEST object.
3177 * @io_tag: This is the IO tag to be assigned to the IO request or
3178 * SCI_CONTROLLER_INVALID_IO_TAG.
3179 *
3180 * This method is called when the struct scic_sds_controller is in the ready state and
3181 * the start io handler is called. - Start the io request on the remote device
3182 * - if successful - assign the io_request to the io_request_table - post the
3183 * request to the hardware enum sci_status SCI_SUCCESS if the start io operation
3184 * succeeds SCI_FAILURE_INSUFFICIENT_RESOURCES if the IO tag could not be
3185 * allocated for the io request. SCI_FAILURE_INVALID_STATE if one or more
3186 * objects are not in a valid state to accept io requests. How does the io_tag
3187 * parameter get assigned to the io request?
3188 */
3189 static enum sci_status scic_sds_controller_ready_state_start_io_handler(
3190 struct sci_base_controller *controller,
3191 struct sci_base_remote_device *remote_device,
3192 struct sci_base_request *io_request,
3193 u16 io_tag)
3194 {
3195 enum sci_status status;
3196
3197 struct scic_sds_controller *this_controller;
3198 struct scic_sds_request *the_request;
3199 struct scic_sds_remote_device *the_device;
3200
3201 this_controller = (struct scic_sds_controller *)controller;
3202 the_request = (struct scic_sds_request *)io_request;
3203 the_device = (struct scic_sds_remote_device *)remote_device;
3204
3205 status = scic_sds_remote_device_start_io(this_controller, the_device, the_request);
3206
3207 if (status == SCI_SUCCESS) {
3208 this_controller->io_request_table[
3209 scic_sds_io_tag_get_index(the_request->io_tag)] = the_request;
3210
3211 scic_sds_controller_post_request(
3212 this_controller,
3213 scic_sds_request_get_post_context(the_request)
3214 );
3215 }
3216
3217 return status;
3218 }
3219
3220 /**
3221 *
3222 * @controller: This is struct sci_base_controller object which is cast into a
3223 * struct scic_sds_controller object.
3224 * @remote_device: This is struct sci_base_remote_device which is cast to a
3225 * struct scic_sds_remote_device object.
3226 * @io_request: This is the struct sci_base_request which is cast to a
3227 * SCIC_SDS_IO_REQUEST object.
3228 *
3229 * This method is called when the struct scic_sds_controller is in the ready state and
3230 * the complete io handler is called. - Complete the io request on the remote
3231 * device - if successful - remove the io_request to the io_request_table
3232 * enum sci_status SCI_SUCCESS if the start io operation succeeds
3233 * SCI_FAILURE_INVALID_STATE if one or more objects are not in a valid state to
3234 * accept io requests.
3235 */
3236 static enum sci_status scic_sds_controller_ready_state_complete_io_handler(
3237 struct sci_base_controller *controller,
3238 struct sci_base_remote_device *remote_device,
3239 struct sci_base_request *io_request)
3240 {
3241 u16 index;
3242 enum sci_status status;
3243 struct scic_sds_controller *this_controller;
3244 struct scic_sds_request *the_request;
3245 struct scic_sds_remote_device *the_device;
3246
3247 this_controller = (struct scic_sds_controller *)controller;
3248 the_request = (struct scic_sds_request *)io_request;
3249 the_device = (struct scic_sds_remote_device *)remote_device;
3250
3251 status = scic_sds_remote_device_complete_io(
3252 this_controller, the_device, the_request);
3253
3254 if (status == SCI_SUCCESS) {
3255 index = scic_sds_io_tag_get_index(the_request->io_tag);
3256 this_controller->io_request_table[index] = NULL;
3257 }
3258
3259 return status;
3260 }
3261
3262 /**
3263 *
3264 * @controller: This is struct sci_base_controller object which is cast into a
3265 * struct scic_sds_controller object.
3266 * @remote_device: This is struct sci_base_remote_device which is cast to a
3267 * struct scic_sds_remote_device object.
3268 * @io_request: This is the struct sci_base_request which is cast to a
3269 * SCIC_SDS_IO_REQUEST object.
3270 *
3271 * This method is called when the struct scic_sds_controller is in the ready state and
3272 * the continue io handler is called. enum sci_status
3273 */
3274 static enum sci_status scic_sds_controller_ready_state_continue_io_handler(
3275 struct sci_base_controller *controller,
3276 struct sci_base_remote_device *remote_device,
3277 struct sci_base_request *io_request)
3278 {
3279 struct scic_sds_controller *this_controller;
3280 struct scic_sds_request *the_request;
3281
3282 the_request = (struct scic_sds_request *)io_request;
3283 this_controller = (struct scic_sds_controller *)controller;
3284
3285 this_controller->io_request_table[
3286 scic_sds_io_tag_get_index(the_request->io_tag)] = the_request;
3287
3288 scic_sds_controller_post_request(
3289 this_controller,
3290 scic_sds_request_get_post_context(the_request)
3291 );
3292
3293 return SCI_SUCCESS;
3294 }
3295
3296 /**
3297 *
3298 * @controller: This is struct sci_base_controller object which is cast into a
3299 * struct scic_sds_controller object.
3300 * @remote_device: This is struct sci_base_remote_device which is cast to a
3301 * struct scic_sds_remote_device object.
3302 * @io_request: This is the struct sci_base_request which is cast to a
3303 * SCIC_SDS_IO_REQUEST object.
3304 * @task_tag: This is the task tag to be assigned to the task request or
3305 * SCI_CONTROLLER_INVALID_IO_TAG.
3306 *
3307 * This method is called when the struct scic_sds_controller is in the ready state and
3308 * the start task handler is called. - The remote device is requested to start
3309 * the task request - if successful - assign the task to the io_request_table -
3310 * post the request to the SCU hardware enum sci_status SCI_SUCCESS if the start io
3311 * operation succeeds SCI_FAILURE_INSUFFICIENT_RESOURCES if the IO tag could
3312 * not be allocated for the io request. SCI_FAILURE_INVALID_STATE if one or
3313 * more objects are not in a valid state to accept io requests. How does the io
3314 * tag get assigned in this code path?
3315 */
3316 static enum sci_status scic_sds_controller_ready_state_start_task_handler(
3317 struct sci_base_controller *controller,
3318 struct sci_base_remote_device *remote_device,
3319 struct sci_base_request *io_request,
3320 u16 task_tag)
3321 {
3322 struct scic_sds_controller *this_controller = (struct scic_sds_controller *)
3323 controller;
3324 struct scic_sds_request *the_request = (struct scic_sds_request *)
3325 io_request;
3326 struct scic_sds_remote_device *the_device = (struct scic_sds_remote_device *)
3327 remote_device;
3328 enum sci_status status;
3329
3330 status = scic_sds_remote_device_start_task(
3331 this_controller, the_device, the_request
3332 );
3333
3334 if (status == SCI_SUCCESS) {
3335 this_controller->io_request_table[
3336 scic_sds_io_tag_get_index(the_request->io_tag)] = the_request;
3337
3338 scic_sds_controller_post_request(
3339 this_controller,
3340 scic_sds_request_get_post_context(the_request)
3341 );
3342 } else if (status == SCI_FAILURE_RESET_DEVICE_PARTIAL_SUCCESS) {
3343 this_controller->io_request_table[
3344 scic_sds_io_tag_get_index(the_request->io_tag)] = the_request;
3345
3346 /*
3347 * We will let framework know this task request started successfully,
3348 * although core is still woring on starting the request (to post tc when
3349 * RNC is resumed.) */
3350 status = SCI_SUCCESS;
3351 }
3352 return status;
3353 }
3354
3355 /**
3356 *
3357 * @controller: This is struct sci_base_controller object which is cast into a
3358 * struct scic_sds_controller object.
3359 * @remote_device: This is struct sci_base_remote_device which is cast to a
3360 * struct scic_sds_remote_device object.
3361 * @io_request: This is the struct sci_base_request which is cast to a
3362 * SCIC_SDS_IO_REQUEST object.
3363 *
3364 * This method is called when the struct scic_sds_controller is in the ready state and
3365 * the terminate request handler is called. - call the io request terminate
3366 * function - if successful - post the terminate request to the SCU hardware
3367 * enum sci_status SCI_SUCCESS if the start io operation succeeds
3368 * SCI_FAILURE_INVALID_STATE if one or more objects are not in a valid state to
3369 * accept io requests.
3370 */
3371 static enum sci_status scic_sds_controller_ready_state_terminate_request_handler(
3372 struct sci_base_controller *controller,
3373 struct sci_base_remote_device *remote_device,
3374 struct sci_base_request *io_request)
3375 {
3376 struct scic_sds_controller *this_controller = (struct scic_sds_controller *)
3377 controller;
3378 struct scic_sds_request *the_request = (struct scic_sds_request *)
3379 io_request;
3380 enum sci_status status;
3381
3382 status = scic_sds_io_request_terminate(the_request);
3383 if (status == SCI_SUCCESS) {
3384 /*
3385 * Utilize the original post context command and or in the POST_TC_ABORT
3386 * request sub-type. */
3387 scic_sds_controller_post_request(
3388 this_controller,
3389 scic_sds_request_get_post_context(the_request)
3390 | SCU_CONTEXT_COMMAND_REQUEST_POST_TC_ABORT
3391 );
3392 }
3393
3394 return status;
3395 }
3396
3397 /**
3398 *
3399 * @controller: This is struct scic_sds_controller which receives the link up
3400 * notification.
3401 * @port: This is struct scic_sds_port with which the phy is associated.
3402 * @phy: This is the struct scic_sds_phy which has gone link up.
3403 *
3404 * This method is called when the struct scic_sds_controller is in the starting state
3405 * link up handler is called. This method will perform the following: - Stop
3406 * the phy timer - Start the next phy - Report the link up condition to the
3407 * port object none
3408 */
3409 static void scic_sds_controller_ready_state_link_up_handler(
3410 struct scic_sds_controller *this_controller,
3411 struct scic_sds_port *port,
3412 struct scic_sds_phy *phy)
3413 {
3414 this_controller->port_agent.link_up_handler(
3415 this_controller, &this_controller->port_agent, port, phy
3416 );
3417 }
3418
3419 /**
3420 *
3421 * @controller: This is struct scic_sds_controller which receives the link down
3422 * notification.
3423 * @port: This is struct scic_sds_port with which the phy is associated.
3424 * @phy: This is the struct scic_sds_phy which has gone link down.
3425 *
3426 * This method is called when the struct scic_sds_controller is in the starting state
3427 * link down handler is called. - Report the link down condition to the port
3428 * object none
3429 */
3430 static void scic_sds_controller_ready_state_link_down_handler(
3431 struct scic_sds_controller *this_controller,
3432 struct scic_sds_port *port,
3433 struct scic_sds_phy *phy)
3434 {
3435 this_controller->port_agent.link_down_handler(
3436 this_controller, &this_controller->port_agent, port, phy
3437 );
3438 }
3439
3440 /*
3441 * *****************************************************************************
3442 * * STOPPING STATE HANDLERS
3443 * ***************************************************************************** */
3444
3445 /**
3446 *
3447 * @controller: This is struct sci_base_controller object which is cast into a
3448 * struct scic_sds_controller object.
3449 * @remote_device: This is struct sci_base_remote_device which is cast to a
3450 * struct scic_sds_remote_device object.
3451 * @io_request: This is the struct sci_base_request which is cast to a
3452 * SCIC_SDS_IO_REQUEST object.
3453 *
3454 * This method is called when the struct scic_sds_controller is in a stopping state
3455 * and the complete io handler is called. - This function is not yet
3456 * implemented enum sci_status SCI_FAILURE
3457 */
3458 static enum sci_status scic_sds_controller_stopping_state_complete_io_handler(
3459 struct sci_base_controller *controller,
3460 struct sci_base_remote_device *remote_device,
3461 struct sci_base_request *io_request)
3462 {
3463 struct scic_sds_controller *this_controller;
3464
3465 this_controller = (struct scic_sds_controller *)controller;
3466
3467 /* / @todo Implement this function */
3468 return SCI_FAILURE;
3469 }
3470
3471 /**
3472 *
3473 * @controller: This is struct sci_base_controller object which is cast into a
3474 * struct scic_sds_controller object.
3475 * @remote_device: This is struct sci_base_remote_device which is cast to a
3476 * struct scic_sds_remote_device object.
3477 *
3478 * This method is called when the struct scic_sds_controller is in a stopping state
3479 * and the remote device has stopped.
3480 **/
3481 static void scic_sds_controller_stopping_state_device_stopped_handler(
3482 struct scic_sds_controller *controller,
3483 struct scic_sds_remote_device *remote_device
3484 )
3485 {
3486 if (!scic_sds_controller_has_remote_devices_stopping(controller)) {
3487 sci_base_state_machine_change_state(
3488 &controller->parent.state_machine,
3489 SCI_BASE_CONTROLLER_STATE_STOPPED
3490 );
3491 }
3492 }
3493
3494 const struct scic_sds_controller_state_handler scic_sds_controller_state_handler_table[] = {
3495 [SCI_BASE_CONTROLLER_STATE_INITIAL] = {
3496 .base.start_io = scic_sds_controller_default_start_operation_handler,
3497 .base.complete_io = scic_sds_controller_default_request_handler,
3498 .base.continue_io = scic_sds_controller_default_request_handler,
3499 .terminate_request = scic_sds_controller_default_request_handler,
3500 },
3501 [SCI_BASE_CONTROLLER_STATE_RESET] = {
3502 .base.reset = scic_sds_controller_general_reset_handler,
3503 .base.initialize = scic_sds_controller_reset_state_initialize_handler,
3504 .base.start_io = scic_sds_controller_default_start_operation_handler,
3505 .base.complete_io = scic_sds_controller_default_request_handler,
3506 .base.continue_io = scic_sds_controller_default_request_handler,
3507 .terminate_request = scic_sds_controller_default_request_handler,
3508 },
3509 [SCI_BASE_CONTROLLER_STATE_INITIALIZING] = {
3510 .base.start_io = scic_sds_controller_default_start_operation_handler,
3511 .base.complete_io = scic_sds_controller_default_request_handler,
3512 .base.continue_io = scic_sds_controller_default_request_handler,
3513 .terminate_request = scic_sds_controller_default_request_handler,
3514 },
3515 [SCI_BASE_CONTROLLER_STATE_INITIALIZED] = {
3516 .base.start = scic_sds_controller_initialized_state_start_handler,
3517 .base.start_io = scic_sds_controller_default_start_operation_handler,
3518 .base.complete_io = scic_sds_controller_default_request_handler,
3519 .base.continue_io = scic_sds_controller_default_request_handler,
3520 .terminate_request = scic_sds_controller_default_request_handler,
3521 },
3522 [SCI_BASE_CONTROLLER_STATE_STARTING] = {
3523 .base.start_io = scic_sds_controller_default_start_operation_handler,
3524 .base.complete_io = scic_sds_controller_default_request_handler,
3525 .base.continue_io = scic_sds_controller_default_request_handler,
3526 .terminate_request = scic_sds_controller_default_request_handler,
3527 .link_up = scic_sds_controller_starting_state_link_up_handler,
3528 .link_down = scic_sds_controller_starting_state_link_down_handler
3529 },
3530 [SCI_BASE_CONTROLLER_STATE_READY] = {
3531 .base.stop = scic_sds_controller_ready_state_stop_handler,
3532 .base.reset = scic_sds_controller_general_reset_handler,
3533 .base.start_io = scic_sds_controller_ready_state_start_io_handler,
3534 .base.complete_io = scic_sds_controller_ready_state_complete_io_handler,
3535 .base.continue_io = scic_sds_controller_ready_state_continue_io_handler,
3536 .base.start_task = scic_sds_controller_ready_state_start_task_handler,
3537 .base.complete_task = scic_sds_controller_ready_state_complete_io_handler,
3538 .terminate_request = scic_sds_controller_ready_state_terminate_request_handler,
3539 .link_up = scic_sds_controller_ready_state_link_up_handler,
3540 .link_down = scic_sds_controller_ready_state_link_down_handler
3541 },
3542 [SCI_BASE_CONTROLLER_STATE_RESETTING] = {
3543 .base.start_io = scic_sds_controller_default_start_operation_handler,
3544 .base.complete_io = scic_sds_controller_default_request_handler,
3545 .base.continue_io = scic_sds_controller_default_request_handler,
3546 .terminate_request = scic_sds_controller_default_request_handler,
3547 },
3548 [SCI_BASE_CONTROLLER_STATE_STOPPING] = {
3549 .base.start_io = scic_sds_controller_default_start_operation_handler,
3550 .base.complete_io = scic_sds_controller_stopping_state_complete_io_handler,
3551 .base.continue_io = scic_sds_controller_default_request_handler,
3552 .terminate_request = scic_sds_controller_default_request_handler,
3553 .device_stopped = scic_sds_controller_stopping_state_device_stopped_handler,
3554 },
3555 [SCI_BASE_CONTROLLER_STATE_STOPPED] = {
3556 .base.reset = scic_sds_controller_general_reset_handler,
3557 .base.start_io = scic_sds_controller_default_start_operation_handler,
3558 .base.complete_io = scic_sds_controller_default_request_handler,
3559 .base.continue_io = scic_sds_controller_default_request_handler,
3560 .terminate_request = scic_sds_controller_default_request_handler,
3561 },
3562 [SCI_BASE_CONTROLLER_STATE_FAILED] = {
3563 .base.reset = scic_sds_controller_general_reset_handler,
3564 .base.start_io = scic_sds_controller_default_start_operation_handler,
3565 .base.complete_io = scic_sds_controller_default_request_handler,
3566 .base.continue_io = scic_sds_controller_default_request_handler,
3567 .terminate_request = scic_sds_controller_default_request_handler,
3568 },
3569 };
3570
3571 /**
3572 *
3573 * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller
3574 * object.
3575 *
3576 * This method implements the actions taken by the struct scic_sds_controller on entry
3577 * to the SCI_BASE_CONTROLLER_STATE_INITIAL. - Set the state handlers to the
3578 * controllers initial state. none This function should initialze the
3579 * controller object.
3580 */
3581 static void scic_sds_controller_initial_state_enter(
3582 struct sci_base_object *object)
3583 {
3584 struct scic_sds_controller *this_controller;
3585
3586 this_controller = (struct scic_sds_controller *)object;
3587
3588 sci_base_state_machine_change_state(
3589 &this_controller->parent.state_machine, SCI_BASE_CONTROLLER_STATE_RESET);
3590 }
3591
3592 /**
3593 *
3594 * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller
3595 * object.
3596 *
3597 * This method implements the actions taken by the struct scic_sds_controller on exit
3598 * from the SCI_BASE_CONTROLLER_STATE_STARTING. - This function stops the
3599 * controller starting timeout timer. none
3600 */
3601 static inline void scic_sds_controller_starting_state_exit(
3602 struct sci_base_object *object)
3603 {
3604 struct scic_sds_controller *scic = (struct scic_sds_controller *)object;
3605
3606 isci_timer_stop(scic->timeout_timer);
3607 }
3608
3609 /**
3610 *
3611 * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller
3612 * object.
3613 *
3614 * This method implements the actions taken by the struct scic_sds_controller on entry
3615 * to the SCI_BASE_CONTROLLER_STATE_READY. - Set the state handlers to the
3616 * controllers ready state. none
3617 */
3618 static void scic_sds_controller_ready_state_enter(
3619 struct sci_base_object *object)
3620 {
3621 struct scic_sds_controller *this_controller;
3622
3623 this_controller = (struct scic_sds_controller *)object;
3624
3625 /* set the default interrupt coalescence number and timeout value. */
3626 scic_controller_set_interrupt_coalescence(
3627 this_controller, 0x10, 250);
3628 }
3629
3630 /**
3631 *
3632 * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller
3633 * object.
3634 *
3635 * This method implements the actions taken by the struct scic_sds_controller on exit
3636 * from the SCI_BASE_CONTROLLER_STATE_READY. - This function does nothing. none
3637 */
3638 static void scic_sds_controller_ready_state_exit(
3639 struct sci_base_object *object)
3640 {
3641 struct scic_sds_controller *this_controller;
3642
3643 this_controller = (struct scic_sds_controller *)object;
3644
3645 /* disable interrupt coalescence. */
3646 scic_controller_set_interrupt_coalescence(this_controller, 0, 0);
3647 }
3648
3649 /**
3650 *
3651 * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller
3652 * object.
3653 *
3654 * This method implements the actions taken by the struct scic_sds_controller on entry
3655 * to the SCI_BASE_CONTROLLER_STATE_READY. - Set the state handlers to the
3656 * controllers ready state. - Stop the phys on this controller - Stop the ports
3657 * on this controller - Stop all of the remote devices on this controller none
3658 */
3659 static void scic_sds_controller_stopping_state_enter(
3660 struct sci_base_object *object)
3661 {
3662 struct scic_sds_controller *this_controller;
3663
3664 this_controller = (struct scic_sds_controller *)object;
3665
3666 /* Stop all of the components for this controller */
3667 scic_sds_controller_stop_phys(this_controller);
3668 scic_sds_controller_stop_ports(this_controller);
3669 scic_sds_controller_stop_devices(this_controller);
3670 }
3671
3672 /**
3673 *
3674 * @object: This is the struct sci_base_object which is cast to a struct
3675 * scic_sds_controller object.
3676 *
3677 * This funciton implements the actions taken by the struct scic_sds_controller
3678 * on exit from the SCI_BASE_CONTROLLER_STATE_STOPPING. -
3679 * This function stops the controller stopping timeout timer.
3680 */
3681 static inline void scic_sds_controller_stopping_state_exit(
3682 struct sci_base_object *object)
3683 {
3684 struct scic_sds_controller *scic =
3685 (struct scic_sds_controller *)object;
3686
3687 isci_timer_stop(scic->timeout_timer);
3688 }
3689
3690 static void scic_sds_controller_resetting_state_enter(struct sci_base_object *object)
3691 {
3692 struct scic_sds_controller *scic;
3693
3694 scic = container_of(object, typeof(*scic), parent.parent);
3695 scic_sds_controller_reset_hardware(scic);
3696 sci_base_state_machine_change_state(&scic->parent.state_machine,
3697 SCI_BASE_CONTROLLER_STATE_RESET);
3698 }
3699
3700 static const struct sci_base_state scic_sds_controller_state_table[] = {
3701 [SCI_BASE_CONTROLLER_STATE_INITIAL] = {
3702 .enter_state = scic_sds_controller_initial_state_enter,
3703 },
3704 [SCI_BASE_CONTROLLER_STATE_RESET] = {},
3705 [SCI_BASE_CONTROLLER_STATE_INITIALIZING] = {},
3706 [SCI_BASE_CONTROLLER_STATE_INITIALIZED] = {},
3707 [SCI_BASE_CONTROLLER_STATE_STARTING] = {
3708 .exit_state = scic_sds_controller_starting_state_exit,
3709 },
3710 [SCI_BASE_CONTROLLER_STATE_READY] = {
3711 .enter_state = scic_sds_controller_ready_state_enter,
3712 .exit_state = scic_sds_controller_ready_state_exit,
3713 },
3714 [SCI_BASE_CONTROLLER_STATE_RESETTING] = {
3715 .enter_state = scic_sds_controller_resetting_state_enter,
3716 },
3717 [SCI_BASE_CONTROLLER_STATE_STOPPING] = {
3718 .enter_state = scic_sds_controller_stopping_state_enter,
3719 .exit_state = scic_sds_controller_stopping_state_exit,
3720 },
3721 [SCI_BASE_CONTROLLER_STATE_STOPPED] = {},
3722 [SCI_BASE_CONTROLLER_STATE_FAILED] = {}
3723 };
3724
3725 /**
3726 * scic_controller_construct() - This method will attempt to construct a
3727 * controller object utilizing the supplied parameter information.
3728 * @c: This parameter specifies the controller to be constructed.
3729 * @scu_base: mapped base address of the scu registers
3730 * @smu_base: mapped base address of the smu registers
3731 *
3732 * Indicate if the controller was successfully constructed or if it failed in
3733 * some way. SCI_SUCCESS This value is returned if the controller was
3734 * successfully constructed. SCI_WARNING_TIMER_CONFLICT This value is returned
3735 * if the interrupt coalescence timer may cause SAS compliance issues for SMP
3736 * Target mode response processing. SCI_FAILURE_UNSUPPORTED_CONTROLLER_TYPE
3737 * This value is returned if the controller does not support the supplied type.
3738 * SCI_FAILURE_UNSUPPORTED_INIT_DATA_VERSION This value is returned if the
3739 * controller does not support the supplied initialization data version.
3740 */
3741 enum sci_status scic_controller_construct(struct scic_sds_controller *scic,
3742 void __iomem *scu_base,
3743 void __iomem *smu_base)
3744 {
3745 u8 i;
3746
3747 sci_base_controller_construct(&scic->parent,
3748 scic_sds_controller_state_table,
3749 scic->memory_descriptors,
3750 ARRAY_SIZE(scic->memory_descriptors), NULL);
3751
3752 scic->scu_registers = scu_base;
3753 scic->smu_registers = smu_base;
3754
3755 scic_sds_port_configuration_agent_construct(&scic->port_agent);
3756
3757 /* Construct the ports for this controller */
3758 for (i = 0; i < SCI_MAX_PORTS; i++)
3759 scic_sds_port_construct(&scic->port_table[i], i, scic);
3760 scic_sds_port_construct(&scic->port_table[i], SCIC_SDS_DUMMY_PORT, scic);
3761
3762 /* Construct the phys for this controller */
3763 for (i = 0; i < SCI_MAX_PHYS; i++) {
3764 /* Add all the PHYs to the dummy port */
3765 scic_sds_phy_construct(&scic->phy_table[i],
3766 &scic->port_table[SCI_MAX_PORTS], i);
3767 }
3768
3769 scic->invalid_phy_mask = 0;
3770
3771 /* Set the default maximum values */
3772 scic->completion_event_entries = SCU_EVENT_COUNT;
3773 scic->completion_queue_entries = SCU_COMPLETION_QUEUE_COUNT;
3774 scic->remote_node_entries = SCI_MAX_REMOTE_DEVICES;
3775 scic->logical_port_entries = SCI_MAX_PORTS;
3776 scic->task_context_entries = SCU_IO_REQUEST_COUNT;
3777 scic->uf_control.buffers.count = SCU_UNSOLICITED_FRAME_COUNT;
3778 scic->uf_control.address_table.count = SCU_UNSOLICITED_FRAME_COUNT;
3779
3780 /* Initialize the User and OEM parameters to default values. */
3781 scic_sds_controller_set_default_config_parameters(scic);
3782
3783 return scic_controller_reset(scic);
3784 }
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