isci: controller stop/start fixes
[deliverable/linux.git] / drivers / scsi / isci / core / scic_sds_phy.h
1 /*
2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
4 *
5 * GPL LICENSE SUMMARY
6 *
7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * BSD LICENSE
25 *
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
27 * All rights reserved.
28 *
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30 * modification, are permitted provided that the following conditions
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32 *
33 * * Redistributions of source code must retain the above copyright
34 * notice, this list of conditions and the following disclaimer.
35 * * Redistributions in binary form must reproduce the above copyright
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37 * the documentation and/or other materials provided with the
38 * distribution.
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41 * from this software without specific prior written permission.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */
55
56 #ifndef _SCIC_SDS_PHY_H_
57 #define _SCIC_SDS_PHY_H_
58
59 /**
60 * This file contains the structures, constants and prototypes for the
61 * struct scic_sds_phy object.
62 *
63 *
64 */
65
66 #include "intel_sata.h"
67 #include "intel_sas.h"
68 #include "sci_base_phy.h"
69 #include "scu_registers.h"
70
71 struct scic_sds_port;
72 /**
73 *
74 *
75 * This is the timeout value for the SATA phy to wait for a SIGNATURE FIS
76 * before restarting the starting state machine. Technically, the old parallel
77 * ATA specification required up to 30 seconds for a device to issue its
78 * signature FIS as a result of a soft reset. Now we see that devices respond
79 * generally within 15 seconds, but we'll use 25 for now.
80 */
81 #define SCIC_SDS_SIGNATURE_FIS_TIMEOUT 25000
82
83 /**
84 *
85 *
86 * This is the timeout for the SATA OOB/SN because the hardware does not
87 * recognize a hot plug after OOB signal but before the SN signals. We need to
88 * make sure after a hotplug timeout if we have not received the speed event
89 * notification from the hardware that we restart the hardware OOB state
90 * machine.
91 */
92 #define SCIC_SDS_SATA_LINK_TRAINING_TIMEOUT 250
93
94 /**
95 * enum SCIC_SDS_PHY_STARTING_SUBSTATES -
96 *
97 *
98 */
99 enum SCIC_SDS_PHY_STARTING_SUBSTATES {
100 /**
101 * Initial state
102 */
103 SCIC_SDS_PHY_STARTING_SUBSTATE_INITIAL,
104
105 /**
106 * Wait state for the hardware OSSP event type notification
107 */
108 SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_OSSP_EN,
109
110 /**
111 * Wait state for the PHY speed notification
112 */
113 SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_SAS_SPEED_EN,
114
115 /**
116 * Wait state for the IAF Unsolicited frame notification
117 */
118 SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_IAF_UF,
119
120 /**
121 * Wait state for the request to consume power
122 */
123 SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_SAS_POWER,
124
125 /**
126 * Wait state for request to consume power
127 */
128 SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_SATA_POWER,
129
130 /**
131 * Wait state for the SATA PHY notification
132 */
133 SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_SATA_PHY_EN,
134
135 /**
136 * Wait for the SATA PHY speed notification
137 */
138 SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_SATA_SPEED_EN,
139
140 /**
141 * Wait state for the SIGNATURE FIS unsolicited frame notification
142 */
143 SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_SIG_FIS_UF,
144
145 /**
146 * Exit state for this state machine
147 */
148 SCIC_SDS_PHY_STARTING_SUBSTATE_FINAL,
149 };
150
151 struct scic_sds_port;
152 struct scic_sds_controller;
153
154 /**
155 * This enumeration provides a named phy type for the state machine
156 *
157 *
158 */
159 enum SCIC_SDS_PHY_PROTOCOL {
160 /**
161 * This is an unknown phy type since there is either nothing on the other
162 * end or we have not detected the phy type as yet.
163 */
164 SCIC_SDS_PHY_PROTOCOL_UNKNOWN,
165
166 /**
167 * This is a SAS PHY
168 */
169 SCIC_SDS_PHY_PROTOCOL_SAS,
170
171 /**
172 * This is a SATA PHY
173 */
174 SCIC_SDS_PHY_PROTOCOL_SATA,
175
176 SCIC_SDS_MAX_PHY_PROTOCOLS
177 };
178
179 /**
180 * struct scic_sds_phy - This structure contains or references all of the data
181 * necessary to represent the core phy object and SCU harware protocol
182 * engine.
183 *
184 *
185 */
186 struct scic_sds_phy {
187 struct sci_base_phy parent;
188
189 /**
190 * This field specifies the port object that owns/contains this phy.
191 */
192 struct scic_sds_port *owning_port;
193
194 /**
195 * This field indicates whether the phy supports 1.5 Gb/s, 3.0 Gb/s,
196 * or 6.0 Gb/s operation.
197 */
198 enum sci_sas_link_rate max_negotiated_speed;
199
200 /**
201 * This member specifies the protocol being utilized on this phy. This
202 * field contains a legitamite value once the PHY has link trained with
203 * a remote phy.
204 */
205 enum SCIC_SDS_PHY_PROTOCOL protocol;
206
207 /**
208 * This field specifies the index with which this phy is associated (0-3).
209 */
210 u8 phy_index;
211
212 /**
213 * This member indicates if this particular PHY has received a BCN while
214 * it had no port assignement. This BCN will be reported once the phy is
215 * assigned to a port.
216 */
217 bool bcn_received_while_port_unassigned;
218
219 /**
220 * This field indicates if this PHY is currently in the process of
221 * link training (i.e. it has started OOB, but has yet to perform
222 * IAF exchange/Signature FIS reception).
223 */
224 bool is_in_link_training;
225
226 union {
227 struct {
228 struct sci_sas_identify_address_frame identify_address_frame_buffer;
229
230 } sas;
231
232 struct {
233 struct sata_fis_reg_d2h signature_fis_buffer;
234
235 } sata;
236
237 } phy_type;
238
239 /**
240 * This field contains a reference to the timer utilized in detecting
241 * when a signature FIS timeout has occurred. The signature FIS is the
242 * first FIS sent by an attached SATA device after OOB/SN.
243 */
244 void *sata_timeout_timer;
245
246 const struct scic_sds_phy_state_handler *state_handlers;
247
248 struct sci_base_state_machine starting_substate_machine;
249
250 /**
251 * This field is the pointer to the transport layer register for the SCU
252 * hardware.
253 */
254 struct scu_transport_layer_registers __iomem *transport_layer_registers;
255
256 /**
257 * This field points to the link layer register set within the SCU.
258 */
259 struct scu_link_layer_registers __iomem *link_layer_registers;
260
261 };
262
263
264 typedef enum sci_status (*scic_sds_phy_event_handler_t)(struct scic_sds_phy *, u32);
265 typedef enum sci_status (*scic_sds_phy_frame_handler_t)(struct scic_sds_phy *, u32);
266 typedef enum sci_status (*scic_sds_phy_power_handler_t)(struct scic_sds_phy *);
267
268 /**
269 * struct scic_sds_phy_state_handler -
270 *
271 *
272 */
273 struct scic_sds_phy_state_handler {
274 /**
275 * This is the struct sci_base_phy object state handlers.
276 */
277 struct sci_base_phy_state_handler parent;
278
279 /**
280 * The state handler for unsolicited frames received from the SCU hardware.
281 */
282 scic_sds_phy_frame_handler_t frame_handler;
283
284 /**
285 * The state handler for events received from the SCU hardware.
286 */
287 scic_sds_phy_event_handler_t event_handler;
288
289 /**
290 * The state handler for staggered spinup.
291 */
292 scic_sds_phy_power_handler_t consume_power_handler;
293
294 };
295
296 extern const struct scic_sds_phy_state_handler scic_sds_phy_state_handler_table[];
297 extern const struct sci_base_state scic_sds_phy_state_table[];
298 extern const struct sci_base_state scic_sds_phy_starting_substates[];
299 extern const struct scic_sds_phy_state_handler scic_sds_phy_starting_substate_handler_table[];
300
301
302 /**
303 * scic_sds_phy_get_index() -
304 *
305 * This macro returns the phy index for the specified phy
306 */
307 #define scic_sds_phy_get_index(phy) \
308 ((phy)->phy_index)
309
310 /**
311 * scic_sds_phy_get_controller() - This macro returns the controller for this
312 * phy
313 *
314 *
315 */
316 #define scic_sds_phy_get_controller(phy) \
317 (scic_sds_port_get_controller((phy)->owning_port))
318
319 /**
320 * scic_sds_phy_get_base_state_machine() - This macro returns the state machine
321 * for the base phy
322 *
323 *
324 */
325 #define scic_sds_phy_get_base_state_machine(phy) \
326 (&(phy)->parent.state_machine)
327
328 /**
329 * scic_sds_phy_get_starting_substate_machine() - This macro returns the
330 * starting substate machine for this phy
331 *
332 *
333 */
334 #define scic_sds_phy_get_starting_substate_machine(phy) \
335 (&(phy)->starting_substate_machine)
336
337 /**
338 * scic_sds_phy_set_state_handlers() - This macro sets the state handlers for
339 * this phy object
340 *
341 *
342 */
343 #define scic_sds_phy_set_state_handlers(phy, handlers) \
344 ((phy)->state_handlers = (handlers))
345
346 /**
347 * scic_sds_phy_set_base_state_handlers() -
348 *
349 * This macro set the base state handlers for the phy object.
350 */
351 #define scic_sds_phy_set_base_state_handlers(phy, state_id) \
352 scic_sds_phy_set_state_handlers(\
353 (phy), \
354 &scic_sds_phy_state_handler_table[(state_id)] \
355 )
356
357 /**
358 * scic_sds_phy_is_ready() -
359 *
360 * This macro returns true if the current base state for this phy is
361 * SCI_BASE_PHY_STATE_READY
362 */
363 #define scic_sds_phy_is_ready(phy) \
364 (\
365 SCI_BASE_PHY_STATE_READY \
366 == sci_base_state_machine_get_state(\
367 scic_sds_phy_get_base_state_machine(phy) \
368 ) \
369 )
370
371 /* --------------------------------------------------------------------------- */
372
373
374
375
376 /* --------------------------------------------------------------------------- */
377
378 void scic_sds_phy_construct(
379 struct scic_sds_phy *this_phy,
380 struct scic_sds_port *owning_port,
381 u8 phy_index);
382
383 struct scic_sds_port *scic_sds_phy_get_port(
384 struct scic_sds_phy *this_phy);
385
386 void scic_sds_phy_set_port(
387 struct scic_sds_phy *this_phy,
388 struct scic_sds_port *owning_port);
389
390 enum sci_status scic_sds_phy_initialize(
391 struct scic_sds_phy *this_phy,
392 struct scu_transport_layer_registers __iomem *transport_layer_registers,
393 struct scu_link_layer_registers __iomem *link_layer_registers);
394
395 enum sci_status scic_sds_phy_start(
396 struct scic_sds_phy *this_phy);
397
398 enum sci_status scic_sds_phy_stop(
399 struct scic_sds_phy *this_phy);
400
401 enum sci_status scic_sds_phy_reset(
402 struct scic_sds_phy *this_phy);
403
404 void scic_sds_phy_sata_timeout(
405 void *cookie);
406
407 /* --------------------------------------------------------------------------- */
408
409 void scic_sds_phy_suspend(
410 struct scic_sds_phy *this_phy);
411
412 void scic_sds_phy_resume(
413 struct scic_sds_phy *this_phy);
414
415 void scic_sds_phy_setup_transport(
416 struct scic_sds_phy *this_phy,
417 u32 device_id);
418
419 /* --------------------------------------------------------------------------- */
420
421 enum sci_status scic_sds_phy_event_handler(
422 struct scic_sds_phy *this_phy,
423 u32 event_code);
424
425 enum sci_status scic_sds_phy_frame_handler(
426 struct scic_sds_phy *this_phy,
427 u32 frame_index);
428
429 enum sci_status scic_sds_phy_consume_power_handler(
430 struct scic_sds_phy *this_phy);
431
432 void scic_sds_phy_get_sas_address(
433 struct scic_sds_phy *this_phy,
434 struct sci_sas_address *sas_address);
435
436 void scic_sds_phy_get_attached_sas_address(
437 struct scic_sds_phy *this_phy,
438 struct sci_sas_address *sas_address);
439
440 void scic_sds_phy_get_protocols(
441 struct scic_sds_phy *this_phy,
442 struct sci_sas_identify_address_frame_protocols *protocols);
443
444 void scic_sds_phy_get_attached_phy_protocols(
445 struct scic_sds_phy *this_phy,
446 struct sci_sas_identify_address_frame_protocols *protocols);
447
448 /*
449 * ****************************************************************************-
450 * * SCIC SDS PHY Handler Methods
451 * ****************************************************************************- */
452
453 enum sci_status scic_sds_phy_default_start_handler(
454 struct sci_base_phy *phy);
455
456 enum sci_status scic_sds_phy_default_stop_handler(
457 struct sci_base_phy *phy);
458
459 enum sci_status scic_sds_phy_default_reset_handler(
460 struct sci_base_phy *phy);
461
462 enum sci_status scic_sds_phy_default_destroy_handler(
463 struct sci_base_phy *phy);
464
465 enum sci_status scic_sds_phy_default_frame_handler(
466 struct scic_sds_phy *phy,
467 u32 frame_index);
468
469 enum sci_status scic_sds_phy_default_event_handler(
470 struct scic_sds_phy *phy,
471 u32 evnet_code);
472
473 enum sci_status scic_sds_phy_default_consume_power_handler(
474 struct scic_sds_phy *phy);
475
476 #endif /* _SCIC_SDS_PHY_H_ */
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