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qla2xxx: IOCB data should be copied to I/O mem using memcpy_toio.
[deliverable/linux.git] / drivers / scsi / qla2xxx / qla_mr.c
1 /*
2 * QLogic Fibre Channel HBA Driver
3 * Copyright (c) 2003-2014 QLogic Corporation
4 *
5 * See LICENSE.qla2xxx for copyright and licensing details.
6 */
7 #include "qla_def.h"
8 #include <linux/delay.h>
9 #include <linux/pci.h>
10 #include <linux/ratelimit.h>
11 #include <linux/vmalloc.h>
12 #include <scsi/scsi_tcq.h>
13 #include <linux/utsname.h>
14
15
16 /* QLAFX00 specific Mailbox implementation functions */
17
18 /*
19 * qlafx00_mailbox_command
20 * Issue mailbox command and waits for completion.
21 *
22 * Input:
23 * ha = adapter block pointer.
24 * mcp = driver internal mbx struct pointer.
25 *
26 * Output:
27 * mb[MAX_MAILBOX_REGISTER_COUNT] = returned mailbox data.
28 *
29 * Returns:
30 * 0 : QLA_SUCCESS = cmd performed success
31 * 1 : QLA_FUNCTION_FAILED (error encountered)
32 * 6 : QLA_FUNCTION_TIMEOUT (timeout condition encountered)
33 *
34 * Context:
35 * Kernel context.
36 */
37 static int
38 qlafx00_mailbox_command(scsi_qla_host_t *vha, struct mbx_cmd_32 *mcp)
39
40 {
41 int rval;
42 unsigned long flags = 0;
43 device_reg_t *reg;
44 uint8_t abort_active;
45 uint8_t io_lock_on;
46 uint16_t command = 0;
47 uint32_t *iptr;
48 uint32_t __iomem *optr;
49 uint32_t cnt;
50 uint32_t mboxes;
51 unsigned long wait_time;
52 struct qla_hw_data *ha = vha->hw;
53 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
54
55 if (ha->pdev->error_state > pci_channel_io_frozen) {
56 ql_log(ql_log_warn, vha, 0x115c,
57 "error_state is greater than pci_channel_io_frozen, "
58 "exiting.\n");
59 return QLA_FUNCTION_TIMEOUT;
60 }
61
62 if (vha->device_flags & DFLG_DEV_FAILED) {
63 ql_log(ql_log_warn, vha, 0x115f,
64 "Device in failed state, exiting.\n");
65 return QLA_FUNCTION_TIMEOUT;
66 }
67
68 reg = ha->iobase;
69 io_lock_on = base_vha->flags.init_done;
70
71 rval = QLA_SUCCESS;
72 abort_active = test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
73
74 if (ha->flags.pci_channel_io_perm_failure) {
75 ql_log(ql_log_warn, vha, 0x1175,
76 "Perm failure on EEH timeout MBX, exiting.\n");
77 return QLA_FUNCTION_TIMEOUT;
78 }
79
80 if (ha->flags.isp82xx_fw_hung) {
81 /* Setting Link-Down error */
82 mcp->mb[0] = MBS_LINK_DOWN_ERROR;
83 ql_log(ql_log_warn, vha, 0x1176,
84 "FW hung = %d.\n", ha->flags.isp82xx_fw_hung);
85 rval = QLA_FUNCTION_FAILED;
86 goto premature_exit;
87 }
88
89 /*
90 * Wait for active mailbox commands to finish by waiting at most tov
91 * seconds. This is to serialize actual issuing of mailbox cmds during
92 * non ISP abort time.
93 */
94 if (!wait_for_completion_timeout(&ha->mbx_cmd_comp, mcp->tov * HZ)) {
95 /* Timeout occurred. Return error. */
96 ql_log(ql_log_warn, vha, 0x1177,
97 "Cmd access timeout, cmd=0x%x, Exiting.\n",
98 mcp->mb[0]);
99 return QLA_FUNCTION_TIMEOUT;
100 }
101
102 ha->flags.mbox_busy = 1;
103 /* Save mailbox command for debug */
104 ha->mcp32 = mcp;
105
106 ql_dbg(ql_dbg_mbx, vha, 0x1178,
107 "Prepare to issue mbox cmd=0x%x.\n", mcp->mb[0]);
108
109 spin_lock_irqsave(&ha->hardware_lock, flags);
110
111 /* Load mailbox registers. */
112 optr = (uint32_t __iomem *)&reg->ispfx00.mailbox0;
113
114 iptr = mcp->mb;
115 command = mcp->mb[0];
116 mboxes = mcp->out_mb;
117
118 for (cnt = 0; cnt < ha->mbx_count; cnt++) {
119 if (mboxes & BIT_0)
120 WRT_REG_DWORD(optr, *iptr);
121
122 mboxes >>= 1;
123 optr++;
124 iptr++;
125 }
126
127 /* Issue set host interrupt command to send cmd out. */
128 ha->flags.mbox_int = 0;
129 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
130
131 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1172,
132 (uint8_t *)mcp->mb, 16);
133 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1173,
134 ((uint8_t *)mcp->mb + 0x10), 16);
135 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1174,
136 ((uint8_t *)mcp->mb + 0x20), 8);
137
138 /* Unlock mbx registers and wait for interrupt */
139 ql_dbg(ql_dbg_mbx, vha, 0x1179,
140 "Going to unlock irq & waiting for interrupts. "
141 "jiffies=%lx.\n", jiffies);
142
143 /* Wait for mbx cmd completion until timeout */
144 if ((!abort_active && io_lock_on) || IS_NOPOLLING_TYPE(ha)) {
145 set_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
146
147 QLAFX00_SET_HST_INTR(ha, ha->mbx_intr_code);
148 spin_unlock_irqrestore(&ha->hardware_lock, flags);
149
150 wait_for_completion_timeout(&ha->mbx_intr_comp, mcp->tov * HZ);
151 } else {
152 ql_dbg(ql_dbg_mbx, vha, 0x112c,
153 "Cmd=%x Polling Mode.\n", command);
154
155 QLAFX00_SET_HST_INTR(ha, ha->mbx_intr_code);
156 spin_unlock_irqrestore(&ha->hardware_lock, flags);
157
158 wait_time = jiffies + mcp->tov * HZ; /* wait at most tov secs */
159 while (!ha->flags.mbox_int) {
160 if (time_after(jiffies, wait_time))
161 break;
162
163 /* Check for pending interrupts. */
164 qla2x00_poll(ha->rsp_q_map[0]);
165
166 if (!ha->flags.mbox_int &&
167 !(IS_QLA2200(ha) &&
168 command == MBC_LOAD_RISC_RAM_EXTENDED))
169 usleep_range(10000, 11000);
170 } /* while */
171 ql_dbg(ql_dbg_mbx, vha, 0x112d,
172 "Waited %d sec.\n",
173 (uint)((jiffies - (wait_time - (mcp->tov * HZ)))/HZ));
174 }
175
176 /* Check whether we timed out */
177 if (ha->flags.mbox_int) {
178 uint32_t *iptr2;
179
180 ql_dbg(ql_dbg_mbx, vha, 0x112e,
181 "Cmd=%x completed.\n", command);
182
183 /* Got interrupt. Clear the flag. */
184 ha->flags.mbox_int = 0;
185 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
186
187 if (ha->mailbox_out32[0] != MBS_COMMAND_COMPLETE)
188 rval = QLA_FUNCTION_FAILED;
189
190 /* Load return mailbox registers. */
191 iptr2 = mcp->mb;
192 iptr = (uint32_t *)&ha->mailbox_out32[0];
193 mboxes = mcp->in_mb;
194 for (cnt = 0; cnt < ha->mbx_count; cnt++) {
195 if (mboxes & BIT_0)
196 *iptr2 = *iptr;
197
198 mboxes >>= 1;
199 iptr2++;
200 iptr++;
201 }
202 } else {
203
204 rval = QLA_FUNCTION_TIMEOUT;
205 }
206
207 ha->flags.mbox_busy = 0;
208
209 /* Clean up */
210 ha->mcp32 = NULL;
211
212 if ((abort_active || !io_lock_on) && !IS_NOPOLLING_TYPE(ha)) {
213 ql_dbg(ql_dbg_mbx, vha, 0x113a,
214 "checking for additional resp interrupt.\n");
215
216 /* polling mode for non isp_abort commands. */
217 qla2x00_poll(ha->rsp_q_map[0]);
218 }
219
220 if (rval == QLA_FUNCTION_TIMEOUT &&
221 mcp->mb[0] != MBC_GEN_SYSTEM_ERROR) {
222 if (!io_lock_on || (mcp->flags & IOCTL_CMD) ||
223 ha->flags.eeh_busy) {
224 /* not in dpc. schedule it for dpc to take over. */
225 ql_dbg(ql_dbg_mbx, vha, 0x115d,
226 "Timeout, schedule isp_abort_needed.\n");
227
228 if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
229 !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
230 !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
231
232 ql_log(ql_log_info, base_vha, 0x115e,
233 "Mailbox cmd timeout occurred, cmd=0x%x, "
234 "mb[0]=0x%x, eeh_busy=0x%x. Scheduling ISP "
235 "abort.\n", command, mcp->mb[0],
236 ha->flags.eeh_busy);
237 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
238 qla2xxx_wake_dpc(vha);
239 }
240 } else if (!abort_active) {
241 /* call abort directly since we are in the DPC thread */
242 ql_dbg(ql_dbg_mbx, vha, 0x1160,
243 "Timeout, calling abort_isp.\n");
244
245 if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
246 !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
247 !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
248
249 ql_log(ql_log_info, base_vha, 0x1161,
250 "Mailbox cmd timeout occurred, cmd=0x%x, "
251 "mb[0]=0x%x. Scheduling ISP abort ",
252 command, mcp->mb[0]);
253
254 set_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
255 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
256 if (ha->isp_ops->abort_isp(vha)) {
257 /* Failed. retry later. */
258 set_bit(ISP_ABORT_NEEDED,
259 &vha->dpc_flags);
260 }
261 clear_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
262 ql_dbg(ql_dbg_mbx, vha, 0x1162,
263 "Finished abort_isp.\n");
264 }
265 }
266 }
267
268 premature_exit:
269 /* Allow next mbx cmd to come in. */
270 complete(&ha->mbx_cmd_comp);
271
272 if (rval) {
273 ql_log(ql_log_warn, base_vha, 0x1163,
274 "**** Failed mbx[0]=%x, mb[1]=%x, mb[2]=%x, "
275 "mb[3]=%x, cmd=%x ****.\n",
276 mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3], command);
277 } else {
278 ql_dbg(ql_dbg_mbx, base_vha, 0x1164, "Done %s.\n", __func__);
279 }
280
281 return rval;
282 }
283
284 /*
285 * qlafx00_driver_shutdown
286 * Indicate a driver shutdown to firmware.
287 *
288 * Input:
289 * ha = adapter block pointer.
290 *
291 * Returns:
292 * local function return status code.
293 *
294 * Context:
295 * Kernel context.
296 */
297 int
298 qlafx00_driver_shutdown(scsi_qla_host_t *vha, int tmo)
299 {
300 int rval;
301 struct mbx_cmd_32 mc;
302 struct mbx_cmd_32 *mcp = &mc;
303
304 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1166,
305 "Entered %s.\n", __func__);
306
307 mcp->mb[0] = MBC_MR_DRV_SHUTDOWN;
308 mcp->out_mb = MBX_0;
309 mcp->in_mb = MBX_0;
310 if (tmo)
311 mcp->tov = tmo;
312 else
313 mcp->tov = MBX_TOV_SECONDS;
314 mcp->flags = 0;
315 rval = qlafx00_mailbox_command(vha, mcp);
316
317 if (rval != QLA_SUCCESS) {
318 ql_dbg(ql_dbg_mbx, vha, 0x1167,
319 "Failed=%x.\n", rval);
320 } else {
321 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1168,
322 "Done %s.\n", __func__);
323 }
324
325 return rval;
326 }
327
328 /*
329 * qlafx00_get_firmware_state
330 * Get adapter firmware state.
331 *
332 * Input:
333 * ha = adapter block pointer.
334 * TARGET_QUEUE_LOCK must be released.
335 * ADAPTER_STATE_LOCK must be released.
336 *
337 * Returns:
338 * qla7xxx local function return status code.
339 *
340 * Context:
341 * Kernel context.
342 */
343 static int
344 qlafx00_get_firmware_state(scsi_qla_host_t *vha, uint32_t *states)
345 {
346 int rval;
347 struct mbx_cmd_32 mc;
348 struct mbx_cmd_32 *mcp = &mc;
349
350 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1169,
351 "Entered %s.\n", __func__);
352
353 mcp->mb[0] = MBC_GET_FIRMWARE_STATE;
354 mcp->out_mb = MBX_0;
355 mcp->in_mb = MBX_1|MBX_0;
356 mcp->tov = MBX_TOV_SECONDS;
357 mcp->flags = 0;
358 rval = qlafx00_mailbox_command(vha, mcp);
359
360 /* Return firmware states. */
361 states[0] = mcp->mb[1];
362
363 if (rval != QLA_SUCCESS) {
364 ql_dbg(ql_dbg_mbx, vha, 0x116a,
365 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
366 } else {
367 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116b,
368 "Done %s.\n", __func__);
369 }
370 return rval;
371 }
372
373 /*
374 * qlafx00_init_firmware
375 * Initialize adapter firmware.
376 *
377 * Input:
378 * ha = adapter block pointer.
379 * dptr = Initialization control block pointer.
380 * size = size of initialization control block.
381 * TARGET_QUEUE_LOCK must be released.
382 * ADAPTER_STATE_LOCK must be released.
383 *
384 * Returns:
385 * qlafx00 local function return status code.
386 *
387 * Context:
388 * Kernel context.
389 */
390 int
391 qlafx00_init_firmware(scsi_qla_host_t *vha, uint16_t size)
392 {
393 int rval;
394 struct mbx_cmd_32 mc;
395 struct mbx_cmd_32 *mcp = &mc;
396 struct qla_hw_data *ha = vha->hw;
397
398 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116c,
399 "Entered %s.\n", __func__);
400
401 mcp->mb[0] = MBC_INITIALIZE_FIRMWARE;
402
403 mcp->mb[1] = 0;
404 mcp->mb[2] = MSD(ha->init_cb_dma);
405 mcp->mb[3] = LSD(ha->init_cb_dma);
406
407 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
408 mcp->in_mb = MBX_0;
409 mcp->buf_size = size;
410 mcp->flags = MBX_DMA_OUT;
411 mcp->tov = MBX_TOV_SECONDS;
412 rval = qlafx00_mailbox_command(vha, mcp);
413
414 if (rval != QLA_SUCCESS) {
415 ql_dbg(ql_dbg_mbx, vha, 0x116d,
416 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
417 } else {
418 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116e,
419 "Done %s.\n", __func__);
420 }
421 return rval;
422 }
423
424 /*
425 * qlafx00_mbx_reg_test
426 */
427 static int
428 qlafx00_mbx_reg_test(scsi_qla_host_t *vha)
429 {
430 int rval;
431 struct mbx_cmd_32 mc;
432 struct mbx_cmd_32 *mcp = &mc;
433
434 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116f,
435 "Entered %s.\n", __func__);
436
437
438 mcp->mb[0] = MBC_MAILBOX_REGISTER_TEST;
439 mcp->mb[1] = 0xAAAA;
440 mcp->mb[2] = 0x5555;
441 mcp->mb[3] = 0xAA55;
442 mcp->mb[4] = 0x55AA;
443 mcp->mb[5] = 0xA5A5;
444 mcp->mb[6] = 0x5A5A;
445 mcp->mb[7] = 0x2525;
446 mcp->mb[8] = 0xBBBB;
447 mcp->mb[9] = 0x6666;
448 mcp->mb[10] = 0xBB66;
449 mcp->mb[11] = 0x66BB;
450 mcp->mb[12] = 0xB6B6;
451 mcp->mb[13] = 0x6B6B;
452 mcp->mb[14] = 0x3636;
453 mcp->mb[15] = 0xCCCC;
454
455
456 mcp->out_mb = MBX_15|MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|
457 MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
458 mcp->in_mb = MBX_15|MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|
459 MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
460 mcp->buf_size = 0;
461 mcp->flags = MBX_DMA_OUT;
462 mcp->tov = MBX_TOV_SECONDS;
463 rval = qlafx00_mailbox_command(vha, mcp);
464 if (rval == QLA_SUCCESS) {
465 if (mcp->mb[17] != 0xAAAA || mcp->mb[18] != 0x5555 ||
466 mcp->mb[19] != 0xAA55 || mcp->mb[20] != 0x55AA)
467 rval = QLA_FUNCTION_FAILED;
468 if (mcp->mb[21] != 0xA5A5 || mcp->mb[22] != 0x5A5A ||
469 mcp->mb[23] != 0x2525 || mcp->mb[24] != 0xBBBB)
470 rval = QLA_FUNCTION_FAILED;
471 if (mcp->mb[25] != 0x6666 || mcp->mb[26] != 0xBB66 ||
472 mcp->mb[27] != 0x66BB || mcp->mb[28] != 0xB6B6)
473 rval = QLA_FUNCTION_FAILED;
474 if (mcp->mb[29] != 0x6B6B || mcp->mb[30] != 0x3636 ||
475 mcp->mb[31] != 0xCCCC)
476 rval = QLA_FUNCTION_FAILED;
477 }
478
479 if (rval != QLA_SUCCESS) {
480 ql_dbg(ql_dbg_mbx, vha, 0x1170,
481 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
482 } else {
483 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1171,
484 "Done %s.\n", __func__);
485 }
486 return rval;
487 }
488
489 /**
490 * qlafx00_pci_config() - Setup ISPFx00 PCI configuration registers.
491 * @ha: HA context
492 *
493 * Returns 0 on success.
494 */
495 int
496 qlafx00_pci_config(scsi_qla_host_t *vha)
497 {
498 uint16_t w;
499 struct qla_hw_data *ha = vha->hw;
500
501 pci_set_master(ha->pdev);
502 pci_try_set_mwi(ha->pdev);
503
504 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
505 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
506 w &= ~PCI_COMMAND_INTX_DISABLE;
507 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
508
509 /* PCIe -- adjust Maximum Read Request Size (2048). */
510 if (pci_is_pcie(ha->pdev))
511 pcie_set_readrq(ha->pdev, 2048);
512
513 ha->chip_revision = ha->pdev->revision;
514
515 return QLA_SUCCESS;
516 }
517
518 /**
519 * qlafx00_warm_reset() - Perform warm reset of iSA(CPUs being reset on SOC).
520 * @ha: HA context
521 *
522 */
523 static inline void
524 qlafx00_soc_cpu_reset(scsi_qla_host_t *vha)
525 {
526 unsigned long flags = 0;
527 struct qla_hw_data *ha = vha->hw;
528 int i, core;
529 uint32_t cnt;
530
531 /* Set all 4 cores in reset */
532 for (i = 0; i < 4; i++) {
533 QLAFX00_SET_HBA_SOC_REG(ha,
534 (SOC_SW_RST_CONTROL_REG_CORE0 + 8*i), (0xF01));
535 }
536
537 /* Set all 4 core Clock gating control */
538 for (i = 0; i < 4; i++) {
539 QLAFX00_SET_HBA_SOC_REG(ha,
540 (SOC_SW_RST_CONTROL_REG_CORE0 + 4 + 8*i), (0x01010101));
541 }
542
543 /* Reset all units in Fabric */
544 QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_RST_CONTROL_REG, (0x11F0101));
545
546 /* Reset all interrupt control registers */
547 for (i = 0; i < 115; i++) {
548 QLAFX00_SET_HBA_SOC_REG(ha,
549 (SOC_INTERRUPT_SOURCE_I_CONTROL_REG + 4*i), (0x0));
550 }
551
552 /* Reset Timers control registers. per core */
553 for (core = 0; core < 4; core++)
554 for (i = 0; i < 8; i++)
555 QLAFX00_SET_HBA_SOC_REG(ha,
556 (SOC_CORE_TIMER_REG + 0x100*core + 4*i), (0x0));
557
558 /* Reset per core IRQ ack register */
559 for (core = 0; core < 4; core++)
560 QLAFX00_SET_HBA_SOC_REG(ha,
561 (SOC_IRQ_ACK_REG + 0x100*core), (0x3FF));
562
563 /* Set Fabric control and config to defaults */
564 QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_CONTROL_REG, (0x2));
565 QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_CONFIG_REG, (0x3));
566
567 spin_lock_irqsave(&ha->hardware_lock, flags);
568
569 /* Kick in Fabric units */
570 QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_RST_CONTROL_REG, (0x0));
571
572 /* Kick in Core0 to start boot process */
573 QLAFX00_SET_HBA_SOC_REG(ha, SOC_SW_RST_CONTROL_REG_CORE0, (0xF00));
574
575 spin_unlock_irqrestore(&ha->hardware_lock, flags);
576
577 /* Wait 10secs for soft-reset to complete. */
578 for (cnt = 10; cnt; cnt--) {
579 msleep(1000);
580 barrier();
581 }
582 }
583
584 /**
585 * qlafx00_soft_reset() - Soft Reset ISPFx00.
586 * @ha: HA context
587 *
588 * Returns 0 on success.
589 */
590 void
591 qlafx00_soft_reset(scsi_qla_host_t *vha)
592 {
593 struct qla_hw_data *ha = vha->hw;
594
595 if (unlikely(pci_channel_offline(ha->pdev) &&
596 ha->flags.pci_channel_io_perm_failure))
597 return;
598
599 ha->isp_ops->disable_intrs(ha);
600 qlafx00_soc_cpu_reset(vha);
601 ha->isp_ops->enable_intrs(ha);
602 }
603
604 /**
605 * qlafx00_chip_diag() - Test ISPFx00 for proper operation.
606 * @ha: HA context
607 *
608 * Returns 0 on success.
609 */
610 int
611 qlafx00_chip_diag(scsi_qla_host_t *vha)
612 {
613 int rval = 0;
614 struct qla_hw_data *ha = vha->hw;
615 struct req_que *req = ha->req_q_map[0];
616
617 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
618
619 rval = qlafx00_mbx_reg_test(vha);
620 if (rval) {
621 ql_log(ql_log_warn, vha, 0x1165,
622 "Failed mailbox send register test\n");
623 } else {
624 /* Flag a successful rval */
625 rval = QLA_SUCCESS;
626 }
627 return rval;
628 }
629
630 void
631 qlafx00_config_rings(struct scsi_qla_host *vha)
632 {
633 struct qla_hw_data *ha = vha->hw;
634 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
635
636 WRT_REG_DWORD(&reg->req_q_in, 0);
637 WRT_REG_DWORD(&reg->req_q_out, 0);
638
639 WRT_REG_DWORD(&reg->rsp_q_in, 0);
640 WRT_REG_DWORD(&reg->rsp_q_out, 0);
641
642 /* PCI posting */
643 RD_REG_DWORD(&reg->rsp_q_out);
644 }
645
646 char *
647 qlafx00_pci_info_str(struct scsi_qla_host *vha, char *str)
648 {
649 struct qla_hw_data *ha = vha->hw;
650
651 if (pci_is_pcie(ha->pdev)) {
652 strcpy(str, "PCIe iSA");
653 return str;
654 }
655 return str;
656 }
657
658 char *
659 qlafx00_fw_version_str(struct scsi_qla_host *vha, char *str)
660 {
661 struct qla_hw_data *ha = vha->hw;
662
663 sprintf(str, "%s", ha->mr.fw_version);
664 return str;
665 }
666
667 void
668 qlafx00_enable_intrs(struct qla_hw_data *ha)
669 {
670 unsigned long flags = 0;
671
672 spin_lock_irqsave(&ha->hardware_lock, flags);
673 ha->interrupts_on = 1;
674 QLAFX00_ENABLE_ICNTRL_REG(ha);
675 spin_unlock_irqrestore(&ha->hardware_lock, flags);
676 }
677
678 void
679 qlafx00_disable_intrs(struct qla_hw_data *ha)
680 {
681 unsigned long flags = 0;
682
683 spin_lock_irqsave(&ha->hardware_lock, flags);
684 ha->interrupts_on = 0;
685 QLAFX00_DISABLE_ICNTRL_REG(ha);
686 spin_unlock_irqrestore(&ha->hardware_lock, flags);
687 }
688
689 int
690 qlafx00_abort_target(fc_port_t *fcport, unsigned int l, int tag)
691 {
692 return qla2x00_async_tm_cmd(fcport, TCF_TARGET_RESET, l, tag);
693 }
694
695 int
696 qlafx00_lun_reset(fc_port_t *fcport, unsigned int l, int tag)
697 {
698 return qla2x00_async_tm_cmd(fcport, TCF_LUN_RESET, l, tag);
699 }
700
701 int
702 qlafx00_loop_reset(scsi_qla_host_t *vha)
703 {
704 int ret;
705 struct fc_port *fcport;
706 struct qla_hw_data *ha = vha->hw;
707
708 if (ql2xtargetreset) {
709 list_for_each_entry(fcport, &vha->vp_fcports, list) {
710 if (fcport->port_type != FCT_TARGET)
711 continue;
712
713 ret = ha->isp_ops->target_reset(fcport, 0, 0);
714 if (ret != QLA_SUCCESS) {
715 ql_dbg(ql_dbg_taskm, vha, 0x803d,
716 "Bus Reset failed: Reset=%d "
717 "d_id=%x.\n", ret, fcport->d_id.b24);
718 }
719 }
720 }
721 return QLA_SUCCESS;
722 }
723
724 int
725 qlafx00_iospace_config(struct qla_hw_data *ha)
726 {
727 if (pci_request_selected_regions(ha->pdev, ha->bars,
728 QLA2XXX_DRIVER_NAME)) {
729 ql_log_pci(ql_log_fatal, ha->pdev, 0x014e,
730 "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
731 pci_name(ha->pdev));
732 goto iospace_error_exit;
733 }
734
735 /* Use MMIO operations for all accesses. */
736 if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
737 ql_log_pci(ql_log_warn, ha->pdev, 0x014f,
738 "Invalid pci I/O region size (%s).\n",
739 pci_name(ha->pdev));
740 goto iospace_error_exit;
741 }
742 if (pci_resource_len(ha->pdev, 0) < BAR0_LEN_FX00) {
743 ql_log_pci(ql_log_warn, ha->pdev, 0x0127,
744 "Invalid PCI mem BAR0 region size (%s), aborting\n",
745 pci_name(ha->pdev));
746 goto iospace_error_exit;
747 }
748
749 ha->cregbase =
750 ioremap_nocache(pci_resource_start(ha->pdev, 0), BAR0_LEN_FX00);
751 if (!ha->cregbase) {
752 ql_log_pci(ql_log_fatal, ha->pdev, 0x0128,
753 "cannot remap MMIO (%s), aborting\n", pci_name(ha->pdev));
754 goto iospace_error_exit;
755 }
756
757 if (!(pci_resource_flags(ha->pdev, 2) & IORESOURCE_MEM)) {
758 ql_log_pci(ql_log_warn, ha->pdev, 0x0129,
759 "region #2 not an MMIO resource (%s), aborting\n",
760 pci_name(ha->pdev));
761 goto iospace_error_exit;
762 }
763 if (pci_resource_len(ha->pdev, 2) < BAR2_LEN_FX00) {
764 ql_log_pci(ql_log_warn, ha->pdev, 0x012a,
765 "Invalid PCI mem BAR2 region size (%s), aborting\n",
766 pci_name(ha->pdev));
767 goto iospace_error_exit;
768 }
769
770 ha->iobase =
771 ioremap_nocache(pci_resource_start(ha->pdev, 2), BAR2_LEN_FX00);
772 if (!ha->iobase) {
773 ql_log_pci(ql_log_fatal, ha->pdev, 0x012b,
774 "cannot remap MMIO (%s), aborting\n", pci_name(ha->pdev));
775 goto iospace_error_exit;
776 }
777
778 /* Determine queue resources */
779 ha->max_req_queues = ha->max_rsp_queues = 1;
780
781 ql_log_pci(ql_log_info, ha->pdev, 0x012c,
782 "Bars 0x%x, iobase0 0x%p, iobase2 0x%p\n",
783 ha->bars, ha->cregbase, ha->iobase);
784
785 return 0;
786
787 iospace_error_exit:
788 return -ENOMEM;
789 }
790
791 static void
792 qlafx00_save_queue_ptrs(struct scsi_qla_host *vha)
793 {
794 struct qla_hw_data *ha = vha->hw;
795 struct req_que *req = ha->req_q_map[0];
796 struct rsp_que *rsp = ha->rsp_q_map[0];
797
798 req->length_fx00 = req->length;
799 req->ring_fx00 = req->ring;
800 req->dma_fx00 = req->dma;
801
802 rsp->length_fx00 = rsp->length;
803 rsp->ring_fx00 = rsp->ring;
804 rsp->dma_fx00 = rsp->dma;
805
806 ql_dbg(ql_dbg_init, vha, 0x012d,
807 "req: %p, ring_fx00: %p, length_fx00: 0x%x,"
808 "req->dma_fx00: 0x%llx\n", req, req->ring_fx00,
809 req->length_fx00, (u64)req->dma_fx00);
810
811 ql_dbg(ql_dbg_init, vha, 0x012e,
812 "rsp: %p, ring_fx00: %p, length_fx00: 0x%x,"
813 "rsp->dma_fx00: 0x%llx\n", rsp, rsp->ring_fx00,
814 rsp->length_fx00, (u64)rsp->dma_fx00);
815 }
816
817 static int
818 qlafx00_config_queues(struct scsi_qla_host *vha)
819 {
820 struct qla_hw_data *ha = vha->hw;
821 struct req_que *req = ha->req_q_map[0];
822 struct rsp_que *rsp = ha->rsp_q_map[0];
823 dma_addr_t bar2_hdl = pci_resource_start(ha->pdev, 2);
824
825 req->length = ha->req_que_len;
826 req->ring = (void *)ha->iobase + ha->req_que_off;
827 req->dma = bar2_hdl + ha->req_que_off;
828 if ((!req->ring) || (req->length == 0)) {
829 ql_log_pci(ql_log_info, ha->pdev, 0x012f,
830 "Unable to allocate memory for req_ring\n");
831 return QLA_FUNCTION_FAILED;
832 }
833
834 ql_dbg(ql_dbg_init, vha, 0x0130,
835 "req: %p req_ring pointer %p req len 0x%x "
836 "req off 0x%x\n, req->dma: 0x%llx",
837 req, req->ring, req->length,
838 ha->req_que_off, (u64)req->dma);
839
840 rsp->length = ha->rsp_que_len;
841 rsp->ring = (void *)ha->iobase + ha->rsp_que_off;
842 rsp->dma = bar2_hdl + ha->rsp_que_off;
843 if ((!rsp->ring) || (rsp->length == 0)) {
844 ql_log_pci(ql_log_info, ha->pdev, 0x0131,
845 "Unable to allocate memory for rsp_ring\n");
846 return QLA_FUNCTION_FAILED;
847 }
848
849 ql_dbg(ql_dbg_init, vha, 0x0132,
850 "rsp: %p rsp_ring pointer %p rsp len 0x%x "
851 "rsp off 0x%x, rsp->dma: 0x%llx\n",
852 rsp, rsp->ring, rsp->length,
853 ha->rsp_que_off, (u64)rsp->dma);
854
855 return QLA_SUCCESS;
856 }
857
858 static int
859 qlafx00_init_fw_ready(scsi_qla_host_t *vha)
860 {
861 int rval = 0;
862 unsigned long wtime;
863 uint16_t wait_time; /* Wait time */
864 struct qla_hw_data *ha = vha->hw;
865 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
866 uint32_t aenmbx, aenmbx7 = 0;
867 uint32_t pseudo_aen;
868 uint32_t state[5];
869 bool done = false;
870
871 /* 30 seconds wait - Adjust if required */
872 wait_time = 30;
873
874 pseudo_aen = RD_REG_DWORD(&reg->pseudoaen);
875 if (pseudo_aen == 1) {
876 aenmbx7 = RD_REG_DWORD(&reg->initval7);
877 ha->mbx_intr_code = MSW(aenmbx7);
878 ha->rqstq_intr_code = LSW(aenmbx7);
879 rval = qlafx00_driver_shutdown(vha, 10);
880 if (rval != QLA_SUCCESS)
881 qlafx00_soft_reset(vha);
882 }
883
884 /* wait time before firmware ready */
885 wtime = jiffies + (wait_time * HZ);
886 do {
887 aenmbx = RD_REG_DWORD(&reg->aenmailbox0);
888 barrier();
889 ql_dbg(ql_dbg_mbx, vha, 0x0133,
890 "aenmbx: 0x%x\n", aenmbx);
891
892 switch (aenmbx) {
893 case MBA_FW_NOT_STARTED:
894 case MBA_FW_STARTING:
895 break;
896
897 case MBA_SYSTEM_ERR:
898 case MBA_REQ_TRANSFER_ERR:
899 case MBA_RSP_TRANSFER_ERR:
900 case MBA_FW_INIT_FAILURE:
901 qlafx00_soft_reset(vha);
902 break;
903
904 case MBA_FW_RESTART_CMPLT:
905 /* Set the mbx and rqstq intr code */
906 aenmbx7 = RD_REG_DWORD(&reg->aenmailbox7);
907 ha->mbx_intr_code = MSW(aenmbx7);
908 ha->rqstq_intr_code = LSW(aenmbx7);
909 ha->req_que_off = RD_REG_DWORD(&reg->aenmailbox1);
910 ha->rsp_que_off = RD_REG_DWORD(&reg->aenmailbox3);
911 ha->req_que_len = RD_REG_DWORD(&reg->aenmailbox5);
912 ha->rsp_que_len = RD_REG_DWORD(&reg->aenmailbox6);
913 WRT_REG_DWORD(&reg->aenmailbox0, 0);
914 RD_REG_DWORD_RELAXED(&reg->aenmailbox0);
915 ql_dbg(ql_dbg_init, vha, 0x0134,
916 "f/w returned mbx_intr_code: 0x%x, "
917 "rqstq_intr_code: 0x%x\n",
918 ha->mbx_intr_code, ha->rqstq_intr_code);
919 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
920 rval = QLA_SUCCESS;
921 done = true;
922 break;
923
924 default:
925 if ((aenmbx & 0xFF00) == MBA_FW_INIT_INPROGRESS)
926 break;
927
928 /* If fw is apparently not ready. In order to continue,
929 * we might need to issue Mbox cmd, but the problem is
930 * that the DoorBell vector values that come with the
931 * 8060 AEN are most likely gone by now (and thus no
932 * bell would be rung on the fw side when mbox cmd is
933 * issued). We have to therefore grab the 8060 AEN
934 * shadow regs (filled in by FW when the last 8060
935 * AEN was being posted).
936 * Do the following to determine what is needed in
937 * order to get the FW ready:
938 * 1. reload the 8060 AEN values from the shadow regs
939 * 2. clear int status to get rid of possible pending
940 * interrupts
941 * 3. issue Get FW State Mbox cmd to determine fw state
942 * Set the mbx and rqstq intr code from Shadow Regs
943 */
944 aenmbx7 = RD_REG_DWORD(&reg->initval7);
945 ha->mbx_intr_code = MSW(aenmbx7);
946 ha->rqstq_intr_code = LSW(aenmbx7);
947 ha->req_que_off = RD_REG_DWORD(&reg->initval1);
948 ha->rsp_que_off = RD_REG_DWORD(&reg->initval3);
949 ha->req_que_len = RD_REG_DWORD(&reg->initval5);
950 ha->rsp_que_len = RD_REG_DWORD(&reg->initval6);
951 ql_dbg(ql_dbg_init, vha, 0x0135,
952 "f/w returned mbx_intr_code: 0x%x, "
953 "rqstq_intr_code: 0x%x\n",
954 ha->mbx_intr_code, ha->rqstq_intr_code);
955 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
956
957 /* Get the FW state */
958 rval = qlafx00_get_firmware_state(vha, state);
959 if (rval != QLA_SUCCESS) {
960 /* Retry if timer has not expired */
961 break;
962 }
963
964 if (state[0] == FSTATE_FX00_CONFIG_WAIT) {
965 /* Firmware is waiting to be
966 * initialized by driver
967 */
968 rval = QLA_SUCCESS;
969 done = true;
970 break;
971 }
972
973 /* Issue driver shutdown and wait until f/w recovers.
974 * Driver should continue to poll until 8060 AEN is
975 * received indicating firmware recovery.
976 */
977 ql_dbg(ql_dbg_init, vha, 0x0136,
978 "Sending Driver shutdown fw_state 0x%x\n",
979 state[0]);
980
981 rval = qlafx00_driver_shutdown(vha, 10);
982 if (rval != QLA_SUCCESS) {
983 rval = QLA_FUNCTION_FAILED;
984 break;
985 }
986 msleep(500);
987
988 wtime = jiffies + (wait_time * HZ);
989 break;
990 }
991
992 if (!done) {
993 if (time_after_eq(jiffies, wtime)) {
994 ql_dbg(ql_dbg_init, vha, 0x0137,
995 "Init f/w failed: aen[7]: 0x%x\n",
996 RD_REG_DWORD(&reg->aenmailbox7));
997 rval = QLA_FUNCTION_FAILED;
998 done = true;
999 break;
1000 }
1001 /* Delay for a while */
1002 msleep(500);
1003 }
1004 } while (!done);
1005
1006 if (rval)
1007 ql_dbg(ql_dbg_init, vha, 0x0138,
1008 "%s **** FAILED ****.\n", __func__);
1009 else
1010 ql_dbg(ql_dbg_init, vha, 0x0139,
1011 "%s **** SUCCESS ****.\n", __func__);
1012
1013 return rval;
1014 }
1015
1016 /*
1017 * qlafx00_fw_ready() - Waits for firmware ready.
1018 * @ha: HA context
1019 *
1020 * Returns 0 on success.
1021 */
1022 int
1023 qlafx00_fw_ready(scsi_qla_host_t *vha)
1024 {
1025 int rval;
1026 unsigned long wtime;
1027 uint16_t wait_time; /* Wait time if loop is coming ready */
1028 uint32_t state[5];
1029
1030 rval = QLA_SUCCESS;
1031
1032 wait_time = 10;
1033
1034 /* wait time before firmware ready */
1035 wtime = jiffies + (wait_time * HZ);
1036
1037 /* Wait for ISP to finish init */
1038 if (!vha->flags.init_done)
1039 ql_dbg(ql_dbg_init, vha, 0x013a,
1040 "Waiting for init to complete...\n");
1041
1042 do {
1043 rval = qlafx00_get_firmware_state(vha, state);
1044
1045 if (rval == QLA_SUCCESS) {
1046 if (state[0] == FSTATE_FX00_INITIALIZED) {
1047 ql_dbg(ql_dbg_init, vha, 0x013b,
1048 "fw_state=%x\n", state[0]);
1049 rval = QLA_SUCCESS;
1050 break;
1051 }
1052 }
1053 rval = QLA_FUNCTION_FAILED;
1054
1055 if (time_after_eq(jiffies, wtime))
1056 break;
1057
1058 /* Delay for a while */
1059 msleep(500);
1060
1061 ql_dbg(ql_dbg_init, vha, 0x013c,
1062 "fw_state=%x curr time=%lx.\n", state[0], jiffies);
1063 } while (1);
1064
1065
1066 if (rval)
1067 ql_dbg(ql_dbg_init, vha, 0x013d,
1068 "Firmware ready **** FAILED ****.\n");
1069 else
1070 ql_dbg(ql_dbg_init, vha, 0x013e,
1071 "Firmware ready **** SUCCESS ****.\n");
1072
1073 return rval;
1074 }
1075
1076 static int
1077 qlafx00_find_all_targets(scsi_qla_host_t *vha,
1078 struct list_head *new_fcports)
1079 {
1080 int rval;
1081 uint16_t tgt_id;
1082 fc_port_t *fcport, *new_fcport;
1083 int found;
1084 struct qla_hw_data *ha = vha->hw;
1085
1086 rval = QLA_SUCCESS;
1087
1088 if (!test_bit(LOOP_RESYNC_ACTIVE, &vha->dpc_flags))
1089 return QLA_FUNCTION_FAILED;
1090
1091 if ((atomic_read(&vha->loop_down_timer) ||
1092 STATE_TRANSITION(vha))) {
1093 atomic_set(&vha->loop_down_timer, 0);
1094 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1095 return QLA_FUNCTION_FAILED;
1096 }
1097
1098 ql_dbg(ql_dbg_disc + ql_dbg_init, vha, 0x2088,
1099 "Listing Target bit map...\n");
1100 ql_dump_buffer(ql_dbg_disc + ql_dbg_init, vha,
1101 0x2089, (uint8_t *)ha->gid_list, 32);
1102
1103 /* Allocate temporary rmtport for any new rmtports discovered. */
1104 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1105 if (new_fcport == NULL)
1106 return QLA_MEMORY_ALLOC_FAILED;
1107
1108 for_each_set_bit(tgt_id, (void *)ha->gid_list,
1109 QLAFX00_TGT_NODE_LIST_SIZE) {
1110
1111 /* Send get target node info */
1112 new_fcport->tgt_id = tgt_id;
1113 rval = qlafx00_fx_disc(vha, new_fcport,
1114 FXDISC_GET_TGT_NODE_INFO);
1115 if (rval != QLA_SUCCESS) {
1116 ql_log(ql_log_warn, vha, 0x208a,
1117 "Target info scan failed -- assuming zero-entry "
1118 "result...\n");
1119 continue;
1120 }
1121
1122 /* Locate matching device in database. */
1123 found = 0;
1124 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1125 if (memcmp(new_fcport->port_name,
1126 fcport->port_name, WWN_SIZE))
1127 continue;
1128
1129 found++;
1130
1131 /*
1132 * If tgt_id is same and state FCS_ONLINE, nothing
1133 * changed.
1134 */
1135 if (fcport->tgt_id == new_fcport->tgt_id &&
1136 atomic_read(&fcport->state) == FCS_ONLINE)
1137 break;
1138
1139 /*
1140 * Tgt ID changed or device was marked to be updated.
1141 */
1142 ql_dbg(ql_dbg_disc + ql_dbg_init, vha, 0x208b,
1143 "TGT-ID Change(%s): Present tgt id: "
1144 "0x%x state: 0x%x "
1145 "wwnn = %llx wwpn = %llx.\n",
1146 __func__, fcport->tgt_id,
1147 atomic_read(&fcport->state),
1148 (unsigned long long)wwn_to_u64(fcport->node_name),
1149 (unsigned long long)wwn_to_u64(fcport->port_name));
1150
1151 ql_log(ql_log_info, vha, 0x208c,
1152 "TGT-ID Announce(%s): Discovered tgt "
1153 "id 0x%x wwnn = %llx "
1154 "wwpn = %llx.\n", __func__, new_fcport->tgt_id,
1155 (unsigned long long)
1156 wwn_to_u64(new_fcport->node_name),
1157 (unsigned long long)
1158 wwn_to_u64(new_fcport->port_name));
1159
1160 if (atomic_read(&fcport->state) != FCS_ONLINE) {
1161 fcport->old_tgt_id = fcport->tgt_id;
1162 fcport->tgt_id = new_fcport->tgt_id;
1163 ql_log(ql_log_info, vha, 0x208d,
1164 "TGT-ID: New fcport Added: %p\n", fcport);
1165 qla2x00_update_fcport(vha, fcport);
1166 } else {
1167 ql_log(ql_log_info, vha, 0x208e,
1168 " Existing TGT-ID %x did not get "
1169 " offline event from firmware.\n",
1170 fcport->old_tgt_id);
1171 qla2x00_mark_device_lost(vha, fcport, 0, 0);
1172 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1173 kfree(new_fcport);
1174 return rval;
1175 }
1176 break;
1177 }
1178
1179 if (found)
1180 continue;
1181
1182 /* If device was not in our fcports list, then add it. */
1183 list_add_tail(&new_fcport->list, new_fcports);
1184
1185 /* Allocate a new replacement fcport. */
1186 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1187 if (new_fcport == NULL)
1188 return QLA_MEMORY_ALLOC_FAILED;
1189 }
1190
1191 kfree(new_fcport);
1192 return rval;
1193 }
1194
1195 /*
1196 * qlafx00_configure_all_targets
1197 * Setup target devices with node ID's.
1198 *
1199 * Input:
1200 * ha = adapter block pointer.
1201 *
1202 * Returns:
1203 * 0 = success.
1204 * BIT_0 = error
1205 */
1206 static int
1207 qlafx00_configure_all_targets(scsi_qla_host_t *vha)
1208 {
1209 int rval;
1210 fc_port_t *fcport, *rmptemp;
1211 LIST_HEAD(new_fcports);
1212
1213 rval = qlafx00_fx_disc(vha, &vha->hw->mr.fcport,
1214 FXDISC_GET_TGT_NODE_LIST);
1215 if (rval != QLA_SUCCESS) {
1216 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1217 return rval;
1218 }
1219
1220 rval = qlafx00_find_all_targets(vha, &new_fcports);
1221 if (rval != QLA_SUCCESS) {
1222 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1223 return rval;
1224 }
1225
1226 /*
1227 * Delete all previous devices marked lost.
1228 */
1229 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1230 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
1231 break;
1232
1233 if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
1234 if (fcport->port_type != FCT_INITIATOR)
1235 qla2x00_mark_device_lost(vha, fcport, 0, 0);
1236 }
1237 }
1238
1239 /*
1240 * Add the new devices to our devices list.
1241 */
1242 list_for_each_entry_safe(fcport, rmptemp, &new_fcports, list) {
1243 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
1244 break;
1245
1246 qla2x00_update_fcport(vha, fcport);
1247 list_move_tail(&fcport->list, &vha->vp_fcports);
1248 ql_log(ql_log_info, vha, 0x208f,
1249 "Attach new target id 0x%x wwnn = %llx "
1250 "wwpn = %llx.\n",
1251 fcport->tgt_id,
1252 (unsigned long long)wwn_to_u64(fcport->node_name),
1253 (unsigned long long)wwn_to_u64(fcport->port_name));
1254 }
1255
1256 /* Free all new device structures not processed. */
1257 list_for_each_entry_safe(fcport, rmptemp, &new_fcports, list) {
1258 list_del(&fcport->list);
1259 kfree(fcport);
1260 }
1261
1262 return rval;
1263 }
1264
1265 /*
1266 * qlafx00_configure_devices
1267 * Updates Fibre Channel Device Database with what is actually on loop.
1268 *
1269 * Input:
1270 * ha = adapter block pointer.
1271 *
1272 * Returns:
1273 * 0 = success.
1274 * 1 = error.
1275 * 2 = database was full and device was not configured.
1276 */
1277 int
1278 qlafx00_configure_devices(scsi_qla_host_t *vha)
1279 {
1280 int rval;
1281 unsigned long flags, save_flags;
1282 rval = QLA_SUCCESS;
1283
1284 save_flags = flags = vha->dpc_flags;
1285
1286 ql_dbg(ql_dbg_disc, vha, 0x2090,
1287 "Configure devices -- dpc flags =0x%lx\n", flags);
1288
1289 rval = qlafx00_configure_all_targets(vha);
1290
1291 if (rval == QLA_SUCCESS) {
1292 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
1293 rval = QLA_FUNCTION_FAILED;
1294 } else {
1295 atomic_set(&vha->loop_state, LOOP_READY);
1296 ql_log(ql_log_info, vha, 0x2091,
1297 "Device Ready\n");
1298 }
1299 }
1300
1301 if (rval) {
1302 ql_dbg(ql_dbg_disc, vha, 0x2092,
1303 "%s *** FAILED ***.\n", __func__);
1304 } else {
1305 ql_dbg(ql_dbg_disc, vha, 0x2093,
1306 "%s: exiting normally.\n", __func__);
1307 }
1308 return rval;
1309 }
1310
1311 static void
1312 qlafx00_abort_isp_cleanup(scsi_qla_host_t *vha, bool critemp)
1313 {
1314 struct qla_hw_data *ha = vha->hw;
1315 fc_port_t *fcport;
1316
1317 vha->flags.online = 0;
1318 ha->mr.fw_hbt_en = 0;
1319
1320 if (!critemp) {
1321 ha->flags.chip_reset_done = 0;
1322 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1323 vha->qla_stats.total_isp_aborts++;
1324 ql_log(ql_log_info, vha, 0x013f,
1325 "Performing ISP error recovery - ha = %p.\n", ha);
1326 ha->isp_ops->reset_chip(vha);
1327 }
1328
1329 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
1330 atomic_set(&vha->loop_state, LOOP_DOWN);
1331 atomic_set(&vha->loop_down_timer,
1332 QLAFX00_LOOP_DOWN_TIME);
1333 } else {
1334 if (!atomic_read(&vha->loop_down_timer))
1335 atomic_set(&vha->loop_down_timer,
1336 QLAFX00_LOOP_DOWN_TIME);
1337 }
1338
1339 /* Clear all async request states across all VPs. */
1340 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1341 fcport->flags = 0;
1342 if (atomic_read(&fcport->state) == FCS_ONLINE)
1343 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
1344 }
1345
1346 if (!ha->flags.eeh_busy) {
1347 if (critemp) {
1348 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
1349 } else {
1350 /* Requeue all commands in outstanding command list. */
1351 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
1352 }
1353 }
1354
1355 qla2x00_free_irqs(vha);
1356 if (critemp)
1357 set_bit(FX00_CRITEMP_RECOVERY, &vha->dpc_flags);
1358 else
1359 set_bit(FX00_RESET_RECOVERY, &vha->dpc_flags);
1360
1361 /* Clear the Interrupts */
1362 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
1363
1364 ql_log(ql_log_info, vha, 0x0140,
1365 "%s Done done - ha=%p.\n", __func__, ha);
1366 }
1367
1368 /**
1369 * qlafx00_init_response_q_entries() - Initializes response queue entries.
1370 * @ha: HA context
1371 *
1372 * Beginning of request ring has initialization control block already built
1373 * by nvram config routine.
1374 *
1375 * Returns 0 on success.
1376 */
1377 void
1378 qlafx00_init_response_q_entries(struct rsp_que *rsp)
1379 {
1380 uint16_t cnt;
1381 response_t *pkt;
1382
1383 rsp->ring_ptr = rsp->ring;
1384 rsp->ring_index = 0;
1385 rsp->status_srb = NULL;
1386 pkt = rsp->ring_ptr;
1387 for (cnt = 0; cnt < rsp->length; cnt++) {
1388 pkt->signature = RESPONSE_PROCESSED;
1389 WRT_REG_DWORD((void __iomem *)&pkt->signature,
1390 RESPONSE_PROCESSED);
1391 pkt++;
1392 }
1393 }
1394
1395 int
1396 qlafx00_rescan_isp(scsi_qla_host_t *vha)
1397 {
1398 uint32_t status = QLA_FUNCTION_FAILED;
1399 struct qla_hw_data *ha = vha->hw;
1400 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
1401 uint32_t aenmbx7;
1402
1403 qla2x00_request_irqs(ha, ha->rsp_q_map[0]);
1404
1405 aenmbx7 = RD_REG_DWORD(&reg->aenmailbox7);
1406 ha->mbx_intr_code = MSW(aenmbx7);
1407 ha->rqstq_intr_code = LSW(aenmbx7);
1408 ha->req_que_off = RD_REG_DWORD(&reg->aenmailbox1);
1409 ha->rsp_que_off = RD_REG_DWORD(&reg->aenmailbox3);
1410 ha->req_que_len = RD_REG_DWORD(&reg->aenmailbox5);
1411 ha->rsp_que_len = RD_REG_DWORD(&reg->aenmailbox6);
1412
1413 ql_dbg(ql_dbg_disc, vha, 0x2094,
1414 "fw returned mbx_intr_code: 0x%x, rqstq_intr_code: 0x%x "
1415 " Req que offset 0x%x Rsp que offset 0x%x\n",
1416 ha->mbx_intr_code, ha->rqstq_intr_code,
1417 ha->req_que_off, ha->rsp_que_len);
1418
1419 /* Clear the Interrupts */
1420 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
1421
1422 status = qla2x00_init_rings(vha);
1423 if (!status) {
1424 vha->flags.online = 1;
1425
1426 /* if no cable then assume it's good */
1427 if ((vha->device_flags & DFLG_NO_CABLE))
1428 status = 0;
1429 /* Register system information */
1430 if (qlafx00_fx_disc(vha,
1431 &vha->hw->mr.fcport, FXDISC_REG_HOST_INFO))
1432 ql_dbg(ql_dbg_disc, vha, 0x2095,
1433 "failed to register host info\n");
1434 }
1435 scsi_unblock_requests(vha->host);
1436 return status;
1437 }
1438
1439 void
1440 qlafx00_timer_routine(scsi_qla_host_t *vha)
1441 {
1442 struct qla_hw_data *ha = vha->hw;
1443 uint32_t fw_heart_beat;
1444 uint32_t aenmbx0;
1445 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
1446 uint32_t tempc;
1447
1448 /* Check firmware health */
1449 if (ha->mr.fw_hbt_cnt)
1450 ha->mr.fw_hbt_cnt--;
1451 else {
1452 if ((!ha->flags.mr_reset_hdlr_active) &&
1453 (!test_bit(UNLOADING, &vha->dpc_flags)) &&
1454 (!test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
1455 (ha->mr.fw_hbt_en)) {
1456 fw_heart_beat = RD_REG_DWORD(&reg->fwheartbeat);
1457 if (fw_heart_beat != ha->mr.old_fw_hbt_cnt) {
1458 ha->mr.old_fw_hbt_cnt = fw_heart_beat;
1459 ha->mr.fw_hbt_miss_cnt = 0;
1460 } else {
1461 ha->mr.fw_hbt_miss_cnt++;
1462 if (ha->mr.fw_hbt_miss_cnt ==
1463 QLAFX00_HEARTBEAT_MISS_CNT) {
1464 set_bit(ISP_ABORT_NEEDED,
1465 &vha->dpc_flags);
1466 qla2xxx_wake_dpc(vha);
1467 ha->mr.fw_hbt_miss_cnt = 0;
1468 }
1469 }
1470 }
1471 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
1472 }
1473
1474 if (test_bit(FX00_RESET_RECOVERY, &vha->dpc_flags)) {
1475 /* Reset recovery to be performed in timer routine */
1476 aenmbx0 = RD_REG_DWORD(&reg->aenmailbox0);
1477 if (ha->mr.fw_reset_timer_exp) {
1478 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1479 qla2xxx_wake_dpc(vha);
1480 ha->mr.fw_reset_timer_exp = 0;
1481 } else if (aenmbx0 == MBA_FW_RESTART_CMPLT) {
1482 /* Wake up DPC to rescan the targets */
1483 set_bit(FX00_TARGET_SCAN, &vha->dpc_flags);
1484 clear_bit(FX00_RESET_RECOVERY, &vha->dpc_flags);
1485 qla2xxx_wake_dpc(vha);
1486 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
1487 } else if ((aenmbx0 == MBA_FW_STARTING) &&
1488 (!ha->mr.fw_hbt_en)) {
1489 ha->mr.fw_hbt_en = 1;
1490 } else if (!ha->mr.fw_reset_timer_tick) {
1491 if (aenmbx0 == ha->mr.old_aenmbx0_state)
1492 ha->mr.fw_reset_timer_exp = 1;
1493 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
1494 } else if (aenmbx0 == 0xFFFFFFFF) {
1495 uint32_t data0, data1;
1496
1497 data0 = QLAFX00_RD_REG(ha,
1498 QLAFX00_BAR1_BASE_ADDR_REG);
1499 data1 = QLAFX00_RD_REG(ha,
1500 QLAFX00_PEX0_WIN0_BASE_ADDR_REG);
1501
1502 data0 &= 0xffff0000;
1503 data1 &= 0x0000ffff;
1504
1505 QLAFX00_WR_REG(ha,
1506 QLAFX00_PEX0_WIN0_BASE_ADDR_REG,
1507 (data0 | data1));
1508 } else if ((aenmbx0 & 0xFF00) == MBA_FW_POLL_STATE) {
1509 ha->mr.fw_reset_timer_tick =
1510 QLAFX00_MAX_RESET_INTERVAL;
1511 } else if (aenmbx0 == MBA_FW_RESET_FCT) {
1512 ha->mr.fw_reset_timer_tick =
1513 QLAFX00_MAX_RESET_INTERVAL;
1514 }
1515 ha->mr.old_aenmbx0_state = aenmbx0;
1516 ha->mr.fw_reset_timer_tick--;
1517 }
1518 if (test_bit(FX00_CRITEMP_RECOVERY, &vha->dpc_flags)) {
1519 /*
1520 * Critical temperature recovery to be
1521 * performed in timer routine
1522 */
1523 if (ha->mr.fw_critemp_timer_tick == 0) {
1524 tempc = QLAFX00_GET_TEMPERATURE(ha);
1525 ql_dbg(ql_dbg_timer, vha, 0x6012,
1526 "ISPFx00(%s): Critical temp timer, "
1527 "current SOC temperature: %d\n",
1528 __func__, tempc);
1529 if (tempc < ha->mr.critical_temperature) {
1530 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1531 clear_bit(FX00_CRITEMP_RECOVERY,
1532 &vha->dpc_flags);
1533 qla2xxx_wake_dpc(vha);
1534 }
1535 ha->mr.fw_critemp_timer_tick =
1536 QLAFX00_CRITEMP_INTERVAL;
1537 } else {
1538 ha->mr.fw_critemp_timer_tick--;
1539 }
1540 }
1541 if (ha->mr.host_info_resend) {
1542 /*
1543 * Incomplete host info might be sent to firmware
1544 * durinng system boot - info should be resend
1545 */
1546 if (ha->mr.hinfo_resend_timer_tick == 0) {
1547 ha->mr.host_info_resend = false;
1548 set_bit(FX00_HOST_INFO_RESEND, &vha->dpc_flags);
1549 ha->mr.hinfo_resend_timer_tick =
1550 QLAFX00_HINFO_RESEND_INTERVAL;
1551 qla2xxx_wake_dpc(vha);
1552 } else {
1553 ha->mr.hinfo_resend_timer_tick--;
1554 }
1555 }
1556
1557 }
1558
1559 /*
1560 * qlfx00a_reset_initialize
1561 * Re-initialize after a iSA device reset.
1562 *
1563 * Input:
1564 * ha = adapter block pointer.
1565 *
1566 * Returns:
1567 * 0 = success
1568 */
1569 int
1570 qlafx00_reset_initialize(scsi_qla_host_t *vha)
1571 {
1572 struct qla_hw_data *ha = vha->hw;
1573
1574 if (vha->device_flags & DFLG_DEV_FAILED) {
1575 ql_dbg(ql_dbg_init, vha, 0x0142,
1576 "Device in failed state\n");
1577 return QLA_SUCCESS;
1578 }
1579
1580 ha->flags.mr_reset_hdlr_active = 1;
1581
1582 if (vha->flags.online) {
1583 scsi_block_requests(vha->host);
1584 qlafx00_abort_isp_cleanup(vha, false);
1585 }
1586
1587 ql_log(ql_log_info, vha, 0x0143,
1588 "(%s): succeeded.\n", __func__);
1589 ha->flags.mr_reset_hdlr_active = 0;
1590 return QLA_SUCCESS;
1591 }
1592
1593 /*
1594 * qlafx00_abort_isp
1595 * Resets ISP and aborts all outstanding commands.
1596 *
1597 * Input:
1598 * ha = adapter block pointer.
1599 *
1600 * Returns:
1601 * 0 = success
1602 */
1603 int
1604 qlafx00_abort_isp(scsi_qla_host_t *vha)
1605 {
1606 struct qla_hw_data *ha = vha->hw;
1607
1608 if (vha->flags.online) {
1609 if (unlikely(pci_channel_offline(ha->pdev) &&
1610 ha->flags.pci_channel_io_perm_failure)) {
1611 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
1612 return QLA_SUCCESS;
1613 }
1614
1615 scsi_block_requests(vha->host);
1616 qlafx00_abort_isp_cleanup(vha, false);
1617 } else {
1618 scsi_block_requests(vha->host);
1619 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1620 vha->qla_stats.total_isp_aborts++;
1621 ha->isp_ops->reset_chip(vha);
1622 set_bit(FX00_RESET_RECOVERY, &vha->dpc_flags);
1623 /* Clear the Interrupts */
1624 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
1625 }
1626
1627 ql_log(ql_log_info, vha, 0x0145,
1628 "(%s): succeeded.\n", __func__);
1629
1630 return QLA_SUCCESS;
1631 }
1632
1633 static inline fc_port_t*
1634 qlafx00_get_fcport(struct scsi_qla_host *vha, int tgt_id)
1635 {
1636 fc_port_t *fcport;
1637
1638 /* Check for matching device in remote port list. */
1639 fcport = NULL;
1640 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1641 if (fcport->tgt_id == tgt_id) {
1642 ql_dbg(ql_dbg_async, vha, 0x5072,
1643 "Matching fcport(%p) found with TGT-ID: 0x%x "
1644 "and Remote TGT_ID: 0x%x\n",
1645 fcport, fcport->tgt_id, tgt_id);
1646 break;
1647 }
1648 }
1649 return fcport;
1650 }
1651
1652 static void
1653 qlafx00_tgt_detach(struct scsi_qla_host *vha, int tgt_id)
1654 {
1655 fc_port_t *fcport;
1656
1657 ql_log(ql_log_info, vha, 0x5073,
1658 "Detach TGT-ID: 0x%x\n", tgt_id);
1659
1660 fcport = qlafx00_get_fcport(vha, tgt_id);
1661 if (!fcport)
1662 return;
1663
1664 qla2x00_mark_device_lost(vha, fcport, 0, 0);
1665
1666 return;
1667 }
1668
1669 int
1670 qlafx00_process_aen(struct scsi_qla_host *vha, struct qla_work_evt *evt)
1671 {
1672 int rval = 0;
1673 uint32_t aen_code, aen_data;
1674
1675 aen_code = FCH_EVT_VENDOR_UNIQUE;
1676 aen_data = evt->u.aenfx.evtcode;
1677
1678 switch (evt->u.aenfx.evtcode) {
1679 case QLAFX00_MBA_PORT_UPDATE: /* Port database update */
1680 if (evt->u.aenfx.mbx[1] == 0) {
1681 if (evt->u.aenfx.mbx[2] == 1) {
1682 if (!vha->flags.fw_tgt_reported)
1683 vha->flags.fw_tgt_reported = 1;
1684 atomic_set(&vha->loop_down_timer, 0);
1685 atomic_set(&vha->loop_state, LOOP_UP);
1686 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1687 qla2xxx_wake_dpc(vha);
1688 } else if (evt->u.aenfx.mbx[2] == 2) {
1689 qlafx00_tgt_detach(vha, evt->u.aenfx.mbx[3]);
1690 }
1691 } else if (evt->u.aenfx.mbx[1] == 0xffff) {
1692 if (evt->u.aenfx.mbx[2] == 1) {
1693 if (!vha->flags.fw_tgt_reported)
1694 vha->flags.fw_tgt_reported = 1;
1695 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1696 } else if (evt->u.aenfx.mbx[2] == 2) {
1697 vha->device_flags |= DFLG_NO_CABLE;
1698 qla2x00_mark_all_devices_lost(vha, 1);
1699 }
1700 }
1701 break;
1702 case QLAFX00_MBA_LINK_UP:
1703 aen_code = FCH_EVT_LINKUP;
1704 aen_data = 0;
1705 break;
1706 case QLAFX00_MBA_LINK_DOWN:
1707 aen_code = FCH_EVT_LINKDOWN;
1708 aen_data = 0;
1709 break;
1710 case QLAFX00_MBA_TEMP_CRIT: /* Critical temperature event */
1711 ql_log(ql_log_info, vha, 0x5082,
1712 "Process critical temperature event "
1713 "aenmb[0]: %x\n",
1714 evt->u.aenfx.evtcode);
1715 scsi_block_requests(vha->host);
1716 qlafx00_abort_isp_cleanup(vha, true);
1717 scsi_unblock_requests(vha->host);
1718 break;
1719 }
1720
1721 fc_host_post_event(vha->host, fc_get_event_number(),
1722 aen_code, aen_data);
1723
1724 return rval;
1725 }
1726
1727 static void
1728 qlafx00_update_host_attr(scsi_qla_host_t *vha, struct port_info_data *pinfo)
1729 {
1730 u64 port_name = 0, node_name = 0;
1731
1732 port_name = (unsigned long long)wwn_to_u64(pinfo->port_name);
1733 node_name = (unsigned long long)wwn_to_u64(pinfo->node_name);
1734
1735 fc_host_node_name(vha->host) = node_name;
1736 fc_host_port_name(vha->host) = port_name;
1737 if (!pinfo->port_type)
1738 vha->hw->current_topology = ISP_CFG_F;
1739 if (pinfo->link_status == QLAFX00_LINK_STATUS_UP)
1740 atomic_set(&vha->loop_state, LOOP_READY);
1741 else if (pinfo->link_status == QLAFX00_LINK_STATUS_DOWN)
1742 atomic_set(&vha->loop_state, LOOP_DOWN);
1743 vha->hw->link_data_rate = (uint16_t)pinfo->link_config;
1744 }
1745
1746 static void
1747 qla2x00_fxdisc_iocb_timeout(void *data)
1748 {
1749 srb_t *sp = (srb_t *)data;
1750 struct srb_iocb *lio = &sp->u.iocb_cmd;
1751
1752 complete(&lio->u.fxiocb.fxiocb_comp);
1753 }
1754
1755 static void
1756 qla2x00_fxdisc_sp_done(void *data, void *ptr, int res)
1757 {
1758 srb_t *sp = (srb_t *)ptr;
1759 struct srb_iocb *lio = &sp->u.iocb_cmd;
1760
1761 complete(&lio->u.fxiocb.fxiocb_comp);
1762 }
1763
1764 int
1765 qlafx00_fx_disc(scsi_qla_host_t *vha, fc_port_t *fcport, uint16_t fx_type)
1766 {
1767 srb_t *sp;
1768 struct srb_iocb *fdisc;
1769 int rval = QLA_FUNCTION_FAILED;
1770 struct qla_hw_data *ha = vha->hw;
1771 struct host_system_info *phost_info;
1772 struct register_host_info *preg_hsi;
1773 struct new_utsname *p_sysid = NULL;
1774 struct timeval tv;
1775
1776 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1777 if (!sp)
1778 goto done;
1779
1780 fdisc = &sp->u.iocb_cmd;
1781 switch (fx_type) {
1782 case FXDISC_GET_CONFIG_INFO:
1783 fdisc->u.fxiocb.flags =
1784 SRB_FXDISC_RESP_DMA_VALID;
1785 fdisc->u.fxiocb.rsp_len = sizeof(struct config_info_data);
1786 break;
1787 case FXDISC_GET_PORT_INFO:
1788 fdisc->u.fxiocb.flags =
1789 SRB_FXDISC_RESP_DMA_VALID | SRB_FXDISC_REQ_DWRD_VALID;
1790 fdisc->u.fxiocb.rsp_len = QLAFX00_PORT_DATA_INFO;
1791 fdisc->u.fxiocb.req_data = cpu_to_le32(fcport->port_id);
1792 break;
1793 case FXDISC_GET_TGT_NODE_INFO:
1794 fdisc->u.fxiocb.flags =
1795 SRB_FXDISC_RESP_DMA_VALID | SRB_FXDISC_REQ_DWRD_VALID;
1796 fdisc->u.fxiocb.rsp_len = QLAFX00_TGT_NODE_INFO;
1797 fdisc->u.fxiocb.req_data = cpu_to_le32(fcport->tgt_id);
1798 break;
1799 case FXDISC_GET_TGT_NODE_LIST:
1800 fdisc->u.fxiocb.flags =
1801 SRB_FXDISC_RESP_DMA_VALID | SRB_FXDISC_REQ_DWRD_VALID;
1802 fdisc->u.fxiocb.rsp_len = QLAFX00_TGT_NODE_LIST_SIZE;
1803 break;
1804 case FXDISC_REG_HOST_INFO:
1805 fdisc->u.fxiocb.flags = SRB_FXDISC_REQ_DMA_VALID;
1806 fdisc->u.fxiocb.req_len = sizeof(struct register_host_info);
1807 p_sysid = utsname();
1808 if (!p_sysid) {
1809 ql_log(ql_log_warn, vha, 0x303c,
1810 "Not able to get the system information\n");
1811 goto done_free_sp;
1812 }
1813 break;
1814 case FXDISC_ABORT_IOCTL:
1815 default:
1816 break;
1817 }
1818
1819 if (fdisc->u.fxiocb.flags & SRB_FXDISC_REQ_DMA_VALID) {
1820 fdisc->u.fxiocb.req_addr = dma_alloc_coherent(&ha->pdev->dev,
1821 fdisc->u.fxiocb.req_len,
1822 &fdisc->u.fxiocb.req_dma_handle, GFP_KERNEL);
1823 if (!fdisc->u.fxiocb.req_addr)
1824 goto done_free_sp;
1825
1826 if (fx_type == FXDISC_REG_HOST_INFO) {
1827 preg_hsi = (struct register_host_info *)
1828 fdisc->u.fxiocb.req_addr;
1829 phost_info = &preg_hsi->hsi;
1830 memset(preg_hsi, 0, sizeof(struct register_host_info));
1831 phost_info->os_type = OS_TYPE_LINUX;
1832 strncpy(phost_info->sysname,
1833 p_sysid->sysname, SYSNAME_LENGTH);
1834 strncpy(phost_info->nodename,
1835 p_sysid->nodename, NODENAME_LENGTH);
1836 if (!strcmp(phost_info->nodename, "(none)"))
1837 ha->mr.host_info_resend = true;
1838 strncpy(phost_info->release,
1839 p_sysid->release, RELEASE_LENGTH);
1840 strncpy(phost_info->version,
1841 p_sysid->version, VERSION_LENGTH);
1842 strncpy(phost_info->machine,
1843 p_sysid->machine, MACHINE_LENGTH);
1844 strncpy(phost_info->domainname,
1845 p_sysid->domainname, DOMNAME_LENGTH);
1846 strncpy(phost_info->hostdriver,
1847 QLA2XXX_VERSION, VERSION_LENGTH);
1848 do_gettimeofday(&tv);
1849 preg_hsi->utc = (uint64_t)tv.tv_sec;
1850 ql_dbg(ql_dbg_init, vha, 0x0149,
1851 "ISP%04X: Host registration with firmware\n",
1852 ha->pdev->device);
1853 ql_dbg(ql_dbg_init, vha, 0x014a,
1854 "os_type = '%d', sysname = '%s', nodname = '%s'\n",
1855 phost_info->os_type,
1856 phost_info->sysname,
1857 phost_info->nodename);
1858 ql_dbg(ql_dbg_init, vha, 0x014b,
1859 "release = '%s', version = '%s'\n",
1860 phost_info->release,
1861 phost_info->version);
1862 ql_dbg(ql_dbg_init, vha, 0x014c,
1863 "machine = '%s' "
1864 "domainname = '%s', hostdriver = '%s'\n",
1865 phost_info->machine,
1866 phost_info->domainname,
1867 phost_info->hostdriver);
1868 ql_dump_buffer(ql_dbg_init + ql_dbg_disc, vha, 0x014d,
1869 (uint8_t *)phost_info,
1870 sizeof(struct host_system_info));
1871 }
1872 }
1873
1874 if (fdisc->u.fxiocb.flags & SRB_FXDISC_RESP_DMA_VALID) {
1875 fdisc->u.fxiocb.rsp_addr = dma_alloc_coherent(&ha->pdev->dev,
1876 fdisc->u.fxiocb.rsp_len,
1877 &fdisc->u.fxiocb.rsp_dma_handle, GFP_KERNEL);
1878 if (!fdisc->u.fxiocb.rsp_addr)
1879 goto done_unmap_req;
1880 }
1881
1882 sp->type = SRB_FXIOCB_DCMD;
1883 sp->name = "fxdisc";
1884 qla2x00_init_timer(sp, FXDISC_TIMEOUT);
1885 fdisc->timeout = qla2x00_fxdisc_iocb_timeout;
1886 fdisc->u.fxiocb.req_func_type = cpu_to_le16(fx_type);
1887 sp->done = qla2x00_fxdisc_sp_done;
1888
1889 rval = qla2x00_start_sp(sp);
1890 if (rval != QLA_SUCCESS)
1891 goto done_unmap_dma;
1892
1893 wait_for_completion(&fdisc->u.fxiocb.fxiocb_comp);
1894
1895 if (fx_type == FXDISC_GET_CONFIG_INFO) {
1896 struct config_info_data *pinfo =
1897 (struct config_info_data *) fdisc->u.fxiocb.rsp_addr;
1898 strcpy(vha->hw->model_number, pinfo->model_num);
1899 strcpy(vha->hw->model_desc, pinfo->model_description);
1900 memcpy(&vha->hw->mr.symbolic_name, pinfo->symbolic_name,
1901 sizeof(vha->hw->mr.symbolic_name));
1902 memcpy(&vha->hw->mr.serial_num, pinfo->serial_num,
1903 sizeof(vha->hw->mr.serial_num));
1904 memcpy(&vha->hw->mr.hw_version, pinfo->hw_version,
1905 sizeof(vha->hw->mr.hw_version));
1906 memcpy(&vha->hw->mr.fw_version, pinfo->fw_version,
1907 sizeof(vha->hw->mr.fw_version));
1908 strim(vha->hw->mr.fw_version);
1909 memcpy(&vha->hw->mr.uboot_version, pinfo->uboot_version,
1910 sizeof(vha->hw->mr.uboot_version));
1911 memcpy(&vha->hw->mr.fru_serial_num, pinfo->fru_serial_num,
1912 sizeof(vha->hw->mr.fru_serial_num));
1913 vha->hw->mr.critical_temperature =
1914 (pinfo->nominal_temp_value) ?
1915 pinfo->nominal_temp_value : QLAFX00_CRITEMP_THRSHLD;
1916 ha->mr.extended_io_enabled = (pinfo->enabled_capabilities &
1917 QLAFX00_EXTENDED_IO_EN_MASK) != 0;
1918 } else if (fx_type == FXDISC_GET_PORT_INFO) {
1919 struct port_info_data *pinfo =
1920 (struct port_info_data *) fdisc->u.fxiocb.rsp_addr;
1921 memcpy(vha->node_name, pinfo->node_name, WWN_SIZE);
1922 memcpy(vha->port_name, pinfo->port_name, WWN_SIZE);
1923 vha->d_id.b.domain = pinfo->port_id[0];
1924 vha->d_id.b.area = pinfo->port_id[1];
1925 vha->d_id.b.al_pa = pinfo->port_id[2];
1926 qlafx00_update_host_attr(vha, pinfo);
1927 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0141,
1928 (uint8_t *)pinfo, 16);
1929 } else if (fx_type == FXDISC_GET_TGT_NODE_INFO) {
1930 struct qlafx00_tgt_node_info *pinfo =
1931 (struct qlafx00_tgt_node_info *) fdisc->u.fxiocb.rsp_addr;
1932 memcpy(fcport->node_name, pinfo->tgt_node_wwnn, WWN_SIZE);
1933 memcpy(fcport->port_name, pinfo->tgt_node_wwpn, WWN_SIZE);
1934 fcport->port_type = FCT_TARGET;
1935 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0144,
1936 (uint8_t *)pinfo, 16);
1937 } else if (fx_type == FXDISC_GET_TGT_NODE_LIST) {
1938 struct qlafx00_tgt_node_info *pinfo =
1939 (struct qlafx00_tgt_node_info *) fdisc->u.fxiocb.rsp_addr;
1940 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0146,
1941 (uint8_t *)pinfo, 16);
1942 memcpy(vha->hw->gid_list, pinfo, QLAFX00_TGT_NODE_LIST_SIZE);
1943 } else if (fx_type == FXDISC_ABORT_IOCTL)
1944 fdisc->u.fxiocb.result =
1945 (fdisc->u.fxiocb.result ==
1946 cpu_to_le32(QLAFX00_IOCTL_ICOB_ABORT_SUCCESS)) ?
1947 cpu_to_le32(QLA_SUCCESS) : cpu_to_le32(QLA_FUNCTION_FAILED);
1948
1949 rval = le32_to_cpu(fdisc->u.fxiocb.result);
1950
1951 done_unmap_dma:
1952 if (fdisc->u.fxiocb.rsp_addr)
1953 dma_free_coherent(&ha->pdev->dev, fdisc->u.fxiocb.rsp_len,
1954 fdisc->u.fxiocb.rsp_addr, fdisc->u.fxiocb.rsp_dma_handle);
1955
1956 done_unmap_req:
1957 if (fdisc->u.fxiocb.req_addr)
1958 dma_free_coherent(&ha->pdev->dev, fdisc->u.fxiocb.req_len,
1959 fdisc->u.fxiocb.req_addr, fdisc->u.fxiocb.req_dma_handle);
1960 done_free_sp:
1961 sp->free(vha, sp);
1962 done:
1963 return rval;
1964 }
1965
1966 /*
1967 * qlafx00_initialize_adapter
1968 * Initialize board.
1969 *
1970 * Input:
1971 * ha = adapter block pointer.
1972 *
1973 * Returns:
1974 * 0 = success
1975 */
1976 int
1977 qlafx00_initialize_adapter(scsi_qla_host_t *vha)
1978 {
1979 int rval;
1980 struct qla_hw_data *ha = vha->hw;
1981 uint32_t tempc;
1982
1983 /* Clear adapter flags. */
1984 vha->flags.online = 0;
1985 ha->flags.chip_reset_done = 0;
1986 vha->flags.reset_active = 0;
1987 ha->flags.pci_channel_io_perm_failure = 0;
1988 ha->flags.eeh_busy = 0;
1989 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1990 atomic_set(&vha->loop_state, LOOP_DOWN);
1991 vha->device_flags = DFLG_NO_CABLE;
1992 vha->dpc_flags = 0;
1993 vha->flags.management_server_logged_in = 0;
1994 ha->isp_abort_cnt = 0;
1995 ha->beacon_blink_led = 0;
1996
1997 set_bit(0, ha->req_qid_map);
1998 set_bit(0, ha->rsp_qid_map);
1999
2000 ql_dbg(ql_dbg_init, vha, 0x0147,
2001 "Configuring PCI space...\n");
2002
2003 rval = ha->isp_ops->pci_config(vha);
2004 if (rval) {
2005 ql_log(ql_log_warn, vha, 0x0148,
2006 "Unable to configure PCI space.\n");
2007 return rval;
2008 }
2009
2010 rval = qlafx00_init_fw_ready(vha);
2011 if (rval != QLA_SUCCESS)
2012 return rval;
2013
2014 qlafx00_save_queue_ptrs(vha);
2015
2016 rval = qlafx00_config_queues(vha);
2017 if (rval != QLA_SUCCESS)
2018 return rval;
2019
2020 /*
2021 * Allocate the array of outstanding commands
2022 * now that we know the firmware resources.
2023 */
2024 rval = qla2x00_alloc_outstanding_cmds(ha, vha->req);
2025 if (rval != QLA_SUCCESS)
2026 return rval;
2027
2028 rval = qla2x00_init_rings(vha);
2029 ha->flags.chip_reset_done = 1;
2030
2031 tempc = QLAFX00_GET_TEMPERATURE(ha);
2032 ql_dbg(ql_dbg_init, vha, 0x0152,
2033 "ISPFx00(%s): Critical temp timer, current SOC temperature: 0x%x\n",
2034 __func__, tempc);
2035
2036 return rval;
2037 }
2038
2039 uint32_t
2040 qlafx00_fw_state_show(struct device *dev, struct device_attribute *attr,
2041 char *buf)
2042 {
2043 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
2044 int rval = QLA_FUNCTION_FAILED;
2045 uint32_t state[1];
2046
2047 if (qla2x00_reset_active(vha))
2048 ql_log(ql_log_warn, vha, 0x70ce,
2049 "ISP reset active.\n");
2050 else if (!vha->hw->flags.eeh_busy) {
2051 rval = qlafx00_get_firmware_state(vha, state);
2052 }
2053 if (rval != QLA_SUCCESS)
2054 memset(state, -1, sizeof(state));
2055
2056 return state[0];
2057 }
2058
2059 void
2060 qlafx00_get_host_speed(struct Scsi_Host *shost)
2061 {
2062 struct qla_hw_data *ha = ((struct scsi_qla_host *)
2063 (shost_priv(shost)))->hw;
2064 u32 speed = FC_PORTSPEED_UNKNOWN;
2065
2066 switch (ha->link_data_rate) {
2067 case QLAFX00_PORT_SPEED_2G:
2068 speed = FC_PORTSPEED_2GBIT;
2069 break;
2070 case QLAFX00_PORT_SPEED_4G:
2071 speed = FC_PORTSPEED_4GBIT;
2072 break;
2073 case QLAFX00_PORT_SPEED_8G:
2074 speed = FC_PORTSPEED_8GBIT;
2075 break;
2076 case QLAFX00_PORT_SPEED_10G:
2077 speed = FC_PORTSPEED_10GBIT;
2078 break;
2079 }
2080 fc_host_speed(shost) = speed;
2081 }
2082
2083 /** QLAFX00 specific ISR implementation functions */
2084
2085 static inline void
2086 qlafx00_handle_sense(srb_t *sp, uint8_t *sense_data, uint32_t par_sense_len,
2087 uint32_t sense_len, struct rsp_que *rsp, int res)
2088 {
2089 struct scsi_qla_host *vha = sp->fcport->vha;
2090 struct scsi_cmnd *cp = GET_CMD_SP(sp);
2091 uint32_t track_sense_len;
2092
2093 SET_FW_SENSE_LEN(sp, sense_len);
2094
2095 if (sense_len >= SCSI_SENSE_BUFFERSIZE)
2096 sense_len = SCSI_SENSE_BUFFERSIZE;
2097
2098 SET_CMD_SENSE_LEN(sp, sense_len);
2099 SET_CMD_SENSE_PTR(sp, cp->sense_buffer);
2100 track_sense_len = sense_len;
2101
2102 if (sense_len > par_sense_len)
2103 sense_len = par_sense_len;
2104
2105 memcpy(cp->sense_buffer, sense_data, sense_len);
2106
2107 SET_FW_SENSE_LEN(sp, GET_FW_SENSE_LEN(sp) - sense_len);
2108
2109 SET_CMD_SENSE_PTR(sp, cp->sense_buffer + sense_len);
2110 track_sense_len -= sense_len;
2111 SET_CMD_SENSE_LEN(sp, track_sense_len);
2112
2113 ql_dbg(ql_dbg_io, vha, 0x304d,
2114 "sense_len=0x%x par_sense_len=0x%x track_sense_len=0x%x.\n",
2115 sense_len, par_sense_len, track_sense_len);
2116 if (GET_FW_SENSE_LEN(sp) > 0) {
2117 rsp->status_srb = sp;
2118 cp->result = res;
2119 }
2120
2121 if (sense_len) {
2122 ql_dbg(ql_dbg_io + ql_dbg_buffer, vha, 0x3039,
2123 "Check condition Sense data, nexus%ld:%d:%d cmd=%p.\n",
2124 sp->fcport->vha->host_no, cp->device->id, cp->device->lun,
2125 cp);
2126 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x3049,
2127 cp->sense_buffer, sense_len);
2128 }
2129 }
2130
2131 static void
2132 qlafx00_tm_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
2133 struct tsk_mgmt_entry_fx00 *pkt, srb_t *sp,
2134 __le16 sstatus, __le16 cpstatus)
2135 {
2136 struct srb_iocb *tmf;
2137
2138 tmf = &sp->u.iocb_cmd;
2139 if (cpstatus != cpu_to_le16((uint16_t)CS_COMPLETE) ||
2140 (sstatus & cpu_to_le16((uint16_t)SS_RESPONSE_INFO_LEN_VALID)))
2141 cpstatus = cpu_to_le16((uint16_t)CS_INCOMPLETE);
2142 tmf->u.tmf.comp_status = cpstatus;
2143 sp->done(vha, sp, 0);
2144 }
2145
2146 static void
2147 qlafx00_abort_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
2148 struct abort_iocb_entry_fx00 *pkt)
2149 {
2150 const char func[] = "ABT_IOCB";
2151 srb_t *sp;
2152 struct srb_iocb *abt;
2153
2154 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
2155 if (!sp)
2156 return;
2157
2158 abt = &sp->u.iocb_cmd;
2159 abt->u.abt.comp_status = pkt->tgt_id_sts;
2160 sp->done(vha, sp, 0);
2161 }
2162
2163 static void
2164 qlafx00_ioctl_iosb_entry(scsi_qla_host_t *vha, struct req_que *req,
2165 struct ioctl_iocb_entry_fx00 *pkt)
2166 {
2167 const char func[] = "IOSB_IOCB";
2168 srb_t *sp;
2169 struct fc_bsg_job *bsg_job;
2170 struct srb_iocb *iocb_job;
2171 int res;
2172 struct qla_mt_iocb_rsp_fx00 fstatus;
2173 uint8_t *fw_sts_ptr;
2174
2175 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
2176 if (!sp)
2177 return;
2178
2179 if (sp->type == SRB_FXIOCB_DCMD) {
2180 iocb_job = &sp->u.iocb_cmd;
2181 iocb_job->u.fxiocb.seq_number = pkt->seq_no;
2182 iocb_job->u.fxiocb.fw_flags = pkt->fw_iotcl_flags;
2183 iocb_job->u.fxiocb.result = pkt->status;
2184 if (iocb_job->u.fxiocb.flags & SRB_FXDISC_RSP_DWRD_VALID)
2185 iocb_job->u.fxiocb.req_data =
2186 pkt->dataword_r;
2187 } else {
2188 bsg_job = sp->u.bsg_job;
2189
2190 memset(&fstatus, 0, sizeof(struct qla_mt_iocb_rsp_fx00));
2191
2192 fstatus.reserved_1 = pkt->reserved_0;
2193 fstatus.func_type = pkt->comp_func_num;
2194 fstatus.ioctl_flags = pkt->fw_iotcl_flags;
2195 fstatus.ioctl_data = pkt->dataword_r;
2196 fstatus.adapid = pkt->adapid;
2197 fstatus.reserved_2 = pkt->dataword_r_extra;
2198 fstatus.res_count = pkt->residuallen;
2199 fstatus.status = pkt->status;
2200 fstatus.seq_number = pkt->seq_no;
2201 memcpy(fstatus.reserved_3,
2202 pkt->reserved_2, 20 * sizeof(uint8_t));
2203
2204 fw_sts_ptr = ((uint8_t *)bsg_job->req->sense) +
2205 sizeof(struct fc_bsg_reply);
2206
2207 memcpy(fw_sts_ptr, (uint8_t *)&fstatus,
2208 sizeof(struct qla_mt_iocb_rsp_fx00));
2209 bsg_job->reply_len = sizeof(struct fc_bsg_reply) +
2210 sizeof(struct qla_mt_iocb_rsp_fx00) + sizeof(uint8_t);
2211
2212 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
2213 sp->fcport->vha, 0x5080,
2214 (uint8_t *)pkt, sizeof(struct ioctl_iocb_entry_fx00));
2215
2216 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
2217 sp->fcport->vha, 0x5074,
2218 (uint8_t *)fw_sts_ptr, sizeof(struct qla_mt_iocb_rsp_fx00));
2219
2220 res = bsg_job->reply->result = DID_OK << 16;
2221 bsg_job->reply->reply_payload_rcv_len =
2222 bsg_job->reply_payload.payload_len;
2223 }
2224 sp->done(vha, sp, res);
2225 }
2226
2227 /**
2228 * qlafx00_status_entry() - Process a Status IOCB entry.
2229 * @ha: SCSI driver HA context
2230 * @pkt: Entry pointer
2231 */
2232 static void
2233 qlafx00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt)
2234 {
2235 srb_t *sp;
2236 fc_port_t *fcport;
2237 struct scsi_cmnd *cp;
2238 struct sts_entry_fx00 *sts;
2239 __le16 comp_status;
2240 __le16 scsi_status;
2241 uint16_t ox_id;
2242 __le16 lscsi_status;
2243 int32_t resid;
2244 uint32_t sense_len, par_sense_len, rsp_info_len, resid_len,
2245 fw_resid_len;
2246 uint8_t *rsp_info = NULL, *sense_data = NULL;
2247 struct qla_hw_data *ha = vha->hw;
2248 uint32_t hindex, handle;
2249 uint16_t que;
2250 struct req_que *req;
2251 int logit = 1;
2252 int res = 0;
2253
2254 sts = (struct sts_entry_fx00 *) pkt;
2255
2256 comp_status = sts->comp_status;
2257 scsi_status = sts->scsi_status & cpu_to_le16((uint16_t)SS_MASK);
2258 hindex = sts->handle;
2259 handle = LSW(hindex);
2260
2261 que = MSW(hindex);
2262 req = ha->req_q_map[que];
2263
2264 /* Validate handle. */
2265 if (handle < req->num_outstanding_cmds)
2266 sp = req->outstanding_cmds[handle];
2267 else
2268 sp = NULL;
2269
2270 if (sp == NULL) {
2271 ql_dbg(ql_dbg_io, vha, 0x3034,
2272 "Invalid status handle (0x%x).\n", handle);
2273
2274 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2275 qla2xxx_wake_dpc(vha);
2276 return;
2277 }
2278
2279 if (sp->type == SRB_TM_CMD) {
2280 req->outstanding_cmds[handle] = NULL;
2281 qlafx00_tm_iocb_entry(vha, req, pkt, sp,
2282 scsi_status, comp_status);
2283 return;
2284 }
2285
2286 /* Fast path completion. */
2287 if (comp_status == CS_COMPLETE && scsi_status == 0) {
2288 qla2x00_process_completed_request(vha, req, handle);
2289 return;
2290 }
2291
2292 req->outstanding_cmds[handle] = NULL;
2293 cp = GET_CMD_SP(sp);
2294 if (cp == NULL) {
2295 ql_dbg(ql_dbg_io, vha, 0x3048,
2296 "Command already returned (0x%x/%p).\n",
2297 handle, sp);
2298
2299 return;
2300 }
2301
2302 lscsi_status = scsi_status & cpu_to_le16((uint16_t)STATUS_MASK);
2303
2304 fcport = sp->fcport;
2305
2306 ox_id = 0;
2307 sense_len = par_sense_len = rsp_info_len = resid_len =
2308 fw_resid_len = 0;
2309 if (scsi_status & cpu_to_le16((uint16_t)SS_SENSE_LEN_VALID))
2310 sense_len = sts->sense_len;
2311 if (scsi_status & cpu_to_le16(((uint16_t)SS_RESIDUAL_UNDER
2312 | (uint16_t)SS_RESIDUAL_OVER)))
2313 resid_len = le32_to_cpu(sts->residual_len);
2314 if (comp_status == cpu_to_le16((uint16_t)CS_DATA_UNDERRUN))
2315 fw_resid_len = le32_to_cpu(sts->residual_len);
2316 rsp_info = sense_data = sts->data;
2317 par_sense_len = sizeof(sts->data);
2318
2319 /* Check for overrun. */
2320 if (comp_status == CS_COMPLETE &&
2321 scsi_status & cpu_to_le16((uint16_t)SS_RESIDUAL_OVER))
2322 comp_status = cpu_to_le16((uint16_t)CS_DATA_OVERRUN);
2323
2324 /*
2325 * Based on Host and scsi status generate status code for Linux
2326 */
2327 switch (le16_to_cpu(comp_status)) {
2328 case CS_COMPLETE:
2329 case CS_QUEUE_FULL:
2330 if (scsi_status == 0) {
2331 res = DID_OK << 16;
2332 break;
2333 }
2334 if (scsi_status & cpu_to_le16(((uint16_t)SS_RESIDUAL_UNDER
2335 | (uint16_t)SS_RESIDUAL_OVER))) {
2336 resid = resid_len;
2337 scsi_set_resid(cp, resid);
2338
2339 if (!lscsi_status &&
2340 ((unsigned)(scsi_bufflen(cp) - resid) <
2341 cp->underflow)) {
2342 ql_dbg(ql_dbg_io, fcport->vha, 0x3050,
2343 "Mid-layer underflow "
2344 "detected (0x%x of 0x%x bytes).\n",
2345 resid, scsi_bufflen(cp));
2346
2347 res = DID_ERROR << 16;
2348 break;
2349 }
2350 }
2351 res = DID_OK << 16 | le16_to_cpu(lscsi_status);
2352
2353 if (lscsi_status ==
2354 cpu_to_le16((uint16_t)SAM_STAT_TASK_SET_FULL)) {
2355 ql_dbg(ql_dbg_io, fcport->vha, 0x3051,
2356 "QUEUE FULL detected.\n");
2357 break;
2358 }
2359 logit = 0;
2360 if (lscsi_status != cpu_to_le16((uint16_t)SS_CHECK_CONDITION))
2361 break;
2362
2363 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
2364 if (!(scsi_status & cpu_to_le16((uint16_t)SS_SENSE_LEN_VALID)))
2365 break;
2366
2367 qlafx00_handle_sense(sp, sense_data, par_sense_len, sense_len,
2368 rsp, res);
2369 break;
2370
2371 case CS_DATA_UNDERRUN:
2372 /* Use F/W calculated residual length. */
2373 if (IS_FWI2_CAPABLE(ha) || IS_QLAFX00(ha))
2374 resid = fw_resid_len;
2375 else
2376 resid = resid_len;
2377 scsi_set_resid(cp, resid);
2378 if (scsi_status & cpu_to_le16((uint16_t)SS_RESIDUAL_UNDER)) {
2379 if ((IS_FWI2_CAPABLE(ha) || IS_QLAFX00(ha))
2380 && fw_resid_len != resid_len) {
2381 ql_dbg(ql_dbg_io, fcport->vha, 0x3052,
2382 "Dropped frame(s) detected "
2383 "(0x%x of 0x%x bytes).\n",
2384 resid, scsi_bufflen(cp));
2385
2386 res = DID_ERROR << 16 |
2387 le16_to_cpu(lscsi_status);
2388 goto check_scsi_status;
2389 }
2390
2391 if (!lscsi_status &&
2392 ((unsigned)(scsi_bufflen(cp) - resid) <
2393 cp->underflow)) {
2394 ql_dbg(ql_dbg_io, fcport->vha, 0x3053,
2395 "Mid-layer underflow "
2396 "detected (0x%x of 0x%x bytes, "
2397 "cp->underflow: 0x%x).\n",
2398 resid, scsi_bufflen(cp), cp->underflow);
2399
2400 res = DID_ERROR << 16;
2401 break;
2402 }
2403 } else if (lscsi_status !=
2404 cpu_to_le16((uint16_t)SAM_STAT_TASK_SET_FULL) &&
2405 lscsi_status != cpu_to_le16((uint16_t)SAM_STAT_BUSY)) {
2406 /*
2407 * scsi status of task set and busy are considered
2408 * to be task not completed.
2409 */
2410
2411 ql_dbg(ql_dbg_io, fcport->vha, 0x3054,
2412 "Dropped frame(s) detected (0x%x "
2413 "of 0x%x bytes).\n", resid,
2414 scsi_bufflen(cp));
2415
2416 res = DID_ERROR << 16 | le16_to_cpu(lscsi_status);
2417 goto check_scsi_status;
2418 } else {
2419 ql_dbg(ql_dbg_io, fcport->vha, 0x3055,
2420 "scsi_status: 0x%x, lscsi_status: 0x%x\n",
2421 scsi_status, lscsi_status);
2422 }
2423
2424 res = DID_OK << 16 | le16_to_cpu(lscsi_status);
2425 logit = 0;
2426
2427 check_scsi_status:
2428 /*
2429 * Check to see if SCSI Status is non zero. If so report SCSI
2430 * Status.
2431 */
2432 if (lscsi_status != 0) {
2433 if (lscsi_status ==
2434 cpu_to_le16((uint16_t)SAM_STAT_TASK_SET_FULL)) {
2435 ql_dbg(ql_dbg_io, fcport->vha, 0x3056,
2436 "QUEUE FULL detected.\n");
2437 logit = 1;
2438 break;
2439 }
2440 if (lscsi_status !=
2441 cpu_to_le16((uint16_t)SS_CHECK_CONDITION))
2442 break;
2443
2444 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
2445 if (!(scsi_status &
2446 cpu_to_le16((uint16_t)SS_SENSE_LEN_VALID)))
2447 break;
2448
2449 qlafx00_handle_sense(sp, sense_data, par_sense_len,
2450 sense_len, rsp, res);
2451 }
2452 break;
2453
2454 case CS_PORT_LOGGED_OUT:
2455 case CS_PORT_CONFIG_CHG:
2456 case CS_PORT_BUSY:
2457 case CS_INCOMPLETE:
2458 case CS_PORT_UNAVAILABLE:
2459 case CS_TIMEOUT:
2460 case CS_RESET:
2461
2462 /*
2463 * We are going to have the fc class block the rport
2464 * while we try to recover so instruct the mid layer
2465 * to requeue until the class decides how to handle this.
2466 */
2467 res = DID_TRANSPORT_DISRUPTED << 16;
2468
2469 ql_dbg(ql_dbg_io, fcport->vha, 0x3057,
2470 "Port down status: port-state=0x%x.\n",
2471 atomic_read(&fcport->state));
2472
2473 if (atomic_read(&fcport->state) == FCS_ONLINE)
2474 qla2x00_mark_device_lost(fcport->vha, fcport, 1, 1);
2475 break;
2476
2477 case CS_ABORTED:
2478 res = DID_RESET << 16;
2479 break;
2480
2481 default:
2482 res = DID_ERROR << 16;
2483 break;
2484 }
2485
2486 if (logit)
2487 ql_dbg(ql_dbg_io, fcport->vha, 0x3058,
2488 "FCP command status: 0x%x-0x%x (0x%x) nexus=%ld:%d:%d "
2489 "tgt_id: 0x%x lscsi_status: 0x%x cdb=%10phN len=0x%x "
2490 "rsp_info=0x%x resid=0x%x fw_resid=0x%x sense_len=0x%x, "
2491 "par_sense_len=0x%x, rsp_info_len=0x%x\n",
2492 comp_status, scsi_status, res, vha->host_no,
2493 cp->device->id, cp->device->lun, fcport->tgt_id,
2494 lscsi_status, cp->cmnd, scsi_bufflen(cp),
2495 rsp_info_len, resid_len, fw_resid_len, sense_len,
2496 par_sense_len, rsp_info_len);
2497
2498 if (rsp->status_srb == NULL)
2499 sp->done(ha, sp, res);
2500 }
2501
2502 /**
2503 * qlafx00_status_cont_entry() - Process a Status Continuations entry.
2504 * @ha: SCSI driver HA context
2505 * @pkt: Entry pointer
2506 *
2507 * Extended sense data.
2508 */
2509 static void
2510 qlafx00_status_cont_entry(struct rsp_que *rsp, sts_cont_entry_t *pkt)
2511 {
2512 uint8_t sense_sz = 0;
2513 struct qla_hw_data *ha = rsp->hw;
2514 struct scsi_qla_host *vha = pci_get_drvdata(ha->pdev);
2515 srb_t *sp = rsp->status_srb;
2516 struct scsi_cmnd *cp;
2517 uint32_t sense_len;
2518 uint8_t *sense_ptr;
2519
2520 if (!sp) {
2521 ql_dbg(ql_dbg_io, vha, 0x3037,
2522 "no SP, sp = %p\n", sp);
2523 return;
2524 }
2525
2526 if (!GET_FW_SENSE_LEN(sp)) {
2527 ql_dbg(ql_dbg_io, vha, 0x304b,
2528 "no fw sense data, sp = %p\n", sp);
2529 return;
2530 }
2531 cp = GET_CMD_SP(sp);
2532 if (cp == NULL) {
2533 ql_log(ql_log_warn, vha, 0x303b,
2534 "cmd is NULL: already returned to OS (sp=%p).\n", sp);
2535
2536 rsp->status_srb = NULL;
2537 return;
2538 }
2539
2540 if (!GET_CMD_SENSE_LEN(sp)) {
2541 ql_dbg(ql_dbg_io, vha, 0x304c,
2542 "no sense data, sp = %p\n", sp);
2543 } else {
2544 sense_len = GET_CMD_SENSE_LEN(sp);
2545 sense_ptr = GET_CMD_SENSE_PTR(sp);
2546 ql_dbg(ql_dbg_io, vha, 0x304f,
2547 "sp=%p sense_len=0x%x sense_ptr=%p.\n",
2548 sp, sense_len, sense_ptr);
2549
2550 if (sense_len > sizeof(pkt->data))
2551 sense_sz = sizeof(pkt->data);
2552 else
2553 sense_sz = sense_len;
2554
2555 /* Move sense data. */
2556 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x304e,
2557 (uint8_t *)pkt, sizeof(sts_cont_entry_t));
2558 memcpy(sense_ptr, pkt->data, sense_sz);
2559 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x304a,
2560 sense_ptr, sense_sz);
2561
2562 sense_len -= sense_sz;
2563 sense_ptr += sense_sz;
2564
2565 SET_CMD_SENSE_PTR(sp, sense_ptr);
2566 SET_CMD_SENSE_LEN(sp, sense_len);
2567 }
2568 sense_len = GET_FW_SENSE_LEN(sp);
2569 sense_len = (sense_len > sizeof(pkt->data)) ?
2570 (sense_len - sizeof(pkt->data)) : 0;
2571 SET_FW_SENSE_LEN(sp, sense_len);
2572
2573 /* Place command on done queue. */
2574 if (sense_len == 0) {
2575 rsp->status_srb = NULL;
2576 sp->done(ha, sp, cp->result);
2577 }
2578 }
2579
2580 /**
2581 * qlafx00_multistatus_entry() - Process Multi response queue entries.
2582 * @ha: SCSI driver HA context
2583 */
2584 static void
2585 qlafx00_multistatus_entry(struct scsi_qla_host *vha,
2586 struct rsp_que *rsp, void *pkt)
2587 {
2588 srb_t *sp;
2589 struct multi_sts_entry_fx00 *stsmfx;
2590 struct qla_hw_data *ha = vha->hw;
2591 uint32_t handle, hindex, handle_count, i;
2592 uint16_t que;
2593 struct req_que *req;
2594 __le32 *handle_ptr;
2595
2596 stsmfx = (struct multi_sts_entry_fx00 *) pkt;
2597
2598 handle_count = stsmfx->handle_count;
2599
2600 if (handle_count > MAX_HANDLE_COUNT) {
2601 ql_dbg(ql_dbg_io, vha, 0x3035,
2602 "Invalid handle count (0x%x).\n", handle_count);
2603 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2604 qla2xxx_wake_dpc(vha);
2605 return;
2606 }
2607
2608 handle_ptr = &stsmfx->handles[0];
2609
2610 for (i = 0; i < handle_count; i++) {
2611 hindex = le32_to_cpu(*handle_ptr);
2612 handle = LSW(hindex);
2613 que = MSW(hindex);
2614 req = ha->req_q_map[que];
2615
2616 /* Validate handle. */
2617 if (handle < req->num_outstanding_cmds)
2618 sp = req->outstanding_cmds[handle];
2619 else
2620 sp = NULL;
2621
2622 if (sp == NULL) {
2623 ql_dbg(ql_dbg_io, vha, 0x3044,
2624 "Invalid status handle (0x%x).\n", handle);
2625 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2626 qla2xxx_wake_dpc(vha);
2627 return;
2628 }
2629 qla2x00_process_completed_request(vha, req, handle);
2630 handle_ptr++;
2631 }
2632 }
2633
2634 /**
2635 * qlafx00_error_entry() - Process an error entry.
2636 * @ha: SCSI driver HA context
2637 * @pkt: Entry pointer
2638 */
2639 static void
2640 qlafx00_error_entry(scsi_qla_host_t *vha, struct rsp_que *rsp,
2641 struct sts_entry_fx00 *pkt, uint8_t estatus, uint8_t etype)
2642 {
2643 srb_t *sp;
2644 struct qla_hw_data *ha = vha->hw;
2645 const char func[] = "ERROR-IOCB";
2646 uint16_t que = 0;
2647 struct req_que *req = NULL;
2648 int res = DID_ERROR << 16;
2649
2650 ql_dbg(ql_dbg_async, vha, 0x507f,
2651 "type of error status in response: 0x%x\n", estatus);
2652
2653 req = ha->req_q_map[que];
2654
2655 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
2656 if (sp) {
2657 sp->done(ha, sp, res);
2658 return;
2659 }
2660
2661 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2662 qla2xxx_wake_dpc(vha);
2663 }
2664
2665 /**
2666 * qlafx00_process_response_queue() - Process response queue entries.
2667 * @ha: SCSI driver HA context
2668 */
2669 static void
2670 qlafx00_process_response_queue(struct scsi_qla_host *vha,
2671 struct rsp_que *rsp)
2672 {
2673 struct sts_entry_fx00 *pkt;
2674 response_t *lptr;
2675 uint16_t lreq_q_in = 0;
2676 uint16_t lreq_q_out = 0;
2677
2678 lreq_q_in = RD_REG_DWORD(rsp->rsp_q_in);
2679 lreq_q_out = rsp->ring_index;
2680
2681 while (lreq_q_in != lreq_q_out) {
2682 lptr = rsp->ring_ptr;
2683 memcpy_fromio(rsp->rsp_pkt, (void __iomem *)lptr,
2684 sizeof(rsp->rsp_pkt));
2685 pkt = (struct sts_entry_fx00 *)rsp->rsp_pkt;
2686
2687 rsp->ring_index++;
2688 lreq_q_out++;
2689 if (rsp->ring_index == rsp->length) {
2690 lreq_q_out = 0;
2691 rsp->ring_index = 0;
2692 rsp->ring_ptr = rsp->ring;
2693 } else {
2694 rsp->ring_ptr++;
2695 }
2696
2697 if (pkt->entry_status != 0 &&
2698 pkt->entry_type != IOCTL_IOSB_TYPE_FX00) {
2699 qlafx00_error_entry(vha, rsp,
2700 (struct sts_entry_fx00 *)pkt, pkt->entry_status,
2701 pkt->entry_type);
2702 continue;
2703 }
2704
2705 switch (pkt->entry_type) {
2706 case STATUS_TYPE_FX00:
2707 qlafx00_status_entry(vha, rsp, pkt);
2708 break;
2709
2710 case STATUS_CONT_TYPE_FX00:
2711 qlafx00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt);
2712 break;
2713
2714 case MULTI_STATUS_TYPE_FX00:
2715 qlafx00_multistatus_entry(vha, rsp, pkt);
2716 break;
2717
2718 case ABORT_IOCB_TYPE_FX00:
2719 qlafx00_abort_iocb_entry(vha, rsp->req,
2720 (struct abort_iocb_entry_fx00 *)pkt);
2721 break;
2722
2723 case IOCTL_IOSB_TYPE_FX00:
2724 qlafx00_ioctl_iosb_entry(vha, rsp->req,
2725 (struct ioctl_iocb_entry_fx00 *)pkt);
2726 break;
2727 default:
2728 /* Type Not Supported. */
2729 ql_dbg(ql_dbg_async, vha, 0x5081,
2730 "Received unknown response pkt type %x "
2731 "entry status=%x.\n",
2732 pkt->entry_type, pkt->entry_status);
2733 break;
2734 }
2735 }
2736
2737 /* Adjust ring index */
2738 WRT_REG_DWORD(rsp->rsp_q_out, rsp->ring_index);
2739 }
2740
2741 /**
2742 * qlafx00_async_event() - Process aynchronous events.
2743 * @ha: SCSI driver HA context
2744 */
2745 static void
2746 qlafx00_async_event(scsi_qla_host_t *vha)
2747 {
2748 struct qla_hw_data *ha = vha->hw;
2749 struct device_reg_fx00 __iomem *reg;
2750 int data_size = 1;
2751
2752 reg = &ha->iobase->ispfx00;
2753 /* Setup to process RIO completion. */
2754 switch (ha->aenmb[0]) {
2755 case QLAFX00_MBA_SYSTEM_ERR: /* System Error */
2756 ql_log(ql_log_warn, vha, 0x5079,
2757 "ISP System Error - mbx1=%x\n", ha->aenmb[0]);
2758 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2759 break;
2760
2761 case QLAFX00_MBA_SHUTDOWN_RQSTD: /* Shutdown requested */
2762 ql_dbg(ql_dbg_async, vha, 0x5076,
2763 "Asynchronous FW shutdown requested.\n");
2764 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2765 qla2xxx_wake_dpc(vha);
2766 break;
2767
2768 case QLAFX00_MBA_PORT_UPDATE: /* Port database update */
2769 ha->aenmb[1] = RD_REG_DWORD(&reg->aenmailbox1);
2770 ha->aenmb[2] = RD_REG_DWORD(&reg->aenmailbox2);
2771 ha->aenmb[3] = RD_REG_DWORD(&reg->aenmailbox3);
2772 ql_dbg(ql_dbg_async, vha, 0x5077,
2773 "Asynchronous port Update received "
2774 "aenmb[0]: %x, aenmb[1]: %x, aenmb[2]: %x, aenmb[3]: %x\n",
2775 ha->aenmb[0], ha->aenmb[1], ha->aenmb[2], ha->aenmb[3]);
2776 data_size = 4;
2777 break;
2778
2779 case QLAFX00_MBA_TEMP_OVER: /* Over temperature event */
2780 ql_log(ql_log_info, vha, 0x5085,
2781 "Asynchronous over temperature event received "
2782 "aenmb[0]: %x\n",
2783 ha->aenmb[0]);
2784 break;
2785
2786 case QLAFX00_MBA_TEMP_NORM: /* Normal temperature event */
2787 ql_log(ql_log_info, vha, 0x5086,
2788 "Asynchronous normal temperature event received "
2789 "aenmb[0]: %x\n",
2790 ha->aenmb[0]);
2791 break;
2792
2793 case QLAFX00_MBA_TEMP_CRIT: /* Critical temperature event */
2794 ql_log(ql_log_info, vha, 0x5083,
2795 "Asynchronous critical temperature event received "
2796 "aenmb[0]: %x\n",
2797 ha->aenmb[0]);
2798 break;
2799
2800 default:
2801 ha->aenmb[1] = RD_REG_WORD(&reg->aenmailbox1);
2802 ha->aenmb[2] = RD_REG_WORD(&reg->aenmailbox2);
2803 ha->aenmb[3] = RD_REG_WORD(&reg->aenmailbox3);
2804 ha->aenmb[4] = RD_REG_WORD(&reg->aenmailbox4);
2805 ha->aenmb[5] = RD_REG_WORD(&reg->aenmailbox5);
2806 ha->aenmb[6] = RD_REG_WORD(&reg->aenmailbox6);
2807 ha->aenmb[7] = RD_REG_WORD(&reg->aenmailbox7);
2808 ql_dbg(ql_dbg_async, vha, 0x5078,
2809 "AEN:%04x %04x %04x %04x :%04x %04x %04x %04x\n",
2810 ha->aenmb[0], ha->aenmb[1], ha->aenmb[2], ha->aenmb[3],
2811 ha->aenmb[4], ha->aenmb[5], ha->aenmb[6], ha->aenmb[7]);
2812 break;
2813 }
2814 qlafx00_post_aenfx_work(vha, ha->aenmb[0],
2815 (uint32_t *)ha->aenmb, data_size);
2816 }
2817
2818 /**
2819 *
2820 * qlafx00x_mbx_completion() - Process mailbox command completions.
2821 * @ha: SCSI driver HA context
2822 * @mb16: Mailbox16 register
2823 */
2824 static void
2825 qlafx00_mbx_completion(scsi_qla_host_t *vha, uint32_t mb0)
2826 {
2827 uint16_t cnt;
2828 uint32_t __iomem *wptr;
2829 struct qla_hw_data *ha = vha->hw;
2830 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
2831
2832 if (!ha->mcp32)
2833 ql_dbg(ql_dbg_async, vha, 0x507e, "MBX pointer ERROR.\n");
2834
2835 /* Load return mailbox registers. */
2836 ha->flags.mbox_int = 1;
2837 ha->mailbox_out32[0] = mb0;
2838 wptr = (uint32_t __iomem *)&reg->mailbox17;
2839
2840 for (cnt = 1; cnt < ha->mbx_count; cnt++) {
2841 ha->mailbox_out32[cnt] = RD_REG_DWORD(wptr);
2842 wptr++;
2843 }
2844 }
2845
2846 /**
2847 * qlafx00_intr_handler() - Process interrupts for the ISPFX00.
2848 * @irq:
2849 * @dev_id: SCSI driver HA context
2850 *
2851 * Called by system whenever the host adapter generates an interrupt.
2852 *
2853 * Returns handled flag.
2854 */
2855 irqreturn_t
2856 qlafx00_intr_handler(int irq, void *dev_id)
2857 {
2858 scsi_qla_host_t *vha;
2859 struct qla_hw_data *ha;
2860 struct device_reg_fx00 __iomem *reg;
2861 int status;
2862 unsigned long iter;
2863 uint32_t stat;
2864 uint32_t mb[8];
2865 struct rsp_que *rsp;
2866 unsigned long flags;
2867 uint32_t clr_intr = 0;
2868 uint32_t intr_stat = 0;
2869
2870 rsp = (struct rsp_que *) dev_id;
2871 if (!rsp) {
2872 ql_log(ql_log_info, NULL, 0x507d,
2873 "%s: NULL response queue pointer.\n", __func__);
2874 return IRQ_NONE;
2875 }
2876
2877 ha = rsp->hw;
2878 reg = &ha->iobase->ispfx00;
2879 status = 0;
2880
2881 if (unlikely(pci_channel_offline(ha->pdev)))
2882 return IRQ_HANDLED;
2883
2884 spin_lock_irqsave(&ha->hardware_lock, flags);
2885 vha = pci_get_drvdata(ha->pdev);
2886 for (iter = 50; iter--; clr_intr = 0) {
2887 stat = QLAFX00_RD_INTR_REG(ha);
2888 if (qla2x00_check_reg_for_disconnect(vha, stat))
2889 break;
2890 intr_stat = stat & QLAFX00_HST_INT_STS_BITS;
2891 if (!intr_stat)
2892 break;
2893
2894 if (stat & QLAFX00_INTR_MB_CMPLT) {
2895 mb[0] = RD_REG_WORD(&reg->mailbox16);
2896 qlafx00_mbx_completion(vha, mb[0]);
2897 status |= MBX_INTERRUPT;
2898 clr_intr |= QLAFX00_INTR_MB_CMPLT;
2899 }
2900 if (intr_stat & QLAFX00_INTR_ASYNC_CMPLT) {
2901 ha->aenmb[0] = RD_REG_WORD(&reg->aenmailbox0);
2902 qlafx00_async_event(vha);
2903 clr_intr |= QLAFX00_INTR_ASYNC_CMPLT;
2904 }
2905 if (intr_stat & QLAFX00_INTR_RSP_CMPLT) {
2906 qlafx00_process_response_queue(vha, rsp);
2907 clr_intr |= QLAFX00_INTR_RSP_CMPLT;
2908 }
2909
2910 QLAFX00_CLR_INTR_REG(ha, clr_intr);
2911 QLAFX00_RD_INTR_REG(ha);
2912 }
2913
2914 qla2x00_handle_mbx_completion(ha, status);
2915 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2916
2917 return IRQ_HANDLED;
2918 }
2919
2920 /** QLAFX00 specific IOCB implementation functions */
2921
2922 static inline cont_a64_entry_t *
2923 qlafx00_prep_cont_type1_iocb(struct req_que *req,
2924 cont_a64_entry_t *lcont_pkt)
2925 {
2926 cont_a64_entry_t *cont_pkt;
2927
2928 /* Adjust ring index. */
2929 req->ring_index++;
2930 if (req->ring_index == req->length) {
2931 req->ring_index = 0;
2932 req->ring_ptr = req->ring;
2933 } else {
2934 req->ring_ptr++;
2935 }
2936
2937 cont_pkt = (cont_a64_entry_t *)req->ring_ptr;
2938
2939 /* Load packet defaults. */
2940 lcont_pkt->entry_type = CONTINUE_A64_TYPE_FX00;
2941
2942 return cont_pkt;
2943 }
2944
2945 static inline void
2946 qlafx00_build_scsi_iocbs(srb_t *sp, struct cmd_type_7_fx00 *cmd_pkt,
2947 uint16_t tot_dsds, struct cmd_type_7_fx00 *lcmd_pkt)
2948 {
2949 uint16_t avail_dsds;
2950 __le32 *cur_dsd;
2951 scsi_qla_host_t *vha;
2952 struct scsi_cmnd *cmd;
2953 struct scatterlist *sg;
2954 int i, cont;
2955 struct req_que *req;
2956 cont_a64_entry_t lcont_pkt;
2957 cont_a64_entry_t *cont_pkt;
2958
2959 vha = sp->fcport->vha;
2960 req = vha->req;
2961
2962 cmd = GET_CMD_SP(sp);
2963 cont = 0;
2964 cont_pkt = NULL;
2965
2966 /* Update entry type to indicate Command Type 3 IOCB */
2967 lcmd_pkt->entry_type = FX00_COMMAND_TYPE_7;
2968
2969 /* No data transfer */
2970 if (!scsi_bufflen(cmd) || cmd->sc_data_direction == DMA_NONE) {
2971 lcmd_pkt->byte_count = __constant_cpu_to_le32(0);
2972 return;
2973 }
2974
2975 /* Set transfer direction */
2976 if (cmd->sc_data_direction == DMA_TO_DEVICE) {
2977 lcmd_pkt->cntrl_flags = TMF_WRITE_DATA;
2978 vha->qla_stats.output_bytes += scsi_bufflen(cmd);
2979 } else if (cmd->sc_data_direction == DMA_FROM_DEVICE) {
2980 lcmd_pkt->cntrl_flags = TMF_READ_DATA;
2981 vha->qla_stats.input_bytes += scsi_bufflen(cmd);
2982 }
2983
2984 /* One DSD is available in the Command Type 3 IOCB */
2985 avail_dsds = 1;
2986 cur_dsd = (__le32 *)&lcmd_pkt->dseg_0_address;
2987
2988 /* Load data segments */
2989 scsi_for_each_sg(cmd, sg, tot_dsds, i) {
2990 dma_addr_t sle_dma;
2991
2992 /* Allocate additional continuation packets? */
2993 if (avail_dsds == 0) {
2994 /*
2995 * Five DSDs are available in the Continuation
2996 * Type 1 IOCB.
2997 */
2998 memset(&lcont_pkt, 0, REQUEST_ENTRY_SIZE);
2999 cont_pkt =
3000 qlafx00_prep_cont_type1_iocb(req, &lcont_pkt);
3001 cur_dsd = (__le32 *)lcont_pkt.dseg_0_address;
3002 avail_dsds = 5;
3003 cont = 1;
3004 }
3005
3006 sle_dma = sg_dma_address(sg);
3007 *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
3008 *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
3009 *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
3010 avail_dsds--;
3011 if (avail_dsds == 0 && cont == 1) {
3012 cont = 0;
3013 memcpy_toio((void __iomem *)cont_pkt, &lcont_pkt,
3014 REQUEST_ENTRY_SIZE);
3015 }
3016
3017 }
3018 if (avail_dsds != 0 && cont == 1) {
3019 memcpy_toio((void __iomem *)cont_pkt, &lcont_pkt,
3020 REQUEST_ENTRY_SIZE);
3021 }
3022 }
3023
3024 /**
3025 * qlafx00_start_scsi() - Send a SCSI command to the ISP
3026 * @sp: command to send to the ISP
3027 *
3028 * Returns non-zero if a failure occurred, else zero.
3029 */
3030 int
3031 qlafx00_start_scsi(srb_t *sp)
3032 {
3033 int ret, nseg;
3034 unsigned long flags;
3035 uint32_t index;
3036 uint32_t handle;
3037 uint16_t cnt;
3038 uint16_t req_cnt;
3039 uint16_t tot_dsds;
3040 struct req_que *req = NULL;
3041 struct rsp_que *rsp = NULL;
3042 struct scsi_cmnd *cmd = GET_CMD_SP(sp);
3043 struct scsi_qla_host *vha = sp->fcport->vha;
3044 struct qla_hw_data *ha = vha->hw;
3045 struct cmd_type_7_fx00 *cmd_pkt;
3046 struct cmd_type_7_fx00 lcmd_pkt;
3047 struct scsi_lun llun;
3048 char tag[2];
3049
3050 /* Setup device pointers. */
3051 ret = 0;
3052
3053 rsp = ha->rsp_q_map[0];
3054 req = vha->req;
3055
3056 /* So we know we haven't pci_map'ed anything yet */
3057 tot_dsds = 0;
3058
3059 /* Acquire ring specific lock */
3060 spin_lock_irqsave(&ha->hardware_lock, flags);
3061
3062 /* Check for room in outstanding command list. */
3063 handle = req->current_outstanding_cmd;
3064 for (index = 1; index < req->num_outstanding_cmds; index++) {
3065 handle++;
3066 if (handle == req->num_outstanding_cmds)
3067 handle = 1;
3068 if (!req->outstanding_cmds[handle])
3069 break;
3070 }
3071 if (index == req->num_outstanding_cmds)
3072 goto queuing_error;
3073
3074 /* Map the sg table so we have an accurate count of sg entries needed */
3075 if (scsi_sg_count(cmd)) {
3076 nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd),
3077 scsi_sg_count(cmd), cmd->sc_data_direction);
3078 if (unlikely(!nseg))
3079 goto queuing_error;
3080 } else
3081 nseg = 0;
3082
3083 tot_dsds = nseg;
3084 req_cnt = qla24xx_calc_iocbs(vha, tot_dsds);
3085 if (req->cnt < (req_cnt + 2)) {
3086 cnt = RD_REG_DWORD_RELAXED(req->req_q_out);
3087
3088 if (req->ring_index < cnt)
3089 req->cnt = cnt - req->ring_index;
3090 else
3091 req->cnt = req->length -
3092 (req->ring_index - cnt);
3093 if (req->cnt < (req_cnt + 2))
3094 goto queuing_error;
3095 }
3096
3097 /* Build command packet. */
3098 req->current_outstanding_cmd = handle;
3099 req->outstanding_cmds[handle] = sp;
3100 sp->handle = handle;
3101 cmd->host_scribble = (unsigned char *)(unsigned long)handle;
3102 req->cnt -= req_cnt;
3103
3104 cmd_pkt = (struct cmd_type_7_fx00 *)req->ring_ptr;
3105
3106 memset(&lcmd_pkt, 0, REQUEST_ENTRY_SIZE);
3107
3108 lcmd_pkt.handle = MAKE_HANDLE(req->id, sp->handle);
3109 lcmd_pkt.reserved_0 = 0;
3110 lcmd_pkt.port_path_ctrl = 0;
3111 lcmd_pkt.reserved_1 = 0;
3112 lcmd_pkt.dseg_count = cpu_to_le16(tot_dsds);
3113 lcmd_pkt.tgt_idx = cpu_to_le16(sp->fcport->tgt_id);
3114
3115 int_to_scsilun(cmd->device->lun, &llun);
3116 host_to_adap((uint8_t *)&llun, (uint8_t *)&lcmd_pkt.lun,
3117 sizeof(lcmd_pkt.lun));
3118
3119 /* Update tagged queuing modifier -- default is TSK_SIMPLE (0). */
3120 if (scsi_populate_tag_msg(cmd, tag)) {
3121 switch (tag[0]) {
3122 case HEAD_OF_QUEUE_TAG:
3123 lcmd_pkt.task = TSK_HEAD_OF_QUEUE;
3124 break;
3125 case ORDERED_QUEUE_TAG:
3126 lcmd_pkt.task = TSK_ORDERED;
3127 break;
3128 }
3129 }
3130
3131 /* Load SCSI command packet. */
3132 host_to_adap(cmd->cmnd, lcmd_pkt.fcp_cdb, sizeof(lcmd_pkt.fcp_cdb));
3133 lcmd_pkt.byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd));
3134
3135 /* Build IOCB segments */
3136 qlafx00_build_scsi_iocbs(sp, cmd_pkt, tot_dsds, &lcmd_pkt);
3137
3138 /* Set total data segment count. */
3139 lcmd_pkt.entry_count = (uint8_t)req_cnt;
3140
3141 /* Specify response queue number where completion should happen */
3142 lcmd_pkt.entry_status = (uint8_t) rsp->id;
3143
3144 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302e,
3145 (uint8_t *)cmd->cmnd, cmd->cmd_len);
3146 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x3032,
3147 (uint8_t *)&lcmd_pkt, REQUEST_ENTRY_SIZE);
3148
3149 memcpy_toio((void __iomem *)cmd_pkt, &lcmd_pkt, REQUEST_ENTRY_SIZE);
3150 wmb();
3151
3152 /* Adjust ring index. */
3153 req->ring_index++;
3154 if (req->ring_index == req->length) {
3155 req->ring_index = 0;
3156 req->ring_ptr = req->ring;
3157 } else
3158 req->ring_ptr++;
3159
3160 sp->flags |= SRB_DMA_VALID;
3161
3162 /* Set chip new ring index. */
3163 WRT_REG_DWORD(req->req_q_in, req->ring_index);
3164 QLAFX00_SET_HST_INTR(ha, ha->rqstq_intr_code);
3165
3166 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3167 return QLA_SUCCESS;
3168
3169 queuing_error:
3170 if (tot_dsds)
3171 scsi_dma_unmap(cmd);
3172
3173 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3174
3175 return QLA_FUNCTION_FAILED;
3176 }
3177
3178 void
3179 qlafx00_tm_iocb(srb_t *sp, struct tsk_mgmt_entry_fx00 *ptm_iocb)
3180 {
3181 struct srb_iocb *fxio = &sp->u.iocb_cmd;
3182 scsi_qla_host_t *vha = sp->fcport->vha;
3183 struct req_que *req = vha->req;
3184 struct tsk_mgmt_entry_fx00 tm_iocb;
3185 struct scsi_lun llun;
3186
3187 memset(&tm_iocb, 0, sizeof(struct tsk_mgmt_entry_fx00));
3188 tm_iocb.entry_type = TSK_MGMT_IOCB_TYPE_FX00;
3189 tm_iocb.entry_count = 1;
3190 tm_iocb.handle = cpu_to_le32(MAKE_HANDLE(req->id, sp->handle));
3191 tm_iocb.reserved_0 = 0;
3192 tm_iocb.tgt_id = cpu_to_le16(sp->fcport->tgt_id);
3193 tm_iocb.control_flags = cpu_to_le32(fxio->u.tmf.flags);
3194 if (tm_iocb.control_flags == cpu_to_le32((uint32_t)TCF_LUN_RESET)) {
3195 int_to_scsilun(fxio->u.tmf.lun, &llun);
3196 host_to_adap((uint8_t *)&llun, (uint8_t *)&tm_iocb.lun,
3197 sizeof(struct scsi_lun));
3198 }
3199
3200 memcpy((void *)ptm_iocb, &tm_iocb,
3201 sizeof(struct tsk_mgmt_entry_fx00));
3202 wmb();
3203 }
3204
3205 void
3206 qlafx00_abort_iocb(srb_t *sp, struct abort_iocb_entry_fx00 *pabt_iocb)
3207 {
3208 struct srb_iocb *fxio = &sp->u.iocb_cmd;
3209 scsi_qla_host_t *vha = sp->fcport->vha;
3210 struct req_que *req = vha->req;
3211 struct abort_iocb_entry_fx00 abt_iocb;
3212
3213 memset(&abt_iocb, 0, sizeof(struct abort_iocb_entry_fx00));
3214 abt_iocb.entry_type = ABORT_IOCB_TYPE_FX00;
3215 abt_iocb.entry_count = 1;
3216 abt_iocb.handle = cpu_to_le32(MAKE_HANDLE(req->id, sp->handle));
3217 abt_iocb.abort_handle =
3218 cpu_to_le32(MAKE_HANDLE(req->id, fxio->u.abt.cmd_hndl));
3219 abt_iocb.tgt_id_sts = cpu_to_le16(sp->fcport->tgt_id);
3220 abt_iocb.req_que_no = cpu_to_le16(req->id);
3221
3222 memcpy((void *)pabt_iocb, &abt_iocb,
3223 sizeof(struct abort_iocb_entry_fx00));
3224 wmb();
3225 }
3226
3227 void
3228 qlafx00_fxdisc_iocb(srb_t *sp, struct fxdisc_entry_fx00 *pfxiocb)
3229 {
3230 struct srb_iocb *fxio = &sp->u.iocb_cmd;
3231 struct qla_mt_iocb_rqst_fx00 *piocb_rqst;
3232 struct fc_bsg_job *bsg_job;
3233 struct fxdisc_entry_fx00 fx_iocb;
3234 uint8_t entry_cnt = 1;
3235
3236 memset(&fx_iocb, 0, sizeof(struct fxdisc_entry_fx00));
3237 fx_iocb.entry_type = FX00_IOCB_TYPE;
3238 fx_iocb.handle = cpu_to_le32(sp->handle);
3239 fx_iocb.entry_count = entry_cnt;
3240
3241 if (sp->type == SRB_FXIOCB_DCMD) {
3242 fx_iocb.func_num =
3243 sp->u.iocb_cmd.u.fxiocb.req_func_type;
3244 fx_iocb.adapid = fxio->u.fxiocb.adapter_id;
3245 fx_iocb.adapid_hi = fxio->u.fxiocb.adapter_id_hi;
3246 fx_iocb.reserved_0 = fxio->u.fxiocb.reserved_0;
3247 fx_iocb.reserved_1 = fxio->u.fxiocb.reserved_1;
3248 fx_iocb.dataword_extra = fxio->u.fxiocb.req_data_extra;
3249
3250 if (fxio->u.fxiocb.flags & SRB_FXDISC_REQ_DMA_VALID) {
3251 fx_iocb.req_dsdcnt = cpu_to_le16(1);
3252 fx_iocb.req_xfrcnt =
3253 cpu_to_le16(fxio->u.fxiocb.req_len);
3254 fx_iocb.dseg_rq_address[0] =
3255 cpu_to_le32(LSD(fxio->u.fxiocb.req_dma_handle));
3256 fx_iocb.dseg_rq_address[1] =
3257 cpu_to_le32(MSD(fxio->u.fxiocb.req_dma_handle));
3258 fx_iocb.dseg_rq_len =
3259 cpu_to_le32(fxio->u.fxiocb.req_len);
3260 }
3261
3262 if (fxio->u.fxiocb.flags & SRB_FXDISC_RESP_DMA_VALID) {
3263 fx_iocb.rsp_dsdcnt = cpu_to_le16(1);
3264 fx_iocb.rsp_xfrcnt =
3265 cpu_to_le16(fxio->u.fxiocb.rsp_len);
3266 fx_iocb.dseg_rsp_address[0] =
3267 cpu_to_le32(LSD(fxio->u.fxiocb.rsp_dma_handle));
3268 fx_iocb.dseg_rsp_address[1] =
3269 cpu_to_le32(MSD(fxio->u.fxiocb.rsp_dma_handle));
3270 fx_iocb.dseg_rsp_len =
3271 cpu_to_le32(fxio->u.fxiocb.rsp_len);
3272 }
3273
3274 if (fxio->u.fxiocb.flags & SRB_FXDISC_REQ_DWRD_VALID) {
3275 fx_iocb.dataword = fxio->u.fxiocb.req_data;
3276 }
3277 fx_iocb.flags = fxio->u.fxiocb.flags;
3278 } else {
3279 struct scatterlist *sg;
3280 bsg_job = sp->u.bsg_job;
3281 piocb_rqst = (struct qla_mt_iocb_rqst_fx00 *)
3282 &bsg_job->request->rqst_data.h_vendor.vendor_cmd[1];
3283
3284 fx_iocb.func_num = piocb_rqst->func_type;
3285 fx_iocb.adapid = piocb_rqst->adapid;
3286 fx_iocb.adapid_hi = piocb_rqst->adapid_hi;
3287 fx_iocb.reserved_0 = piocb_rqst->reserved_0;
3288 fx_iocb.reserved_1 = piocb_rqst->reserved_1;
3289 fx_iocb.dataword_extra = piocb_rqst->dataword_extra;
3290 fx_iocb.dataword = piocb_rqst->dataword;
3291 fx_iocb.req_xfrcnt = piocb_rqst->req_len;
3292 fx_iocb.rsp_xfrcnt = piocb_rqst->rsp_len;
3293
3294 if (piocb_rqst->flags & SRB_FXDISC_REQ_DMA_VALID) {
3295 int avail_dsds, tot_dsds;
3296 cont_a64_entry_t lcont_pkt;
3297 cont_a64_entry_t *cont_pkt = NULL;
3298 __le32 *cur_dsd;
3299 int index = 0, cont = 0;
3300
3301 fx_iocb.req_dsdcnt =
3302 cpu_to_le16(bsg_job->request_payload.sg_cnt);
3303 tot_dsds =
3304 bsg_job->request_payload.sg_cnt;
3305 cur_dsd = (__le32 *)&fx_iocb.dseg_rq_address[0];
3306 avail_dsds = 1;
3307 for_each_sg(bsg_job->request_payload.sg_list, sg,
3308 tot_dsds, index) {
3309 dma_addr_t sle_dma;
3310
3311 /* Allocate additional continuation packets? */
3312 if (avail_dsds == 0) {
3313 /*
3314 * Five DSDs are available in the Cont.
3315 * Type 1 IOCB.
3316 */
3317 memset(&lcont_pkt, 0,
3318 REQUEST_ENTRY_SIZE);
3319 cont_pkt =
3320 qlafx00_prep_cont_type1_iocb(
3321 sp->fcport->vha->req,
3322 &lcont_pkt);
3323 cur_dsd = (__le32 *)
3324 lcont_pkt.dseg_0_address;
3325 avail_dsds = 5;
3326 cont = 1;
3327 entry_cnt++;
3328 }
3329
3330 sle_dma = sg_dma_address(sg);
3331 *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
3332 *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
3333 *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
3334 avail_dsds--;
3335
3336 if (avail_dsds == 0 && cont == 1) {
3337 cont = 0;
3338 memcpy_toio(
3339 (void __iomem *)cont_pkt,
3340 &lcont_pkt, REQUEST_ENTRY_SIZE);
3341 ql_dump_buffer(
3342 ql_dbg_user + ql_dbg_verbose,
3343 sp->fcport->vha, 0x3042,
3344 (uint8_t *)&lcont_pkt,
3345 REQUEST_ENTRY_SIZE);
3346 }
3347 }
3348 if (avail_dsds != 0 && cont == 1) {
3349 memcpy_toio((void __iomem *)cont_pkt,
3350 &lcont_pkt, REQUEST_ENTRY_SIZE);
3351 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
3352 sp->fcport->vha, 0x3043,
3353 (uint8_t *)&lcont_pkt, REQUEST_ENTRY_SIZE);
3354 }
3355 }
3356
3357 if (piocb_rqst->flags & SRB_FXDISC_RESP_DMA_VALID) {
3358 int avail_dsds, tot_dsds;
3359 cont_a64_entry_t lcont_pkt;
3360 cont_a64_entry_t *cont_pkt = NULL;
3361 __le32 *cur_dsd;
3362 int index = 0, cont = 0;
3363
3364 fx_iocb.rsp_dsdcnt =
3365 cpu_to_le16(bsg_job->reply_payload.sg_cnt);
3366 tot_dsds = bsg_job->reply_payload.sg_cnt;
3367 cur_dsd = (__le32 *)&fx_iocb.dseg_rsp_address[0];
3368 avail_dsds = 1;
3369
3370 for_each_sg(bsg_job->reply_payload.sg_list, sg,
3371 tot_dsds, index) {
3372 dma_addr_t sle_dma;
3373
3374 /* Allocate additional continuation packets? */
3375 if (avail_dsds == 0) {
3376 /*
3377 * Five DSDs are available in the Cont.
3378 * Type 1 IOCB.
3379 */
3380 memset(&lcont_pkt, 0,
3381 REQUEST_ENTRY_SIZE);
3382 cont_pkt =
3383 qlafx00_prep_cont_type1_iocb(
3384 sp->fcport->vha->req,
3385 &lcont_pkt);
3386 cur_dsd = (__le32 *)
3387 lcont_pkt.dseg_0_address;
3388 avail_dsds = 5;
3389 cont = 1;
3390 entry_cnt++;
3391 }
3392
3393 sle_dma = sg_dma_address(sg);
3394 *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
3395 *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
3396 *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
3397 avail_dsds--;
3398
3399 if (avail_dsds == 0 && cont == 1) {
3400 cont = 0;
3401 memcpy_toio((void __iomem *)cont_pkt,
3402 &lcont_pkt,
3403 REQUEST_ENTRY_SIZE);
3404 ql_dump_buffer(
3405 ql_dbg_user + ql_dbg_verbose,
3406 sp->fcport->vha, 0x3045,
3407 (uint8_t *)&lcont_pkt,
3408 REQUEST_ENTRY_SIZE);
3409 }
3410 }
3411 if (avail_dsds != 0 && cont == 1) {
3412 memcpy_toio((void __iomem *)cont_pkt,
3413 &lcont_pkt, REQUEST_ENTRY_SIZE);
3414 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
3415 sp->fcport->vha, 0x3046,
3416 (uint8_t *)&lcont_pkt, REQUEST_ENTRY_SIZE);
3417 }
3418 }
3419
3420 if (piocb_rqst->flags & SRB_FXDISC_REQ_DWRD_VALID)
3421 fx_iocb.dataword = piocb_rqst->dataword;
3422 fx_iocb.flags = piocb_rqst->flags;
3423 fx_iocb.entry_count = entry_cnt;
3424 }
3425
3426 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
3427 sp->fcport->vha, 0x3047,
3428 (uint8_t *)&fx_iocb, sizeof(struct fxdisc_entry_fx00));
3429
3430 memcpy_toio((void __iomem *)pfxiocb, &fx_iocb,
3431 sizeof(struct fxdisc_entry_fx00));
3432 wmb();
3433 }
Linux kernel - Deliverables
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