2 * Device driver for the SYMBIOS/LSILOGIC 53C8XX and 53C1010 family
3 * of PCI-SCSI IO processors.
5 * Copyright (C) 1999-2001 Gerard Roudier <groudier@free.fr>
6 * Copyright (c) 2003-2005 Matthew Wilcox <matthew@wil.cx>
8 * This driver is derived from the Linux sym53c8xx driver.
9 * Copyright (C) 1998-2000 Gerard Roudier
11 * The sym53c8xx driver is derived from the ncr53c8xx driver that had been
12 * a port of the FreeBSD ncr driver to Linux-1.2.13.
14 * The original ncr driver has been written for 386bsd and FreeBSD by
15 * Wolfgang Stanglmeier <wolf@cologne.de>
16 * Stefan Esser <se@mi.Uni-Koeln.de>
17 * Copyright (C) 1994 Wolfgang Stanglmeier
19 * Other major contributions:
21 * NVRAM detection and reading.
22 * Copyright (C) 1997 Richard Waltham <dormouse@farsrobt.demon.co.uk>
24 *-----------------------------------------------------------------------------
26 * This program is free software; you can redistribute it and/or modify
27 * it under the terms of the GNU General Public License as published by
28 * the Free Software Foundation; either version 2 of the License, or
29 * (at your option) any later version.
31 * This program is distributed in the hope that it will be useful,
32 * but WITHOUT ANY WARRANTY; without even the implied warranty of
33 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
34 * GNU General Public License for more details.
36 * You should have received a copy of the GNU General Public License
37 * along with this program; if not, write to the Free Software
38 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
41 #include <linux/slab.h>
44 #include "sym_nvram.h"
47 #define SYM_DEBUG_GENERIC_SUPPORT
51 * Needed function prototypes.
53 static void sym_int_ma (struct sym_hcb
*np
);
54 static void sym_int_sir (struct sym_hcb
*np
);
55 static struct sym_ccb
*sym_alloc_ccb(struct sym_hcb
*np
);
56 static struct sym_ccb
*sym_ccb_from_dsa(struct sym_hcb
*np
, u32 dsa
);
57 static void sym_alloc_lcb_tags (struct sym_hcb
*np
, u_char tn
, u_char ln
);
58 static void sym_complete_error (struct sym_hcb
*np
, struct sym_ccb
*cp
);
59 static void sym_complete_ok (struct sym_hcb
*np
, struct sym_ccb
*cp
);
60 static int sym_compute_residual(struct sym_hcb
*np
, struct sym_ccb
*cp
);
63 * Print a buffer in hexadecimal format with a ".\n" at end.
65 static void sym_printl_hex(u_char
*p
, int n
)
73 * Print out the content of a SCSI message.
75 static int sym_show_msg (u_char
* msg
)
79 if (*msg
==M_EXTENDED
) {
81 if (i
-1>msg
[1]) break;
82 printf ("-%x",msg
[i
]);
85 } else if ((*msg
& 0xf0) == 0x20) {
86 printf ("-%x",msg
[1]);
92 static void sym_print_msg(struct sym_ccb
*cp
, char *label
, u_char
*msg
)
94 sym_print_addr(cp
->cmd
, "%s: ", label
);
100 static void sym_print_nego_msg(struct sym_hcb
*np
, int target
, char *label
, u_char
*msg
)
102 struct sym_tcb
*tp
= &np
->target
[target
];
103 dev_info(&tp
->starget
->dev
, "%s: ", label
);
110 * Print something that tells about extended errors.
112 void sym_print_xerr(struct scsi_cmnd
*cmd
, int x_status
)
114 if (x_status
& XE_PARITY_ERR
) {
115 sym_print_addr(cmd
, "unrecovered SCSI parity error.\n");
117 if (x_status
& XE_EXTRA_DATA
) {
118 sym_print_addr(cmd
, "extraneous data discarded.\n");
120 if (x_status
& XE_BAD_PHASE
) {
121 sym_print_addr(cmd
, "illegal scsi phase (4/5).\n");
123 if (x_status
& XE_SODL_UNRUN
) {
124 sym_print_addr(cmd
, "ODD transfer in DATA OUT phase.\n");
126 if (x_status
& XE_SWIDE_OVRUN
) {
127 sym_print_addr(cmd
, "ODD transfer in DATA IN phase.\n");
132 * Return a string for SCSI BUS mode.
134 static char *sym_scsi_bus_mode(int mode
)
137 case SMODE_HVD
: return "HVD";
138 case SMODE_SE
: return "SE";
139 case SMODE_LVD
: return "LVD";
145 * Soft reset the chip.
147 * Raising SRST when the chip is running may cause
148 * problems on dual function chips (see below).
149 * On the other hand, LVD devices need some delay
150 * to settle and report actual BUS mode in STEST4.
152 static void sym_chip_reset (struct sym_hcb
*np
)
154 OUTB(np
, nc_istat
, SRST
);
157 OUTB(np
, nc_istat
, 0);
159 udelay(2000); /* For BUS MODE to settle */
163 * Really soft reset the chip.:)
165 * Some 896 and 876 chip revisions may hang-up if we set
166 * the SRST (soft reset) bit at the wrong time when SCRIPTS
168 * So, we need to abort the current operation prior to
169 * soft resetting the chip.
171 static void sym_soft_reset (struct sym_hcb
*np
)
176 if (!(np
->features
& FE_ISTAT1
) || !(INB(np
, nc_istat1
) & SCRUN
))
179 OUTB(np
, nc_istat
, CABRT
);
180 for (i
= 100000 ; i
; --i
) {
181 istat
= INB(np
, nc_istat
);
185 else if (istat
& DIP
) {
186 if (INB(np
, nc_dstat
) & ABRT
)
191 OUTB(np
, nc_istat
, 0);
193 printf("%s: unable to abort current chip operation, "
194 "ISTAT=0x%02x.\n", sym_name(np
), istat
);
200 * Start reset process.
202 * The interrupt handler will reinitialize the chip.
204 static void sym_start_reset(struct sym_hcb
*np
)
206 sym_reset_scsi_bus(np
, 1);
209 int sym_reset_scsi_bus(struct sym_hcb
*np
, int enab_int
)
214 sym_soft_reset(np
); /* Soft reset the chip */
216 OUTW(np
, nc_sien
, RST
);
218 * Enable Tolerant, reset IRQD if present and
219 * properly set IRQ mode, prior to resetting the bus.
221 OUTB(np
, nc_stest3
, TE
);
222 OUTB(np
, nc_dcntl
, (np
->rv_dcntl
& IRQM
));
223 OUTB(np
, nc_scntl1
, CRST
);
227 if (!SYM_SETUP_SCSI_BUS_CHECK
)
230 * Check for no terminators or SCSI bus shorts to ground.
231 * Read SCSI data bus, data parity bits and control signals.
232 * We are expecting RESET to be TRUE and other signals to be
235 term
= INB(np
, nc_sstat0
);
236 term
= ((term
& 2) << 7) + ((term
& 1) << 17); /* rst sdp0 */
237 term
|= ((INB(np
, nc_sstat2
) & 0x01) << 26) | /* sdp1 */
238 ((INW(np
, nc_sbdl
) & 0xff) << 9) | /* d7-0 */
239 ((INW(np
, nc_sbdl
) & 0xff00) << 10) | /* d15-8 */
240 INB(np
, nc_sbcl
); /* req ack bsy sel atn msg cd io */
245 if (term
!= (2<<7)) {
246 printf("%s: suspicious SCSI data while resetting the BUS.\n",
248 printf("%s: %sdp0,d7-0,rst,req,ack,bsy,sel,atn,msg,c/d,i/o = "
249 "0x%lx, expecting 0x%lx\n",
251 (np
->features
& FE_WIDE
) ? "dp1,d15-8," : "",
252 (u_long
)term
, (u_long
)(2<<7));
253 if (SYM_SETUP_SCSI_BUS_CHECK
== 1)
257 OUTB(np
, nc_scntl1
, 0);
262 * Select SCSI clock frequency
264 static void sym_selectclock(struct sym_hcb
*np
, u_char scntl3
)
267 * If multiplier not present or not selected, leave here.
269 if (np
->multiplier
<= 1) {
270 OUTB(np
, nc_scntl3
, scntl3
);
274 if (sym_verbose
>= 2)
275 printf ("%s: enabling clock multiplier\n", sym_name(np
));
277 OUTB(np
, nc_stest1
, DBLEN
); /* Enable clock multiplier */
279 * Wait for the LCKFRQ bit to be set if supported by the chip.
280 * Otherwise wait 50 micro-seconds (at least).
282 if (np
->features
& FE_LCKFRQ
) {
284 while (!(INB(np
, nc_stest4
) & LCKFRQ
) && --i
> 0)
287 printf("%s: the chip cannot lock the frequency\n",
293 OUTB(np
, nc_stest3
, HSC
); /* Halt the scsi clock */
294 OUTB(np
, nc_scntl3
, scntl3
);
295 OUTB(np
, nc_stest1
, (DBLEN
|DBLSEL
));/* Select clock multiplier */
296 OUTB(np
, nc_stest3
, 0x00); /* Restart scsi clock */
301 * Determine the chip's clock frequency.
303 * This is essential for the negotiation of the synchronous
306 * Note: we have to return the correct value.
307 * THERE IS NO SAFE DEFAULT VALUE.
309 * Most NCR/SYMBIOS boards are delivered with a 40 Mhz clock.
310 * 53C860 and 53C875 rev. 1 support fast20 transfers but
311 * do not have a clock doubler and so are provided with a
312 * 80 MHz clock. All other fast20 boards incorporate a doubler
313 * and so should be delivered with a 40 MHz clock.
314 * The recent fast40 chips (895/896/895A/1010) use a 40 Mhz base
315 * clock and provide a clock quadrupler (160 Mhz).
319 * calculate SCSI clock frequency (in KHz)
321 static unsigned getfreq (struct sym_hcb
*np
, int gen
)
327 * Measure GEN timer delay in order
328 * to calculate SCSI clock frequency
330 * This code will never execute too
331 * many loop iterations (if DELAY is
332 * reasonably correct). It could get
333 * too low a delay (too high a freq.)
334 * if the CPU is slow executing the
335 * loop for some reason (an NMI, for
336 * example). For this reason we will
337 * if multiple measurements are to be
338 * performed trust the higher delay
339 * (lower frequency returned).
341 OUTW(np
, nc_sien
, 0); /* mask all scsi interrupts */
342 INW(np
, nc_sist
); /* clear pending scsi interrupt */
343 OUTB(np
, nc_dien
, 0); /* mask all dma interrupts */
344 INW(np
, nc_sist
); /* another one, just to be sure :) */
346 * The C1010-33 core does not report GEN in SIST,
347 * if this interrupt is masked in SIEN.
348 * I don't know yet if the C1010-66 behaves the same way.
350 if (np
->features
& FE_C10
) {
351 OUTW(np
, nc_sien
, GEN
);
352 OUTB(np
, nc_istat1
, SIRQD
);
354 OUTB(np
, nc_scntl3
, 4); /* set pre-scaler to divide by 3 */
355 OUTB(np
, nc_stime1
, 0); /* disable general purpose timer */
356 OUTB(np
, nc_stime1
, gen
); /* set to nominal delay of 1<<gen * 125us */
357 while (!(INW(np
, nc_sist
) & GEN
) && ms
++ < 100000)
358 udelay(1000/4); /* count in 1/4 of ms */
359 OUTB(np
, nc_stime1
, 0); /* disable general purpose timer */
361 * Undo C1010-33 specific settings.
363 if (np
->features
& FE_C10
) {
364 OUTW(np
, nc_sien
, 0);
365 OUTB(np
, nc_istat1
, 0);
368 * set prescaler to divide by whatever 0 means
369 * 0 ought to choose divide by 2, but appears
370 * to set divide by 3.5 mode in my 53c810 ...
372 OUTB(np
, nc_scntl3
, 0);
375 * adjust for prescaler, and convert into KHz
377 f
= ms
? ((1 << gen
) * (4340*4)) / ms
: 0;
380 * The C1010-33 result is biased by a factor
381 * of 2/3 compared to earlier chips.
383 if (np
->features
& FE_C10
)
386 if (sym_verbose
>= 2)
387 printf ("%s: Delay (GEN=%d): %u msec, %u KHz\n",
388 sym_name(np
), gen
, ms
/4, f
);
393 static unsigned sym_getfreq (struct sym_hcb
*np
)
398 getfreq (np
, gen
); /* throw away first result */
399 f1
= getfreq (np
, gen
);
400 f2
= getfreq (np
, gen
);
401 if (f1
> f2
) f1
= f2
; /* trust lower result */
406 * Get/probe chip SCSI clock frequency
408 static void sym_getclock (struct sym_hcb
*np
, int mult
)
410 unsigned char scntl3
= np
->sv_scntl3
;
411 unsigned char stest1
= np
->sv_stest1
;
417 * True with 875/895/896/895A with clock multiplier selected
419 if (mult
> 1 && (stest1
& (DBLEN
+DBLSEL
)) == DBLEN
+DBLSEL
) {
420 if (sym_verbose
>= 2)
421 printf ("%s: clock multiplier found\n", sym_name(np
));
422 np
->multiplier
= mult
;
426 * If multiplier not found or scntl3 not 7,5,3,
427 * reset chip and get frequency from general purpose timer.
428 * Otherwise trust scntl3 BIOS setting.
430 if (np
->multiplier
!= mult
|| (scntl3
& 7) < 3 || !(scntl3
& 1)) {
431 OUTB(np
, nc_stest1
, 0); /* make sure doubler is OFF */
432 f1
= sym_getfreq (np
);
435 printf ("%s: chip clock is %uKHz\n", sym_name(np
), f1
);
437 if (f1
< 45000) f1
= 40000;
438 else if (f1
< 55000) f1
= 50000;
441 if (f1
< 80000 && mult
> 1) {
442 if (sym_verbose
>= 2)
443 printf ("%s: clock multiplier assumed\n",
445 np
->multiplier
= mult
;
448 if ((scntl3
& 7) == 3) f1
= 40000;
449 else if ((scntl3
& 7) == 5) f1
= 80000;
452 f1
/= np
->multiplier
;
456 * Compute controller synchronous parameters.
458 f1
*= np
->multiplier
;
463 * Get/probe PCI clock frequency
465 static int sym_getpciclock (struct sym_hcb
*np
)
470 * For now, we only need to know about the actual
471 * PCI BUS clock frequency for C1010-66 chips.
474 if (np
->features
& FE_66MHZ
) {
478 OUTB(np
, nc_stest1
, SCLK
); /* Use the PCI clock as SCSI clock */
480 OUTB(np
, nc_stest1
, 0);
488 * SYMBIOS chip clock divisor table.
490 * Divisors are multiplied by 10,000,000 in order to make
491 * calculations more simple.
494 static u32 div_10M
[] = {2*_5M
, 3*_5M
, 4*_5M
, 6*_5M
, 8*_5M
, 12*_5M
, 16*_5M
};
497 * Get clock factor and sync divisor for a given
498 * synchronous factor period.
501 sym_getsync(struct sym_hcb
*np
, u_char dt
, u_char sfac
, u_char
*divp
, u_char
*fakp
)
503 u32 clk
= np
->clock_khz
; /* SCSI clock frequency in kHz */
504 int div
= np
->clock_divn
; /* Number of divisors supported */
505 u32 fak
; /* Sync factor in sxfer */
506 u32 per
; /* Period in tenths of ns */
507 u32 kpc
; /* (per * clk) */
511 * Compute the synchronous period in tenths of nano-seconds
513 if (dt
&& sfac
<= 9) per
= 125;
514 else if (sfac
<= 10) per
= 250;
515 else if (sfac
== 11) per
= 303;
516 else if (sfac
== 12) per
= 500;
517 else per
= 40 * sfac
;
525 * For earliest C10 revision 0, we cannot use extra
526 * clocks for the setting of the SCSI clocking.
527 * Note that this limits the lowest sync data transfer
528 * to 5 Mega-transfers per second and may result in
529 * using higher clock divisors.
532 if ((np
->features
& (FE_C10
|FE_U3EN
)) == FE_C10
) {
534 * Look for the lowest clock divisor that allows an
535 * output speed not faster than the period.
539 if (kpc
> (div_10M
[div
] << 2)) {
544 fak
= 0; /* No extra clocks */
545 if (div
== np
->clock_divn
) { /* Are we too fast ? */
555 * Look for the greatest clock divisor that allows an
556 * input speed faster than the period.
559 if (kpc
>= (div_10M
[div
] << 2)) break;
562 * Calculate the lowest clock factor that allows an output
563 * speed not faster than the period, and the max output speed.
564 * If fak >= 1 we will set both XCLKH_ST and XCLKH_DT.
565 * If fak >= 2 we will also set XCLKS_ST and XCLKS_DT.
568 fak
= (kpc
- 1) / (div_10M
[div
] << 1) + 1 - 2;
569 /* ret = ((2+fak)*div_10M[div])/np->clock_khz; */
571 fak
= (kpc
- 1) / div_10M
[div
] + 1 - 4;
572 /* ret = ((4+fak)*div_10M[div])/np->clock_khz; */
576 * Check against our hardware limits, or bugs :).
584 * Compute and return sync parameters.
593 * SYMBIOS chips allow burst lengths of 2, 4, 8, 16, 32, 64,
594 * 128 transfers. All chips support at least 16 transfers
595 * bursts. The 825A, 875 and 895 chips support bursts of up
596 * to 128 transfers and the 895A and 896 support bursts of up
597 * to 64 transfers. All other chips support up to 16
600 * For PCI 32 bit data transfers each transfer is a DWORD.
601 * It is a QUADWORD (8 bytes) for PCI 64 bit data transfers.
603 * We use log base 2 (burst length) as internal code, with
604 * value 0 meaning "burst disabled".
608 * Burst length from burst code.
610 #define burst_length(bc) (!(bc))? 0 : 1 << (bc)
613 * Burst code from io register bits.
615 #define burst_code(dmode, ctest4, ctest5) \
616 (ctest4) & 0x80? 0 : (((dmode) & 0xc0) >> 6) + ((ctest5) & 0x04) + 1
619 * Set initial io register bits from burst code.
621 static __inline
void sym_init_burst(struct sym_hcb
*np
, u_char bc
)
623 np
->rv_ctest4
&= ~0x80;
624 np
->rv_dmode
&= ~(0x3 << 6);
625 np
->rv_ctest5
&= ~0x4;
628 np
->rv_ctest4
|= 0x80;
632 np
->rv_dmode
|= ((bc
& 0x3) << 6);
633 np
->rv_ctest5
|= (bc
& 0x4);
639 * Print out the list of targets that have some flag disabled by user.
641 static void sym_print_targets_flag(struct sym_hcb
*np
, int mask
, char *msg
)
646 for (cnt
= 0, i
= 0 ; i
< SYM_CONF_MAX_TARGET
; i
++) {
649 if (np
->target
[i
].usrflags
& mask
) {
651 printf("%s: %s disabled for targets",
661 * Save initial settings of some IO registers.
662 * Assumed to have been set by BIOS.
663 * We cannot reset the chip prior to reading the
664 * IO registers, since informations will be lost.
665 * Since the SCRIPTS processor may be running, this
666 * is not safe on paper, but it seems to work quite
669 static void sym_save_initial_setting (struct sym_hcb
*np
)
671 np
->sv_scntl0
= INB(np
, nc_scntl0
) & 0x0a;
672 np
->sv_scntl3
= INB(np
, nc_scntl3
) & 0x07;
673 np
->sv_dmode
= INB(np
, nc_dmode
) & 0xce;
674 np
->sv_dcntl
= INB(np
, nc_dcntl
) & 0xa8;
675 np
->sv_ctest3
= INB(np
, nc_ctest3
) & 0x01;
676 np
->sv_ctest4
= INB(np
, nc_ctest4
) & 0x80;
677 np
->sv_gpcntl
= INB(np
, nc_gpcntl
);
678 np
->sv_stest1
= INB(np
, nc_stest1
);
679 np
->sv_stest2
= INB(np
, nc_stest2
) & 0x20;
680 np
->sv_stest4
= INB(np
, nc_stest4
);
681 if (np
->features
& FE_C10
) { /* Always large DMA fifo + ultra3 */
682 np
->sv_scntl4
= INB(np
, nc_scntl4
);
683 np
->sv_ctest5
= INB(np
, nc_ctest5
) & 0x04;
686 np
->sv_ctest5
= INB(np
, nc_ctest5
) & 0x24;
690 * Prepare io register values used by sym_start_up()
691 * according to selected and supported features.
693 static int sym_prepare_setting(struct Scsi_Host
*shost
, struct sym_hcb
*np
, struct sym_nvram
*nvram
)
702 np
->maxwide
= (np
->features
& FE_WIDE
)? 1 : 0;
705 * Guess the frequency of the chip's clock.
707 if (np
->features
& (FE_ULTRA3
| FE_ULTRA2
))
708 np
->clock_khz
= 160000;
709 else if (np
->features
& FE_ULTRA
)
710 np
->clock_khz
= 80000;
712 np
->clock_khz
= 40000;
715 * Get the clock multiplier factor.
717 if (np
->features
& FE_QUAD
)
719 else if (np
->features
& FE_DBLR
)
725 * Measure SCSI clock frequency for chips
726 * it may vary from assumed one.
728 if (np
->features
& FE_VARCLK
)
729 sym_getclock(np
, np
->multiplier
);
732 * Divisor to be used for async (timer pre-scaler).
734 i
= np
->clock_divn
- 1;
736 if (10ul * SYM_CONF_MIN_ASYNC
* np
->clock_khz
> div_10M
[i
]) {
744 * The C1010 uses hardwired divisors for async.
745 * So, we just throw away, the async. divisor.:-)
747 if (np
->features
& FE_C10
)
751 * Minimum synchronous period factor supported by the chip.
752 * Btw, 'period' is in tenths of nanoseconds.
754 period
= (4 * div_10M
[0] + np
->clock_khz
- 1) / np
->clock_khz
;
756 if (period
<= 250) np
->minsync
= 10;
757 else if (period
<= 303) np
->minsync
= 11;
758 else if (period
<= 500) np
->minsync
= 12;
759 else np
->minsync
= (period
+ 40 - 1) / 40;
762 * Check against chip SCSI standard support (SCSI-2,ULTRA,ULTRA2).
764 if (np
->minsync
< 25 &&
765 !(np
->features
& (FE_ULTRA
|FE_ULTRA2
|FE_ULTRA3
)))
767 else if (np
->minsync
< 12 &&
768 !(np
->features
& (FE_ULTRA2
|FE_ULTRA3
)))
772 * Maximum synchronous period factor supported by the chip.
774 period
= (11 * div_10M
[np
->clock_divn
- 1]) / (4 * np
->clock_khz
);
775 np
->maxsync
= period
> 2540 ? 254 : period
/ 10;
778 * If chip is a C1010, guess the sync limits in DT mode.
780 if ((np
->features
& (FE_C10
|FE_ULTRA3
)) == (FE_C10
|FE_ULTRA3
)) {
781 if (np
->clock_khz
== 160000) {
784 np
->maxoffs_dt
= nvram
->type
? 62 : 31;
789 * 64 bit addressing (895A/896/1010) ?
791 if (np
->features
& FE_DAC
) {
792 #if SYM_CONF_DMA_ADDRESSING_MODE == 0
793 np
->rv_ccntl1
|= (DDAC
);
794 #elif SYM_CONF_DMA_ADDRESSING_MODE == 1
796 np
->rv_ccntl1
|= (DDAC
);
798 np
->rv_ccntl1
|= (XTIMOD
| EXTIBMV
);
799 #elif SYM_CONF_DMA_ADDRESSING_MODE == 2
801 np
->rv_ccntl1
|= (DDAC
);
803 np
->rv_ccntl1
|= (0 | EXTIBMV
);
808 * Phase mismatch handled by SCRIPTS (895A/896/1010) ?
810 if (np
->features
& FE_NOPM
)
811 np
->rv_ccntl0
|= (ENPMJ
);
814 * C1010-33 Errata: Part Number:609-039638 (rev. 1) is fixed.
815 * In dual channel mode, contention occurs if internal cycles
816 * are used. Disable internal cycles.
818 if (np
->device_id
== PCI_DEVICE_ID_LSI_53C1010_33
&&
819 np
->revision_id
< 0x1)
820 np
->rv_ccntl0
|= DILS
;
823 * Select burst length (dwords)
825 burst_max
= SYM_SETUP_BURST_ORDER
;
826 if (burst_max
== 255)
827 burst_max
= burst_code(np
->sv_dmode
, np
->sv_ctest4
,
831 if (burst_max
> np
->maxburst
)
832 burst_max
= np
->maxburst
;
835 * DEL 352 - 53C810 Rev x11 - Part Number 609-0392140 - ITEM 2.
836 * This chip and the 860 Rev 1 may wrongly use PCI cache line
837 * based transactions on LOAD/STORE instructions. So we have
838 * to prevent these chips from using such PCI transactions in
839 * this driver. The generic ncr driver that does not use
840 * LOAD/STORE instructions does not need this work-around.
842 if ((np
->device_id
== PCI_DEVICE_ID_NCR_53C810
&&
843 np
->revision_id
>= 0x10 && np
->revision_id
<= 0x11) ||
844 (np
->device_id
== PCI_DEVICE_ID_NCR_53C860
&&
845 np
->revision_id
<= 0x1))
846 np
->features
&= ~(FE_WRIE
|FE_ERL
|FE_ERMP
);
849 * Select all supported special features.
850 * If we are using on-board RAM for scripts, prefetch (PFEN)
851 * does not help, but burst op fetch (BOF) does.
852 * Disabling PFEN makes sure BOF will be used.
854 if (np
->features
& FE_ERL
)
855 np
->rv_dmode
|= ERL
; /* Enable Read Line */
856 if (np
->features
& FE_BOF
)
857 np
->rv_dmode
|= BOF
; /* Burst Opcode Fetch */
858 if (np
->features
& FE_ERMP
)
859 np
->rv_dmode
|= ERMP
; /* Enable Read Multiple */
861 if ((np
->features
& FE_PFEN
) && !np
->ram_ba
)
863 if (np
->features
& FE_PFEN
)
865 np
->rv_dcntl
|= PFEN
; /* Prefetch Enable */
866 if (np
->features
& FE_CLSE
)
867 np
->rv_dcntl
|= CLSE
; /* Cache Line Size Enable */
868 if (np
->features
& FE_WRIE
)
869 np
->rv_ctest3
|= WRIE
; /* Write and Invalidate */
870 if (np
->features
& FE_DFS
)
871 np
->rv_ctest5
|= DFS
; /* Dma Fifo Size */
876 np
->rv_ctest4
|= MPEE
; /* Master parity checking */
877 np
->rv_scntl0
|= 0x0a; /* full arb., ena parity, par->ATN */
880 * Get parity checking, host ID and verbose mode from NVRAM
883 sym_nvram_setup_host(shost
, np
, nvram
);
886 * Get SCSI addr of host adapter (set by bios?).
888 if (np
->myaddr
== 255) {
889 np
->myaddr
= INB(np
, nc_scid
) & 0x07;
891 np
->myaddr
= SYM_SETUP_HOST_ID
;
895 * Prepare initial io register bits for burst length
897 sym_init_burst(np
, burst_max
);
901 * - LVD capable chips (895/895A/896/1010) report the
902 * current BUS mode through the STEST4 IO register.
903 * - For previous generation chips (825/825A/875),
904 * user has to tell us how to check against HVD,
905 * since a 100% safe algorithm is not possible.
907 np
->scsi_mode
= SMODE_SE
;
908 if (np
->features
& (FE_ULTRA2
|FE_ULTRA3
))
909 np
->scsi_mode
= (np
->sv_stest4
& SMODE
);
910 else if (np
->features
& FE_DIFF
) {
911 if (SYM_SETUP_SCSI_DIFF
== 1) {
913 if (np
->sv_stest2
& 0x20)
914 np
->scsi_mode
= SMODE_HVD
;
916 else if (nvram
->type
== SYM_SYMBIOS_NVRAM
) {
917 if (!(INB(np
, nc_gpreg
) & 0x08))
918 np
->scsi_mode
= SMODE_HVD
;
921 else if (SYM_SETUP_SCSI_DIFF
== 2)
922 np
->scsi_mode
= SMODE_HVD
;
924 if (np
->scsi_mode
== SMODE_HVD
)
925 np
->rv_stest2
|= 0x20;
928 * Set LED support from SCRIPTS.
929 * Ignore this feature for boards known to use a
930 * specific GPIO wiring and for the 895A, 896
931 * and 1010 that drive the LED directly.
933 if ((SYM_SETUP_SCSI_LED
||
934 (nvram
->type
== SYM_SYMBIOS_NVRAM
||
935 (nvram
->type
== SYM_TEKRAM_NVRAM
&&
936 np
->device_id
== PCI_DEVICE_ID_NCR_53C895
))) &&
937 !(np
->features
& FE_LEDC
) && !(np
->sv_gpcntl
& 0x01))
938 np
->features
|= FE_LED0
;
943 switch(SYM_SETUP_IRQ_MODE
& 3) {
945 np
->rv_dcntl
|= IRQM
;
948 np
->rv_dcntl
|= (np
->sv_dcntl
& IRQM
);
955 * Configure targets according to driver setup.
956 * If NVRAM present get targets setup from NVRAM.
958 for (i
= 0 ; i
< SYM_CONF_MAX_TARGET
; i
++) {
959 struct sym_tcb
*tp
= &np
->target
[i
];
961 tp
->usrflags
|= (SYM_DISC_ENABLED
| SYM_TAGS_ENABLED
);
962 tp
->usrtags
= SYM_SETUP_MAX_TAG
;
964 sym_nvram_setup_target(np
, i
, nvram
);
967 tp
->usrflags
&= ~SYM_TAGS_ENABLED
;
971 * Let user know about the settings.
973 printf("%s: %s, ID %d, Fast-%d, %s, %s\n", sym_name(np
),
974 sym_nvram_type(nvram
), np
->myaddr
,
975 (np
->features
& FE_ULTRA3
) ? 80 :
976 (np
->features
& FE_ULTRA2
) ? 40 :
977 (np
->features
& FE_ULTRA
) ? 20 : 10,
978 sym_scsi_bus_mode(np
->scsi_mode
),
979 (np
->rv_scntl0
& 0xa) ? "parity checking" : "NO parity");
981 * Tell him more on demand.
984 printf("%s: %s IRQ line driver%s\n",
986 np
->rv_dcntl
& IRQM
? "totem pole" : "open drain",
987 np
->ram_ba
? ", using on-chip SRAM" : "");
988 printf("%s: using %s firmware.\n", sym_name(np
), np
->fw_name
);
989 if (np
->features
& FE_NOPM
)
990 printf("%s: handling phase mismatch from SCRIPTS.\n",
996 if (sym_verbose
>= 2) {
997 printf ("%s: initial SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
998 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
999 sym_name(np
), np
->sv_scntl3
, np
->sv_dmode
, np
->sv_dcntl
,
1000 np
->sv_ctest3
, np
->sv_ctest4
, np
->sv_ctest5
);
1002 printf ("%s: final SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
1003 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
1004 sym_name(np
), np
->rv_scntl3
, np
->rv_dmode
, np
->rv_dcntl
,
1005 np
->rv_ctest3
, np
->rv_ctest4
, np
->rv_ctest5
);
1008 * Let user be aware of targets that have some disable flags set.
1010 sym_print_targets_flag(np
, SYM_SCAN_BOOT_DISABLED
, "SCAN AT BOOT");
1012 sym_print_targets_flag(np
, SYM_SCAN_LUNS_DISABLED
,
1019 * Test the pci bus snoop logic :-(
1021 * Has to be called with interrupts disabled.
1023 #ifndef CONFIG_SCSI_SYM53C8XX_IOMAPPED
1024 static int sym_regtest (struct sym_hcb
*np
)
1026 register volatile u32 data
;
1028 * chip registers may NOT be cached.
1029 * write 0xffffffff to a read only register area,
1030 * and try to read it back.
1033 OUTL(np
, nc_dstat
, data
);
1034 data
= INL(np
, nc_dstat
);
1036 if (data
== 0xffffffff) {
1038 if ((data
& 0xe2f0fffd) != 0x02000080) {
1040 printf ("CACHE TEST FAILED: reg dstat-sstat2 readback %x.\n",
1048 static int sym_snooptest (struct sym_hcb
*np
)
1050 u32 sym_rd
, sym_wr
, sym_bk
, host_rd
, host_wr
, pc
, dstat
;
1052 #ifndef CONFIG_SCSI_SYM53C8XX_IOMAPPED
1053 err
|= sym_regtest (np
);
1054 if (err
) return (err
);
1058 * Enable Master Parity Checking as we intend
1059 * to enable it for normal operations.
1061 OUTB(np
, nc_ctest4
, (np
->rv_ctest4
& MPEE
));
1065 pc
= SCRIPTZ_BA(np
, snooptest
);
1069 * Set memory and register.
1071 np
->scratch
= cpu_to_scr(host_wr
);
1072 OUTL(np
, nc_temp
, sym_wr
);
1074 * Start script (exchange values)
1076 OUTL(np
, nc_dsa
, np
->hcb_ba
);
1079 * Wait 'til done (with timeout)
1081 for (i
=0; i
<SYM_SNOOP_TIMEOUT
; i
++)
1082 if (INB(np
, nc_istat
) & (INTF
|SIP
|DIP
))
1084 if (i
>=SYM_SNOOP_TIMEOUT
) {
1085 printf ("CACHE TEST FAILED: timeout.\n");
1089 * Check for fatal DMA errors.
1091 dstat
= INB(np
, nc_dstat
);
1092 #if 1 /* Band aiding for broken hardwares that fail PCI parity */
1093 if ((dstat
& MDPE
) && (np
->rv_ctest4
& MPEE
)) {
1094 printf ("%s: PCI DATA PARITY ERROR DETECTED - "
1095 "DISABLING MASTER DATA PARITY CHECKING.\n",
1097 np
->rv_ctest4
&= ~MPEE
;
1101 if (dstat
& (MDPE
|BF
|IID
)) {
1102 printf ("CACHE TEST FAILED: DMA error (dstat=0x%02x).", dstat
);
1106 * Save termination position.
1108 pc
= INL(np
, nc_dsp
);
1110 * Read memory and register.
1112 host_rd
= scr_to_cpu(np
->scratch
);
1113 sym_rd
= INL(np
, nc_scratcha
);
1114 sym_bk
= INL(np
, nc_temp
);
1116 * Check termination position.
1118 if (pc
!= SCRIPTZ_BA(np
, snoopend
)+8) {
1119 printf ("CACHE TEST FAILED: script execution failed.\n");
1120 printf ("start=%08lx, pc=%08lx, end=%08lx\n",
1121 (u_long
) SCRIPTZ_BA(np
, snooptest
), (u_long
) pc
,
1122 (u_long
) SCRIPTZ_BA(np
, snoopend
) +8);
1128 if (host_wr
!= sym_rd
) {
1129 printf ("CACHE TEST FAILED: host wrote %d, chip read %d.\n",
1130 (int) host_wr
, (int) sym_rd
);
1133 if (host_rd
!= sym_wr
) {
1134 printf ("CACHE TEST FAILED: chip wrote %d, host read %d.\n",
1135 (int) sym_wr
, (int) host_rd
);
1138 if (sym_bk
!= sym_wr
) {
1139 printf ("CACHE TEST FAILED: chip wrote %d, read back %d.\n",
1140 (int) sym_wr
, (int) sym_bk
);
1148 * log message for real hard errors
1150 * sym0 targ 0?: ERROR (ds:si) (so-si-sd) (sx/s3/s4) @ name (dsp:dbc).
1151 * reg: r0 r1 r2 r3 r4 r5 r6 ..... rf.
1153 * exception register:
1158 * so: control lines as driven by chip.
1159 * si: control lines as seen by chip.
1160 * sd: scsi data lines as seen by chip.
1163 * sx: sxfer (see the manual)
1164 * s3: scntl3 (see the manual)
1165 * s4: scntl4 (see the manual)
1167 * current script command:
1168 * dsp: script address (relative to start of script).
1169 * dbc: first word of script command.
1171 * First 24 register of the chip:
1174 static void sym_log_hard_error(struct sym_hcb
*np
, u_short sist
, u_char dstat
)
1180 u_char
*script_base
;
1183 dsp
= INL(np
, nc_dsp
);
1185 if (dsp
> np
->scripta_ba
&&
1186 dsp
<= np
->scripta_ba
+ np
->scripta_sz
) {
1187 script_ofs
= dsp
- np
->scripta_ba
;
1188 script_size
= np
->scripta_sz
;
1189 script_base
= (u_char
*) np
->scripta0
;
1190 script_name
= "scripta";
1192 else if (np
->scriptb_ba
< dsp
&&
1193 dsp
<= np
->scriptb_ba
+ np
->scriptb_sz
) {
1194 script_ofs
= dsp
- np
->scriptb_ba
;
1195 script_size
= np
->scriptb_sz
;
1196 script_base
= (u_char
*) np
->scriptb0
;
1197 script_name
= "scriptb";
1202 script_name
= "mem";
1205 printf ("%s:%d: ERROR (%x:%x) (%x-%x-%x) (%x/%x/%x) @ (%s %x:%08x).\n",
1206 sym_name(np
), (unsigned)INB(np
, nc_sdid
)&0x0f, dstat
, sist
,
1207 (unsigned)INB(np
, nc_socl
), (unsigned)INB(np
, nc_sbcl
),
1208 (unsigned)INB(np
, nc_sbdl
), (unsigned)INB(np
, nc_sxfer
),
1209 (unsigned)INB(np
, nc_scntl3
),
1210 (np
->features
& FE_C10
) ? (unsigned)INB(np
, nc_scntl4
) : 0,
1211 script_name
, script_ofs
, (unsigned)INL(np
, nc_dbc
));
1213 if (((script_ofs
& 3) == 0) &&
1214 (unsigned)script_ofs
< script_size
) {
1215 printf ("%s: script cmd = %08x\n", sym_name(np
),
1216 scr_to_cpu((int) *(u32
*)(script_base
+ script_ofs
)));
1219 printf ("%s: regdump:", sym_name(np
));
1221 printf (" %02x", (unsigned)INB_OFF(np
, i
));
1227 if (dstat
& (MDPE
|BF
))
1228 sym_log_bus_error(np
);
1231 static struct sym_chip sym_dev_table
[] = {
1232 {PCI_DEVICE_ID_NCR_53C810
, 0x0f, "810", 4, 8, 4, 64,
1235 #ifdef SYM_DEBUG_GENERIC_SUPPORT
1236 {PCI_DEVICE_ID_NCR_53C810
, 0xff, "810a", 4, 8, 4, 1,
1240 {PCI_DEVICE_ID_NCR_53C810
, 0xff, "810a", 4, 8, 4, 1,
1241 FE_CACHE_SET
|FE_LDSTR
|FE_PFEN
|FE_BOF
}
1244 {PCI_DEVICE_ID_NCR_53C815
, 0xff, "815", 4, 8, 4, 64,
1247 {PCI_DEVICE_ID_NCR_53C825
, 0x0f, "825", 6, 8, 4, 64,
1248 FE_WIDE
|FE_BOF
|FE_ERL
|FE_DIFF
}
1250 {PCI_DEVICE_ID_NCR_53C825
, 0xff, "825a", 6, 8, 4, 2,
1251 FE_WIDE
|FE_CACHE0_SET
|FE_BOF
|FE_DFS
|FE_LDSTR
|FE_PFEN
|FE_RAM
|FE_DIFF
}
1253 {PCI_DEVICE_ID_NCR_53C860
, 0xff, "860", 4, 8, 5, 1,
1254 FE_ULTRA
|FE_CACHE_SET
|FE_BOF
|FE_LDSTR
|FE_PFEN
}
1256 {PCI_DEVICE_ID_NCR_53C875
, 0x01, "875", 6, 16, 5, 2,
1257 FE_WIDE
|FE_ULTRA
|FE_CACHE0_SET
|FE_BOF
|FE_DFS
|FE_LDSTR
|FE_PFEN
|
1258 FE_RAM
|FE_DIFF
|FE_VARCLK
}
1260 {PCI_DEVICE_ID_NCR_53C875
, 0xff, "875", 6, 16, 5, 2,
1261 FE_WIDE
|FE_ULTRA
|FE_DBLR
|FE_CACHE0_SET
|FE_BOF
|FE_DFS
|FE_LDSTR
|FE_PFEN
|
1262 FE_RAM
|FE_DIFF
|FE_VARCLK
}
1264 {PCI_DEVICE_ID_NCR_53C875J
, 0xff, "875J", 6, 16, 5, 2,
1265 FE_WIDE
|FE_ULTRA
|FE_DBLR
|FE_CACHE0_SET
|FE_BOF
|FE_DFS
|FE_LDSTR
|FE_PFEN
|
1266 FE_RAM
|FE_DIFF
|FE_VARCLK
}
1268 {PCI_DEVICE_ID_NCR_53C885
, 0xff, "885", 6, 16, 5, 2,
1269 FE_WIDE
|FE_ULTRA
|FE_DBLR
|FE_CACHE0_SET
|FE_BOF
|FE_DFS
|FE_LDSTR
|FE_PFEN
|
1270 FE_RAM
|FE_DIFF
|FE_VARCLK
}
1272 #ifdef SYM_DEBUG_GENERIC_SUPPORT
1273 {PCI_DEVICE_ID_NCR_53C895
, 0xff, "895", 6, 31, 7, 2,
1274 FE_WIDE
|FE_ULTRA2
|FE_QUAD
|FE_CACHE_SET
|FE_BOF
|FE_DFS
|
1278 {PCI_DEVICE_ID_NCR_53C895
, 0xff, "895", 6, 31, 7, 2,
1279 FE_WIDE
|FE_ULTRA2
|FE_QUAD
|FE_CACHE_SET
|FE_BOF
|FE_DFS
|FE_LDSTR
|FE_PFEN
|
1283 {PCI_DEVICE_ID_NCR_53C896
, 0xff, "896", 6, 31, 7, 4,
1284 FE_WIDE
|FE_ULTRA2
|FE_QUAD
|FE_CACHE_SET
|FE_BOF
|FE_DFS
|FE_LDSTR
|FE_PFEN
|
1285 FE_RAM
|FE_RAM8K
|FE_64BIT
|FE_DAC
|FE_IO256
|FE_NOPM
|FE_LEDC
|FE_LCKFRQ
}
1287 {PCI_DEVICE_ID_LSI_53C895A
, 0xff, "895a", 6, 31, 7, 4,
1288 FE_WIDE
|FE_ULTRA2
|FE_QUAD
|FE_CACHE_SET
|FE_BOF
|FE_DFS
|FE_LDSTR
|FE_PFEN
|
1289 FE_RAM
|FE_RAM8K
|FE_DAC
|FE_IO256
|FE_NOPM
|FE_LEDC
|FE_LCKFRQ
}
1291 {PCI_DEVICE_ID_LSI_53C875A
, 0xff, "875a", 6, 31, 7, 4,
1292 FE_WIDE
|FE_ULTRA
|FE_QUAD
|FE_CACHE_SET
|FE_BOF
|FE_DFS
|FE_LDSTR
|FE_PFEN
|
1293 FE_RAM
|FE_DAC
|FE_IO256
|FE_NOPM
|FE_LEDC
|FE_LCKFRQ
}
1295 {PCI_DEVICE_ID_LSI_53C1010_33
, 0x00, "1010-33", 6, 31, 7, 8,
1296 FE_WIDE
|FE_ULTRA3
|FE_QUAD
|FE_CACHE_SET
|FE_BOF
|FE_DFBC
|FE_LDSTR
|FE_PFEN
|
1297 FE_RAM
|FE_RAM8K
|FE_64BIT
|FE_DAC
|FE_IO256
|FE_NOPM
|FE_LEDC
|FE_CRC
|
1300 {PCI_DEVICE_ID_LSI_53C1010_33
, 0xff, "1010-33", 6, 31, 7, 8,
1301 FE_WIDE
|FE_ULTRA3
|FE_QUAD
|FE_CACHE_SET
|FE_BOF
|FE_DFBC
|FE_LDSTR
|FE_PFEN
|
1302 FE_RAM
|FE_RAM8K
|FE_64BIT
|FE_DAC
|FE_IO256
|FE_NOPM
|FE_LEDC
|FE_CRC
|
1305 {PCI_DEVICE_ID_LSI_53C1010_66
, 0xff, "1010-66", 6, 31, 7, 8,
1306 FE_WIDE
|FE_ULTRA3
|FE_QUAD
|FE_CACHE_SET
|FE_BOF
|FE_DFBC
|FE_LDSTR
|FE_PFEN
|
1307 FE_RAM
|FE_RAM8K
|FE_64BIT
|FE_DAC
|FE_IO256
|FE_NOPM
|FE_LEDC
|FE_66MHZ
|FE_CRC
|
1310 {PCI_DEVICE_ID_LSI_53C1510
, 0xff, "1510d", 6, 31, 7, 4,
1311 FE_WIDE
|FE_ULTRA2
|FE_QUAD
|FE_CACHE_SET
|FE_BOF
|FE_DFS
|FE_LDSTR
|FE_PFEN
|
1312 FE_RAM
|FE_IO256
|FE_LEDC
}
1315 #define sym_num_devs \
1316 (sizeof(sym_dev_table) / sizeof(sym_dev_table[0]))
1319 * Look up the chip table.
1321 * Return a pointer to the chip entry if found,
1325 sym_lookup_chip_table (u_short device_id
, u_char revision
)
1327 struct sym_chip
*chip
;
1330 for (i
= 0; i
< sym_num_devs
; i
++) {
1331 chip
= &sym_dev_table
[i
];
1332 if (device_id
!= chip
->device_id
)
1334 if (revision
> chip
->revision_id
)
1342 #if SYM_CONF_DMA_ADDRESSING_MODE == 2
1344 * Lookup the 64 bit DMA segments map.
1345 * This is only used if the direct mapping
1346 * has been unsuccessful.
1348 int sym_lookup_dmap(struct sym_hcb
*np
, u32 h
, int s
)
1355 /* Look up existing mappings */
1356 for (i
= SYM_DMAP_SIZE
-1; i
> 0; i
--) {
1357 if (h
== np
->dmap_bah
[i
])
1360 /* If direct mapping is free, get it */
1361 if (!np
->dmap_bah
[s
])
1363 /* Collision -> lookup free mappings */
1364 for (s
= SYM_DMAP_SIZE
-1; s
> 0; s
--) {
1365 if (!np
->dmap_bah
[s
])
1369 panic("sym: ran out of 64 bit DMA segment registers");
1372 np
->dmap_bah
[s
] = h
;
1378 * Update IO registers scratch C..R so they will be
1379 * in sync. with queued CCB expectations.
1381 static void sym_update_dmap_regs(struct sym_hcb
*np
)
1385 if (!np
->dmap_dirty
)
1387 o
= offsetof(struct sym_reg
, nc_scrx
[0]);
1388 for (i
= 0; i
< SYM_DMAP_SIZE
; i
++) {
1389 OUTL_OFF(np
, o
, np
->dmap_bah
[i
]);
1396 /* Enforce all the fiddly SPI rules and the chip limitations */
1397 static void sym_check_goals(struct sym_hcb
*np
, struct scsi_target
*starget
,
1398 struct sym_trans
*goal
)
1400 if (!spi_support_wide(starget
))
1403 if (!spi_support_sync(starget
)) {
1412 if (spi_support_dt(starget
)) {
1413 if (spi_support_dt_only(starget
))
1416 if (goal
->offset
== 0)
1422 /* Some targets fail to properly negotiate DT in SE mode */
1423 if ((np
->scsi_mode
!= SMODE_LVD
) || !(np
->features
& FE_U3EN
))
1427 /* all DT transfers must be wide */
1429 if (goal
->offset
> np
->maxoffs_dt
)
1430 goal
->offset
= np
->maxoffs_dt
;
1431 if (goal
->period
< np
->minsync_dt
)
1432 goal
->period
= np
->minsync_dt
;
1433 if (goal
->period
> np
->maxsync_dt
)
1434 goal
->period
= np
->maxsync_dt
;
1436 goal
->iu
= goal
->qas
= 0;
1437 if (goal
->offset
> np
->maxoffs
)
1438 goal
->offset
= np
->maxoffs
;
1439 if (goal
->period
< np
->minsync
)
1440 goal
->period
= np
->minsync
;
1441 if (goal
->period
> np
->maxsync
)
1442 goal
->period
= np
->maxsync
;
1447 * Prepare the next negotiation message if needed.
1449 * Fill in the part of message buffer that contains the
1450 * negotiation and the nego_status field of the CCB.
1451 * Returns the size of the message in bytes.
1453 static int sym_prepare_nego(struct sym_hcb
*np
, struct sym_ccb
*cp
, u_char
*msgptr
)
1455 struct sym_tcb
*tp
= &np
->target
[cp
->target
];
1456 struct scsi_target
*starget
= tp
->starget
;
1457 struct sym_trans
*goal
= &tp
->tgoal
;
1461 sym_check_goals(np
, starget
, goal
);
1464 * Many devices implement PPR in a buggy way, so only use it if we
1467 if (goal
->iu
|| goal
->dt
|| goal
->qas
|| (goal
->period
< 0xa)) {
1469 } else if (spi_width(starget
) != goal
->width
) {
1471 } else if (spi_period(starget
) != goal
->period
||
1472 spi_offset(starget
) != goal
->offset
) {
1475 goal
->check_nego
= 0;
1481 msgptr
[msglen
++] = M_EXTENDED
;
1482 msgptr
[msglen
++] = 3;
1483 msgptr
[msglen
++] = M_X_SYNC_REQ
;
1484 msgptr
[msglen
++] = goal
->period
;
1485 msgptr
[msglen
++] = goal
->offset
;
1488 msgptr
[msglen
++] = M_EXTENDED
;
1489 msgptr
[msglen
++] = 2;
1490 msgptr
[msglen
++] = M_X_WIDE_REQ
;
1491 msgptr
[msglen
++] = goal
->width
;
1494 msgptr
[msglen
++] = M_EXTENDED
;
1495 msgptr
[msglen
++] = 6;
1496 msgptr
[msglen
++] = M_X_PPR_REQ
;
1497 msgptr
[msglen
++] = goal
->period
;
1498 msgptr
[msglen
++] = 0;
1499 msgptr
[msglen
++] = goal
->offset
;
1500 msgptr
[msglen
++] = goal
->width
;
1501 msgptr
[msglen
++] = (goal
->iu
? PPR_OPT_IU
: 0) |
1502 (goal
->dt
? PPR_OPT_DT
: 0) |
1503 (goal
->qas
? PPR_OPT_QAS
: 0);
1507 cp
->nego_status
= nego
;
1510 tp
->nego_cp
= cp
; /* Keep track a nego will be performed */
1511 if (DEBUG_FLAGS
& DEBUG_NEGO
) {
1512 sym_print_nego_msg(np
, cp
->target
,
1513 nego
== NS_SYNC
? "sync msgout" :
1514 nego
== NS_WIDE
? "wide msgout" :
1515 "ppr msgout", msgptr
);
1523 * Insert a job into the start queue.
1525 void sym_put_start_queue(struct sym_hcb
*np
, struct sym_ccb
*cp
)
1529 #ifdef SYM_CONF_IARB_SUPPORT
1531 * If the previously queued CCB is not yet done,
1532 * set the IARB hint. The SCRIPTS will go with IARB
1533 * for this job when starting the previous one.
1534 * We leave devices a chance to win arbitration by
1535 * not using more than 'iarb_max' consecutive
1536 * immediate arbitrations.
1538 if (np
->last_cp
&& np
->iarb_count
< np
->iarb_max
) {
1539 np
->last_cp
->host_flags
|= HF_HINT_IARB
;
1547 #if SYM_CONF_DMA_ADDRESSING_MODE == 2
1549 * Make SCRIPTS aware of the 64 bit DMA
1550 * segment registers not being up-to-date.
1553 cp
->host_xflags
|= HX_DMAP_DIRTY
;
1557 * Insert first the idle task and then our job.
1558 * The MBs should ensure proper ordering.
1560 qidx
= np
->squeueput
+ 2;
1561 if (qidx
>= MAX_QUEUE
*2) qidx
= 0;
1563 np
->squeue
[qidx
] = cpu_to_scr(np
->idletask_ba
);
1564 MEMORY_WRITE_BARRIER();
1565 np
->squeue
[np
->squeueput
] = cpu_to_scr(cp
->ccb_ba
);
1567 np
->squeueput
= qidx
;
1569 if (DEBUG_FLAGS
& DEBUG_QUEUE
)
1570 printf ("%s: queuepos=%d.\n", sym_name (np
), np
->squeueput
);
1573 * Script processor may be waiting for reselect.
1576 MEMORY_WRITE_BARRIER();
1577 OUTB(np
, nc_istat
, SIGP
|np
->istat_sem
);
1580 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
1582 * Start next ready-to-start CCBs.
1584 void sym_start_next_ccbs(struct sym_hcb
*np
, struct sym_lcb
*lp
, int maxn
)
1590 * Paranoia, as usual. :-)
1592 assert(!lp
->started_tags
|| !lp
->started_no_tag
);
1595 * Try to start as many commands as asked by caller.
1596 * Prevent from having both tagged and untagged
1597 * commands queued to the device at the same time.
1600 qp
= sym_remque_head(&lp
->waiting_ccbq
);
1603 cp
= sym_que_entry(qp
, struct sym_ccb
, link2_ccbq
);
1604 if (cp
->tag
!= NO_TAG
) {
1605 if (lp
->started_no_tag
||
1606 lp
->started_tags
>= lp
->started_max
) {
1607 sym_insque_head(qp
, &lp
->waiting_ccbq
);
1610 lp
->itlq_tbl
[cp
->tag
] = cpu_to_scr(cp
->ccb_ba
);
1612 cpu_to_scr(SCRIPTA_BA(np
, resel_tag
));
1615 if (lp
->started_no_tag
|| lp
->started_tags
) {
1616 sym_insque_head(qp
, &lp
->waiting_ccbq
);
1619 lp
->head
.itl_task_sa
= cpu_to_scr(cp
->ccb_ba
);
1621 cpu_to_scr(SCRIPTA_BA(np
, resel_no_tag
));
1622 ++lp
->started_no_tag
;
1625 sym_insque_tail(qp
, &lp
->started_ccbq
);
1626 sym_put_start_queue(np
, cp
);
1629 #endif /* SYM_OPT_HANDLE_DEVICE_QUEUEING */
1632 * The chip may have completed jobs. Look at the DONE QUEUE.
1634 * On paper, memory read barriers may be needed here to
1635 * prevent out of order LOADs by the CPU from having
1636 * prefetched stale data prior to DMA having occurred.
1638 static int sym_wakeup_done (struct sym_hcb
*np
)
1647 /* MEMORY_READ_BARRIER(); */
1649 dsa
= scr_to_cpu(np
->dqueue
[i
]);
1653 if ((i
= i
+2) >= MAX_QUEUE
*2)
1656 cp
= sym_ccb_from_dsa(np
, dsa
);
1658 MEMORY_READ_BARRIER();
1659 sym_complete_ok (np
, cp
);
1663 printf ("%s: bad DSA (%x) in done queue.\n",
1664 sym_name(np
), (u_int
) dsa
);
1672 * Complete all CCBs queued to the COMP queue.
1674 * These CCBs are assumed:
1675 * - Not to be referenced either by devices or
1676 * SCRIPTS-related queues and datas.
1677 * - To have to be completed with an error condition
1680 * The device queue freeze count is incremented
1681 * for each CCB that does not prevent this.
1682 * This function is called when all CCBs involved
1683 * in error handling/recovery have been reaped.
1685 static void sym_flush_comp_queue(struct sym_hcb
*np
, int cam_status
)
1690 while ((qp
= sym_remque_head(&np
->comp_ccbq
)) != 0) {
1691 struct scsi_cmnd
*cmd
;
1692 cp
= sym_que_entry(qp
, struct sym_ccb
, link_ccbq
);
1693 sym_insque_tail(&cp
->link_ccbq
, &np
->busy_ccbq
);
1694 /* Leave quiet CCBs waiting for resources */
1695 if (cp
->host_status
== HS_WAIT
)
1699 sym_set_cam_status(cmd
, cam_status
);
1700 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
1701 if (sym_get_cam_status(cmd
) == DID_SOFT_ERROR
) {
1702 struct sym_tcb
*tp
= &np
->target
[cp
->target
];
1703 struct sym_lcb
*lp
= sym_lp(tp
, cp
->lun
);
1705 sym_remque(&cp
->link2_ccbq
);
1706 sym_insque_tail(&cp
->link2_ccbq
,
1709 if (cp
->tag
!= NO_TAG
)
1712 --lp
->started_no_tag
;
1719 sym_free_ccb(np
, cp
);
1720 sym_xpt_done(np
, cmd
);
1725 * Complete all active CCBs with error.
1726 * Used on CHIP/SCSI RESET.
1728 static void sym_flush_busy_queue (struct sym_hcb
*np
, int cam_status
)
1731 * Move all active CCBs to the COMP queue
1732 * and flush this queue.
1734 sym_que_splice(&np
->busy_ccbq
, &np
->comp_ccbq
);
1735 sym_que_init(&np
->busy_ccbq
);
1736 sym_flush_comp_queue(np
, cam_status
);
1743 * 0: initialisation.
1744 * 1: SCSI BUS RESET delivered or received.
1745 * 2: SCSI BUS MODE changed.
1747 void sym_start_up (struct sym_hcb
*np
, int reason
)
1753 * Reset chip if asked, otherwise just clear fifos.
1758 OUTB(np
, nc_stest3
, TE
|CSF
);
1759 OUTONB(np
, nc_ctest3
, CLF
);
1765 phys
= np
->squeue_ba
;
1766 for (i
= 0; i
< MAX_QUEUE
*2; i
+= 2) {
1767 np
->squeue
[i
] = cpu_to_scr(np
->idletask_ba
);
1768 np
->squeue
[i
+1] = cpu_to_scr(phys
+ (i
+2)*4);
1770 np
->squeue
[MAX_QUEUE
*2-1] = cpu_to_scr(phys
);
1773 * Start at first entry.
1780 phys
= np
->dqueue_ba
;
1781 for (i
= 0; i
< MAX_QUEUE
*2; i
+= 2) {
1783 np
->dqueue
[i
+1] = cpu_to_scr(phys
+ (i
+2)*4);
1785 np
->dqueue
[MAX_QUEUE
*2-1] = cpu_to_scr(phys
);
1788 * Start at first entry.
1793 * Install patches in scripts.
1794 * This also let point to first position the start
1795 * and done queue pointers used from SCRIPTS.
1800 * Wakeup all pending jobs.
1802 sym_flush_busy_queue(np
, DID_RESET
);
1807 OUTB(np
, nc_istat
, 0x00); /* Remove Reset, abort */
1809 udelay(2000); /* The 895 needs time for the bus mode to settle */
1811 OUTB(np
, nc_scntl0
, np
->rv_scntl0
| 0xc0);
1812 /* full arb., ena parity, par->ATN */
1813 OUTB(np
, nc_scntl1
, 0x00); /* odd parity, and remove CRST!! */
1815 sym_selectclock(np
, np
->rv_scntl3
); /* Select SCSI clock */
1817 OUTB(np
, nc_scid
, RRE
|np
->myaddr
); /* Adapter SCSI address */
1818 OUTW(np
, nc_respid
, 1ul<<np
->myaddr
); /* Id to respond to */
1819 OUTB(np
, nc_istat
, SIGP
); /* Signal Process */
1820 OUTB(np
, nc_dmode
, np
->rv_dmode
); /* Burst length, dma mode */
1821 OUTB(np
, nc_ctest5
, np
->rv_ctest5
); /* Large fifo + large burst */
1823 OUTB(np
, nc_dcntl
, NOCOM
|np
->rv_dcntl
); /* Protect SFBR */
1824 OUTB(np
, nc_ctest3
, np
->rv_ctest3
); /* Write and invalidate */
1825 OUTB(np
, nc_ctest4
, np
->rv_ctest4
); /* Master parity checking */
1827 /* Extended Sreq/Sack filtering not supported on the C10 */
1828 if (np
->features
& FE_C10
)
1829 OUTB(np
, nc_stest2
, np
->rv_stest2
);
1831 OUTB(np
, nc_stest2
, EXT
|np
->rv_stest2
);
1833 OUTB(np
, nc_stest3
, TE
); /* TolerANT enable */
1834 OUTB(np
, nc_stime0
, 0x0c); /* HTH disabled STO 0.25 sec */
1837 * For now, disable AIP generation on C1010-66.
1839 if (np
->device_id
== PCI_DEVICE_ID_LSI_53C1010_66
)
1840 OUTB(np
, nc_aipcntl1
, DISAIP
);
1843 * C10101 rev. 0 errata.
1844 * Errant SGE's when in narrow. Write bits 4 & 5 of
1845 * STEST1 register to disable SGE. We probably should do
1846 * that from SCRIPTS for each selection/reselection, but
1847 * I just don't want. :)
1849 if (np
->device_id
== PCI_DEVICE_ID_LSI_53C1010_33
&&
1850 np
->revision_id
< 1)
1851 OUTB(np
, nc_stest1
, INB(np
, nc_stest1
) | 0x30);
1854 * DEL 441 - 53C876 Rev 5 - Part Number 609-0392787/2788 - ITEM 2.
1855 * Disable overlapped arbitration for some dual function devices,
1856 * regardless revision id (kind of post-chip-design feature. ;-))
1858 if (np
->device_id
== PCI_DEVICE_ID_NCR_53C875
)
1859 OUTB(np
, nc_ctest0
, (1<<5));
1860 else if (np
->device_id
== PCI_DEVICE_ID_NCR_53C896
)
1861 np
->rv_ccntl0
|= DPR
;
1864 * Write CCNTL0/CCNTL1 for chips capable of 64 bit addressing
1865 * and/or hardware phase mismatch, since only such chips
1866 * seem to support those IO registers.
1868 if (np
->features
& (FE_DAC
|FE_NOPM
)) {
1869 OUTB(np
, nc_ccntl0
, np
->rv_ccntl0
);
1870 OUTB(np
, nc_ccntl1
, np
->rv_ccntl1
);
1873 #if SYM_CONF_DMA_ADDRESSING_MODE == 2
1875 * Set up scratch C and DRS IO registers to map the 32 bit
1876 * DMA address range our data structures are located in.
1879 np
->dmap_bah
[0] = 0; /* ??? */
1880 OUTL(np
, nc_scrx
[0], np
->dmap_bah
[0]);
1881 OUTL(np
, nc_drs
, np
->dmap_bah
[0]);
1886 * If phase mismatch handled by scripts (895A/896/1010),
1887 * set PM jump addresses.
1889 if (np
->features
& FE_NOPM
) {
1890 OUTL(np
, nc_pmjad1
, SCRIPTB_BA(np
, pm_handle
));
1891 OUTL(np
, nc_pmjad2
, SCRIPTB_BA(np
, pm_handle
));
1895 * Enable GPIO0 pin for writing if LED support from SCRIPTS.
1896 * Also set GPIO5 and clear GPIO6 if hardware LED control.
1898 if (np
->features
& FE_LED0
)
1899 OUTB(np
, nc_gpcntl
, INB(np
, nc_gpcntl
) & ~0x01);
1900 else if (np
->features
& FE_LEDC
)
1901 OUTB(np
, nc_gpcntl
, (INB(np
, nc_gpcntl
) & ~0x41) | 0x20);
1906 OUTW(np
, nc_sien
, STO
|HTH
|MA
|SGE
|UDC
|RST
|PAR
);
1907 OUTB(np
, nc_dien
, MDPE
|BF
|SSI
|SIR
|IID
);
1910 * For 895/6 enable SBMC interrupt and save current SCSI bus mode.
1911 * Try to eat the spurious SBMC interrupt that may occur when
1912 * we reset the chip but not the SCSI BUS (at initialization).
1914 if (np
->features
& (FE_ULTRA2
|FE_ULTRA3
)) {
1915 OUTONW(np
, nc_sien
, SBMC
);
1921 np
->scsi_mode
= INB(np
, nc_stest4
) & SMODE
;
1925 * Fill in target structure.
1926 * Reinitialize usrsync.
1927 * Reinitialize usrwide.
1928 * Prepare sync negotiation according to actual SCSI bus mode.
1930 for (i
=0;i
<SYM_CONF_MAX_TARGET
;i
++) {
1931 struct sym_tcb
*tp
= &np
->target
[i
];
1935 tp
->head
.wval
= np
->rv_scntl3
;
1940 * Download SCSI SCRIPTS to on-chip RAM if present,
1941 * and start script processor.
1942 * We do the download preferently from the CPU.
1943 * For platforms that may not support PCI memory mapping,
1944 * we use simple SCRIPTS that performs MEMORY MOVEs.
1946 phys
= SCRIPTA_BA(np
, init
);
1948 if (sym_verbose
>= 2)
1949 printf("%s: Downloading SCSI SCRIPTS.\n", sym_name(np
));
1950 memcpy_toio(np
->s
.ramaddr
, np
->scripta0
, np
->scripta_sz
);
1951 if (np
->ram_ws
== 8192) {
1952 memcpy_toio(np
->s
.ramaddr
+ 4096, np
->scriptb0
, np
->scriptb_sz
);
1953 phys
= scr_to_cpu(np
->scr_ram_seg
);
1954 OUTL(np
, nc_mmws
, phys
);
1955 OUTL(np
, nc_mmrs
, phys
);
1956 OUTL(np
, nc_sfs
, phys
);
1957 phys
= SCRIPTB_BA(np
, start64
);
1963 OUTL(np
, nc_dsa
, np
->hcb_ba
);
1967 * Notify the XPT about the RESET condition.
1970 sym_xpt_async_bus_reset(np
);
1974 * Switch trans mode for current job and its target.
1976 static void sym_settrans(struct sym_hcb
*np
, int target
, u_char opts
, u_char ofs
,
1977 u_char per
, u_char wide
, u_char div
, u_char fak
)
1980 u_char sval
, wval
, uval
;
1981 struct sym_tcb
*tp
= &np
->target
[target
];
1983 assert(target
== (INB(np
, nc_sdid
) & 0x0f));
1985 sval
= tp
->head
.sval
;
1986 wval
= tp
->head
.wval
;
1987 uval
= tp
->head
.uval
;
1990 printf("XXXX sval=%x wval=%x uval=%x (%x)\n",
1991 sval
, wval
, uval
, np
->rv_scntl3
);
1996 if (!(np
->features
& FE_C10
))
1997 sval
= (sval
& ~0x1f) | ofs
;
1999 sval
= (sval
& ~0x3f) | ofs
;
2002 * Set the sync divisor and extra clock factor.
2005 wval
= (wval
& ~0x70) | ((div
+1) << 4);
2006 if (!(np
->features
& FE_C10
))
2007 sval
= (sval
& ~0xe0) | (fak
<< 5);
2009 uval
= uval
& ~(XCLKH_ST
|XCLKH_DT
|XCLKS_ST
|XCLKS_DT
);
2010 if (fak
>= 1) uval
|= (XCLKH_ST
|XCLKH_DT
);
2011 if (fak
>= 2) uval
|= (XCLKS_ST
|XCLKS_DT
);
2016 * Set the bus width.
2023 * Set misc. ultra enable bits.
2025 if (np
->features
& FE_C10
) {
2026 uval
= uval
& ~(U3EN
|AIPCKEN
);
2028 assert(np
->features
& FE_U3EN
);
2032 wval
= wval
& ~ULTRA
;
2033 if (per
<= 12) wval
|= ULTRA
;
2037 * Stop there if sync parameters are unchanged.
2039 if (tp
->head
.sval
== sval
&&
2040 tp
->head
.wval
== wval
&&
2041 tp
->head
.uval
== uval
)
2043 tp
->head
.sval
= sval
;
2044 tp
->head
.wval
= wval
;
2045 tp
->head
.uval
= uval
;
2048 * Disable extended Sreq/Sack filtering if per < 50.
2049 * Not supported on the C1010.
2051 if (per
< 50 && !(np
->features
& FE_C10
))
2052 OUTOFFB(np
, nc_stest2
, EXT
);
2055 * set actual value and sync_status
2057 OUTB(np
, nc_sxfer
, tp
->head
.sval
);
2058 OUTB(np
, nc_scntl3
, tp
->head
.wval
);
2060 if (np
->features
& FE_C10
) {
2061 OUTB(np
, nc_scntl4
, tp
->head
.uval
);
2065 * patch ALL busy ccbs of this target.
2067 FOR_EACH_QUEUED_ELEMENT(&np
->busy_ccbq
, qp
) {
2069 cp
= sym_que_entry(qp
, struct sym_ccb
, link_ccbq
);
2070 if (cp
->target
!= target
)
2072 cp
->phys
.select
.sel_scntl3
= tp
->head
.wval
;
2073 cp
->phys
.select
.sel_sxfer
= tp
->head
.sval
;
2074 if (np
->features
& FE_C10
) {
2075 cp
->phys
.select
.sel_scntl4
= tp
->head
.uval
;
2081 * We received a WDTR.
2082 * Let everything be aware of the changes.
2084 static void sym_setwide(struct sym_hcb
*np
, int target
, u_char wide
)
2086 struct sym_tcb
*tp
= &np
->target
[target
];
2087 struct scsi_target
*starget
= tp
->starget
;
2089 if (spi_width(starget
) == wide
)
2092 sym_settrans(np
, target
, 0, 0, 0, wide
, 0, 0);
2094 tp
->tgoal
.width
= wide
;
2095 spi_offset(starget
) = 0;
2096 spi_period(starget
) = 0;
2097 spi_width(starget
) = wide
;
2098 spi_iu(starget
) = 0;
2099 spi_dt(starget
) = 0;
2100 spi_qas(starget
) = 0;
2102 if (sym_verbose
>= 3)
2103 spi_display_xfer_agreement(starget
);
2107 * We received a SDTR.
2108 * Let everything be aware of the changes.
2111 sym_setsync(struct sym_hcb
*np
, int target
,
2112 u_char ofs
, u_char per
, u_char div
, u_char fak
)
2114 struct sym_tcb
*tp
= &np
->target
[target
];
2115 struct scsi_target
*starget
= tp
->starget
;
2116 u_char wide
= (tp
->head
.wval
& EWS
) ? BUS_16_BIT
: BUS_8_BIT
;
2118 sym_settrans(np
, target
, 0, ofs
, per
, wide
, div
, fak
);
2120 spi_period(starget
) = per
;
2121 spi_offset(starget
) = ofs
;
2122 spi_iu(starget
) = spi_dt(starget
) = spi_qas(starget
) = 0;
2124 if (!tp
->tgoal
.dt
&& !tp
->tgoal
.iu
&& !tp
->tgoal
.qas
) {
2125 tp
->tgoal
.period
= per
;
2126 tp
->tgoal
.offset
= ofs
;
2127 tp
->tgoal
.check_nego
= 0;
2130 spi_display_xfer_agreement(starget
);
2134 * We received a PPR.
2135 * Let everything be aware of the changes.
2138 sym_setpprot(struct sym_hcb
*np
, int target
, u_char opts
, u_char ofs
,
2139 u_char per
, u_char wide
, u_char div
, u_char fak
)
2141 struct sym_tcb
*tp
= &np
->target
[target
];
2142 struct scsi_target
*starget
= tp
->starget
;
2144 sym_settrans(np
, target
, opts
, ofs
, per
, wide
, div
, fak
);
2146 spi_width(starget
) = tp
->tgoal
.width
= wide
;
2147 spi_period(starget
) = tp
->tgoal
.period
= per
;
2148 spi_offset(starget
) = tp
->tgoal
.offset
= ofs
;
2149 spi_iu(starget
) = tp
->tgoal
.iu
= !!(opts
& PPR_OPT_IU
);
2150 spi_dt(starget
) = tp
->tgoal
.dt
= !!(opts
& PPR_OPT_DT
);
2151 spi_qas(starget
) = tp
->tgoal
.qas
= !!(opts
& PPR_OPT_QAS
);
2152 tp
->tgoal
.check_nego
= 0;
2154 spi_display_xfer_agreement(starget
);
2158 * generic recovery from scsi interrupt
2160 * The doc says that when the chip gets an SCSI interrupt,
2161 * it tries to stop in an orderly fashion, by completing
2162 * an instruction fetch that had started or by flushing
2163 * the DMA fifo for a write to memory that was executing.
2164 * Such a fashion is not enough to know if the instruction
2165 * that was just before the current DSP value has been
2168 * There are some small SCRIPTS sections that deal with
2169 * the start queue and the done queue that may break any
2170 * assomption from the C code if we are interrupted
2171 * inside, so we reset if this happens. Btw, since these
2172 * SCRIPTS sections are executed while the SCRIPTS hasn't
2173 * started SCSI operations, it is very unlikely to happen.
2175 * All the driver data structures are supposed to be
2176 * allocated from the same 4 GB memory window, so there
2177 * is a 1 to 1 relationship between DSA and driver data
2178 * structures. Since we are careful :) to invalidate the
2179 * DSA when we complete a command or when the SCRIPTS
2180 * pushes a DSA into a queue, we can trust it when it
2183 static void sym_recover_scsi_int (struct sym_hcb
*np
, u_char hsts
)
2185 u32 dsp
= INL(np
, nc_dsp
);
2186 u32 dsa
= INL(np
, nc_dsa
);
2187 struct sym_ccb
*cp
= sym_ccb_from_dsa(np
, dsa
);
2190 * If we haven't been interrupted inside the SCRIPTS
2191 * critical pathes, we can safely restart the SCRIPTS
2192 * and trust the DSA value if it matches a CCB.
2194 if ((!(dsp
> SCRIPTA_BA(np
, getjob_begin
) &&
2195 dsp
< SCRIPTA_BA(np
, getjob_end
) + 1)) &&
2196 (!(dsp
> SCRIPTA_BA(np
, ungetjob
) &&
2197 dsp
< SCRIPTA_BA(np
, reselect
) + 1)) &&
2198 (!(dsp
> SCRIPTB_BA(np
, sel_for_abort
) &&
2199 dsp
< SCRIPTB_BA(np
, sel_for_abort_1
) + 1)) &&
2200 (!(dsp
> SCRIPTA_BA(np
, done
) &&
2201 dsp
< SCRIPTA_BA(np
, done_end
) + 1))) {
2202 OUTB(np
, nc_ctest3
, np
->rv_ctest3
| CLF
); /* clear dma fifo */
2203 OUTB(np
, nc_stest3
, TE
|CSF
); /* clear scsi fifo */
2205 * If we have a CCB, let the SCRIPTS call us back for
2206 * the handling of the error with SCRATCHA filled with
2207 * STARTPOS. This way, we will be able to freeze the
2208 * device queue and requeue awaiting IOs.
2211 cp
->host_status
= hsts
;
2212 OUTL_DSP(np
, SCRIPTA_BA(np
, complete_error
));
2215 * Otherwise just restart the SCRIPTS.
2218 OUTL(np
, nc_dsa
, 0xffffff);
2219 OUTL_DSP(np
, SCRIPTA_BA(np
, start
));
2228 sym_start_reset(np
);
2232 * chip exception handler for selection timeout
2234 static void sym_int_sto (struct sym_hcb
*np
)
2236 u32 dsp
= INL(np
, nc_dsp
);
2238 if (DEBUG_FLAGS
& DEBUG_TINY
) printf ("T");
2240 if (dsp
== SCRIPTA_BA(np
, wf_sel_done
) + 8)
2241 sym_recover_scsi_int(np
, HS_SEL_TIMEOUT
);
2243 sym_start_reset(np
);
2247 * chip exception handler for unexpected disconnect
2249 static void sym_int_udc (struct sym_hcb
*np
)
2251 printf ("%s: unexpected disconnect\n", sym_name(np
));
2252 sym_recover_scsi_int(np
, HS_UNEXPECTED
);
2256 * chip exception handler for SCSI bus mode change
2258 * spi2-r12 11.2.3 says a transceiver mode change must
2259 * generate a reset event and a device that detects a reset
2260 * event shall initiate a hard reset. It says also that a
2261 * device that detects a mode change shall set data transfer
2262 * mode to eight bit asynchronous, etc...
2263 * So, just reinitializing all except chip should be enough.
2265 static void sym_int_sbmc (struct sym_hcb
*np
)
2267 u_char scsi_mode
= INB(np
, nc_stest4
) & SMODE
;
2272 printf("%s: SCSI BUS mode change from %s to %s.\n", sym_name(np
),
2273 sym_scsi_bus_mode(np
->scsi_mode
), sym_scsi_bus_mode(scsi_mode
));
2276 * Should suspend command processing for a few seconds and
2277 * reinitialize all except the chip.
2279 sym_start_up (np
, 2);
2283 * chip exception handler for SCSI parity error.
2285 * When the chip detects a SCSI parity error and is
2286 * currently executing a (CH)MOV instruction, it does
2287 * not interrupt immediately, but tries to finish the
2288 * transfer of the current scatter entry before
2289 * interrupting. The following situations may occur:
2291 * - The complete scatter entry has been transferred
2292 * without the device having changed phase.
2293 * The chip will then interrupt with the DSP pointing
2294 * to the instruction that follows the MOV.
2296 * - A phase mismatch occurs before the MOV finished
2297 * and phase errors are to be handled by the C code.
2298 * The chip will then interrupt with both PAR and MA
2301 * - A phase mismatch occurs before the MOV finished and
2302 * phase errors are to be handled by SCRIPTS.
2303 * The chip will load the DSP with the phase mismatch
2304 * JUMP address and interrupt the host processor.
2306 static void sym_int_par (struct sym_hcb
*np
, u_short sist
)
2308 u_char hsts
= INB(np
, HS_PRT
);
2309 u32 dsp
= INL(np
, nc_dsp
);
2310 u32 dbc
= INL(np
, nc_dbc
);
2311 u32 dsa
= INL(np
, nc_dsa
);
2312 u_char sbcl
= INB(np
, nc_sbcl
);
2313 u_char cmd
= dbc
>> 24;
2314 int phase
= cmd
& 7;
2315 struct sym_ccb
*cp
= sym_ccb_from_dsa(np
, dsa
);
2317 printf("%s: SCSI parity error detected: SCR1=%d DBC=%x SBCL=%x\n",
2318 sym_name(np
), hsts
, dbc
, sbcl
);
2321 * Check that the chip is connected to the SCSI BUS.
2323 if (!(INB(np
, nc_scntl1
) & ISCON
)) {
2324 sym_recover_scsi_int(np
, HS_UNEXPECTED
);
2329 * If the nexus is not clearly identified, reset the bus.
2330 * We will try to do better later.
2336 * Check instruction was a MOV, direction was INPUT and
2339 if ((cmd
& 0xc0) || !(phase
& 1) || !(sbcl
& 0x8))
2343 * Keep track of the parity error.
2345 OUTONB(np
, HF_PRT
, HF_EXT_ERR
);
2346 cp
->xerr_status
|= XE_PARITY_ERR
;
2349 * Prepare the message to send to the device.
2351 np
->msgout
[0] = (phase
== 7) ? M_PARITY
: M_ID_ERROR
;
2354 * If the old phase was DATA IN phase, we have to deal with
2355 * the 3 situations described above.
2356 * For other input phases (MSG IN and STATUS), the device
2357 * must resend the whole thing that failed parity checking
2358 * or signal error. So, jumping to dispatcher should be OK.
2360 if (phase
== 1 || phase
== 5) {
2361 /* Phase mismatch handled by SCRIPTS */
2362 if (dsp
== SCRIPTB_BA(np
, pm_handle
))
2364 /* Phase mismatch handled by the C code */
2367 /* No phase mismatch occurred */
2369 sym_set_script_dp (np
, cp
, dsp
);
2370 OUTL_DSP(np
, SCRIPTA_BA(np
, dispatch
));
2373 else if (phase
== 7) /* We definitely cannot handle parity errors */
2374 #if 1 /* in message-in phase due to the relection */
2375 goto reset_all
; /* path and various message anticipations. */
2377 OUTL_DSP(np
, SCRIPTA_BA(np
, clrack
));
2380 OUTL_DSP(np
, SCRIPTA_BA(np
, dispatch
));
2384 sym_start_reset(np
);
2389 * chip exception handler for phase errors.
2391 * We have to construct a new transfer descriptor,
2392 * to transfer the rest of the current block.
2394 static void sym_int_ma (struct sym_hcb
*np
)
2407 u_char hflags
, hflags0
;
2411 dsp
= INL(np
, nc_dsp
);
2412 dbc
= INL(np
, nc_dbc
);
2413 dsa
= INL(np
, nc_dsa
);
2416 rest
= dbc
& 0xffffff;
2420 * locate matching cp if any.
2422 cp
= sym_ccb_from_dsa(np
, dsa
);
2425 * Donnot take into account dma fifo and various buffers in
2426 * INPUT phase since the chip flushes everything before
2427 * raising the MA interrupt for interrupted INPUT phases.
2428 * For DATA IN phase, we will check for the SWIDE later.
2430 if ((cmd
& 7) != 1 && (cmd
& 7) != 5) {
2433 if (np
->features
& FE_DFBC
)
2434 delta
= INW(np
, nc_dfbc
);
2439 * Read DFIFO, CTEST[4-6] using 1 PCI bus ownership.
2441 dfifo
= INL(np
, nc_dfifo
);
2444 * Calculate remaining bytes in DMA fifo.
2445 * (CTEST5 = dfifo >> 16)
2447 if (dfifo
& (DFS
<< 16))
2448 delta
= ((((dfifo
>> 8) & 0x300) |
2449 (dfifo
& 0xff)) - rest
) & 0x3ff;
2451 delta
= ((dfifo
& 0xff) - rest
) & 0x7f;
2455 * The data in the dma fifo has not been transfered to
2456 * the target -> add the amount to the rest
2457 * and clear the data.
2458 * Check the sstat2 register in case of wide transfer.
2461 ss0
= INB(np
, nc_sstat0
);
2462 if (ss0
& OLF
) rest
++;
2463 if (!(np
->features
& FE_C10
))
2464 if (ss0
& ORF
) rest
++;
2465 if (cp
&& (cp
->phys
.select
.sel_scntl3
& EWS
)) {
2466 ss2
= INB(np
, nc_sstat2
);
2467 if (ss2
& OLF1
) rest
++;
2468 if (!(np
->features
& FE_C10
))
2469 if (ss2
& ORF1
) rest
++;
2475 OUTB(np
, nc_ctest3
, np
->rv_ctest3
| CLF
); /* dma fifo */
2476 OUTB(np
, nc_stest3
, TE
|CSF
); /* scsi fifo */
2480 * log the information
2482 if (DEBUG_FLAGS
& (DEBUG_TINY
|DEBUG_PHASE
))
2483 printf ("P%x%x RL=%d D=%d ", cmd
&7, INB(np
, nc_sbcl
)&7,
2484 (unsigned) rest
, (unsigned) delta
);
2487 * try to find the interrupted script command,
2488 * and the address at which to continue.
2492 if (dsp
> np
->scripta_ba
&&
2493 dsp
<= np
->scripta_ba
+ np
->scripta_sz
) {
2494 vdsp
= (u32
*)((char*)np
->scripta0
+ (dsp
-np
->scripta_ba
-8));
2497 else if (dsp
> np
->scriptb_ba
&&
2498 dsp
<= np
->scriptb_ba
+ np
->scriptb_sz
) {
2499 vdsp
= (u32
*)((char*)np
->scriptb0
+ (dsp
-np
->scriptb_ba
-8));
2504 * log the information
2506 if (DEBUG_FLAGS
& DEBUG_PHASE
) {
2507 printf ("\nCP=%p DSP=%x NXT=%x VDSP=%p CMD=%x ",
2508 cp
, (unsigned)dsp
, (unsigned)nxtdsp
, vdsp
, cmd
);
2512 printf ("%s: interrupted SCRIPT address not found.\n",
2518 printf ("%s: SCSI phase error fixup: CCB already dequeued.\n",
2524 * get old startaddress and old length.
2526 oadr
= scr_to_cpu(vdsp
[1]);
2528 if (cmd
& 0x10) { /* Table indirect */
2529 tblp
= (u32
*) ((char*) &cp
->phys
+ oadr
);
2530 olen
= scr_to_cpu(tblp
[0]);
2531 oadr
= scr_to_cpu(tblp
[1]);
2534 olen
= scr_to_cpu(vdsp
[0]) & 0xffffff;
2537 if (DEBUG_FLAGS
& DEBUG_PHASE
) {
2538 printf ("OCMD=%x\nTBLP=%p OLEN=%x OADR=%x\n",
2539 (unsigned) (scr_to_cpu(vdsp
[0]) >> 24),
2546 * check cmd against assumed interrupted script command.
2547 * If dt data phase, the MOVE instruction hasn't bit 4 of
2550 if (((cmd
& 2) ? cmd
: (cmd
& ~4)) != (scr_to_cpu(vdsp
[0]) >> 24)) {
2551 sym_print_addr(cp
->cmd
,
2552 "internal error: cmd=%02x != %02x=(vdsp[0] >> 24)\n",
2553 cmd
, scr_to_cpu(vdsp
[0]) >> 24);
2559 * if old phase not dataphase, leave here.
2562 sym_print_addr(cp
->cmd
,
2563 "phase change %x-%x %d@%08x resid=%d.\n",
2564 cmd
&7, INB(np
, nc_sbcl
)&7, (unsigned)olen
,
2565 (unsigned)oadr
, (unsigned)rest
);
2566 goto unexpected_phase
;
2570 * Choose the correct PM save area.
2572 * Look at the PM_SAVE SCRIPT if you want to understand
2573 * this stuff. The equivalent code is implemented in
2574 * SCRIPTS for the 895A, 896 and 1010 that are able to
2575 * handle PM from the SCRIPTS processor.
2577 hflags0
= INB(np
, HF_PRT
);
2580 if (hflags
& (HF_IN_PM0
| HF_IN_PM1
| HF_DP_SAVED
)) {
2581 if (hflags
& HF_IN_PM0
)
2582 nxtdsp
= scr_to_cpu(cp
->phys
.pm0
.ret
);
2583 else if (hflags
& HF_IN_PM1
)
2584 nxtdsp
= scr_to_cpu(cp
->phys
.pm1
.ret
);
2586 if (hflags
& HF_DP_SAVED
)
2587 hflags
^= HF_ACT_PM
;
2590 if (!(hflags
& HF_ACT_PM
)) {
2592 newcmd
= SCRIPTA_BA(np
, pm0_data
);
2596 newcmd
= SCRIPTA_BA(np
, pm1_data
);
2599 hflags
&= ~(HF_IN_PM0
| HF_IN_PM1
| HF_DP_SAVED
);
2600 if (hflags
!= hflags0
)
2601 OUTB(np
, HF_PRT
, hflags
);
2604 * fillin the phase mismatch context
2606 pm
->sg
.addr
= cpu_to_scr(oadr
+ olen
- rest
);
2607 pm
->sg
.size
= cpu_to_scr(rest
);
2608 pm
->ret
= cpu_to_scr(nxtdsp
);
2611 * If we have a SWIDE,
2612 * - prepare the address to write the SWIDE from SCRIPTS,
2613 * - compute the SCRIPTS address to restart from,
2614 * - move current data pointer context by one byte.
2616 nxtdsp
= SCRIPTA_BA(np
, dispatch
);
2617 if ((cmd
& 7) == 1 && cp
&& (cp
->phys
.select
.sel_scntl3
& EWS
) &&
2618 (INB(np
, nc_scntl2
) & WSR
)) {
2622 * Set up the table indirect for the MOVE
2623 * of the residual byte and adjust the data
2626 tmp
= scr_to_cpu(pm
->sg
.addr
);
2627 cp
->phys
.wresid
.addr
= cpu_to_scr(tmp
);
2628 pm
->sg
.addr
= cpu_to_scr(tmp
+ 1);
2629 tmp
= scr_to_cpu(pm
->sg
.size
);
2630 cp
->phys
.wresid
.size
= cpu_to_scr((tmp
&0xff000000) | 1);
2631 pm
->sg
.size
= cpu_to_scr(tmp
- 1);
2634 * If only the residual byte is to be moved,
2635 * no PM context is needed.
2637 if ((tmp
&0xffffff) == 1)
2641 * Prepare the address of SCRIPTS that will
2642 * move the residual byte to memory.
2644 nxtdsp
= SCRIPTB_BA(np
, wsr_ma_helper
);
2647 if (DEBUG_FLAGS
& DEBUG_PHASE
) {
2648 sym_print_addr(cp
->cmd
, "PM %x %x %x / %x %x %x.\n",
2649 hflags0
, hflags
, newcmd
,
2650 (unsigned)scr_to_cpu(pm
->sg
.addr
),
2651 (unsigned)scr_to_cpu(pm
->sg
.size
),
2652 (unsigned)scr_to_cpu(pm
->ret
));
2656 * Restart the SCRIPTS processor.
2658 sym_set_script_dp (np
, cp
, newcmd
);
2659 OUTL_DSP(np
, nxtdsp
);
2663 * Unexpected phase changes that occurs when the current phase
2664 * is not a DATA IN or DATA OUT phase are due to error conditions.
2665 * Such event may only happen when the SCRIPTS is using a
2666 * multibyte SCSI MOVE.
2668 * Phase change Some possible cause
2670 * COMMAND --> MSG IN SCSI parity error detected by target.
2671 * COMMAND --> STATUS Bad command or refused by target.
2672 * MSG OUT --> MSG IN Message rejected by target.
2673 * MSG OUT --> COMMAND Bogus target that discards extended
2674 * negotiation messages.
2676 * The code below does not care of the new phase and so
2677 * trusts the target. Why to annoy it ?
2678 * If the interrupted phase is COMMAND phase, we restart at
2680 * If a target does not get all the messages after selection,
2681 * the code assumes blindly that the target discards extended
2682 * messages and clears the negotiation status.
2683 * If the target does not want all our response to negotiation,
2684 * we force a SIR_NEGO_PROTO interrupt (it is a hack that avoids
2685 * bloat for such a should_not_happen situation).
2686 * In all other situation, we reset the BUS.
2687 * Are these assumptions reasonnable ? (Wait and see ...)
2694 case 2: /* COMMAND phase */
2695 nxtdsp
= SCRIPTA_BA(np
, dispatch
);
2698 case 3: /* STATUS phase */
2699 nxtdsp
= SCRIPTA_BA(np
, dispatch
);
2702 case 6: /* MSG OUT phase */
2704 * If the device may want to use untagged when we want
2705 * tagged, we prepare an IDENTIFY without disc. granted,
2706 * since we will not be able to handle reselect.
2707 * Otherwise, we just don't care.
2709 if (dsp
== SCRIPTA_BA(np
, send_ident
)) {
2710 if (cp
->tag
!= NO_TAG
&& olen
- rest
<= 3) {
2711 cp
->host_status
= HS_BUSY
;
2712 np
->msgout
[0] = IDENTIFY(0, cp
->lun
);
2713 nxtdsp
= SCRIPTB_BA(np
, ident_break_atn
);
2716 nxtdsp
= SCRIPTB_BA(np
, ident_break
);
2718 else if (dsp
== SCRIPTB_BA(np
, send_wdtr
) ||
2719 dsp
== SCRIPTB_BA(np
, send_sdtr
) ||
2720 dsp
== SCRIPTB_BA(np
, send_ppr
)) {
2721 nxtdsp
= SCRIPTB_BA(np
, nego_bad_phase
);
2722 if (dsp
== SCRIPTB_BA(np
, send_ppr
)) {
2723 struct scsi_device
*dev
= cp
->cmd
->device
;
2729 case 7: /* MSG IN phase */
2730 nxtdsp
= SCRIPTA_BA(np
, clrack
);
2736 OUTL_DSP(np
, nxtdsp
);
2741 sym_start_reset(np
);
2745 * chip interrupt handler
2747 * In normal situations, interrupt conditions occur one at
2748 * a time. But when something bad happens on the SCSI BUS,
2749 * the chip may raise several interrupt flags before
2750 * stopping and interrupting the CPU. The additionnal
2751 * interrupt flags are stacked in some extra registers
2752 * after the SIP and/or DIP flag has been raised in the
2753 * ISTAT. After the CPU has read the interrupt condition
2754 * flag from SIST or DSTAT, the chip unstacks the other
2755 * interrupt flags and sets the corresponding bits in
2756 * SIST or DSTAT. Since the chip starts stacking once the
2757 * SIP or DIP flag is set, there is a small window of time
2758 * where the stacking does not occur.
2760 * Typically, multiple interrupt conditions may happen in
2761 * the following situations:
2763 * - SCSI parity error + Phase mismatch (PAR|MA)
2764 * When an parity error is detected in input phase
2765 * and the device switches to msg-in phase inside a
2767 * - SCSI parity error + Unexpected disconnect (PAR|UDC)
2768 * When a stupid device does not want to handle the
2769 * recovery of an SCSI parity error.
2770 * - Some combinations of STO, PAR, UDC, ...
2771 * When using non compliant SCSI stuff, when user is
2772 * doing non compliant hot tampering on the BUS, when
2773 * something really bad happens to a device, etc ...
2775 * The heuristic suggested by SYMBIOS to handle
2776 * multiple interrupts is to try unstacking all
2777 * interrupts conditions and to handle them on some
2778 * priority based on error severity.
2779 * This will work when the unstacking has been
2780 * successful, but we cannot be 100 % sure of that,
2781 * since the CPU may have been faster to unstack than
2782 * the chip is able to stack. Hmmm ... But it seems that
2783 * such a situation is very unlikely to happen.
2785 * If this happen, for example STO caught by the CPU
2786 * then UDC happenning before the CPU have restarted
2787 * the SCRIPTS, the driver may wrongly complete the
2788 * same command on UDC, since the SCRIPTS didn't restart
2789 * and the DSA still points to the same command.
2790 * We avoid this situation by setting the DSA to an
2791 * invalid value when the CCB is completed and before
2792 * restarting the SCRIPTS.
2794 * Another issue is that we need some section of our
2795 * recovery procedures to be somehow uninterruptible but
2796 * the SCRIPTS processor does not provides such a
2797 * feature. For this reason, we handle recovery preferently
2798 * from the C code and check against some SCRIPTS critical
2799 * sections from the C code.
2801 * Hopefully, the interrupt handling of the driver is now
2802 * able to resist to weird BUS error conditions, but donnot
2803 * ask me for any guarantee that it will never fail. :-)
2804 * Use at your own decision and risk.
2807 void sym_interrupt (struct sym_hcb
*np
)
2809 u_char istat
, istatc
;
2814 * interrupt on the fly ?
2815 * (SCRIPTS may still be running)
2817 * A `dummy read' is needed to ensure that the
2818 * clear of the INTF flag reaches the device
2819 * and that posted writes are flushed to memory
2820 * before the scanning of the DONE queue.
2821 * Note that SCRIPTS also (dummy) read to memory
2822 * prior to deliver the INTF interrupt condition.
2824 istat
= INB(np
, nc_istat
);
2826 OUTB(np
, nc_istat
, (istat
& SIGP
) | INTF
| np
->istat_sem
);
2827 istat
= INB(np
, nc_istat
); /* DUMMY READ */
2828 if (DEBUG_FLAGS
& DEBUG_TINY
) printf ("F ");
2829 sym_wakeup_done(np
);
2832 if (!(istat
& (SIP
|DIP
)))
2835 #if 0 /* We should never get this one */
2837 OUTB(np
, nc_istat
, CABRT
);
2841 * PAR and MA interrupts may occur at the same time,
2842 * and we need to know of both in order to handle
2843 * this situation properly. We try to unstack SCSI
2844 * interrupts for that reason. BTW, I dislike a LOT
2845 * such a loop inside the interrupt routine.
2846 * Even if DMA interrupt stacking is very unlikely to
2847 * happen, we also try unstacking these ones, since
2848 * this has no performance impact.
2855 sist
|= INW(np
, nc_sist
);
2857 dstat
|= INB(np
, nc_dstat
);
2858 istatc
= INB(np
, nc_istat
);
2860 } while (istatc
& (SIP
|DIP
));
2862 if (DEBUG_FLAGS
& DEBUG_TINY
)
2863 printf ("<%d|%x:%x|%x:%x>",
2864 (int)INB(np
, nc_scr0
),
2866 (unsigned)INL(np
, nc_dsp
),
2867 (unsigned)INL(np
, nc_dbc
));
2869 * On paper, a memory read barrier may be needed here to
2870 * prevent out of order LOADs by the CPU from having
2871 * prefetched stale data prior to DMA having occurred.
2872 * And since we are paranoid ... :)
2874 MEMORY_READ_BARRIER();
2877 * First, interrupts we want to service cleanly.
2879 * Phase mismatch (MA) is the most frequent interrupt
2880 * for chip earlier than the 896 and so we have to service
2881 * it as quickly as possible.
2882 * A SCSI parity error (PAR) may be combined with a phase
2883 * mismatch condition (MA).
2884 * Programmed interrupts (SIR) are used to call the C code
2886 * The single step interrupt (SSI) is not used in this
2889 if (!(sist
& (STO
|GEN
|HTH
|SGE
|UDC
|SBMC
|RST
)) &&
2890 !(dstat
& (MDPE
|BF
|ABRT
|IID
))) {
2891 if (sist
& PAR
) sym_int_par (np
, sist
);
2892 else if (sist
& MA
) sym_int_ma (np
);
2893 else if (dstat
& SIR
) sym_int_sir (np
);
2894 else if (dstat
& SSI
) OUTONB_STD();
2895 else goto unknown_int
;
2900 * Now, interrupts that donnot happen in normal
2901 * situations and that we may need to recover from.
2903 * On SCSI RESET (RST), we reset everything.
2904 * On SCSI BUS MODE CHANGE (SBMC), we complete all
2905 * active CCBs with RESET status, prepare all devices
2906 * for negotiating again and restart the SCRIPTS.
2907 * On STO and UDC, we complete the CCB with the corres-
2908 * ponding status and restart the SCRIPTS.
2911 printf("%s: SCSI BUS reset detected.\n", sym_name(np
));
2912 sym_start_up (np
, 1);
2916 OUTB(np
, nc_ctest3
, np
->rv_ctest3
| CLF
); /* clear dma fifo */
2917 OUTB(np
, nc_stest3
, TE
|CSF
); /* clear scsi fifo */
2919 if (!(sist
& (GEN
|HTH
|SGE
)) &&
2920 !(dstat
& (MDPE
|BF
|ABRT
|IID
))) {
2921 if (sist
& SBMC
) sym_int_sbmc (np
);
2922 else if (sist
& STO
) sym_int_sto (np
);
2923 else if (sist
& UDC
) sym_int_udc (np
);
2924 else goto unknown_int
;
2929 * Now, interrupts we are not able to recover cleanly.
2931 * Log message for hard errors.
2935 sym_log_hard_error(np
, sist
, dstat
);
2937 if ((sist
& (GEN
|HTH
|SGE
)) ||
2938 (dstat
& (MDPE
|BF
|ABRT
|IID
))) {
2939 sym_start_reset(np
);
2945 * We just miss the cause of the interrupt. :(
2946 * Print a message. The timeout will do the real work.
2948 printf( "%s: unknown interrupt(s) ignored, "
2949 "ISTAT=0x%x DSTAT=0x%x SIST=0x%x\n",
2950 sym_name(np
), istat
, dstat
, sist
);
2954 * Dequeue from the START queue all CCBs that match
2955 * a given target/lun/task condition (-1 means all),
2956 * and move them from the BUSY queue to the COMP queue
2957 * with DID_SOFT_ERROR status condition.
2958 * This function is used during error handling/recovery.
2959 * It is called with SCRIPTS not running.
2962 sym_dequeue_from_squeue(struct sym_hcb
*np
, int i
, int target
, int lun
, int task
)
2968 * Make sure the starting index is within range.
2970 assert((i
>= 0) && (i
< 2*MAX_QUEUE
));
2973 * Walk until end of START queue and dequeue every job
2974 * that matches the target/lun/task condition.
2977 while (i
!= np
->squeueput
) {
2978 cp
= sym_ccb_from_dsa(np
, scr_to_cpu(np
->squeue
[i
]));
2980 #ifdef SYM_CONF_IARB_SUPPORT
2981 /* Forget hints for IARB, they may be no longer relevant */
2982 cp
->host_flags
&= ~HF_HINT_IARB
;
2984 if ((target
== -1 || cp
->target
== target
) &&
2985 (lun
== -1 || cp
->lun
== lun
) &&
2986 (task
== -1 || cp
->tag
== task
)) {
2987 sym_set_cam_status(cp
->cmd
, DID_SOFT_ERROR
);
2988 sym_remque(&cp
->link_ccbq
);
2989 sym_insque_tail(&cp
->link_ccbq
, &np
->comp_ccbq
);
2993 np
->squeue
[j
] = np
->squeue
[i
];
2994 if ((j
+= 2) >= MAX_QUEUE
*2) j
= 0;
2996 if ((i
+= 2) >= MAX_QUEUE
*2) i
= 0;
2998 if (i
!= j
) /* Copy back the idle task if needed */
2999 np
->squeue
[j
] = np
->squeue
[i
];
3000 np
->squeueput
= j
; /* Update our current start queue pointer */
3006 * chip handler for bad SCSI status condition
3008 * In case of bad SCSI status, we unqueue all the tasks
3009 * currently queued to the controller but not yet started
3010 * and then restart the SCRIPTS processor immediately.
3012 * QUEUE FULL and BUSY conditions are handled the same way.
3013 * Basically all the not yet started tasks are requeued in
3014 * device queue and the queue is frozen until a completion.
3016 * For CHECK CONDITION and COMMAND TERMINATED status, we use
3017 * the CCB of the failed command to prepare a REQUEST SENSE
3018 * SCSI command and queue it to the controller queue.
3020 * SCRATCHA is assumed to have been loaded with STARTPOS
3021 * before the SCRIPTS called the C code.
3023 static void sym_sir_bad_scsi_status(struct sym_hcb
*np
, int num
, struct sym_ccb
*cp
)
3026 u_char s_status
= cp
->ssss_status
;
3027 u_char h_flags
= cp
->host_flags
;
3032 * Compute the index of the next job to start from SCRIPTS.
3034 i
= (INL(np
, nc_scratcha
) - np
->squeue_ba
) / 4;
3037 * The last CCB queued used for IARB hint may be
3038 * no longer relevant. Forget it.
3040 #ifdef SYM_CONF_IARB_SUPPORT
3046 * Now deal with the SCSI status.
3051 if (sym_verbose
>= 2) {
3052 sym_print_addr(cp
->cmd
, "%s\n",
3053 s_status
== S_BUSY
? "BUSY" : "QUEUE FULL\n");
3055 default: /* S_INT, S_INT_COND_MET, S_CONFLICT */
3056 sym_complete_error (np
, cp
);
3061 * If we get an SCSI error when requesting sense, give up.
3063 if (h_flags
& HF_SENSE
) {
3064 sym_complete_error (np
, cp
);
3069 * Dequeue all queued CCBs for that device not yet started,
3070 * and restart the SCRIPTS processor immediately.
3072 sym_dequeue_from_squeue(np
, i
, cp
->target
, cp
->lun
, -1);
3073 OUTL_DSP(np
, SCRIPTA_BA(np
, start
));
3076 * Save some info of the actual IO.
3077 * Compute the data residual.
3079 cp
->sv_scsi_status
= cp
->ssss_status
;
3080 cp
->sv_xerr_status
= cp
->xerr_status
;
3081 cp
->sv_resid
= sym_compute_residual(np
, cp
);
3084 * Prepare all needed data structures for
3085 * requesting sense data.
3088 cp
->scsi_smsg2
[0] = IDENTIFY(0, cp
->lun
);
3092 * If we are currently using anything different from
3093 * async. 8 bit data transfers with that target,
3094 * start a negotiation, since the device may want
3095 * to report us a UNIT ATTENTION condition due to
3096 * a cause we currently ignore, and we donnot want
3097 * to be stuck with WIDE and/or SYNC data transfer.
3099 * cp->nego_status is filled by sym_prepare_nego().
3101 cp
->nego_status
= 0;
3102 msglen
+= sym_prepare_nego(np
, cp
, &cp
->scsi_smsg2
[msglen
]);
3104 * Message table indirect structure.
3106 cp
->phys
.smsg
.addr
= CCB_BA(cp
, scsi_smsg2
);
3107 cp
->phys
.smsg
.size
= cpu_to_scr(msglen
);
3112 cp
->phys
.cmd
.addr
= CCB_BA(cp
, sensecmd
);
3113 cp
->phys
.cmd
.size
= cpu_to_scr(6);
3116 * patch requested size into sense command
3118 cp
->sensecmd
[0] = REQUEST_SENSE
;
3119 cp
->sensecmd
[1] = 0;
3120 if (cp
->cmd
->device
->scsi_level
<= SCSI_2
&& cp
->lun
<= 7)
3121 cp
->sensecmd
[1] = cp
->lun
<< 5;
3122 cp
->sensecmd
[4] = SYM_SNS_BBUF_LEN
;
3123 cp
->data_len
= SYM_SNS_BBUF_LEN
;
3128 memset(cp
->sns_bbuf
, 0, SYM_SNS_BBUF_LEN
);
3129 cp
->phys
.sense
.addr
= CCB_BA(cp
, sns_bbuf
);
3130 cp
->phys
.sense
.size
= cpu_to_scr(SYM_SNS_BBUF_LEN
);
3133 * requeue the command.
3135 startp
= SCRIPTB_BA(np
, sdata_in
);
3137 cp
->phys
.head
.savep
= cpu_to_scr(startp
);
3138 cp
->phys
.head
.lastp
= cpu_to_scr(startp
);
3139 cp
->startp
= cpu_to_scr(startp
);
3140 cp
->goalp
= cpu_to_scr(startp
+ 16);
3142 cp
->host_xflags
= 0;
3143 cp
->host_status
= cp
->nego_status
? HS_NEGOTIATE
: HS_BUSY
;
3144 cp
->ssss_status
= S_ILLEGAL
;
3145 cp
->host_flags
= (HF_SENSE
|HF_DATA_IN
);
3146 cp
->xerr_status
= 0;
3147 cp
->extra_bytes
= 0;
3149 cp
->phys
.head
.go
.start
= cpu_to_scr(SCRIPTA_BA(np
, select
));
3152 * Requeue the command.
3154 sym_put_start_queue(np
, cp
);
3157 * Give back to upper layer everything we have dequeued.
3159 sym_flush_comp_queue(np
, 0);
3165 * After a device has accepted some management message
3166 * as BUS DEVICE RESET, ABORT TASK, etc ..., or when
3167 * a device signals a UNIT ATTENTION condition, some
3168 * tasks are thrown away by the device. We are required
3169 * to reflect that on our tasks list since the device
3170 * will never complete these tasks.
3172 * This function move from the BUSY queue to the COMP
3173 * queue all disconnected CCBs for a given target that
3174 * match the following criteria:
3175 * - lun=-1 means any logical UNIT otherwise a given one.
3176 * - task=-1 means any task, otherwise a given one.
3178 int sym_clear_tasks(struct sym_hcb
*np
, int cam_status
, int target
, int lun
, int task
)
3180 SYM_QUEHEAD qtmp
, *qp
;
3185 * Move the entire BUSY queue to our temporary queue.
3187 sym_que_init(&qtmp
);
3188 sym_que_splice(&np
->busy_ccbq
, &qtmp
);
3189 sym_que_init(&np
->busy_ccbq
);
3192 * Put all CCBs that matches our criteria into
3193 * the COMP queue and put back other ones into
3196 while ((qp
= sym_remque_head(&qtmp
)) != 0) {
3197 struct scsi_cmnd
*cmd
;
3198 cp
= sym_que_entry(qp
, struct sym_ccb
, link_ccbq
);
3200 if (cp
->host_status
!= HS_DISCONNECT
||
3201 cp
->target
!= target
||
3202 (lun
!= -1 && cp
->lun
!= lun
) ||
3204 (cp
->tag
!= NO_TAG
&& cp
->scsi_smsg
[2] != task
))) {
3205 sym_insque_tail(&cp
->link_ccbq
, &np
->busy_ccbq
);
3208 sym_insque_tail(&cp
->link_ccbq
, &np
->comp_ccbq
);
3210 /* Preserve the software timeout condition */
3211 if (sym_get_cam_status(cmd
) != DID_TIME_OUT
)
3212 sym_set_cam_status(cmd
, cam_status
);
3215 printf("XXXX TASK @%p CLEARED\n", cp
);
3222 * chip handler for TASKS recovery
3224 * We cannot safely abort a command, while the SCRIPTS
3225 * processor is running, since we just would be in race
3228 * As long as we have tasks to abort, we keep the SEM
3229 * bit set in the ISTAT. When this bit is set, the
3230 * SCRIPTS processor interrupts (SIR_SCRIPT_STOPPED)
3231 * each time it enters the scheduler.
3233 * If we have to reset a target, clear tasks of a unit,
3234 * or to perform the abort of a disconnected job, we
3235 * restart the SCRIPTS for selecting the target. Once
3236 * selected, the SCRIPTS interrupts (SIR_TARGET_SELECTED).
3237 * If it loses arbitration, the SCRIPTS will interrupt again
3238 * the next time it will enter its scheduler, and so on ...
3240 * On SIR_TARGET_SELECTED, we scan for the more
3241 * appropriate thing to do:
3243 * - If nothing, we just sent a M_ABORT message to the
3244 * target to get rid of the useless SCSI bus ownership.
3245 * According to the specs, no tasks shall be affected.
3246 * - If the target is to be reset, we send it a M_RESET
3248 * - If a logical UNIT is to be cleared , we send the
3249 * IDENTIFY(lun) + M_ABORT.
3250 * - If an untagged task is to be aborted, we send the
3251 * IDENTIFY(lun) + M_ABORT.
3252 * - If a tagged task is to be aborted, we send the
3253 * IDENTIFY(lun) + task attributes + M_ABORT_TAG.
3255 * Once our 'kiss of death' :) message has been accepted
3256 * by the target, the SCRIPTS interrupts again
3257 * (SIR_ABORT_SENT). On this interrupt, we complete
3258 * all the CCBs that should have been aborted by the
3259 * target according to our message.
3261 static void sym_sir_task_recovery(struct sym_hcb
*np
, int num
)
3265 struct sym_tcb
*tp
= NULL
; /* gcc isn't quite smart enough yet */
3266 struct scsi_target
*starget
;
3267 int target
=-1, lun
=-1, task
;
3272 * The SCRIPTS processor stopped before starting
3273 * the next command in order to allow us to perform
3274 * some task recovery.
3276 case SIR_SCRIPT_STOPPED
:
3278 * Do we have any target to reset or unit to clear ?
3280 for (i
= 0 ; i
< SYM_CONF_MAX_TARGET
; i
++) {
3281 tp
= &np
->target
[i
];
3283 (tp
->lun0p
&& tp
->lun0p
->to_clear
)) {
3289 for (k
= 1 ; k
< SYM_CONF_MAX_LUN
; k
++) {
3290 if (tp
->lunmp
[k
] && tp
->lunmp
[k
]->to_clear
) {
3300 * If not, walk the busy queue for any
3301 * disconnected CCB to be aborted.
3304 FOR_EACH_QUEUED_ELEMENT(&np
->busy_ccbq
, qp
) {
3305 cp
= sym_que_entry(qp
,struct sym_ccb
,link_ccbq
);
3306 if (cp
->host_status
!= HS_DISCONNECT
)
3309 target
= cp
->target
;
3316 * If some target is to be selected,
3317 * prepare and start the selection.
3320 tp
= &np
->target
[target
];
3321 np
->abrt_sel
.sel_id
= target
;
3322 np
->abrt_sel
.sel_scntl3
= tp
->head
.wval
;
3323 np
->abrt_sel
.sel_sxfer
= tp
->head
.sval
;
3324 OUTL(np
, nc_dsa
, np
->hcb_ba
);
3325 OUTL_DSP(np
, SCRIPTB_BA(np
, sel_for_abort
));
3330 * Now look for a CCB to abort that haven't started yet.
3331 * Btw, the SCRIPTS processor is still stopped, so
3332 * we are not in race.
3336 FOR_EACH_QUEUED_ELEMENT(&np
->busy_ccbq
, qp
) {
3337 cp
= sym_que_entry(qp
, struct sym_ccb
, link_ccbq
);
3338 if (cp
->host_status
!= HS_BUSY
&&
3339 cp
->host_status
!= HS_NEGOTIATE
)
3343 #ifdef SYM_CONF_IARB_SUPPORT
3345 * If we are using IMMEDIATE ARBITRATION, we donnot
3346 * want to cancel the last queued CCB, since the
3347 * SCRIPTS may have anticipated the selection.
3349 if (cp
== np
->last_cp
) {
3354 i
= 1; /* Means we have found some */
3359 * We are done, so we donnot need
3360 * to synchronize with the SCRIPTS anylonger.
3361 * Remove the SEM flag from the ISTAT.
3364 OUTB(np
, nc_istat
, SIGP
);
3368 * Compute index of next position in the start
3369 * queue the SCRIPTS intends to start and dequeue
3370 * all CCBs for that device that haven't been started.
3372 i
= (INL(np
, nc_scratcha
) - np
->squeue_ba
) / 4;
3373 i
= sym_dequeue_from_squeue(np
, i
, cp
->target
, cp
->lun
, -1);
3376 * Make sure at least our IO to abort has been dequeued.
3378 #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
3379 assert(i
&& sym_get_cam_status(cp
->cmd
) == DID_SOFT_ERROR
);
3381 sym_remque(&cp
->link_ccbq
);
3382 sym_insque_tail(&cp
->link_ccbq
, &np
->comp_ccbq
);
3385 * Keep track in cam status of the reason of the abort.
3387 if (cp
->to_abort
== 2)
3388 sym_set_cam_status(cp
->cmd
, DID_TIME_OUT
);
3390 sym_set_cam_status(cp
->cmd
, DID_ABORT
);
3393 * Complete with error everything that we have dequeued.
3395 sym_flush_comp_queue(np
, 0);
3398 * The SCRIPTS processor has selected a target
3399 * we may have some manual recovery to perform for.
3401 case SIR_TARGET_SELECTED
:
3402 target
= INB(np
, nc_sdid
) & 0xf;
3403 tp
= &np
->target
[target
];
3405 np
->abrt_tbl
.addr
= cpu_to_scr(vtobus(np
->abrt_msg
));
3408 * If the target is to be reset, prepare a
3409 * M_RESET message and clear the to_reset flag
3410 * since we donnot expect this operation to fail.
3413 np
->abrt_msg
[0] = M_RESET
;
3414 np
->abrt_tbl
.size
= 1;
3420 * Otherwise, look for some logical unit to be cleared.
3422 if (tp
->lun0p
&& tp
->lun0p
->to_clear
)
3424 else if (tp
->lunmp
) {
3425 for (k
= 1 ; k
< SYM_CONF_MAX_LUN
; k
++) {
3426 if (tp
->lunmp
[k
] && tp
->lunmp
[k
]->to_clear
) {
3434 * If a logical unit is to be cleared, prepare
3435 * an IDENTIFY(lun) + ABORT MESSAGE.
3438 struct sym_lcb
*lp
= sym_lp(tp
, lun
);
3439 lp
->to_clear
= 0; /* We don't expect to fail here */
3440 np
->abrt_msg
[0] = IDENTIFY(0, lun
);
3441 np
->abrt_msg
[1] = M_ABORT
;
3442 np
->abrt_tbl
.size
= 2;
3447 * Otherwise, look for some disconnected job to
3448 * abort for this target.
3452 FOR_EACH_QUEUED_ELEMENT(&np
->busy_ccbq
, qp
) {
3453 cp
= sym_que_entry(qp
, struct sym_ccb
, link_ccbq
);
3454 if (cp
->host_status
!= HS_DISCONNECT
)
3456 if (cp
->target
!= target
)
3460 i
= 1; /* Means we have some */
3465 * If we have none, probably since the device has
3466 * completed the command before we won abitration,
3467 * send a M_ABORT message without IDENTIFY.
3468 * According to the specs, the device must just
3469 * disconnect the BUS and not abort any task.
3472 np
->abrt_msg
[0] = M_ABORT
;
3473 np
->abrt_tbl
.size
= 1;
3478 * We have some task to abort.
3479 * Set the IDENTIFY(lun)
3481 np
->abrt_msg
[0] = IDENTIFY(0, cp
->lun
);
3484 * If we want to abort an untagged command, we
3485 * will send a IDENTIFY + M_ABORT.
3486 * Otherwise (tagged command), we will send
3487 * a IDENTITFY + task attributes + ABORT TAG.
3489 if (cp
->tag
== NO_TAG
) {
3490 np
->abrt_msg
[1] = M_ABORT
;
3491 np
->abrt_tbl
.size
= 2;
3493 np
->abrt_msg
[1] = cp
->scsi_smsg
[1];
3494 np
->abrt_msg
[2] = cp
->scsi_smsg
[2];
3495 np
->abrt_msg
[3] = M_ABORT_TAG
;
3496 np
->abrt_tbl
.size
= 4;
3499 * Keep track of software timeout condition, since the
3500 * peripheral driver may not count retries on abort
3501 * conditions not due to timeout.
3503 if (cp
->to_abort
== 2)
3504 sym_set_cam_status(cp
->cmd
, DID_TIME_OUT
);
3505 cp
->to_abort
= 0; /* We donnot expect to fail here */
3509 * The target has accepted our message and switched
3510 * to BUS FREE phase as we expected.
3512 case SIR_ABORT_SENT
:
3513 target
= INB(np
, nc_sdid
) & 0xf;
3514 tp
= &np
->target
[target
];
3515 starget
= tp
->starget
;
3518 ** If we didn't abort anything, leave here.
3520 if (np
->abrt_msg
[0] == M_ABORT
)
3524 * If we sent a M_RESET, then a hardware reset has
3525 * been performed by the target.
3526 * - Reset everything to async 8 bit
3527 * - Tell ourself to negotiate next time :-)
3528 * - Prepare to clear all disconnected CCBs for
3529 * this target from our task list (lun=task=-1)
3533 if (np
->abrt_msg
[0] == M_RESET
) {
3535 tp
->head
.wval
= np
->rv_scntl3
;
3537 spi_period(starget
) = 0;
3538 spi_offset(starget
) = 0;
3539 spi_width(starget
) = 0;
3540 spi_iu(starget
) = 0;
3541 spi_dt(starget
) = 0;
3542 spi_qas(starget
) = 0;
3543 tp
->tgoal
.check_nego
= 1;
3547 * Otherwise, check for the LUN and TASK(s)
3548 * concerned by the cancelation.
3549 * If it is not ABORT_TAG then it is CLEAR_QUEUE
3550 * or an ABORT message :-)
3553 lun
= np
->abrt_msg
[0] & 0x3f;
3554 if (np
->abrt_msg
[1] == M_ABORT_TAG
)
3555 task
= np
->abrt_msg
[2];
3559 * Complete all the CCBs the device should have
3560 * aborted due to our 'kiss of death' message.
3562 i
= (INL(np
, nc_scratcha
) - np
->squeue_ba
) / 4;
3563 sym_dequeue_from_squeue(np
, i
, target
, lun
, -1);
3564 sym_clear_tasks(np
, DID_ABORT
, target
, lun
, task
);
3565 sym_flush_comp_queue(np
, 0);
3568 * If we sent a BDR, make upper layer aware of that.
3570 if (np
->abrt_msg
[0] == M_RESET
)
3571 sym_xpt_async_sent_bdr(np
, target
);
3576 * Print to the log the message we intend to send.
3578 if (num
== SIR_TARGET_SELECTED
) {
3579 dev_info(&tp
->starget
->dev
, "control msgout:");
3580 sym_printl_hex(np
->abrt_msg
, np
->abrt_tbl
.size
);
3581 np
->abrt_tbl
.size
= cpu_to_scr(np
->abrt_tbl
.size
);
3585 * Let the SCRIPTS processor continue.
3591 * Gerard's alchemy:) that deals with with the data
3592 * pointer for both MDP and the residual calculation.
3594 * I didn't want to bloat the code by more than 200
3595 * lines for the handling of both MDP and the residual.
3596 * This has been achieved by using a data pointer
3597 * representation consisting in an index in the data
3598 * array (dp_sg) and a negative offset (dp_ofs) that
3599 * have the following meaning:
3601 * - dp_sg = SYM_CONF_MAX_SG
3602 * we are at the end of the data script.
3603 * - dp_sg < SYM_CONF_MAX_SG
3604 * dp_sg points to the next entry of the scatter array
3605 * we want to transfer.
3607 * dp_ofs represents the residual of bytes of the
3608 * previous entry scatter entry we will send first.
3610 * no residual to send first.
3612 * The function sym_evaluate_dp() accepts an arbitray
3613 * offset (basically from the MDP message) and returns
3614 * the corresponding values of dp_sg and dp_ofs.
3617 static int sym_evaluate_dp(struct sym_hcb
*np
, struct sym_ccb
*cp
, u32 scr
, int *ofs
)
3620 int dp_ofs
, dp_sg
, dp_sgmin
;
3625 * Compute the resulted data pointer in term of a script
3626 * address within some DATA script and a signed byte offset.
3630 if (dp_scr
== SCRIPTA_BA(np
, pm0_data
))
3632 else if (dp_scr
== SCRIPTA_BA(np
, pm1_data
))
3638 dp_scr
= scr_to_cpu(pm
->ret
);
3639 dp_ofs
-= scr_to_cpu(pm
->sg
.size
);
3643 * If we are auto-sensing, then we are done.
3645 if (cp
->host_flags
& HF_SENSE
) {
3651 * Deduce the index of the sg entry.
3652 * Keep track of the index of the first valid entry.
3653 * If result is dp_sg = SYM_CONF_MAX_SG, then we are at the
3656 tmp
= scr_to_cpu(sym_goalp(cp
));
3657 dp_sg
= SYM_CONF_MAX_SG
;
3659 dp_sg
-= (tmp
- 8 - (int)dp_scr
) / (2*4);
3660 dp_sgmin
= SYM_CONF_MAX_SG
- cp
->segments
;
3663 * Move to the sg entry the data pointer belongs to.
3665 * If we are inside the data area, we expect result to be:
3668 * dp_ofs = 0 and dp_sg is the index of the sg entry
3669 * the data pointer belongs to (or the end of the data)
3671 * dp_ofs < 0 and dp_sg is the index of the sg entry
3672 * the data pointer belongs to + 1.
3676 while (dp_sg
> dp_sgmin
) {
3678 tmp
= scr_to_cpu(cp
->phys
.data
[dp_sg
].size
);
3679 n
= dp_ofs
+ (tmp
& 0xffffff);
3687 else if (dp_ofs
> 0) {
3688 while (dp_sg
< SYM_CONF_MAX_SG
) {
3689 tmp
= scr_to_cpu(cp
->phys
.data
[dp_sg
].size
);
3690 dp_ofs
-= (tmp
& 0xffffff);
3698 * Make sure the data pointer is inside the data area.
3699 * If not, return some error.
3701 if (dp_sg
< dp_sgmin
|| (dp_sg
== dp_sgmin
&& dp_ofs
< 0))
3703 else if (dp_sg
> SYM_CONF_MAX_SG
||
3704 (dp_sg
== SYM_CONF_MAX_SG
&& dp_ofs
> 0))
3708 * Save the extreme pointer if needed.
3710 if (dp_sg
> cp
->ext_sg
||
3711 (dp_sg
== cp
->ext_sg
&& dp_ofs
> cp
->ext_ofs
)) {
3713 cp
->ext_ofs
= dp_ofs
;
3727 * chip handler for MODIFY DATA POINTER MESSAGE
3729 * We also call this function on IGNORE WIDE RESIDUE
3730 * messages that do not match a SWIDE full condition.
3731 * Btw, we assume in that situation that such a message
3732 * is equivalent to a MODIFY DATA POINTER (offset=-1).
3735 static void sym_modify_dp(struct sym_hcb
*np
, struct sym_tcb
*tp
, struct sym_ccb
*cp
, int ofs
)
3738 u32 dp_scr
= sym_get_script_dp (np
, cp
);
3746 * Not supported for auto-sense.
3748 if (cp
->host_flags
& HF_SENSE
)
3752 * Apply our alchemy:) (see comments in sym_evaluate_dp()),
3753 * to the resulted data pointer.
3755 dp_sg
= sym_evaluate_dp(np
, cp
, dp_scr
, &dp_ofs
);
3760 * And our alchemy:) allows to easily calculate the data
3761 * script address we want to return for the next data phase.
3763 dp_ret
= cpu_to_scr(sym_goalp(cp
));
3764 dp_ret
= dp_ret
- 8 - (SYM_CONF_MAX_SG
- dp_sg
) * (2*4);
3767 * If offset / scatter entry is zero we donnot need
3768 * a context for the new current data pointer.
3776 * Get a context for the new current data pointer.
3778 hflags
= INB(np
, HF_PRT
);
3780 if (hflags
& HF_DP_SAVED
)
3781 hflags
^= HF_ACT_PM
;
3783 if (!(hflags
& HF_ACT_PM
)) {
3785 dp_scr
= SCRIPTA_BA(np
, pm0_data
);
3789 dp_scr
= SCRIPTA_BA(np
, pm1_data
);
3792 hflags
&= ~(HF_DP_SAVED
);
3794 OUTB(np
, HF_PRT
, hflags
);
3797 * Set up the new current data pointer.
3798 * ofs < 0 there, and for the next data phase, we
3799 * want to transfer part of the data of the sg entry
3800 * corresponding to index dp_sg-1 prior to returning
3801 * to the main data script.
3803 pm
->ret
= cpu_to_scr(dp_ret
);
3804 tmp
= scr_to_cpu(cp
->phys
.data
[dp_sg
-1].addr
);
3805 tmp
+= scr_to_cpu(cp
->phys
.data
[dp_sg
-1].size
) + dp_ofs
;
3806 pm
->sg
.addr
= cpu_to_scr(tmp
);
3807 pm
->sg
.size
= cpu_to_scr(-dp_ofs
);
3810 sym_set_script_dp (np
, cp
, dp_scr
);
3811 OUTL_DSP(np
, SCRIPTA_BA(np
, clrack
));
3815 OUTL_DSP(np
, SCRIPTB_BA(np
, msg_bad
));
3820 * chip calculation of the data residual.
3822 * As I used to say, the requirement of data residual
3823 * in SCSI is broken, useless and cannot be achieved
3824 * without huge complexity.
3825 * But most OSes and even the official CAM require it.
3826 * When stupidity happens to be so widely spread inside
3827 * a community, it gets hard to convince.
3829 * Anyway, I don't care, since I am not going to use
3830 * any software that considers this data residual as
3831 * a relevant information. :)
3834 int sym_compute_residual(struct sym_hcb
*np
, struct sym_ccb
*cp
)
3836 int dp_sg
, dp_sgmin
, resid
= 0;
3840 * Check for some data lost or just thrown away.
3841 * We are not required to be quite accurate in this
3842 * situation. Btw, if we are odd for output and the
3843 * device claims some more data, it may well happen
3844 * than our residual be zero. :-)
3846 if (cp
->xerr_status
& (XE_EXTRA_DATA
|XE_SODL_UNRUN
|XE_SWIDE_OVRUN
)) {
3847 if (cp
->xerr_status
& XE_EXTRA_DATA
)
3848 resid
-= cp
->extra_bytes
;
3849 if (cp
->xerr_status
& XE_SODL_UNRUN
)
3851 if (cp
->xerr_status
& XE_SWIDE_OVRUN
)
3856 * If all data has been transferred,
3857 * there is no residual.
3859 if (cp
->phys
.head
.lastp
== sym_goalp(cp
))
3863 * If no data transfer occurs, or if the data
3864 * pointer is weird, return full residual.
3866 if (cp
->startp
== cp
->phys
.head
.lastp
||
3867 sym_evaluate_dp(np
, cp
, scr_to_cpu(cp
->phys
.head
.lastp
),
3869 return cp
->data_len
;
3873 * If we were auto-sensing, then we are done.
3875 if (cp
->host_flags
& HF_SENSE
) {
3880 * We are now full comfortable in the computation
3881 * of the data residual (2's complement).
3883 dp_sgmin
= SYM_CONF_MAX_SG
- cp
->segments
;
3884 resid
= -cp
->ext_ofs
;
3885 for (dp_sg
= cp
->ext_sg
; dp_sg
< SYM_CONF_MAX_SG
; ++dp_sg
) {
3886 u_int tmp
= scr_to_cpu(cp
->phys
.data
[dp_sg
].size
);
3887 resid
+= (tmp
& 0xffffff);
3890 resid
-= cp
->odd_byte_adjustment
;
3893 * Hopefully, the result is not too wrong.
3899 * Negotiation for WIDE and SYNCHRONOUS DATA TRANSFER.
3901 * When we try to negotiate, we append the negotiation message
3902 * to the identify and (maybe) simple tag message.
3903 * The host status field is set to HS_NEGOTIATE to mark this
3906 * If the target doesn't answer this message immediately
3907 * (as required by the standard), the SIR_NEGO_FAILED interrupt
3908 * will be raised eventually.
3909 * The handler removes the HS_NEGOTIATE status, and sets the
3910 * negotiated value to the default (async / nowide).
3912 * If we receive a matching answer immediately, we check it
3913 * for validity, and set the values.
3915 * If we receive a Reject message immediately, we assume the
3916 * negotiation has failed, and fall back to standard values.
3918 * If we receive a negotiation message while not in HS_NEGOTIATE
3919 * state, it's a target initiated negotiation. We prepare a
3920 * (hopefully) valid answer, set our parameters, and send back
3921 * this answer to the target.
3923 * If the target doesn't fetch the answer (no message out phase),
3924 * we assume the negotiation has failed, and fall back to default
3925 * settings (SIR_NEGO_PROTO interrupt).
3927 * When we set the values, we adjust them in all ccbs belonging
3928 * to this target, in the controller's register, and in the "phys"
3929 * field of the controller's struct sym_hcb.
3933 * chip handler for SYNCHRONOUS DATA TRANSFER REQUEST (SDTR) message.
3936 sym_sync_nego_check(struct sym_hcb
*np
, int req
, struct sym_ccb
*cp
)
3938 int target
= cp
->target
;
3939 u_char chg
, ofs
, per
, fak
, div
;
3941 if (DEBUG_FLAGS
& DEBUG_NEGO
) {
3942 sym_print_nego_msg(np
, target
, "sync msgin", np
->msgin
);
3946 * Get requested values.
3953 * Check values against our limits.
3956 if (ofs
> np
->maxoffs
)
3957 {chg
= 1; ofs
= np
->maxoffs
;}
3961 if (per
< np
->minsync
)
3962 {chg
= 1; per
= np
->minsync
;}
3966 * Get new chip synchronous parameters value.
3969 if (ofs
&& sym_getsync(np
, 0, per
, &div
, &fak
) < 0)
3972 if (DEBUG_FLAGS
& DEBUG_NEGO
) {
3973 sym_print_addr(cp
->cmd
,
3974 "sdtr: ofs=%d per=%d div=%d fak=%d chg=%d.\n",
3975 ofs
, per
, div
, fak
, chg
);
3979 * If it was an answer we want to change,
3980 * then it isn't acceptable. Reject it.
3988 sym_setsync (np
, target
, ofs
, per
, div
, fak
);
3991 * It was an answer. We are done.
3997 * It was a request. Prepare an answer message.
3999 np
->msgout
[0] = M_EXTENDED
;
4001 np
->msgout
[2] = M_X_SYNC_REQ
;
4002 np
->msgout
[3] = per
;
4003 np
->msgout
[4] = ofs
;
4005 if (DEBUG_FLAGS
& DEBUG_NEGO
) {
4006 sym_print_nego_msg(np
, target
, "sync msgout", np
->msgout
);
4009 np
->msgin
[0] = M_NOOP
;
4014 sym_setsync (np
, target
, 0, 0, 0, 0);
4018 static void sym_sync_nego(struct sym_hcb
*np
, struct sym_tcb
*tp
, struct sym_ccb
*cp
)
4024 * Request or answer ?
4026 if (INB(np
, HS_PRT
) == HS_NEGOTIATE
) {
4027 OUTB(np
, HS_PRT
, HS_BUSY
);
4028 if (cp
->nego_status
&& cp
->nego_status
!= NS_SYNC
)
4034 * Check and apply new values.
4036 result
= sym_sync_nego_check(np
, req
, cp
);
4037 if (result
) /* Not acceptable, reject it */
4039 if (req
) { /* Was a request, send response. */
4040 cp
->nego_status
= NS_SYNC
;
4041 OUTL_DSP(np
, SCRIPTB_BA(np
, sdtr_resp
));
4043 else /* Was a response, we are done. */
4044 OUTL_DSP(np
, SCRIPTA_BA(np
, clrack
));
4048 OUTL_DSP(np
, SCRIPTB_BA(np
, msg_bad
));
4052 * chip handler for PARALLEL PROTOCOL REQUEST (PPR) message.
4055 sym_ppr_nego_check(struct sym_hcb
*np
, int req
, int target
)
4057 struct sym_tcb
*tp
= &np
->target
[target
];
4058 unsigned char fak
, div
;
4061 unsigned char per
= np
->msgin
[3];
4062 unsigned char ofs
= np
->msgin
[5];
4063 unsigned char wide
= np
->msgin
[6];
4064 unsigned char opts
= np
->msgin
[7] & PPR_OPT_MASK
;
4066 if (DEBUG_FLAGS
& DEBUG_NEGO
) {
4067 sym_print_nego_msg(np
, target
, "ppr msgin", np
->msgin
);
4071 * Check values against our limits.
4073 if (wide
> np
->maxwide
) {
4077 if (!wide
|| !(np
->features
& FE_U3EN
))
4080 if (opts
!= (np
->msgin
[7] & PPR_OPT_MASK
))
4083 dt
= opts
& PPR_OPT_DT
;
4086 unsigned char maxoffs
= dt
? np
->maxoffs_dt
: np
->maxoffs
;
4087 if (ofs
> maxoffs
) {
4094 unsigned char minsync
= dt
? np
->minsync_dt
: np
->minsync
;
4095 if (per
< minsync
) {
4102 * Get new chip synchronous parameters value.
4105 if (ofs
&& sym_getsync(np
, dt
, per
, &div
, &fak
) < 0)
4109 * If it was an answer we want to change,
4110 * then it isn't acceptable. Reject it.
4118 sym_setpprot(np
, target
, opts
, ofs
, per
, wide
, div
, fak
);
4121 * It was an answer. We are done.
4127 * It was a request. Prepare an answer message.
4129 np
->msgout
[0] = M_EXTENDED
;
4131 np
->msgout
[2] = M_X_PPR_REQ
;
4132 np
->msgout
[3] = per
;
4134 np
->msgout
[5] = ofs
;
4135 np
->msgout
[6] = wide
;
4136 np
->msgout
[7] = opts
;
4138 if (DEBUG_FLAGS
& DEBUG_NEGO
) {
4139 sym_print_nego_msg(np
, target
, "ppr msgout", np
->msgout
);
4142 np
->msgin
[0] = M_NOOP
;
4147 sym_setpprot (np
, target
, 0, 0, 0, 0, 0, 0);
4149 * If it is a device response that should result in
4150 * ST, we may want to try a legacy negotiation later.
4152 if (!req
&& !opts
) {
4153 tp
->tgoal
.period
= per
;
4154 tp
->tgoal
.offset
= ofs
;
4155 tp
->tgoal
.width
= wide
;
4156 tp
->tgoal
.iu
= tp
->tgoal
.dt
= tp
->tgoal
.qas
= 0;
4157 tp
->tgoal
.check_nego
= 1;
4162 static void sym_ppr_nego(struct sym_hcb
*np
, struct sym_tcb
*tp
, struct sym_ccb
*cp
)
4168 * Request or answer ?
4170 if (INB(np
, HS_PRT
) == HS_NEGOTIATE
) {
4171 OUTB(np
, HS_PRT
, HS_BUSY
);
4172 if (cp
->nego_status
&& cp
->nego_status
!= NS_PPR
)
4178 * Check and apply new values.
4180 result
= sym_ppr_nego_check(np
, req
, cp
->target
);
4181 if (result
) /* Not acceptable, reject it */
4183 if (req
) { /* Was a request, send response. */
4184 cp
->nego_status
= NS_PPR
;
4185 OUTL_DSP(np
, SCRIPTB_BA(np
, ppr_resp
));
4187 else /* Was a response, we are done. */
4188 OUTL_DSP(np
, SCRIPTA_BA(np
, clrack
));
4192 OUTL_DSP(np
, SCRIPTB_BA(np
, msg_bad
));
4196 * chip handler for WIDE DATA TRANSFER REQUEST (WDTR) message.
4199 sym_wide_nego_check(struct sym_hcb
*np
, int req
, struct sym_ccb
*cp
)
4201 int target
= cp
->target
;
4204 if (DEBUG_FLAGS
& DEBUG_NEGO
) {
4205 sym_print_nego_msg(np
, target
, "wide msgin", np
->msgin
);
4209 * Get requested values.
4212 wide
= np
->msgin
[3];
4215 * Check values against our limits.
4217 if (wide
> np
->maxwide
) {
4222 if (DEBUG_FLAGS
& DEBUG_NEGO
) {
4223 sym_print_addr(cp
->cmd
, "wdtr: wide=%d chg=%d.\n",
4228 * If it was an answer we want to change,
4229 * then it isn't acceptable. Reject it.
4237 sym_setwide (np
, target
, wide
);
4240 * It was an answer. We are done.
4246 * It was a request. Prepare an answer message.
4248 np
->msgout
[0] = M_EXTENDED
;
4250 np
->msgout
[2] = M_X_WIDE_REQ
;
4251 np
->msgout
[3] = wide
;
4253 np
->msgin
[0] = M_NOOP
;
4255 if (DEBUG_FLAGS
& DEBUG_NEGO
) {
4256 sym_print_nego_msg(np
, target
, "wide msgout", np
->msgout
);
4265 static void sym_wide_nego(struct sym_hcb
*np
, struct sym_tcb
*tp
, struct sym_ccb
*cp
)
4271 * Request or answer ?
4273 if (INB(np
, HS_PRT
) == HS_NEGOTIATE
) {
4274 OUTB(np
, HS_PRT
, HS_BUSY
);
4275 if (cp
->nego_status
&& cp
->nego_status
!= NS_WIDE
)
4281 * Check and apply new values.
4283 result
= sym_wide_nego_check(np
, req
, cp
);
4284 if (result
) /* Not acceptable, reject it */
4286 if (req
) { /* Was a request, send response. */
4287 cp
->nego_status
= NS_WIDE
;
4288 OUTL_DSP(np
, SCRIPTB_BA(np
, wdtr_resp
));
4289 } else { /* Was a response. */
4291 * Negotiate for SYNC immediately after WIDE response.
4292 * This allows to negotiate for both WIDE and SYNC on
4293 * a single SCSI command (Suggested by Justin Gibbs).
4295 if (tp
->tgoal
.offset
) {
4296 np
->msgout
[0] = M_EXTENDED
;
4298 np
->msgout
[2] = M_X_SYNC_REQ
;
4299 np
->msgout
[3] = tp
->tgoal
.period
;
4300 np
->msgout
[4] = tp
->tgoal
.offset
;
4302 if (DEBUG_FLAGS
& DEBUG_NEGO
) {
4303 sym_print_nego_msg(np
, cp
->target
,
4304 "sync msgout", np
->msgout
);
4307 cp
->nego_status
= NS_SYNC
;
4308 OUTB(np
, HS_PRT
, HS_NEGOTIATE
);
4309 OUTL_DSP(np
, SCRIPTB_BA(np
, sdtr_resp
));
4312 OUTL_DSP(np
, SCRIPTA_BA(np
, clrack
));
4318 OUTL_DSP(np
, SCRIPTB_BA(np
, msg_bad
));
4322 * Reset DT, SYNC or WIDE to default settings.
4324 * Called when a negotiation does not succeed either
4325 * on rejection or on protocol error.
4327 * A target that understands a PPR message should never
4328 * reject it, and messing with it is very unlikely.
4329 * So, if a PPR makes problems, we may just want to
4330 * try a legacy negotiation later.
4332 static void sym_nego_default(struct sym_hcb
*np
, struct sym_tcb
*tp
, struct sym_ccb
*cp
)
4334 switch (cp
->nego_status
) {
4337 sym_setpprot (np
, cp
->target
, 0, 0, 0, 0, 0, 0);
4339 if (tp
->tgoal
.period
< np
->minsync
)
4340 tp
->tgoal
.period
= np
->minsync
;
4341 if (tp
->tgoal
.offset
> np
->maxoffs
)
4342 tp
->tgoal
.offset
= np
->maxoffs
;
4343 tp
->tgoal
.iu
= tp
->tgoal
.dt
= tp
->tgoal
.qas
= 0;
4344 tp
->tgoal
.check_nego
= 1;
4348 sym_setsync (np
, cp
->target
, 0, 0, 0, 0);
4351 sym_setwide (np
, cp
->target
, 0);
4354 np
->msgin
[0] = M_NOOP
;
4355 np
->msgout
[0] = M_NOOP
;
4356 cp
->nego_status
= 0;
4360 * chip handler for MESSAGE REJECT received in response to
4361 * PPR, WIDE or SYNCHRONOUS negotiation.
4363 static void sym_nego_rejected(struct sym_hcb
*np
, struct sym_tcb
*tp
, struct sym_ccb
*cp
)
4365 sym_nego_default(np
, tp
, cp
);
4366 OUTB(np
, HS_PRT
, HS_BUSY
);
4370 * chip exception handler for programmed interrupts.
4372 static void sym_int_sir (struct sym_hcb
*np
)
4374 u_char num
= INB(np
, nc_dsps
);
4375 u32 dsa
= INL(np
, nc_dsa
);
4376 struct sym_ccb
*cp
= sym_ccb_from_dsa(np
, dsa
);
4377 u_char target
= INB(np
, nc_sdid
) & 0x0f;
4378 struct sym_tcb
*tp
= &np
->target
[target
];
4381 if (DEBUG_FLAGS
& DEBUG_TINY
) printf ("I#%d", num
);
4384 #if SYM_CONF_DMA_ADDRESSING_MODE == 2
4386 * SCRIPTS tell us that we may have to update
4387 * 64 bit DMA segment registers.
4389 case SIR_DMAP_DIRTY
:
4390 sym_update_dmap_regs(np
);
4394 * Command has been completed with error condition
4395 * or has been auto-sensed.
4397 case SIR_COMPLETE_ERROR
:
4398 sym_complete_error(np
, cp
);
4401 * The C code is currently trying to recover from something.
4402 * Typically, user want to abort some command.
4404 case SIR_SCRIPT_STOPPED
:
4405 case SIR_TARGET_SELECTED
:
4406 case SIR_ABORT_SENT
:
4407 sym_sir_task_recovery(np
, num
);
4410 * The device didn't go to MSG OUT phase after having
4411 * been selected with ATN. We donnot want to handle
4414 case SIR_SEL_ATN_NO_MSG_OUT
:
4415 printf ("%s:%d: No MSG OUT phase after selection with ATN.\n",
4416 sym_name (np
), target
);
4419 * The device didn't switch to MSG IN phase after
4420 * having reseleted the initiator.
4422 case SIR_RESEL_NO_MSG_IN
:
4423 printf ("%s:%d: No MSG IN phase after reselection.\n",
4424 sym_name (np
), target
);
4427 * After reselection, the device sent a message that wasn't
4430 case SIR_RESEL_NO_IDENTIFY
:
4431 printf ("%s:%d: No IDENTIFY after reselection.\n",
4432 sym_name (np
), target
);
4435 * The device reselected a LUN we donnot know about.
4437 case SIR_RESEL_BAD_LUN
:
4438 np
->msgout
[0] = M_RESET
;
4441 * The device reselected for an untagged nexus and we
4444 case SIR_RESEL_BAD_I_T_L
:
4445 np
->msgout
[0] = M_ABORT
;
4448 * The device reselected for a tagged nexus that we donnot
4451 case SIR_RESEL_BAD_I_T_L_Q
:
4452 np
->msgout
[0] = M_ABORT_TAG
;
4455 * The SCRIPTS let us know that the device has grabbed
4456 * our message and will abort the job.
4458 case SIR_RESEL_ABORTED
:
4459 np
->lastmsg
= np
->msgout
[0];
4460 np
->msgout
[0] = M_NOOP
;
4461 printf ("%s:%d: message %x sent on bad reselection.\n",
4462 sym_name (np
), target
, np
->lastmsg
);
4465 * The SCRIPTS let us know that a message has been
4466 * successfully sent to the device.
4468 case SIR_MSG_OUT_DONE
:
4469 np
->lastmsg
= np
->msgout
[0];
4470 np
->msgout
[0] = M_NOOP
;
4471 /* Should we really care of that */
4472 if (np
->lastmsg
== M_PARITY
|| np
->lastmsg
== M_ID_ERROR
) {
4474 cp
->xerr_status
&= ~XE_PARITY_ERR
;
4475 if (!cp
->xerr_status
)
4476 OUTOFFB(np
, HF_PRT
, HF_EXT_ERR
);
4481 * The device didn't send a GOOD SCSI status.
4482 * We may have some work to do prior to allow
4483 * the SCRIPTS processor to continue.
4485 case SIR_BAD_SCSI_STATUS
:
4488 sym_sir_bad_scsi_status(np
, num
, cp
);
4491 * We are asked by the SCRIPTS to prepare a
4494 case SIR_REJECT_TO_SEND
:
4495 sym_print_msg(cp
, "M_REJECT to send for ", np
->msgin
);
4496 np
->msgout
[0] = M_REJECT
;
4499 * We have been ODD at the end of a DATA IN
4500 * transfer and the device didn't send a
4501 * IGNORE WIDE RESIDUE message.
4502 * It is a data overrun condition.
4504 case SIR_SWIDE_OVERRUN
:
4506 OUTONB(np
, HF_PRT
, HF_EXT_ERR
);
4507 cp
->xerr_status
|= XE_SWIDE_OVRUN
;
4511 * We have been ODD at the end of a DATA OUT
4513 * It is a data underrun condition.
4515 case SIR_SODL_UNDERRUN
:
4517 OUTONB(np
, HF_PRT
, HF_EXT_ERR
);
4518 cp
->xerr_status
|= XE_SODL_UNRUN
;
4522 * The device wants us to tranfer more data than
4523 * expected or in the wrong direction.
4524 * The number of extra bytes is in scratcha.
4525 * It is a data overrun condition.
4527 case SIR_DATA_OVERRUN
:
4529 OUTONB(np
, HF_PRT
, HF_EXT_ERR
);
4530 cp
->xerr_status
|= XE_EXTRA_DATA
;
4531 cp
->extra_bytes
+= INL(np
, nc_scratcha
);
4535 * The device switched to an illegal phase (4/5).
4539 OUTONB(np
, HF_PRT
, HF_EXT_ERR
);
4540 cp
->xerr_status
|= XE_BAD_PHASE
;
4544 * We received a message.
4546 case SIR_MSG_RECEIVED
:
4549 switch (np
->msgin
[0]) {
4551 * We received an extended message.
4552 * We handle MODIFY DATA POINTER, SDTR, WDTR
4553 * and reject all other extended messages.
4556 switch (np
->msgin
[2]) {
4558 if (DEBUG_FLAGS
& DEBUG_POINTER
)
4559 sym_print_msg(cp
,"modify DP",np
->msgin
);
4560 tmp
= (np
->msgin
[3]<<24) + (np
->msgin
[4]<<16) +
4561 (np
->msgin
[5]<<8) + (np
->msgin
[6]);
4562 sym_modify_dp(np
, tp
, cp
, tmp
);
4565 sym_sync_nego(np
, tp
, cp
);
4568 sym_ppr_nego(np
, tp
, cp
);
4571 sym_wide_nego(np
, tp
, cp
);
4578 * We received a 1/2 byte message not handled from SCRIPTS.
4579 * We are only expecting MESSAGE REJECT and IGNORE WIDE
4580 * RESIDUE messages that haven't been anticipated by
4581 * SCRIPTS on SWIDE full condition. Unanticipated IGNORE
4582 * WIDE RESIDUE messages are aliased as MODIFY DP (-1).
4585 if (DEBUG_FLAGS
& DEBUG_POINTER
)
4586 sym_print_msg(cp
,"ign wide residue", np
->msgin
);
4587 if (cp
->host_flags
& HF_SENSE
)
4588 OUTL_DSP(np
, SCRIPTA_BA(np
, clrack
));
4590 sym_modify_dp(np
, tp
, cp
, -1);
4593 if (INB(np
, HS_PRT
) == HS_NEGOTIATE
)
4594 sym_nego_rejected(np
, tp
, cp
);
4596 sym_print_addr(cp
->cmd
,
4597 "M_REJECT received (%x:%x).\n",
4598 scr_to_cpu(np
->lastmsg
), np
->msgout
[0]);
4607 * We received an unknown message.
4608 * Ignore all MSG IN phases and reject it.
4611 sym_print_msg(cp
, "WEIRD message received", np
->msgin
);
4612 OUTL_DSP(np
, SCRIPTB_BA(np
, msg_weird
));
4615 * Negotiation failed.
4616 * Target does not send us the reply.
4617 * Remove the HS_NEGOTIATE status.
4619 case SIR_NEGO_FAILED
:
4620 OUTB(np
, HS_PRT
, HS_BUSY
);
4622 * Negotiation failed.
4623 * Target does not want answer message.
4625 case SIR_NEGO_PROTO
:
4626 sym_nego_default(np
, tp
, cp
);
4634 OUTL_DSP(np
, SCRIPTB_BA(np
, msg_bad
));
4637 OUTL_DSP(np
, SCRIPTA_BA(np
, clrack
));
4644 * Acquire a control block
4646 struct sym_ccb
*sym_get_ccb (struct sym_hcb
*np
, struct scsi_cmnd
*cmd
, u_char tag_order
)
4648 u_char tn
= cmd
->device
->id
;
4649 u_char ln
= cmd
->device
->lun
;
4650 struct sym_tcb
*tp
= &np
->target
[tn
];
4651 struct sym_lcb
*lp
= sym_lp(tp
, ln
);
4652 u_short tag
= NO_TAG
;
4654 struct sym_ccb
*cp
= NULL
;
4657 * Look for a free CCB
4659 if (sym_que_empty(&np
->free_ccbq
))
4661 qp
= sym_remque_head(&np
->free_ccbq
);
4664 cp
= sym_que_entry(qp
, struct sym_ccb
, link_ccbq
);
4666 #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
4668 * If the LCB is not yet available and the LUN
4669 * has been probed ok, try to allocate the LCB.
4671 if (!lp
&& sym_is_bit(tp
->lun_map
, ln
)) {
4672 lp
= sym_alloc_lcb(np
, tn
, ln
);
4679 * If the LCB is not available here, then the
4680 * logical unit is not yet discovered. For those
4681 * ones only accept 1 SCSI IO per logical unit,
4682 * since we cannot allow disconnections.
4685 if (!sym_is_bit(tp
->busy0_map
, ln
))
4686 sym_set_bit(tp
->busy0_map
, ln
);
4691 * If we have been asked for a tagged command.
4695 * Debugging purpose.
4697 #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
4698 assert(lp
->busy_itl
== 0);
4701 * Allocate resources for tags if not yet.
4704 sym_alloc_lcb_tags(np
, tn
, ln
);
4709 * Get a tag for this SCSI IO and set up
4710 * the CCB bus address for reselection,
4711 * and count it for this LUN.
4712 * Toggle reselect path to tagged.
4714 if (lp
->busy_itlq
< SYM_CONF_MAX_TASK
) {
4715 tag
= lp
->cb_tags
[lp
->ia_tag
];
4716 if (++lp
->ia_tag
== SYM_CONF_MAX_TASK
)
4719 #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
4720 lp
->itlq_tbl
[tag
] = cpu_to_scr(cp
->ccb_ba
);
4722 cpu_to_scr(SCRIPTA_BA(np
, resel_tag
));
4724 #ifdef SYM_OPT_LIMIT_COMMAND_REORDERING
4725 cp
->tags_si
= lp
->tags_si
;
4726 ++lp
->tags_sum
[cp
->tags_si
];
4734 * This command will not be tagged.
4735 * If we already have either a tagged or untagged
4736 * one, refuse to overlap this untagged one.
4740 * Debugging purpose.
4742 #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
4743 assert(lp
->busy_itl
== 0 && lp
->busy_itlq
== 0);
4746 * Count this nexus for this LUN.
4747 * Set up the CCB bus address for reselection.
4748 * Toggle reselect path to untagged.
4751 #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
4752 if (lp
->busy_itl
== 1) {
4753 lp
->head
.itl_task_sa
= cpu_to_scr(cp
->ccb_ba
);
4755 cpu_to_scr(SCRIPTA_BA(np
, resel_no_tag
));
4763 * Put the CCB into the busy queue.
4765 sym_insque_tail(&cp
->link_ccbq
, &np
->busy_ccbq
);
4766 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
4768 sym_remque(&cp
->link2_ccbq
);
4769 sym_insque_tail(&cp
->link2_ccbq
, &lp
->waiting_ccbq
);
4774 cp
->odd_byte_adjustment
= 0;
4776 cp
->order
= tag_order
;
4780 if (DEBUG_FLAGS
& DEBUG_TAGS
) {
4781 sym_print_addr(cmd
, "ccb @%p using tag %d.\n", cp
, tag
);
4787 sym_insque_head(&cp
->link_ccbq
, &np
->free_ccbq
);
4792 * Release one control block
4794 void sym_free_ccb (struct sym_hcb
*np
, struct sym_ccb
*cp
)
4796 struct sym_tcb
*tp
= &np
->target
[cp
->target
];
4797 struct sym_lcb
*lp
= sym_lp(tp
, cp
->lun
);
4799 if (DEBUG_FLAGS
& DEBUG_TAGS
) {
4800 sym_print_addr(cp
->cmd
, "ccb @%p freeing tag %d.\n",
4809 * If tagged, release the tag, set the relect path
4811 if (cp
->tag
!= NO_TAG
) {
4812 #ifdef SYM_OPT_LIMIT_COMMAND_REORDERING
4813 --lp
->tags_sum
[cp
->tags_si
];
4816 * Free the tag value.
4818 lp
->cb_tags
[lp
->if_tag
] = cp
->tag
;
4819 if (++lp
->if_tag
== SYM_CONF_MAX_TASK
)
4822 * Make the reselect path invalid,
4823 * and uncount this CCB.
4825 lp
->itlq_tbl
[cp
->tag
] = cpu_to_scr(np
->bad_itlq_ba
);
4827 } else { /* Untagged */
4829 * Make the reselect path invalid,
4830 * and uncount this CCB.
4832 lp
->head
.itl_task_sa
= cpu_to_scr(np
->bad_itl_ba
);
4836 * If no JOB active, make the LUN reselect path invalid.
4838 if (lp
->busy_itlq
== 0 && lp
->busy_itl
== 0)
4840 cpu_to_scr(SCRIPTB_BA(np
, resel_bad_lun
));
4843 * Otherwise, we only accept 1 IO per LUN.
4844 * Clear the bit that keeps track of this IO.
4847 sym_clr_bit(tp
->busy0_map
, cp
->lun
);
4850 * We donnot queue more than 1 ccb per target
4851 * with negotiation at any time. If this ccb was
4852 * used for negotiation, clear this info in the tcb.
4854 if (cp
== tp
->nego_cp
)
4857 #ifdef SYM_CONF_IARB_SUPPORT
4859 * If we just complete the last queued CCB,
4860 * clear this info that is no longer relevant.
4862 if (cp
== np
->last_cp
)
4867 * Make this CCB available.
4870 cp
->host_status
= HS_IDLE
;
4871 sym_remque(&cp
->link_ccbq
);
4872 sym_insque_head(&cp
->link_ccbq
, &np
->free_ccbq
);
4874 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
4876 sym_remque(&cp
->link2_ccbq
);
4877 sym_insque_tail(&cp
->link2_ccbq
, &np
->dummy_ccbq
);
4879 if (cp
->tag
!= NO_TAG
)
4882 --lp
->started_no_tag
;
4890 * Allocate a CCB from memory and initialize its fixed part.
4892 static struct sym_ccb
*sym_alloc_ccb(struct sym_hcb
*np
)
4894 struct sym_ccb
*cp
= NULL
;
4898 * Prevent from allocating more CCBs than we can
4899 * queue to the controller.
4901 if (np
->actccbs
>= SYM_CONF_MAX_START
)
4905 * Allocate memory for this CCB.
4907 cp
= sym_calloc_dma(sizeof(struct sym_ccb
), "CCB");
4917 * Compute the bus address of this ccb.
4919 cp
->ccb_ba
= vtobus(cp
);
4922 * Insert this ccb into the hashed list.
4924 hcode
= CCB_HASH_CODE(cp
->ccb_ba
);
4925 cp
->link_ccbh
= np
->ccbh
[hcode
];
4926 np
->ccbh
[hcode
] = cp
;
4929 * Initialyze the start and restart actions.
4931 cp
->phys
.head
.go
.start
= cpu_to_scr(SCRIPTA_BA(np
, idle
));
4932 cp
->phys
.head
.go
.restart
= cpu_to_scr(SCRIPTB_BA(np
, bad_i_t_l
));
4935 * Initilialyze some other fields.
4937 cp
->phys
.smsg_ext
.addr
= cpu_to_scr(HCB_BA(np
, msgin
[2]));
4940 * Chain into free ccb queue.
4942 sym_insque_head(&cp
->link_ccbq
, &np
->free_ccbq
);
4945 * Chain into optionnal lists.
4947 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
4948 sym_insque_head(&cp
->link2_ccbq
, &np
->dummy_ccbq
);
4953 sym_mfree_dma(cp
, sizeof(*cp
), "CCB");
4958 * Look up a CCB from a DSA value.
4960 static struct sym_ccb
*sym_ccb_from_dsa(struct sym_hcb
*np
, u32 dsa
)
4965 hcode
= CCB_HASH_CODE(dsa
);
4966 cp
= np
->ccbh
[hcode
];
4968 if (cp
->ccb_ba
== dsa
)
4977 * Target control block initialisation.
4978 * Nothing important to do at the moment.
4980 static void sym_init_tcb (struct sym_hcb
*np
, u_char tn
)
4982 #if 0 /* Hmmm... this checking looks paranoid. */
4984 * Check some alignments required by the chip.
4986 assert (((offsetof(struct sym_reg
, nc_sxfer
) ^
4987 offsetof(struct sym_tcb
, head
.sval
)) &3) == 0);
4988 assert (((offsetof(struct sym_reg
, nc_scntl3
) ^
4989 offsetof(struct sym_tcb
, head
.wval
)) &3) == 0);
4994 * Lun control block allocation and initialization.
4996 struct sym_lcb
*sym_alloc_lcb (struct sym_hcb
*np
, u_char tn
, u_char ln
)
4998 struct sym_tcb
*tp
= &np
->target
[tn
];
4999 struct sym_lcb
*lp
= sym_lp(tp
, ln
);
5002 * Already done, just return.
5008 * Donnot allow LUN control block
5009 * allocation for not probed LUNs.
5011 if (!sym_is_bit(tp
->lun_map
, ln
))
5015 * Initialize the target control block if not yet.
5017 sym_init_tcb (np
, tn
);
5020 * Allocate the LCB bus address array.
5021 * Compute the bus address of this table.
5023 if (ln
&& !tp
->luntbl
) {
5026 tp
->luntbl
= sym_calloc_dma(256, "LUNTBL");
5029 for (i
= 0 ; i
< 64 ; i
++)
5030 tp
->luntbl
[i
] = cpu_to_scr(vtobus(&np
->badlun_sa
));
5031 tp
->head
.luntbl_sa
= cpu_to_scr(vtobus(tp
->luntbl
));
5035 * Allocate the table of pointers for LUN(s) > 0, if needed.
5037 if (ln
&& !tp
->lunmp
) {
5038 tp
->lunmp
= kcalloc(SYM_CONF_MAX_LUN
, sizeof(struct sym_lcb
*),
5046 * Make it available to the chip.
5048 lp
= sym_calloc_dma(sizeof(struct sym_lcb
), "LCB");
5053 tp
->luntbl
[ln
] = cpu_to_scr(vtobus(lp
));
5057 tp
->head
.lun0_sa
= cpu_to_scr(vtobus(lp
));
5061 * Let the itl task point to error handling.
5063 lp
->head
.itl_task_sa
= cpu_to_scr(np
->bad_itl_ba
);
5066 * Set the reselect pattern to our default. :)
5068 lp
->head
.resel_sa
= cpu_to_scr(SCRIPTB_BA(np
, resel_bad_lun
));
5071 * Set user capabilities.
5073 lp
->user_flags
= tp
->usrflags
& (SYM_DISC_ENABLED
| SYM_TAGS_ENABLED
);
5075 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
5077 * Initialize device queueing.
5079 sym_que_init(&lp
->waiting_ccbq
);
5080 sym_que_init(&lp
->started_ccbq
);
5081 lp
->started_max
= SYM_CONF_MAX_TASK
;
5082 lp
->started_limit
= SYM_CONF_MAX_TASK
;
5085 * If we are busy, count the IO.
5087 if (sym_is_bit(tp
->busy0_map
, ln
)) {
5089 sym_clr_bit(tp
->busy0_map
, ln
);
5096 * Allocate LCB resources for tagged command queuing.
5098 static void sym_alloc_lcb_tags (struct sym_hcb
*np
, u_char tn
, u_char ln
)
5100 struct sym_tcb
*tp
= &np
->target
[tn
];
5101 struct sym_lcb
*lp
= sym_lp(tp
, ln
);
5105 * If LCB not available, try to allocate it.
5107 if (!lp
&& !(lp
= sym_alloc_lcb(np
, tn
, ln
)))
5111 * Allocate the task table and and the tag allocation
5112 * circular buffer. We want both or none.
5114 lp
->itlq_tbl
= sym_calloc_dma(SYM_CONF_MAX_TASK
*4, "ITLQ_TBL");
5117 lp
->cb_tags
= kcalloc(SYM_CONF_MAX_TASK
, 1, GFP_ATOMIC
);
5119 sym_mfree_dma(lp
->itlq_tbl
, SYM_CONF_MAX_TASK
*4, "ITLQ_TBL");
5120 lp
->itlq_tbl
= NULL
;
5125 * Initialize the task table with invalid entries.
5127 for (i
= 0 ; i
< SYM_CONF_MAX_TASK
; i
++)
5128 lp
->itlq_tbl
[i
] = cpu_to_scr(np
->notask_ba
);
5131 * Fill up the tag buffer with tag numbers.
5133 for (i
= 0 ; i
< SYM_CONF_MAX_TASK
; i
++)
5137 * Make the task table available to SCRIPTS,
5138 * And accept tagged commands now.
5140 lp
->head
.itlq_tbl_sa
= cpu_to_scr(vtobus(lp
->itlq_tbl
));
5148 * Queue a SCSI IO to the controller.
5150 int sym_queue_scsiio(struct sym_hcb
*np
, struct scsi_cmnd
*cmd
, struct sym_ccb
*cp
)
5152 struct scsi_device
*sdev
= cmd
->device
;
5160 * Keep track of the IO in our CCB.
5165 * Retrieve the target descriptor.
5167 tp
= &np
->target
[cp
->target
];
5170 * Retrieve the lun descriptor.
5172 lp
= sym_lp(tp
, sdev
->lun
);
5174 can_disconnect
= (cp
->tag
!= NO_TAG
) ||
5175 (lp
&& (lp
->curr_flags
& SYM_DISC_ENABLED
));
5177 msgptr
= cp
->scsi_smsg
;
5179 msgptr
[msglen
++] = IDENTIFY(can_disconnect
, sdev
->lun
);
5182 * Build the tag message if present.
5184 if (cp
->tag
!= NO_TAG
) {
5185 u_char order
= cp
->order
;
5193 order
= M_SIMPLE_TAG
;
5195 #ifdef SYM_OPT_LIMIT_COMMAND_REORDERING
5197 * Avoid too much reordering of SCSI commands.
5198 * The algorithm tries to prevent completion of any
5199 * tagged command from being delayed against more
5200 * than 3 times the max number of queued commands.
5202 if (lp
&& lp
->tags_since
> 3*SYM_CONF_MAX_TAG
) {
5203 lp
->tags_si
= !(lp
->tags_si
);
5204 if (lp
->tags_sum
[lp
->tags_si
]) {
5205 order
= M_ORDERED_TAG
;
5206 if ((DEBUG_FLAGS
& DEBUG_TAGS
)||sym_verbose
>1) {
5208 "ordered tag forced.\n");
5214 msgptr
[msglen
++] = order
;
5217 * For less than 128 tags, actual tags are numbered
5218 * 1,3,5,..2*MAXTAGS+1,since we may have to deal
5219 * with devices that have problems with #TAG 0 or too
5220 * great #TAG numbers. For more tags (up to 256),
5221 * we use directly our tag number.
5223 #if SYM_CONF_MAX_TASK > (512/4)
5224 msgptr
[msglen
++] = cp
->tag
;
5226 msgptr
[msglen
++] = (cp
->tag
<< 1) + 1;
5231 * Build a negotiation message if needed.
5232 * (nego_status is filled by sym_prepare_nego())
5234 cp
->nego_status
= 0;
5235 if (tp
->tgoal
.check_nego
&& !tp
->nego_cp
&& lp
) {
5236 msglen
+= sym_prepare_nego(np
, cp
, msgptr
+ msglen
);
5242 cp
->phys
.head
.go
.start
= cpu_to_scr(SCRIPTA_BA(np
, select
));
5243 cp
->phys
.head
.go
.restart
= cpu_to_scr(SCRIPTA_BA(np
, resel_dsa
));
5248 cp
->phys
.select
.sel_id
= cp
->target
;
5249 cp
->phys
.select
.sel_scntl3
= tp
->head
.wval
;
5250 cp
->phys
.select
.sel_sxfer
= tp
->head
.sval
;
5251 cp
->phys
.select
.sel_scntl4
= tp
->head
.uval
;
5256 cp
->phys
.smsg
.addr
= CCB_BA(cp
, scsi_smsg
);
5257 cp
->phys
.smsg
.size
= cpu_to_scr(msglen
);
5262 cp
->host_xflags
= 0;
5263 cp
->host_status
= cp
->nego_status
? HS_NEGOTIATE
: HS_BUSY
;
5264 cp
->ssss_status
= S_ILLEGAL
;
5265 cp
->xerr_status
= 0;
5267 cp
->extra_bytes
= 0;
5270 * extreme data pointer.
5271 * shall be positive, so -1 is lower than lowest.:)
5277 * Build the CDB and DATA descriptor block
5280 return sym_setup_data_and_start(np
, cmd
, cp
);
5284 * Reset a SCSI target (all LUNs of this target).
5286 int sym_reset_scsi_target(struct sym_hcb
*np
, int target
)
5290 if (target
== np
->myaddr
|| (u_int
)target
>= SYM_CONF_MAX_TARGET
)
5293 tp
= &np
->target
[target
];
5296 np
->istat_sem
= SEM
;
5297 OUTB(np
, nc_istat
, SIGP
|SEM
);
5305 static int sym_abort_ccb(struct sym_hcb
*np
, struct sym_ccb
*cp
, int timed_out
)
5308 * Check that the IO is active.
5310 if (!cp
|| !cp
->host_status
|| cp
->host_status
== HS_WAIT
)
5314 * If a previous abort didn't succeed in time,
5315 * perform a BUS reset.
5318 sym_reset_scsi_bus(np
, 1);
5323 * Mark the CCB for abort and allow time for.
5325 cp
->to_abort
= timed_out
? 2 : 1;
5328 * Tell the SCRIPTS processor to stop and synchronize with us.
5330 np
->istat_sem
= SEM
;
5331 OUTB(np
, nc_istat
, SIGP
|SEM
);
5335 int sym_abort_scsiio(struct sym_hcb
*np
, struct scsi_cmnd
*cmd
, int timed_out
)
5341 * Look up our CCB control block.
5344 FOR_EACH_QUEUED_ELEMENT(&np
->busy_ccbq
, qp
) {
5345 struct sym_ccb
*cp2
= sym_que_entry(qp
, struct sym_ccb
, link_ccbq
);
5346 if (cp2
->cmd
== cmd
) {
5352 return sym_abort_ccb(np
, cp
, timed_out
);
5356 * Complete execution of a SCSI command with extended
5357 * error, SCSI status error, or having been auto-sensed.
5359 * The SCRIPTS processor is not running there, so we
5360 * can safely access IO registers and remove JOBs from
5362 * SCRATCHA is assumed to have been loaded with STARTPOS
5363 * before the SCRIPTS called the C code.
5365 void sym_complete_error(struct sym_hcb
*np
, struct sym_ccb
*cp
)
5367 struct scsi_device
*sdev
;
5368 struct scsi_cmnd
*cmd
;
5375 * Paranoid check. :)
5377 if (!cp
|| !cp
->cmd
)
5382 if (DEBUG_FLAGS
& (DEBUG_TINY
|DEBUG_RESULT
)) {
5383 dev_info(&sdev
->sdev_gendev
, "CCB=%p STAT=%x/%x/%x\n", cp
,
5384 cp
->host_status
, cp
->ssss_status
, cp
->host_flags
);
5388 * Get target and lun pointers.
5390 tp
= &np
->target
[cp
->target
];
5391 lp
= sym_lp(tp
, sdev
->lun
);
5394 * Check for extended errors.
5396 if (cp
->xerr_status
) {
5398 sym_print_xerr(cmd
, cp
->xerr_status
);
5399 if (cp
->host_status
== HS_COMPLETE
)
5400 cp
->host_status
= HS_COMP_ERR
;
5404 * Calculate the residual.
5406 resid
= sym_compute_residual(np
, cp
);
5408 if (!SYM_SETUP_RESIDUAL_SUPPORT
) {/* If user does not want residuals */
5409 resid
= 0; /* throw them away. :) */
5414 printf("XXXX RESID= %d - 0x%x\n", resid
, resid
);
5418 * Dequeue all queued CCBs for that device
5419 * not yet started by SCRIPTS.
5421 i
= (INL(np
, nc_scratcha
) - np
->squeue_ba
) / 4;
5422 i
= sym_dequeue_from_squeue(np
, i
, cp
->target
, sdev
->lun
, -1);
5425 * Restart the SCRIPTS processor.
5427 OUTL_DSP(np
, SCRIPTA_BA(np
, start
));
5429 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
5430 if (cp
->host_status
== HS_COMPLETE
&&
5431 cp
->ssss_status
== S_QUEUE_FULL
) {
5432 if (!lp
|| lp
->started_tags
- i
< 2)
5435 * Decrease queue depth as needed.
5437 lp
->started_max
= lp
->started_tags
- i
- 1;
5440 if (sym_verbose
>= 2) {
5441 sym_print_addr(cmd
, " queue depth is now %d\n",
5448 cp
->host_status
= HS_BUSY
;
5449 cp
->ssss_status
= S_ILLEGAL
;
5452 * Let's requeue it to device.
5454 sym_set_cam_status(cmd
, DID_SOFT_ERROR
);
5460 * Build result in CAM ccb.
5462 sym_set_cam_result_error(np
, cp
, resid
);
5464 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
5468 * Add this one to the COMP queue.
5470 sym_remque(&cp
->link_ccbq
);
5471 sym_insque_head(&cp
->link_ccbq
, &np
->comp_ccbq
);
5474 * Complete all those commands with either error
5475 * or requeue condition.
5477 sym_flush_comp_queue(np
, 0);
5479 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
5481 * Donnot start more than 1 command after an error.
5484 sym_start_next_ccbs(np
, lp
, 1);
5489 * Complete execution of a successful SCSI command.
5491 * Only successful commands go to the DONE queue,
5492 * since we need to have the SCRIPTS processor
5493 * stopped on any error condition.
5494 * The SCRIPTS processor is running while we are
5495 * completing successful commands.
5497 void sym_complete_ok (struct sym_hcb
*np
, struct sym_ccb
*cp
)
5501 struct scsi_cmnd
*cmd
;
5505 * Paranoid check. :)
5507 if (!cp
|| !cp
->cmd
)
5509 assert (cp
->host_status
== HS_COMPLETE
);
5517 * Get target and lun pointers.
5519 tp
= &np
->target
[cp
->target
];
5520 lp
= sym_lp(tp
, cp
->lun
);
5523 * Assume device discovered on first success.
5526 sym_set_bit(tp
->lun_map
, cp
->lun
);
5529 * If all data have been transferred, given than no
5530 * extended error did occur, there is no residual.
5533 if (cp
->phys
.head
.lastp
!= sym_goalp(cp
))
5534 resid
= sym_compute_residual(np
, cp
);
5537 * Wrong transfer residuals may be worse than just always
5538 * returning zero. User can disable this feature in
5539 * sym53c8xx.h. Residual support is enabled by default.
5541 if (!SYM_SETUP_RESIDUAL_SUPPORT
)
5545 printf("XXXX RESID= %d - 0x%x\n", resid
, resid
);
5549 * Build result in CAM ccb.
5551 sym_set_cam_result_ok(cp
, cmd
, resid
);
5553 #ifdef SYM_OPT_SNIFF_INQUIRY
5555 * On standard INQUIRY response (EVPD and CmDt
5556 * not set), sniff out device capabilities.
5558 if (cp
->cdb_buf
[0] == INQUIRY
&& !(cp
->cdb_buf
[1] & 0x3))
5559 sym_sniff_inquiry(np
, cmd
, resid
);
5562 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
5564 * If max number of started ccbs had been reduced,
5565 * increase it if 200 good status received.
5567 if (lp
&& lp
->started_max
< lp
->started_limit
) {
5569 if (lp
->num_sgood
>= 200) {
5572 if (sym_verbose
>= 2) {
5573 sym_print_addr(cmd
, " queue depth is now %d\n",
5583 sym_free_ccb (np
, cp
);
5585 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
5587 * Requeue a couple of awaiting scsi commands.
5589 if (lp
&& !sym_que_empty(&lp
->waiting_ccbq
))
5590 sym_start_next_ccbs(np
, lp
, 2);
5593 * Complete the command.
5595 sym_xpt_done(np
, cmd
);
5599 * Soft-attach the controller.
5601 int sym_hcb_attach(struct Scsi_Host
*shost
, struct sym_fw
*fw
, struct sym_nvram
*nvram
)
5603 struct sym_hcb
*np
= sym_get_hcb(shost
);
5607 * Get some info about the firmware.
5609 np
->scripta_sz
= fw
->a_size
;
5610 np
->scriptb_sz
= fw
->b_size
;
5611 np
->scriptz_sz
= fw
->z_size
;
5612 np
->fw_setup
= fw
->setup
;
5613 np
->fw_patch
= fw
->patch
;
5614 np
->fw_name
= fw
->name
;
5617 * Save setting of some IO registers, so we will
5618 * be able to probe specific implementations.
5620 sym_save_initial_setting (np
);
5623 * Reset the chip now, since it has been reported
5624 * that SCSI clock calibration may not work properly
5625 * if the chip is currently active.
5630 * Prepare controller and devices settings, according
5631 * to chip features, user set-up and driver set-up.
5633 sym_prepare_setting(shost
, np
, nvram
);
5636 * Check the PCI clock frequency.
5637 * Must be performed after prepare_setting since it destroys
5638 * STEST1 that is used to probe for the clock doubler.
5640 i
= sym_getpciclock(np
);
5641 if (i
> 37000 && !(np
->features
& FE_66MHZ
))
5642 printf("%s: PCI BUS clock seems too high: %u KHz.\n",
5646 * Allocate the start queue.
5648 np
->squeue
= sym_calloc_dma(sizeof(u32
)*(MAX_QUEUE
*2),"SQUEUE");
5651 np
->squeue_ba
= vtobus(np
->squeue
);
5654 * Allocate the done queue.
5656 np
->dqueue
= sym_calloc_dma(sizeof(u32
)*(MAX_QUEUE
*2),"DQUEUE");
5659 np
->dqueue_ba
= vtobus(np
->dqueue
);
5662 * Allocate the target bus address array.
5664 np
->targtbl
= sym_calloc_dma(256, "TARGTBL");
5667 np
->targtbl_ba
= vtobus(np
->targtbl
);
5670 * Allocate SCRIPTS areas.
5672 np
->scripta0
= sym_calloc_dma(np
->scripta_sz
, "SCRIPTA0");
5673 np
->scriptb0
= sym_calloc_dma(np
->scriptb_sz
, "SCRIPTB0");
5674 np
->scriptz0
= sym_calloc_dma(np
->scriptz_sz
, "SCRIPTZ0");
5675 if (!np
->scripta0
|| !np
->scriptb0
|| !np
->scriptz0
)
5679 * Allocate the array of lists of CCBs hashed by DSA.
5681 np
->ccbh
= kcalloc(sizeof(struct sym_ccb
**), CCB_HASH_SIZE
, GFP_KERNEL
);
5686 * Initialyze the CCB free and busy queues.
5688 sym_que_init(&np
->free_ccbq
);
5689 sym_que_init(&np
->busy_ccbq
);
5690 sym_que_init(&np
->comp_ccbq
);
5693 * Initialization for optional handling
5694 * of device queueing.
5696 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
5697 sym_que_init(&np
->dummy_ccbq
);
5700 * Allocate some CCB. We need at least ONE.
5702 if (!sym_alloc_ccb(np
))
5706 * Calculate BUS addresses where we are going
5707 * to load the SCRIPTS.
5709 np
->scripta_ba
= vtobus(np
->scripta0
);
5710 np
->scriptb_ba
= vtobus(np
->scriptb0
);
5711 np
->scriptz_ba
= vtobus(np
->scriptz0
);
5714 np
->scripta_ba
= np
->ram_ba
;
5715 if (np
->features
& FE_RAM8K
) {
5717 np
->scriptb_ba
= np
->scripta_ba
+ 4096;
5718 #if 0 /* May get useful for 64 BIT PCI addressing */
5719 np
->scr_ram_seg
= cpu_to_scr(np
->scripta_ba
>> 32);
5727 * Copy scripts to controller instance.
5729 memcpy(np
->scripta0
, fw
->a_base
, np
->scripta_sz
);
5730 memcpy(np
->scriptb0
, fw
->b_base
, np
->scriptb_sz
);
5731 memcpy(np
->scriptz0
, fw
->z_base
, np
->scriptz_sz
);
5734 * Setup variable parts in scripts and compute
5735 * scripts bus addresses used from the C code.
5737 np
->fw_setup(np
, fw
);
5740 * Bind SCRIPTS with physical addresses usable by the
5741 * SCRIPTS processor (as seen from the BUS = BUS addresses).
5743 sym_fw_bind_script(np
, (u32
*) np
->scripta0
, np
->scripta_sz
);
5744 sym_fw_bind_script(np
, (u32
*) np
->scriptb0
, np
->scriptb_sz
);
5745 sym_fw_bind_script(np
, (u32
*) np
->scriptz0
, np
->scriptz_sz
);
5747 #ifdef SYM_CONF_IARB_SUPPORT
5749 * If user wants IARB to be set when we win arbitration
5750 * and have other jobs, compute the max number of consecutive
5751 * settings of IARB hints before we leave devices a chance to
5752 * arbitrate for reselection.
5754 #ifdef SYM_SETUP_IARB_MAX
5755 np
->iarb_max
= SYM_SETUP_IARB_MAX
;
5762 * Prepare the idle and invalid task actions.
5764 np
->idletask
.start
= cpu_to_scr(SCRIPTA_BA(np
, idle
));
5765 np
->idletask
.restart
= cpu_to_scr(SCRIPTB_BA(np
, bad_i_t_l
));
5766 np
->idletask_ba
= vtobus(&np
->idletask
);
5768 np
->notask
.start
= cpu_to_scr(SCRIPTA_BA(np
, idle
));
5769 np
->notask
.restart
= cpu_to_scr(SCRIPTB_BA(np
, bad_i_t_l
));
5770 np
->notask_ba
= vtobus(&np
->notask
);
5772 np
->bad_itl
.start
= cpu_to_scr(SCRIPTA_BA(np
, idle
));
5773 np
->bad_itl
.restart
= cpu_to_scr(SCRIPTB_BA(np
, bad_i_t_l
));
5774 np
->bad_itl_ba
= vtobus(&np
->bad_itl
);
5776 np
->bad_itlq
.start
= cpu_to_scr(SCRIPTA_BA(np
, idle
));
5777 np
->bad_itlq
.restart
= cpu_to_scr(SCRIPTB_BA(np
,bad_i_t_l_q
));
5778 np
->bad_itlq_ba
= vtobus(&np
->bad_itlq
);
5781 * Allocate and prepare the lun JUMP table that is used
5782 * for a target prior the probing of devices (bad lun table).
5783 * A private table will be allocated for the target on the
5784 * first INQUIRY response received.
5786 np
->badluntbl
= sym_calloc_dma(256, "BADLUNTBL");
5790 np
->badlun_sa
= cpu_to_scr(SCRIPTB_BA(np
, resel_bad_lun
));
5791 for (i
= 0 ; i
< 64 ; i
++) /* 64 luns/target, no less */
5792 np
->badluntbl
[i
] = cpu_to_scr(vtobus(&np
->badlun_sa
));
5795 * Prepare the bus address array that contains the bus
5796 * address of each target control block.
5797 * For now, assume all logical units are wrong. :)
5799 for (i
= 0 ; i
< SYM_CONF_MAX_TARGET
; i
++) {
5800 np
->targtbl
[i
] = cpu_to_scr(vtobus(&np
->target
[i
]));
5801 np
->target
[i
].head
.luntbl_sa
=
5802 cpu_to_scr(vtobus(np
->badluntbl
));
5803 np
->target
[i
].head
.lun0_sa
=
5804 cpu_to_scr(vtobus(&np
->badlun_sa
));
5808 * Now check the cache handling of the pci chipset.
5810 if (sym_snooptest (np
)) {
5811 printf("%s: CACHE INCORRECTLY CONFIGURED.\n", sym_name(np
));
5816 * Sigh! we are done.
5825 * Free everything that has been allocated for this device.
5827 void sym_hcb_free(struct sym_hcb
*np
)
5836 sym_mfree_dma(np
->scriptz0
, np
->scriptz_sz
, "SCRIPTZ0");
5838 sym_mfree_dma(np
->scriptb0
, np
->scriptb_sz
, "SCRIPTB0");
5840 sym_mfree_dma(np
->scripta0
, np
->scripta_sz
, "SCRIPTA0");
5842 sym_mfree_dma(np
->squeue
, sizeof(u32
)*(MAX_QUEUE
*2), "SQUEUE");
5844 sym_mfree_dma(np
->dqueue
, sizeof(u32
)*(MAX_QUEUE
*2), "DQUEUE");
5847 while ((qp
= sym_remque_head(&np
->free_ccbq
)) != 0) {
5848 cp
= sym_que_entry(qp
, struct sym_ccb
, link_ccbq
);
5849 sym_mfree_dma(cp
, sizeof(*cp
), "CCB");
5855 sym_mfree_dma(np
->badluntbl
, 256,"BADLUNTBL");
5857 for (target
= 0; target
< SYM_CONF_MAX_TARGET
; target
++) {
5858 tp
= &np
->target
[target
];
5859 for (lun
= 0 ; lun
< SYM_CONF_MAX_LUN
; lun
++) {
5860 lp
= sym_lp(tp
, lun
);
5864 sym_mfree_dma(lp
->itlq_tbl
, SYM_CONF_MAX_TASK
*4,
5867 sym_mfree_dma(lp
, sizeof(*lp
), "LCB");
5869 #if SYM_CONF_MAX_LUN > 1
5874 sym_mfree_dma(np
->targtbl
, 256, "TARGTBL");