drivers/serial/clps711x.c

   1 /*
   2  *  linux/drivers/char/clps711x.c
   3  *
   4  *  Driver for CLPS711x serial ports
   5  *
   6  *  Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
   7  *
   8  *  Copyright 1999 ARM Limited
   9  *  Copyright (C) 2000 Deep Blue Solutions Ltd.
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License as published by
  13  * the Free Software Foundation; either version 2 of the License, or
  14  * (at your option) any later version.
  15  *
  16  * This program is distributed in the hope that it will be useful,
  17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  * GNU General Public License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program; if not, write to the Free Software
  23  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  24  *
  25  *  $Id: clps711x.c,v 1.42 2002/07/28 10:03:28 rmk Exp $
  26  *
  27  */
  28 #include <linux/config.h>
  29
  30 #if defined(CONFIG_SERIAL_CLPS711X_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  31 #define SUPPORT_SYSRQ
  32 #endif
  33
  34 #include <linux/module.h>
  35 #include <linux/ioport.h>
  36 #include <linux/init.h>
  37 #include <linux/console.h>
  38 #include <linux/sysrq.h>
  39 #include <linux/spinlock.h>
  40 #include <linux/device.h>
  41 #include <linux/tty.h>
  42 #include <linux/tty_flip.h>
  43 #include <linux/serial_core.h>
  44 #include <linux/serial.h>
  45
  46 #include <asm/hardware.h>
  47 #include <asm/io.h>
  48 #include <asm/irq.h>
  49 #include <asm/hardware/clps7111.h>
  50
  51 #define UART_NR         2
  52
  53 #define SERIAL_CLPS711X_MAJOR   204
  54 #define SERIAL_CLPS711X_MINOR   40
  55 #define SERIAL_CLPS711X_NR      UART_NR
  56
  57 /*
  58  * We use the relevant SYSCON register as a base address for these ports.
  59  */
  60 #define UBRLCR(port)            ((port)->iobase + UBRLCR1 - SYSCON1)
  61 #define UARTDR(port)            ((port)->iobase + UARTDR1 - SYSCON1)
  62 #define SYSFLG(port)            ((port)->iobase + SYSFLG1 - SYSCON1)
  63 #define SYSCON(port)            ((port)->iobase + SYSCON1 - SYSCON1)
  64
  65 #define TX_IRQ(port)            ((port)->irq)
  66 #define RX_IRQ(port)            ((port)->irq + 1)
  67
  68 #define UART_ANY_ERR            (UARTDR_FRMERR | UARTDR_PARERR | UARTDR_OVERR)
  69
  70 #define tx_enabled(port)        ((port)->unused[0])
  71
  72 static void clps711xuart_stop_tx(struct uart_port *port)
  73 {
  74         if (tx_enabled(port)) {
  75                 disable_irq(TX_IRQ(port));
  76                 tx_enabled(port) = 0;
  77         }
  78 }
  79
  80 static void clps711xuart_start_tx(struct uart_port *port)
  81 {
  82         if (!tx_enabled(port)) {
  83                 enable_irq(TX_IRQ(port));
  84                 tx_enabled(port) = 1;
  85         }
  86 }
  87
  88 static void clps711xuart_stop_rx(struct uart_port *port)
  89 {
  90         disable_irq(RX_IRQ(port));
  91 }
  92
  93 static void clps711xuart_enable_ms(struct uart_port *port)
  94 {
  95 }
  96
  97 static irqreturn_t clps711xuart_int_rx(int irq, void *dev_id, struct pt_regs *regs)
  98 {
  99         struct uart_port *port = dev_id;
 100         struct tty_struct *tty = port->info->tty;
 101         unsigned int status, ch, flg;
 102
 103         status = clps_readl(SYSFLG(port));
 104         while (!(status & SYSFLG_URXFE)) {
 105                 ch = clps_readl(UARTDR(port));
 106
 107                 if (tty->flip.count >= TTY_FLIPBUF_SIZE)
 108                         goto ignore_char;
 109                 port->icount.rx++;
 110
 111                 flg = TTY_NORMAL;
 112
 113                 /*
 114                  * Note that the error handling code is
 115                  * out of the main execution path
 116                  */
 117                 if (unlikely(ch & UART_ANY_ERR)) {
 118                         if (ch & UARTDR_PARERR)
 119                                 port->icount.parity++;
 120                         else if (ch & UARTDR_FRMERR)
 121                                 port->icount.frame++;
 122                         if (ch & UARTDR_OVERR)
 123                                 port->icount.overrun++;
 124
 125                         ch &= port->read_status_mask;
 126
 127                         if (ch & UARTDR_PARERR)
 128                                 flg = TTY_PARITY;
 129                         else if (ch & UARTDR_FRMERR)
 130                                 flg = TTY_FRAME;
 131
 132 #ifdef SUPPORT_SYSRQ
 133                         port->sysrq = 0;
 134 #endif
 135                 }
 136
 137                 if (uart_handle_sysrq_char(port, ch, regs))
 138                         goto ignore_char;
 139
 140                 /*
 141                  * CHECK: does overrun affect the current character?
 142                  * ASSUMPTION: it does not.
 143                  */
 144                 uart_insert_char(port, ch, UARTDR_OVERR, ch, flg);
 145
 146         ignore_char:
 147                 status = clps_readl(SYSFLG(port));
 148         }
 149         tty_flip_buffer_push(tty);
 150         return IRQ_HANDLED;
 151 }
 152
 153 static irqreturn_t clps711xuart_int_tx(int irq, void *dev_id, struct pt_regs *regs)
 154 {
 155         struct uart_port *port = dev_id;
 156         struct circ_buf *xmit = &port->info->xmit;
 157         int count;
 158
 159         if (port->x_char) {
 160                 clps_writel(port->x_char, UARTDR(port));
 161                 port->icount.tx++;
 162                 port->x_char = 0;
 163                 return IRQ_HANDLED;
 164         }
 165         if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
 166                 clps711xuart_stop_tx(port);
 167                 return IRQ_HANDLED;
 168         }
 169
 170         count = port->fifosize >> 1;
 171         do {
 172                 clps_writel(xmit->buf[xmit->tail], UARTDR(port));
 173                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 174                 port->icount.tx++;
 175                 if (uart_circ_empty(xmit))
 176                         break;
 177         } while (--count > 0);
 178
 179         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 180                 uart_write_wakeup(port);
 181
 182         if (uart_circ_empty(xmit))
 183                 clps711xuart_stop_tx(port);
 184
 185         return IRQ_HANDLED;
 186 }
 187
 188 static unsigned int clps711xuart_tx_empty(struct uart_port *port)
 189 {
 190         unsigned int status = clps_readl(SYSFLG(port));
 191         return status & SYSFLG_UBUSY ? 0 : TIOCSER_TEMT;
 192 }
 193
 194 static unsigned int clps711xuart_get_mctrl(struct uart_port *port)
 195 {
 196         unsigned int port_addr;
 197         unsigned int result = 0;
 198         unsigned int status;
 199
 200         port_addr = SYSFLG(port);
 201         if (port_addr == SYSFLG1) {
 202                 status = clps_readl(SYSFLG1);
 203                 if (status & SYSFLG1_DCD)
 204                         result |= TIOCM_CAR;
 205                 if (status & SYSFLG1_DSR)
 206                         result |= TIOCM_DSR;
 207                 if (status & SYSFLG1_CTS)
 208                         result |= TIOCM_CTS;
 209         }
 210
 211         return result;
 212 }
 213
 214 static void
 215 clps711xuart_set_mctrl_null(struct uart_port *port, unsigned int mctrl)
 216 {
 217 }
 218
 219 static void clps711xuart_break_ctl(struct uart_port *port, int break_state)
 220 {
 221         unsigned long flags;
 222         unsigned int ubrlcr;
 223
 224         spin_lock_irqsave(&port->lock, flags);
 225         ubrlcr = clps_readl(UBRLCR(port));
 226         if (break_state == -1)
 227                 ubrlcr |= UBRLCR_BREAK;
 228         else
 229                 ubrlcr &= ~UBRLCR_BREAK;
 230         clps_writel(ubrlcr, UBRLCR(port));
 231         spin_unlock_irqrestore(&port->lock, flags);
 232 }
 233
 234 static int clps711xuart_startup(struct uart_port *port)
 235 {
 236         unsigned int syscon;
 237         int retval;
 238
 239         tx_enabled(port) = 1;
 240
 241         /*
 242          * Allocate the IRQs
 243          */
 244         retval = request_irq(TX_IRQ(port), clps711xuart_int_tx, 0,
 245                              "clps711xuart_tx", port);
 246         if (retval)
 247                 return retval;
 248
 249         retval = request_irq(RX_IRQ(port), clps711xuart_int_rx, 0,
 250                              "clps711xuart_rx", port);
 251         if (retval) {
 252                 free_irq(TX_IRQ(port), port);
 253                 return retval;
 254         }
 255
 256         /*
 257          * enable the port
 258          */
 259         syscon = clps_readl(SYSCON(port));
 260         syscon |= SYSCON_UARTEN;
 261         clps_writel(syscon, SYSCON(port));
 262
 263         return 0;
 264 }
 265
 266 static void clps711xuart_shutdown(struct uart_port *port)
 267 {
 268         unsigned int ubrlcr, syscon;
 269
 270         /*
 271          * Free the interrupt
 272          */
 273         free_irq(TX_IRQ(port), port);   /* TX interrupt */
 274         free_irq(RX_IRQ(port), port);   /* RX interrupt */
 275
 276         /*
 277          * disable the port
 278          */
 279         syscon = clps_readl(SYSCON(port));
 280         syscon &= ~SYSCON_UARTEN;
 281         clps_writel(syscon, SYSCON(port));
 282
 283         /*
 284          * disable break condition and fifos
 285          */
 286         ubrlcr = clps_readl(UBRLCR(port));
 287         ubrlcr &= ~(UBRLCR_FIFOEN | UBRLCR_BREAK);
 288         clps_writel(ubrlcr, UBRLCR(port));
 289 }
 290
 291 static void
 292 clps711xuart_set_termios(struct uart_port *port, struct termios *termios,
 293                          struct termios *old)
 294 {
 295         unsigned int ubrlcr, baud, quot;
 296         unsigned long flags;
 297
 298         /*
 299          * We don't implement CREAD.
 300          */
 301         termios->c_cflag |= CREAD;
 302
 303         /*
 304          * Ask the core to calculate the divisor for us.
 305          */
 306         baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
 307         quot = uart_get_divisor(port, baud);
 308
 309         switch (termios->c_cflag & CSIZE) {
 310         case CS5:
 311                 ubrlcr = UBRLCR_WRDLEN5;
 312                 break;
 313         case CS6:
 314                 ubrlcr = UBRLCR_WRDLEN6;
 315                 break;
 316         case CS7:
 317                 ubrlcr = UBRLCR_WRDLEN7;
 318                 break;
 319         default: // CS8
 320                 ubrlcr = UBRLCR_WRDLEN8;
 321                 break;
 322         }
 323         if (termios->c_cflag & CSTOPB)
 324                 ubrlcr |= UBRLCR_XSTOP;
 325         if (termios->c_cflag & PARENB) {
 326                 ubrlcr |= UBRLCR_PRTEN;
 327                 if (!(termios->c_cflag & PARODD))
 328                         ubrlcr |= UBRLCR_EVENPRT;
 329         }
 330         if (port->fifosize > 1)
 331                 ubrlcr |= UBRLCR_FIFOEN;
 332
 333         spin_lock_irqsave(&port->lock, flags);
 334
 335         /*
 336          * Update the per-port timeout.
 337          */
 338         uart_update_timeout(port, termios->c_cflag, baud);
 339
 340         port->read_status_mask = UARTDR_OVERR;
 341         if (termios->c_iflag & INPCK)
 342                 port->read_status_mask |= UARTDR_PARERR | UARTDR_FRMERR;
 343
 344         /*
 345          * Characters to ignore
 346          */
 347         port->ignore_status_mask = 0;
 348         if (termios->c_iflag & IGNPAR)
 349                 port->ignore_status_mask |= UARTDR_FRMERR | UARTDR_PARERR;
 350         if (termios->c_iflag & IGNBRK) {
 351                 /*
 352                  * If we're ignoring parity and break indicators,
 353                  * ignore overruns to (for real raw support).
 354                  */
 355                 if (termios->c_iflag & IGNPAR)
 356                         port->ignore_status_mask |= UARTDR_OVERR;
 357         }
 358
 359         quot -= 1;
 360
 361         clps_writel(ubrlcr | quot, UBRLCR(port));
 362
 363         spin_unlock_irqrestore(&port->lock, flags);
 364 }
 365
 366 static const char *clps711xuart_type(struct uart_port *port)
 367 {
 368         return port->type == PORT_CLPS711X ? "CLPS711x" : NULL;
 369 }
 370
 371 /*
 372  * Configure/autoconfigure the port.
 373  */
 374 static void clps711xuart_config_port(struct uart_port *port, int flags)
 375 {
 376         if (flags & UART_CONFIG_TYPE)
 377                 port->type = PORT_CLPS711X;
 378 }
 379
 380 static void clps711xuart_release_port(struct uart_port *port)
 381 {
 382 }
 383
 384 static int clps711xuart_request_port(struct uart_port *port)
 385 {
 386         return 0;
 387 }
 388
 389 static struct uart_ops clps711x_pops = {
 390         .tx_empty       = clps711xuart_tx_empty,
 391         .set_mctrl      = clps711xuart_set_mctrl_null,
 392         .get_mctrl      = clps711xuart_get_mctrl,
 393         .stop_tx        = clps711xuart_stop_tx,
 394         .start_tx       = clps711xuart_start_tx,
 395         .stop_rx        = clps711xuart_stop_rx,
 396         .enable_ms      = clps711xuart_enable_ms,
 397         .break_ctl      = clps711xuart_break_ctl,
 398         .startup        = clps711xuart_startup,
 399         .shutdown       = clps711xuart_shutdown,
 400         .set_termios    = clps711xuart_set_termios,
 401         .type           = clps711xuart_type,
 402         .config_port    = clps711xuart_config_port,
 403         .release_port   = clps711xuart_release_port,
 404         .request_port   = clps711xuart_request_port,
 405 };
 406
 407 static struct uart_port clps711x_ports[UART_NR] = {
 408         {
 409                 .iobase         = SYSCON1,
 410                 .irq            = IRQ_UTXINT1, /* IRQ_URXINT1, IRQ_UMSINT */
 411                 .uartclk        = 3686400,
 412                 .fifosize       = 16,
 413                 .ops            = &clps711x_pops,
 414                 .line           = 0,
 415                 .flags          = ASYNC_BOOT_AUTOCONF,
 416         },
 417         {
 418                 .iobase         = SYSCON2,
 419                 .irq            = IRQ_UTXINT2, /* IRQ_URXINT2 */
 420                 .uartclk        = 3686400,
 421                 .fifosize       = 16,
 422                 .ops            = &clps711x_pops,
 423                 .line           = 1,
 424                 .flags          = ASYNC_BOOT_AUTOCONF,
 425         }
 426 };
 427
 428 #ifdef CONFIG_SERIAL_CLPS711X_CONSOLE
 429 /*
 430  *      Print a string to the serial port trying not to disturb
 431  *      any possible real use of the port...
 432  *
 433  *      The console_lock must be held when we get here.
 434  *
 435  *      Note that this is called with interrupts already disabled
 436  */
 437 static void
 438 clps711xuart_console_write(struct console *co, const char *s,
 439                            unsigned int count)
 440 {
 441         struct uart_port *port = clps711x_ports + co->index;
 442         unsigned int status, syscon;
 443         int i;
 444
 445         /*
 446          *      Ensure that the port is enabled.
 447          */
 448         syscon = clps_readl(SYSCON(port));
 449         clps_writel(syscon | SYSCON_UARTEN, SYSCON(port));
 450
 451         /*
 452          *      Now, do each character
 453          */
 454         for (i = 0; i < count; i++) {
 455                 do {
 456                         status = clps_readl(SYSFLG(port));
 457                 } while (status & SYSFLG_UTXFF);
 458                 clps_writel(s[i], UARTDR(port));
 459                 if (s[i] == '\n') {
 460                         do {
 461                                 status = clps_readl(SYSFLG(port));
 462                         } while (status & SYSFLG_UTXFF);
 463                         clps_writel('\r', UARTDR(port));
 464                 }
 465         }
 466
 467         /*
 468          *      Finally, wait for transmitter to become empty
 469          *      and restore the uart state.
 470          */
 471         do {
 472                 status = clps_readl(SYSFLG(port));
 473         } while (status & SYSFLG_UBUSY);
 474
 475         clps_writel(syscon, SYSCON(port));
 476 }
 477
 478 static void __init
 479 clps711xuart_console_get_options(struct uart_port *port, int *baud,
 480                                  int *parity, int *bits)
 481 {
 482         if (clps_readl(SYSCON(port)) & SYSCON_UARTEN) {
 483                 unsigned int ubrlcr, quot;
 484
 485                 ubrlcr = clps_readl(UBRLCR(port));
 486
 487                 *parity = 'n';
 488                 if (ubrlcr & UBRLCR_PRTEN) {
 489                         if (ubrlcr & UBRLCR_EVENPRT)
 490                                 *parity = 'e';
 491                         else
 492                                 *parity = 'o';
 493                 }
 494
 495                 if ((ubrlcr & UBRLCR_WRDLEN_MASK) == UBRLCR_WRDLEN7)
 496                         *bits = 7;
 497                 else
 498                         *bits = 8;
 499
 500                 quot = ubrlcr & UBRLCR_BAUD_MASK;
 501                 *baud = port->uartclk / (16 * (quot + 1));
 502         }
 503 }
 504
 505 static int __init clps711xuart_console_setup(struct console *co, char *options)
 506 {
 507         struct uart_port *port;
 508         int baud = 38400;
 509         int bits = 8;
 510         int parity = 'n';
 511         int flow = 'n';
 512
 513         /*
 514          * Check whether an invalid uart number has been specified, and
 515          * if so, search for the first available port that does have
 516          * console support.
 517          */
 518         port = uart_get_console(clps711x_ports, UART_NR, co);
 519
 520         if (options)
 521                 uart_parse_options(options, &baud, &parity, &bits, &flow);
 522         else
 523                 clps711xuart_console_get_options(port, &baud, &parity, &bits);
 524
 525         return uart_set_options(port, co, baud, parity, bits, flow);
 526 }
 527
 528 static struct uart_driver clps711x_reg;
 529 static struct console clps711x_console = {
 530         .name           = "ttyCL",
 531         .write          = clps711xuart_console_write,
 532         .device         = uart_console_device,
 533         .setup          = clps711xuart_console_setup,
 534         .flags          = CON_PRINTBUFFER,
 535         .index          = -1,
 536         .data           = &clps711x_reg,
 537 };
 538
 539 static int __init clps711xuart_console_init(void)
 540 {
 541         register_console(&clps711x_console);
 542         return 0;
 543 }
 544 console_initcall(clps711xuart_console_init);
 545
 546 #define CLPS711X_CONSOLE        &clps711x_console
 547 #else
 548 #define CLPS711X_CONSOLE        NULL
 549 #endif
 550
 551 static struct uart_driver clps711x_reg = {
 552         .driver_name            = "ttyCL",
 553         .dev_name               = "ttyCL",
 554         .major                  = SERIAL_CLPS711X_MAJOR,
 555         .minor                  = SERIAL_CLPS711X_MINOR,
 556         .nr                     = UART_NR,
 557
 558         .cons                   = CLPS711X_CONSOLE,
 559 };
 560
 561 static int __init clps711xuart_init(void)
 562 {
 563         int ret, i;
 564
 565         printk(KERN_INFO "Serial: CLPS711x driver $Revision: 1.42 $\n");
 566
 567         ret = uart_register_driver(&clps711x_reg);
 568         if (ret)
 569                 return ret;
 570
 571         for (i = 0; i < UART_NR; i++)
 572                 uart_add_one_port(&clps711x_reg, &clps711x_ports[i]);
 573
 574         return 0;
 575 }
 576
 577 static void __exit clps711xuart_exit(void)
 578 {
 579         int i;
 580
 581         for (i = 0; i < UART_NR; i++)
 582                 uart_remove_one_port(&clps711x_reg, &clps711x_ports[i]);
 583
 584         uart_unregister_driver(&clps711x_reg);
 585 }
 586
 587 module_init(clps711xuart_init);
 588 module_exit(clps711xuart_exit);
 589
 590 MODULE_AUTHOR("Deep Blue Solutions Ltd");
 591 MODULE_DESCRIPTION("CLPS-711x generic serial driver $Revision: 1.42 $");
 592 MODULE_LICENSE("GPL");
 593 MODULE_ALIAS_CHARDEV(SERIAL_CLPS711X_MAJOR, SERIAL_CLPS711X_MINOR);