2 * linux/drivers/serial/cpm_uart.c
4 * Driver for CPM (SCC/SMC) serial ports; CPM1 definitions
6 * Maintainer: Kumar Gala (galak@kernel.crashing.org) (CPM2)
7 * Pantelis Antoniou (panto@intracom.gr) (CPM1)
9 * Copyright (C) 2004 Freescale Semiconductor, Inc.
10 * (C) 2004 Intracom, S.A.
11 * (C) 2006 MontaVista Software, Inc.
12 * Vitaly Bordug <vbordug@ru.mvista.com>
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
30 #include <linux/module.h>
31 #include <linux/tty.h>
32 #include <linux/ioport.h>
33 #include <linux/init.h>
34 #include <linux/serial.h>
35 #include <linux/console.h>
36 #include <linux/sysrq.h>
37 #include <linux/device.h>
38 #include <linux/bootmem.h>
39 #include <linux/dma-mapping.h>
44 #include <linux/serial_core.h>
45 #include <linux/kernel.h>
49 /**************************************************************/
51 void cpm_line_cr_cmd(int line
, int cmd
)
54 volatile cpm8xx_t
*cp
= cpmp
;
58 val
= mk_cr_cmd(CPM_CR_CH_SMC1
, cmd
) | CPM_CR_FLG
;
61 val
= mk_cr_cmd(CPM_CR_CH_SMC2
, cmd
) | CPM_CR_FLG
;
64 val
= mk_cr_cmd(CPM_CR_CH_SCC1
, cmd
) | CPM_CR_FLG
;
67 val
= mk_cr_cmd(CPM_CR_CH_SCC2
, cmd
) | CPM_CR_FLG
;
70 val
= mk_cr_cmd(CPM_CR_CH_SCC3
, cmd
) | CPM_CR_FLG
;
73 val
= mk_cr_cmd(CPM_CR_CH_SCC4
, cmd
) | CPM_CR_FLG
;
80 while (cp
->cp_cpcr
& CPM_CR_FLG
) ;
83 void smc1_lineif(struct uart_cpm_port
*pinfo
)
88 void smc2_lineif(struct uart_cpm_port
*pinfo
)
93 void scc1_lineif(struct uart_cpm_port
*pinfo
)
95 /* XXX SCC1: insert port configuration here */
99 void scc2_lineif(struct uart_cpm_port
*pinfo
)
101 /* XXX SCC2: insert port configuration here */
105 void scc3_lineif(struct uart_cpm_port
*pinfo
)
107 /* XXX SCC3: insert port configuration here */
111 void scc4_lineif(struct uart_cpm_port
*pinfo
)
113 /* XXX SCC4: insert port configuration here */
118 * Allocate DP-Ram and memory buffers. We need to allocate a transmit and
119 * receive buffer descriptors from dual port ram, and a character
120 * buffer area from host mem. If we are allocating for the console we need
121 * to do it from bootmem
123 int cpm_uart_allocbuf(struct uart_cpm_port
*pinfo
, unsigned int is_con
)
129 dma_addr_t dma_addr
= 0;
131 pr_debug("CPM uart[%d]:allocbuf\n", pinfo
->port
.line
);
133 dpmemsz
= sizeof(cbd_t
) * (pinfo
->rx_nrfifos
+ pinfo
->tx_nrfifos
);
134 dp_offset
= cpm_dpalloc(dpmemsz
, 8);
135 if (IS_DPERR(dp_offset
)) {
137 "cpm_uart_cpm1.c: could not allocate buffer descriptors\n");
140 dp_mem
= cpm_dpram_addr(dp_offset
);
142 memsz
= L1_CACHE_ALIGN(pinfo
->rx_nrfifos
* pinfo
->rx_fifosize
) +
143 L1_CACHE_ALIGN(pinfo
->tx_nrfifos
* pinfo
->tx_fifosize
);
145 /* was hostalloc but changed cause it blows away the */
146 /* large tlb mapping when pinning the kernel area */
147 mem_addr
= (u8
*) cpm_dpram_addr(cpm_dpalloc(memsz
, 8));
148 dma_addr
= (u32
)mem_addr
;
150 mem_addr
= dma_alloc_coherent(NULL
, memsz
, &dma_addr
,
153 if (mem_addr
== NULL
) {
154 cpm_dpfree(dp_offset
);
156 "cpm_uart_cpm1.c: could not allocate coherent memory\n");
160 pinfo
->dp_addr
= dp_offset
;
161 pinfo
->mem_addr
= mem_addr
; /* virtual address*/
162 pinfo
->dma_addr
= dma_addr
; /* physical address*/
163 pinfo
->mem_size
= memsz
;
165 pinfo
->rx_buf
= mem_addr
;
166 pinfo
->tx_buf
= pinfo
->rx_buf
+ L1_CACHE_ALIGN(pinfo
->rx_nrfifos
167 * pinfo
->rx_fifosize
);
169 pinfo
->rx_bd_base
= (volatile cbd_t
*)dp_mem
;
170 pinfo
->tx_bd_base
= pinfo
->rx_bd_base
+ pinfo
->rx_nrfifos
;
175 void cpm_uart_freebuf(struct uart_cpm_port
*pinfo
)
177 dma_free_coherent(NULL
, L1_CACHE_ALIGN(pinfo
->rx_nrfifos
*
178 pinfo
->rx_fifosize
) +
179 L1_CACHE_ALIGN(pinfo
->tx_nrfifos
*
180 pinfo
->tx_fifosize
), pinfo
->mem_addr
,
183 cpm_dpfree(pinfo
->dp_addr
);
186 /* Setup any dynamic params in the uart desc */
187 int __init
cpm_uart_init_portdesc(void)
189 pr_debug("CPM uart[-]:init portdesc\n");
192 #ifdef CONFIG_SERIAL_CPM_SMC1
193 cpm_uart_ports
[UART_SMC1
].smcp
= &cpmp
->cp_smc
[0];
195 * Is SMC1 being relocated?
197 # ifdef CONFIG_I2C_SPI_SMC1_UCODE_PATCH
198 cpm_uart_ports
[UART_SMC1
].smcup
=
199 (smc_uart_t
*) & cpmp
->cp_dparam
[0x3C0];
201 cpm_uart_ports
[UART_SMC1
].smcup
=
202 (smc_uart_t
*) & cpmp
->cp_dparam
[PROFF_SMC1
];
204 cpm_uart_ports
[UART_SMC1
].port
.mapbase
=
205 (unsigned long)&cpmp
->cp_smc
[0];
206 cpm_uart_ports
[UART_SMC1
].smcp
->smc_smcm
|= (SMCM_RX
| SMCM_TX
);
207 cpm_uart_ports
[UART_SMC1
].smcp
->smc_smcmr
&= ~(SMCMR_REN
| SMCMR_TEN
);
208 cpm_uart_ports
[UART_SMC1
].port
.uartclk
= (((bd_t
*) __res
)->bi_intfreq
);
209 cpm_uart_port_map
[cpm_uart_nr
++] = UART_SMC1
;
212 #ifdef CONFIG_SERIAL_CPM_SMC2
213 cpm_uart_ports
[UART_SMC2
].smcp
= &cpmp
->cp_smc
[1];
214 cpm_uart_ports
[UART_SMC2
].smcup
=
215 (smc_uart_t
*) & cpmp
->cp_dparam
[PROFF_SMC2
];
216 cpm_uart_ports
[UART_SMC2
].port
.mapbase
=
217 (unsigned long)&cpmp
->cp_smc
[1];
218 cpm_uart_ports
[UART_SMC2
].smcp
->smc_smcm
|= (SMCM_RX
| SMCM_TX
);
219 cpm_uart_ports
[UART_SMC2
].smcp
->smc_smcmr
&= ~(SMCMR_REN
| SMCMR_TEN
);
220 cpm_uart_ports
[UART_SMC2
].port
.uartclk
= (((bd_t
*) __res
)->bi_intfreq
);
221 cpm_uart_port_map
[cpm_uart_nr
++] = UART_SMC2
;
224 #ifdef CONFIG_SERIAL_CPM_SCC1
225 cpm_uart_ports
[UART_SCC1
].sccp
= &cpmp
->cp_scc
[0];
226 cpm_uart_ports
[UART_SCC1
].sccup
=
227 (scc_uart_t
*) & cpmp
->cp_dparam
[PROFF_SCC1
];
228 cpm_uart_ports
[UART_SCC1
].port
.mapbase
=
229 (unsigned long)&cpmp
->cp_scc
[0];
230 cpm_uart_ports
[UART_SCC1
].sccp
->scc_sccm
&=
231 ~(UART_SCCM_TX
| UART_SCCM_RX
);
232 cpm_uart_ports
[UART_SCC1
].sccp
->scc_gsmrl
&=
233 ~(SCC_GSMRL_ENR
| SCC_GSMRL_ENT
);
234 cpm_uart_ports
[UART_SCC1
].port
.uartclk
= (((bd_t
*) __res
)->bi_intfreq
);
235 cpm_uart_port_map
[cpm_uart_nr
++] = UART_SCC1
;
238 #ifdef CONFIG_SERIAL_CPM_SCC2
239 cpm_uart_ports
[UART_SCC2
].sccp
= &cpmp
->cp_scc
[1];
240 cpm_uart_ports
[UART_SCC2
].sccup
=
241 (scc_uart_t
*) & cpmp
->cp_dparam
[PROFF_SCC2
];
242 cpm_uart_ports
[UART_SCC2
].port
.mapbase
=
243 (unsigned long)&cpmp
->cp_scc
[1];
244 cpm_uart_ports
[UART_SCC2
].sccp
->scc_sccm
&=
245 ~(UART_SCCM_TX
| UART_SCCM_RX
);
246 cpm_uart_ports
[UART_SCC2
].sccp
->scc_gsmrl
&=
247 ~(SCC_GSMRL_ENR
| SCC_GSMRL_ENT
);
248 cpm_uart_ports
[UART_SCC2
].port
.uartclk
= (((bd_t
*) __res
)->bi_intfreq
);
249 cpm_uart_port_map
[cpm_uart_nr
++] = UART_SCC2
;
252 #ifdef CONFIG_SERIAL_CPM_SCC3
253 cpm_uart_ports
[UART_SCC3
].sccp
= &cpmp
->cp_scc
[2];
254 cpm_uart_ports
[UART_SCC3
].sccup
=
255 (scc_uart_t
*) & cpmp
->cp_dparam
[PROFF_SCC3
];
256 cpm_uart_ports
[UART_SCC3
].port
.mapbase
=
257 (unsigned long)&cpmp
->cp_scc
[2];
258 cpm_uart_ports
[UART_SCC3
].sccp
->scc_sccm
&=
259 ~(UART_SCCM_TX
| UART_SCCM_RX
);
260 cpm_uart_ports
[UART_SCC3
].sccp
->scc_gsmrl
&=
261 ~(SCC_GSMRL_ENR
| SCC_GSMRL_ENT
);
262 cpm_uart_ports
[UART_SCC3
].port
.uartclk
= (((bd_t
*) __res
)->bi_intfreq
);
263 cpm_uart_port_map
[cpm_uart_nr
++] = UART_SCC3
;
266 #ifdef CONFIG_SERIAL_CPM_SCC4
267 cpm_uart_ports
[UART_SCC4
].sccp
= &cpmp
->cp_scc
[3];
268 cpm_uart_ports
[UART_SCC4
].sccup
=
269 (scc_uart_t
*) & cpmp
->cp_dparam
[PROFF_SCC4
];
270 cpm_uart_ports
[UART_SCC4
].port
.mapbase
=
271 (unsigned long)&cpmp
->cp_scc
[3];
272 cpm_uart_ports
[UART_SCC4
].sccp
->scc_sccm
&=
273 ~(UART_SCCM_TX
| UART_SCCM_RX
);
274 cpm_uart_ports
[UART_SCC4
].sccp
->scc_gsmrl
&=
275 ~(SCC_GSMRL_ENR
| SCC_GSMRL_ENT
);
276 cpm_uart_ports
[UART_SCC4
].port
.uartclk
= (((bd_t
*) __res
)->bi_intfreq
);
277 cpm_uart_port_map
[cpm_uart_nr
++] = UART_SCC4
;
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