2 * linux/drivers/serial/cpm_uart.c
4 * Driver for CPM (SCC/SMC) serial ports; CPM1 definitions
6 * Maintainer: Kumar Gala (kumar.gala@freescale.com) (CPM2)
7 * Pantelis Antoniou (panto@intracom.gr) (CPM1)
9 * Copyright (C) 2004 Freescale Semiconductor, Inc.
10 * (C) 2004 Intracom, S.A.
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
28 #include <linux/config.h>
29 #include <linux/module.h>
30 #include <linux/tty.h>
31 #include <linux/ioport.h>
32 #include <linux/init.h>
33 #include <linux/serial.h>
34 #include <linux/console.h>
35 #include <linux/sysrq.h>
36 #include <linux/device.h>
37 #include <linux/bootmem.h>
38 #include <linux/dma-mapping.h>
43 #include <linux/serial_core.h>
44 #include <linux/kernel.h>
48 /**************************************************************/
50 void cpm_line_cr_cmd(int line
, int cmd
)
53 volatile cpm8xx_t
*cp
= cpmp
;
57 val
= mk_cr_cmd(CPM_CR_CH_SMC1
, cmd
) | CPM_CR_FLG
;
60 val
= mk_cr_cmd(CPM_CR_CH_SMC2
, cmd
) | CPM_CR_FLG
;
63 val
= mk_cr_cmd(CPM_CR_CH_SCC1
, cmd
) | CPM_CR_FLG
;
66 val
= mk_cr_cmd(CPM_CR_CH_SCC2
, cmd
) | CPM_CR_FLG
;
69 val
= mk_cr_cmd(CPM_CR_CH_SCC3
, cmd
) | CPM_CR_FLG
;
72 val
= mk_cr_cmd(CPM_CR_CH_SCC4
, cmd
) | CPM_CR_FLG
;
79 while (cp
->cp_cpcr
& CPM_CR_FLG
) ;
82 void smc1_lineif(struct uart_cpm_port
*pinfo
)
84 volatile cpm8xx_t
*cp
= cpmp
;
85 unsigned int iobits
= 0x000000c0;
87 if (!pinfo
->is_portb
) {
88 cp
->cp_pbpar
|= iobits
;
89 cp
->cp_pbdir
&= ~iobits
;
90 cp
->cp_pbodr
&= ~iobits
;
92 ((immap_t
*)IMAP_ADDR
)->im_ioport
.iop_papar
|= iobits
;
93 ((immap_t
*)IMAP_ADDR
)->im_ioport
.iop_padir
&= ~iobits
;
94 ((immap_t
*)IMAP_ADDR
)->im_ioport
.iop_paodr
&= ~iobits
;
97 #ifdef CONFIG_MPC885ADS
98 /* Enable SMC1 transceivers */
100 volatile uint __iomem
*bcsr1
= ioremap(BCSR1
, 4);
103 tmp
= in_be32(bcsr1
);
104 tmp
&= ~BCSR1_RS232EN_1
;
105 out_be32(bcsr1
, tmp
);
113 void smc2_lineif(struct uart_cpm_port
*pinfo
)
115 #ifdef CONFIG_MPC885ADS
116 volatile cpm8xx_t
*cp
= cpmp
;
117 volatile uint __iomem
*bcsr1
;
120 cp
->cp_pepar
|= 0x00000c00;
121 cp
->cp_pedir
&= ~0x00000c00;
122 cp
->cp_peso
&= ~0x00000400;
123 cp
->cp_peso
|= 0x00000800;
125 /* Enable SMC2 transceivers */
126 bcsr1
= ioremap(BCSR1
, 4);
127 tmp
= in_be32(bcsr1
);
128 tmp
&= ~BCSR1_RS232EN_2
;
129 out_be32(bcsr1
, tmp
);
136 void scc1_lineif(struct uart_cpm_port
*pinfo
)
138 /* XXX SCC1: insert port configuration here */
142 void scc2_lineif(struct uart_cpm_port
*pinfo
)
144 /* XXX SCC2: insert port configuration here */
148 void scc3_lineif(struct uart_cpm_port
*pinfo
)
150 /* XXX SCC3: insert port configuration here */
154 void scc4_lineif(struct uart_cpm_port
*pinfo
)
156 /* XXX SCC4: insert port configuration here */
161 * Allocate DP-Ram and memory buffers. We need to allocate a transmit and
162 * receive buffer descriptors from dual port ram, and a character
163 * buffer area from host mem. If we are allocating for the console we need
164 * to do it from bootmem
166 int cpm_uart_allocbuf(struct uart_cpm_port
*pinfo
, unsigned int is_con
)
172 dma_addr_t dma_addr
= 0;
174 pr_debug("CPM uart[%d]:allocbuf\n", pinfo
->port
.line
);
176 dpmemsz
= sizeof(cbd_t
) * (pinfo
->rx_nrfifos
+ pinfo
->tx_nrfifos
);
177 dp_offset
= cpm_dpalloc(dpmemsz
, 8);
178 if (IS_DPERR(dp_offset
)) {
180 "cpm_uart_cpm1.c: could not allocate buffer descriptors\n");
183 dp_mem
= cpm_dpram_addr(dp_offset
);
185 memsz
= L1_CACHE_ALIGN(pinfo
->rx_nrfifos
* pinfo
->rx_fifosize
) +
186 L1_CACHE_ALIGN(pinfo
->tx_nrfifos
* pinfo
->tx_fifosize
);
188 mem_addr
= (u8
*) m8xx_cpm_hostalloc(memsz
);
191 mem_addr
= dma_alloc_coherent(NULL
, memsz
, &dma_addr
,
194 if (mem_addr
== NULL
) {
195 cpm_dpfree(dp_offset
);
197 "cpm_uart_cpm1.c: could not allocate coherent memory\n");
201 pinfo
->dp_addr
= dp_offset
;
202 pinfo
->mem_addr
= mem_addr
;
203 pinfo
->dma_addr
= dma_addr
;
205 pinfo
->rx_buf
= mem_addr
;
206 pinfo
->tx_buf
= pinfo
->rx_buf
+ L1_CACHE_ALIGN(pinfo
->rx_nrfifos
207 * pinfo
->rx_fifosize
);
209 pinfo
->rx_bd_base
= (volatile cbd_t
*)dp_mem
;
210 pinfo
->tx_bd_base
= pinfo
->rx_bd_base
+ pinfo
->rx_nrfifos
;
215 void cpm_uart_freebuf(struct uart_cpm_port
*pinfo
)
217 dma_free_coherent(NULL
, L1_CACHE_ALIGN(pinfo
->rx_nrfifos
*
218 pinfo
->rx_fifosize
) +
219 L1_CACHE_ALIGN(pinfo
->tx_nrfifos
*
220 pinfo
->tx_fifosize
), pinfo
->mem_addr
,
223 cpm_dpfree(pinfo
->dp_addr
);
226 /* Setup any dynamic params in the uart desc */
227 int cpm_uart_init_portdesc(void)
229 pr_debug("CPM uart[-]:init portdesc\n");
232 #ifdef CONFIG_SERIAL_CPM_SMC1
233 cpm_uart_ports
[UART_SMC1
].smcp
= &cpmp
->cp_smc
[0];
235 * Is SMC1 being relocated?
237 # ifdef CONFIG_I2C_SPI_SMC1_UCODE_PATCH
238 cpm_uart_ports
[UART_SMC1
].smcup
=
239 (smc_uart_t
*) & cpmp
->cp_dparam
[0x3C0];
241 cpm_uart_ports
[UART_SMC1
].smcup
=
242 (smc_uart_t
*) & cpmp
->cp_dparam
[PROFF_SMC1
];
244 cpm_uart_ports
[UART_SMC1
].port
.mapbase
=
245 (unsigned long)&cpmp
->cp_smc
[0];
246 cpm_uart_ports
[UART_SMC1
].smcp
->smc_smcm
|= (SMCM_RX
| SMCM_TX
);
247 cpm_uart_ports
[UART_SMC1
].smcp
->smc_smcmr
&= ~(SMCMR_REN
| SMCMR_TEN
);
248 cpm_uart_ports
[UART_SMC1
].port
.uartclk
= (((bd_t
*) __res
)->bi_intfreq
);
249 cpm_uart_port_map
[cpm_uart_nr
++] = UART_SMC1
;
252 #ifdef CONFIG_SERIAL_CPM_SMC2
253 cpm_uart_ports
[UART_SMC2
].smcp
= &cpmp
->cp_smc
[1];
254 cpm_uart_ports
[UART_SMC2
].smcup
=
255 (smc_uart_t
*) & cpmp
->cp_dparam
[PROFF_SMC2
];
256 cpm_uart_ports
[UART_SMC2
].port
.mapbase
=
257 (unsigned long)&cpmp
->cp_smc
[1];
258 cpm_uart_ports
[UART_SMC2
].smcp
->smc_smcm
|= (SMCM_RX
| SMCM_TX
);
259 cpm_uart_ports
[UART_SMC2
].smcp
->smc_smcmr
&= ~(SMCMR_REN
| SMCMR_TEN
);
260 cpm_uart_ports
[UART_SMC2
].port
.uartclk
= (((bd_t
*) __res
)->bi_intfreq
);
261 cpm_uart_port_map
[cpm_uart_nr
++] = UART_SMC2
;
264 #ifdef CONFIG_SERIAL_CPM_SCC1
265 cpm_uart_ports
[UART_SCC1
].sccp
= &cpmp
->cp_scc
[0];
266 cpm_uart_ports
[UART_SCC1
].sccup
=
267 (scc_uart_t
*) & cpmp
->cp_dparam
[PROFF_SCC1
];
268 cpm_uart_ports
[UART_SCC1
].port
.mapbase
=
269 (unsigned long)&cpmp
->cp_scc
[0];
270 cpm_uart_ports
[UART_SCC1
].sccp
->scc_sccm
&=
271 ~(UART_SCCM_TX
| UART_SCCM_RX
);
272 cpm_uart_ports
[UART_SCC1
].sccp
->scc_gsmrl
&=
273 ~(SCC_GSMRL_ENR
| SCC_GSMRL_ENT
);
274 cpm_uart_ports
[UART_SCC1
].port
.uartclk
= (((bd_t
*) __res
)->bi_intfreq
);
275 cpm_uart_port_map
[cpm_uart_nr
++] = UART_SCC1
;
278 #ifdef CONFIG_SERIAL_CPM_SCC2
279 cpm_uart_ports
[UART_SCC2
].sccp
= &cpmp
->cp_scc
[1];
280 cpm_uart_ports
[UART_SCC2
].sccup
=
281 (scc_uart_t
*) & cpmp
->cp_dparam
[PROFF_SCC2
];
282 cpm_uart_ports
[UART_SCC2
].port
.mapbase
=
283 (unsigned long)&cpmp
->cp_scc
[1];
284 cpm_uart_ports
[UART_SCC2
].sccp
->scc_sccm
&=
285 ~(UART_SCCM_TX
| UART_SCCM_RX
);
286 cpm_uart_ports
[UART_SCC2
].sccp
->scc_gsmrl
&=
287 ~(SCC_GSMRL_ENR
| SCC_GSMRL_ENT
);
288 cpm_uart_ports
[UART_SCC2
].port
.uartclk
= (((bd_t
*) __res
)->bi_intfreq
);
289 cpm_uart_port_map
[cpm_uart_nr
++] = UART_SCC2
;
292 #ifdef CONFIG_SERIAL_CPM_SCC3
293 cpm_uart_ports
[UART_SCC3
].sccp
= &cpmp
->cp_scc
[2];
294 cpm_uart_ports
[UART_SCC3
].sccup
=
295 (scc_uart_t
*) & cpmp
->cp_dparam
[PROFF_SCC3
];
296 cpm_uart_ports
[UART_SCC3
].port
.mapbase
=
297 (unsigned long)&cpmp
->cp_scc
[2];
298 cpm_uart_ports
[UART_SCC3
].sccp
->scc_sccm
&=
299 ~(UART_SCCM_TX
| UART_SCCM_RX
);
300 cpm_uart_ports
[UART_SCC3
].sccp
->scc_gsmrl
&=
301 ~(SCC_GSMRL_ENR
| SCC_GSMRL_ENT
);
302 cpm_uart_ports
[UART_SCC3
].port
.uartclk
= (((bd_t
*) __res
)->bi_intfreq
);
303 cpm_uart_port_map
[cpm_uart_nr
++] = UART_SCC3
;
306 #ifdef CONFIG_SERIAL_CPM_SCC4
307 cpm_uart_ports
[UART_SCC4
].sccp
= &cpmp
->cp_scc
[3];
308 cpm_uart_ports
[UART_SCC4
].sccup
=
309 (scc_uart_t
*) & cpmp
->cp_dparam
[PROFF_SCC4
];
310 cpm_uart_ports
[UART_SCC4
].port
.mapbase
=
311 (unsigned long)&cpmp
->cp_scc
[3];
312 cpm_uart_ports
[UART_SCC4
].sccp
->scc_sccm
&=
313 ~(UART_SCCM_TX
| UART_SCCM_RX
);
314 cpm_uart_ports
[UART_SCC4
].sccp
->scc_gsmrl
&=
315 ~(SCC_GSMRL_ENR
| SCC_GSMRL_ENT
);
316 cpm_uart_ports
[UART_SCC4
].port
.uartclk
= (((bd_t
*) __res
)->bi_intfreq
);
317 cpm_uart_port_map
[cpm_uart_nr
++] = UART_SCC4
;
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