Merge 'acpi-2.6.12' branch into to-akpm
[deliverable/linux.git] / drivers / serial / crisv10.c
1 /* $Id: serial.c,v 1.25 2004/09/29 10:33:49 starvik Exp $
2 *
3 * Serial port driver for the ETRAX 100LX chip
4 *
5 * Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Axis Communications AB
6 *
7 * Many, many authors. Based once upon a time on serial.c for 16x50.
8 *
9 * $Log: serial.c,v $
10 * Revision 1.25 2004/09/29 10:33:49 starvik
11 * Resolved a dealock when printing debug from kernel.
12 *
13 * Revision 1.24 2004/08/27 23:25:59 johana
14 * rs_set_termios() must call change_speed() if c_iflag has changed or
15 * automatic XOFF handling will be enabled and transmitter will stop
16 * if 0x13 is received.
17 *
18 * Revision 1.23 2004/08/24 06:57:13 starvik
19 * More whitespace cleanup
20 *
21 * Revision 1.22 2004/08/24 06:12:20 starvik
22 * Whitespace cleanup
23 *
24 * Revision 1.20 2004/05/24 12:00:20 starvik
25 * Big merge of stuff from Linux 2.4 (e.g. manual mode for the serial port).
26 *
27 * Revision 1.19 2004/05/17 13:12:15 starvik
28 * Kernel console hook
29 * Big merge from Linux 2.4 still pending.
30 *
31 * Revision 1.18 2003/10/28 07:18:30 starvik
32 * Compiles with debug info
33 *
34 * Revision 1.17 2003/07/04 08:27:37 starvik
35 * Merge of Linux 2.5.74
36 *
37 * Revision 1.16 2003/06/13 10:05:19 johana
38 * Help the user to avoid trouble by:
39 * Forcing mixed mode for status/control lines if not all pins are used.
40 *
41 * Revision 1.15 2003/06/13 09:43:01 johana
42 * Merged in the following changes from os/linux/arch/cris/drivers/serial.c
43 * + some minor changes to reduce diff.
44 *
45 * Revision 1.49 2003/05/30 11:31:54 johana
46 * Merged in change-branch--serial9bit that adds CMSPAR support for sticky
47 * parity (mark/space)
48 *
49 * Revision 1.48 2003/05/30 11:03:57 johana
50 * Implemented rs_send_xchar() by disabling the DMA and writing manually.
51 * Added e100_disable_txdma_channel() and e100_enable_txdma_channel().
52 * Fixed rs_throttle() and rs_unthrottle() to properly call rs_send_xchar
53 * instead of setting info->x_char and check the CRTSCTS flag before
54 * controlling the rts pin.
55 *
56 * Revision 1.14 2003/04/09 08:12:44 pkj
57 * Corrected typo changes made upstream.
58 *
59 * Revision 1.13 2003/04/09 05:20:47 starvik
60 * Merge of Linux 2.5.67
61 *
62 * Revision 1.11 2003/01/22 06:48:37 starvik
63 * Fixed warnings issued by GCC 3.2.1
64 *
65 * Revision 1.9 2002/12/13 09:07:47 starvik
66 * Alert user that RX_TIMEOUT_TICKS==0 doesn't work
67 *
68 * Revision 1.8 2002/12/11 13:13:57 starvik
69 * Added arch/ to v10 specific includes
70 * Added fix from Linux 2.4 in serial.c (flush_to_flip_buffer)
71 *
72 * Revision 1.7 2002/12/06 07:13:57 starvik
73 * Corrected work queue stuff
74 * Removed CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST
75 *
76 * Revision 1.6 2002/11/21 07:17:46 starvik
77 * Change static inline to extern inline where otherwise outlined with gcc-3.2
78 *
79 * Revision 1.5 2002/11/14 15:59:49 starvik
80 * Linux 2.5 port of the latest serial driver from 2.4. The work queue stuff
81 * probably doesn't work yet.
82 *
83 * Revision 1.42 2002/11/05 09:08:47 johana
84 * Better implementation of rs_stop() and rs_start() that uses the XOFF
85 * register to start/stop transmission.
86 * change_speed() also initilises XOFF register correctly so that
87 * auto_xoff is enabled when IXON flag is set by user.
88 * This gives fast XOFF response times.
89 *
90 * Revision 1.41 2002/11/04 18:40:57 johana
91 * Implemented rs_stop() and rs_start().
92 * Simple tests using hwtestserial indicates that this should be enough
93 * to make it work.
94 *
95 * Revision 1.40 2002/10/14 05:33:18 starvik
96 * RS-485 uses fast timers even if SERIAL_FAST_TIMER is disabled
97 *
98 * Revision 1.39 2002/09/30 21:00:57 johana
99 * Support for CONFIG_ETRAX_SERx_DTR_RI_DSR_CD_MIXED where the status and
100 * control pins can be mixed between PA and PB.
101 * If no serial port uses MIXED old solution is used
102 * (saves a few bytes and cycles).
103 * control_pins struct uses masks instead of bit numbers.
104 * Corrected dummy values and polarity in line_info() so
105 * /proc/tty/driver/serial is now correct.
106 * (the E100_xxx_GET() macros is really active low - perhaps not obvious)
107 *
108 * Revision 1.38 2002/08/23 11:01:36 starvik
109 * Check that serial port is enabled in all interrupt handlers to avoid
110 * restarts of DMA channels not assigned to serial ports
111 *
112 * Revision 1.37 2002/08/13 13:02:37 bjornw
113 * Removed some warnings because of unused code
114 *
115 * Revision 1.36 2002/08/08 12:50:01 starvik
116 * Serial interrupt is shared with synchronous serial port driver
117 *
118 * Revision 1.35 2002/06/03 10:40:49 starvik
119 * Increased RS-485 RTS toggle timer to 2 characters
120 *
121 * Revision 1.34 2002/05/28 18:59:36 johana
122 * Whitespace and comment fixing to be more like etrax100ser.c 1.71.
123 *
124 * Revision 1.33 2002/05/28 17:55:43 johana
125 * RS-485 uses FAST_TIMER if enabled, and starts a short (one char time)
126 * timer from tranismit_chars (interrupt context).
127 * The timer toggles RTS in interrupt context when expired giving minimum
128 * latencies.
129 *
130 * Revision 1.32 2002/05/22 13:58:00 johana
131 * Renamed rs_write() to raw_write() and made it inline.
132 * New rs_write() handles RS-485 if configured and enabled
133 * (moved code from e100_write_rs485()).
134 * RS-485 ioctl's uses copy_from_user() instead of verify_area().
135 *
136 * Revision 1.31 2002/04/22 11:20:03 johana
137 * Updated copyright years.
138 *
139 * Revision 1.30 2002/04/22 09:39:12 johana
140 * RS-485 support compiles.
141 *
142 * Revision 1.29 2002/01/14 16:10:01 pkj
143 * Allocate the receive buffers dynamically. The static 4kB buffer was
144 * too small for the peaks. This means that we can get rid of the extra
145 * buffer and the copying to it. It also means we require less memory
146 * under normal operations, but can use more when needed (there is a
147 * cap at 64kB for safety reasons). If there is no memory available
148 * we panic(), and die a horrible death...
149 *
150 * Revision 1.28 2001/12/18 15:04:53 johana
151 * Cleaned up write_rs485() - now it works correctly without padding extra
152 * char.
153 * Added sane default initialisation of rs485.
154 * Added #ifdef around dummy variables.
155 *
156 * Revision 1.27 2001/11/29 17:00:41 pkj
157 * 2kB seems to be too small a buffer when using 921600 bps,
158 * so increase it to 4kB (this was already done for the elinux
159 * version of the serial driver).
160 *
161 * Revision 1.26 2001/11/19 14:20:41 pkj
162 * Minor changes to comments and unused code.
163 *
164 * Revision 1.25 2001/11/12 20:03:43 pkj
165 * Fixed compiler warnings.
166 *
167 * Revision 1.24 2001/11/12 15:10:05 pkj
168 * Total redesign of the receiving part of the serial driver.
169 * Uses eight chained descriptors to write to a 4kB buffer.
170 * This data is then serialised into a 2kB buffer. From there it
171 * is copied into the TTY's flip buffers when they become available.
172 * A lot of copying, and the sizes of the buffers might need to be
173 * tweaked, but all in all it should work better than the previous
174 * version, without the need to modify the TTY code in any way.
175 * Also note that erroneous bytes are now correctly marked in the
176 * flag buffers (instead of always marking the first byte).
177 *
178 * Revision 1.23 2001/10/30 17:53:26 pkj
179 * * Set info->uses_dma to 0 when a port is closed.
180 * * Mark the timer1 interrupt as a fast one (SA_INTERRUPT).
181 * * Call start_flush_timer() in start_receive() if
182 * CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST is defined.
183 *
184 * Revision 1.22 2001/10/30 17:44:03 pkj
185 * Use %lu for received and transmitted counters in line_info().
186 *
187 * Revision 1.21 2001/10/30 17:40:34 pkj
188 * Clean-up. The only change to functionality is that
189 * CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS(=5) is used instead of
190 * MAX_FLUSH_TIME(=8).
191 *
192 * Revision 1.20 2001/10/30 15:24:49 johana
193 * Added char_time stuff from 2.0 driver.
194 *
195 * Revision 1.19 2001/10/30 15:23:03 johana
196 * Merged with 1.13.2 branch + fixed indentation
197 * and changed CONFIG_ETRAX100_XYS to CONFIG_ETRAX_XYZ
198 *
199 * Revision 1.18 2001/09/24 09:27:22 pkj
200 * Completed ext_baud_table[] in cflag_to_baud() and cflag_to_etrax_baud().
201 *
202 * Revision 1.17 2001/08/24 11:32:49 ronny
203 * More fixes for the CONFIG_ETRAX_SERIAL_PORT0 define.
204 *
205 * Revision 1.16 2001/08/24 07:56:22 ronny
206 * Added config ifdefs around ser0 irq requests.
207 *
208 * Revision 1.15 2001/08/16 09:10:31 bjarne
209 * serial.c - corrected the initialization of rs_table, the wrong defines
210 * where used.
211 * Corrected a test in timed_flush_handler.
212 * Changed configured to enabled.
213 * serial.h - Changed configured to enabled.
214 *
215 * Revision 1.14 2001/08/15 07:31:23 bjarne
216 * Introduced two new members to the e100_serial struct.
217 * configured - Will be set to 1 if the port has been configured in .config
218 * uses_dma - Should be set to 1 if the port uses DMA. Currently it is set
219 * to 1
220 * when a port is opened. This is used to limit the DMA interrupt
221 * routines to only manipulate DMA channels actually used by the
222 * serial driver.
223 *
224 * Revision 1.13.2.2 2001/10/17 13:57:13 starvik
225 * Receiver was broken by the break fixes
226 *
227 * Revision 1.13.2.1 2001/07/20 13:57:39 ronny
228 * Merge with new stuff from etrax100ser.c. Works but haven't checked stuff
229 * like break handling.
230 *
231 * Revision 1.13 2001/05/09 12:40:31 johana
232 * Use DMA_NBR and IRQ_NBR defines from dma.h and irq.h
233 *
234 * Revision 1.12 2001/04/19 12:23:07 bjornw
235 * CONFIG_RS485 -> CONFIG_ETRAX_RS485
236 *
237 * Revision 1.11 2001/04/05 14:29:48 markusl
238 * Updated according to review remarks i.e.
239 * -Use correct types in port structure to avoid compiler warnings
240 * -Try to use IO_* macros whenever possible
241 * -Open should never return -EBUSY
242 *
243 * Revision 1.10 2001/03/05 13:14:07 bjornw
244 * Another spelling fix
245 *
246 * Revision 1.9 2001/02/23 13:46:38 bjornw
247 * Spellling check
248 *
249 * Revision 1.8 2001/01/23 14:56:35 markusl
250 * Made use of ser1 optional
251 * Needed by USB
252 *
253 * Revision 1.7 2001/01/19 16:14:48 perf
254 * Added kernel options for serial ports 234.
255 * Changed option names from CONFIG_ETRAX100_XYZ to CONFIG_ETRAX_XYZ.
256 *
257 * Revision 1.6 2000/11/22 16:36:09 bjornw
258 * Please marketing by using the correct case when spelling Etrax.
259 *
260 * Revision 1.5 2000/11/21 16:43:37 bjornw
261 * Fixed so it compiles under CONFIG_SVINTO_SIM
262 *
263 * Revision 1.4 2000/11/15 17:34:12 bjornw
264 * Added a timeout timer for flushing input channels. The interrupt-based
265 * fast flush system should be easy to merge with this later (works the same
266 * way, only with an irq instead of a system timer_list)
267 *
268 * Revision 1.3 2000/11/13 17:19:57 bjornw
269 * * Incredibly, this almost complete rewrite of serial.c worked (at least
270 * for output) the first time.
271 *
272 * Items worth noticing:
273 *
274 * No Etrax100 port 1 workarounds (does only compile on 2.4 anyway now)
275 * RS485 is not ported (why can't it be done in userspace as on x86 ?)
276 * Statistics done through async_icount - if any more stats are needed,
277 * that's the place to put them or in an arch-dep version of it.
278 * timeout_interrupt and the other fast timeout stuff not ported yet
279 * There be dragons in this 3k+ line driver
280 *
281 * Revision 1.2 2000/11/10 16:50:28 bjornw
282 * First shot at a 2.4 port, does not compile totally yet
283 *
284 * Revision 1.1 2000/11/10 16:47:32 bjornw
285 * Added verbatim copy of rev 1.49 etrax100ser.c from elinux
286 *
287 * Revision 1.49 2000/10/30 15:47:14 tobiasa
288 * Changed version number.
289 *
290 * Revision 1.48 2000/10/25 11:02:43 johana
291 * Changed %ul to %lu in printf's
292 *
293 * Revision 1.47 2000/10/18 15:06:53 pkj
294 * Compile correctly with CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST and
295 * CONFIG_ETRAX_SERIAL_PROC_ENTRY together.
296 * Some clean-up of the /proc/serial file.
297 *
298 * Revision 1.46 2000/10/16 12:59:40 johana
299 * Added CONFIG_ETRAX_SERIAL_PROC_ENTRY for statistics and debug info.
300 *
301 * Revision 1.45 2000/10/13 17:10:59 pkj
302 * Do not flush DMAs while flipping TTY buffers.
303 *
304 * Revision 1.44 2000/10/13 16:34:29 pkj
305 * Added a delay in ser_interrupt() for 2.3ms when an error is detected.
306 * We do not know why this delay is required yet, but without it the
307 * irmaflash program does not work (this was the program that needed
308 * the ser_interrupt() to be needed in the first place). This should not
309 * affect normal use of the serial ports.
310 *
311 * Revision 1.43 2000/10/13 16:30:44 pkj
312 * New version of the fast flush of serial buffers code. This time
313 * it is localized to the serial driver and uses a fast timer to
314 * do the work.
315 *
316 * Revision 1.42 2000/10/13 14:54:26 bennyo
317 * Fix for switching RTS when using rs485
318 *
319 * Revision 1.41 2000/10/12 11:43:44 pkj
320 * Cleaned up a number of comments.
321 *
322 * Revision 1.40 2000/10/10 11:58:39 johana
323 * Made RS485 support generic for all ports.
324 * Toggle rts in interrupt if no delay wanted.
325 * WARNING: No true transmitter empty check??
326 * Set d_wait bit when sending data so interrupt is delayed until
327 * fifo flushed. (Fix tcdrain() problem)
328 *
329 * Revision 1.39 2000/10/04 16:08:02 bjornw
330 * * Use virt_to_phys etc. for DMA addresses
331 * * Removed CONFIG_FLUSH_DMA_FAST hacks
332 * * Indentation fix
333 *
334 * Revision 1.38 2000/10/02 12:27:10 mattias
335 * * added variable used when using fast flush on serial dma.
336 * (CONFIG_FLUSH_DMA_FAST)
337 *
338 * Revision 1.37 2000/09/27 09:44:24 pkj
339 * Uncomment definition of SERIAL_HANDLE_EARLY_ERRORS.
340 *
341 * Revision 1.36 2000/09/20 13:12:52 johana
342 * Support for CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS:
343 * Number of timer ticks between flush of receive fifo (1 tick = 10ms).
344 * Try 0-3 for low latency applications. Approx 5 for high load
345 * applications (e.g. PPP). Maybe this should be more adaptive some day...
346 *
347 * Revision 1.35 2000/09/20 10:36:08 johana
348 * Typo in get_lsr_info()
349 *
350 * Revision 1.34 2000/09/20 10:29:59 johana
351 * Let rs_chars_in_buffer() check fifo content as well.
352 * get_lsr_info() might work now (not tested).
353 * Easier to change the port to debug.
354 *
355 * Revision 1.33 2000/09/13 07:52:11 torbjore
356 * Support RS485
357 *
358 * Revision 1.32 2000/08/31 14:45:37 bjornw
359 * After sending a break we need to reset the transmit DMA channel
360 *
361 * Revision 1.31 2000/06/21 12:13:29 johana
362 * Fixed wait for all chars sent when closing port.
363 * (Used to always take 1 second!)
364 * Added shadows for directions of status/ctrl signals.
365 *
366 * Revision 1.30 2000/05/29 16:27:55 bjornw
367 * Simulator ifdef moved a bit
368 *
369 * Revision 1.29 2000/05/09 09:40:30 mattias
370 * * Added description of dma registers used in timeout_interrupt
371 * * Removed old code
372 *
373 * Revision 1.28 2000/05/08 16:38:58 mattias
374 * * Bugfix for flushing fifo in timeout_interrupt
375 * Problem occurs when bluetooth stack waits for a small number of bytes
376 * containing an event acknowledging free buffers in bluetooth HW
377 * As before, data was stuck in fifo until more data came on uart and
378 * flushed it up to the stack.
379 *
380 * Revision 1.27 2000/05/02 09:52:28 jonasd
381 * Added fix for peculiar etrax behaviour when eop is forced on an empty
382 * fifo. This is used when flashing the IRMA chip. Disabled by default.
383 *
384 * Revision 1.26 2000/03/29 15:32:02 bjornw
385 * 2.0.34 updates
386 *
387 * Revision 1.25 2000/02/16 16:59:36 bjornw
388 * * Receive DMA directly into the flip-buffer, eliminating an intermediary
389 * receive buffer and a memcpy. Will avoid some overruns.
390 * * Error message on debug port if an overrun or flip buffer overrun occurs.
391 * * Just use the first byte in the flag flip buffer for errors.
392 * * Check for timeout on the serial ports only each 5/100 s, not 1/100.
393 *
394 * Revision 1.24 2000/02/09 18:02:28 bjornw
395 * * Clear serial errors (overrun, framing, parity) correctly. Before, the
396 * receiver would get stuck if an error occurred and we did not restart
397 * the input DMA.
398 * * Cosmetics (indentation, some code made into inlines)
399 * * Some more debug options
400 * * Actually shut down the serial port (DMA irq, DMA reset, receiver stop)
401 * when the last open is closed. Corresponding fixes in startup().
402 * * rs_close() "tx FIFO wait" code moved into right place, bug & -> && fixed
403 * and make a special case out of port 1 (R_DMA_CHx_STATUS is broken for that)
404 * * e100_disable_rx/enable_rx just disables/enables the receiver, not RTS
405 *
406 * Revision 1.23 2000/01/24 17:46:19 johana
407 * Wait for flush of DMA/FIFO when closing port.
408 *
409 * Revision 1.22 2000/01/20 18:10:23 johana
410 * Added TIOCMGET ioctl to return modem status.
411 * Implemented modem status/control that works with the extra signals
412 * (DTR, DSR, RI,CD) as well.
413 * 3 different modes supported:
414 * ser0 on PB (Bundy), ser1 on PB (Lisa) and ser2 on PA (Bundy)
415 * Fixed DEF_TX value that caused the serial transmitter pin (txd) to go to 0 when
416 * closing the last filehandle, NASTY!.
417 * Added break generation, not tested though!
418 * Use SA_SHIRQ when request_irq() for ser2 and ser3 (shared with) par0 and par1.
419 * You can't use them at the same time (yet..), but you can hopefully switch
420 * between ser2/par0, ser3/par1 with the same kernel config.
421 * Replaced some magic constants with defines
422 *
423 *
424 */
425
426 static char *serial_version = "$Revision: 1.25 $";
427
428 #include <linux/config.h>
429 #include <linux/types.h>
430 #include <linux/errno.h>
431 #include <linux/signal.h>
432 #include <linux/sched.h>
433 #include <linux/timer.h>
434 #include <linux/interrupt.h>
435 #include <linux/tty.h>
436 #include <linux/tty_flip.h>
437 #include <linux/major.h>
438 #include <linux/string.h>
439 #include <linux/fcntl.h>
440 #include <linux/mm.h>
441 #include <linux/slab.h>
442 #include <linux/init.h>
443 #include <asm/uaccess.h>
444 #include <linux/kernel.h>
445
446 #include <asm/io.h>
447 #include <asm/irq.h>
448 #include <asm/system.h>
449 #include <asm/segment.h>
450 #include <asm/bitops.h>
451 #include <linux/delay.h>
452
453 #include <asm/arch/svinto.h>
454
455 /* non-arch dependent serial structures are in linux/serial.h */
456 #include <linux/serial.h>
457 /* while we keep our own stuff (struct e100_serial) in a local .h file */
458 #include "serial.h"
459 #include <asm/fasttimer.h>
460
461 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
462 #ifndef CONFIG_ETRAX_FAST_TIMER
463 #error "Enable FAST_TIMER to use SERIAL_FAST_TIMER"
464 #endif
465 #endif
466
467 #if defined(CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS) && \
468 (CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS == 0)
469 #error "RX_TIMEOUT_TICKS == 0 not allowed, use 1"
470 #endif
471
472 #if defined(CONFIG_ETRAX_RS485_ON_PA) && defined(CONFIG_ETRAX_RS485_ON_PORT_G)
473 #error "Disable either CONFIG_ETRAX_RS485_ON_PA or CONFIG_ETRAX_RS485_ON_PORT_G"
474 #endif
475
476 /*
477 * All of the compatibilty code so we can compile serial.c against
478 * older kernels is hidden in serial_compat.h
479 */
480 #if defined(LOCAL_HEADERS)
481 #include "serial_compat.h"
482 #endif
483
484 #define _INLINE_ inline
485
486 struct tty_driver *serial_driver;
487
488 /* serial subtype definitions */
489 #ifndef SERIAL_TYPE_NORMAL
490 #define SERIAL_TYPE_NORMAL 1
491 #endif
492
493 /* number of characters left in xmit buffer before we ask for more */
494 #define WAKEUP_CHARS 256
495
496 //#define SERIAL_DEBUG_INTR
497 //#define SERIAL_DEBUG_OPEN
498 //#define SERIAL_DEBUG_FLOW
499 //#define SERIAL_DEBUG_DATA
500 //#define SERIAL_DEBUG_THROTTLE
501 //#define SERIAL_DEBUG_IO /* Debug for Extra control and status pins */
502 //#define SERIAL_DEBUG_LINE 0 /* What serport we want to debug */
503
504 /* Enable this to use serial interrupts to handle when you
505 expect the first received event on the serial port to
506 be an error, break or similar. Used to be able to flash IRMA
507 from eLinux */
508 #define SERIAL_HANDLE_EARLY_ERRORS
509
510 /* Defined and used in n_tty.c, but we need it here as well */
511 #define TTY_THRESHOLD_THROTTLE 128
512
513 /* Due to buffersizes and threshold values, our SERIAL_DESCR_BUF_SIZE
514 * must not be to high or flow control won't work if we leave it to the tty
515 * layer so we have our own throttling in flush_to_flip
516 * TTY_FLIPBUF_SIZE=512,
517 * TTY_THRESHOLD_THROTTLE/UNTHROTTLE=128
518 * BUF_SIZE can't be > 128
519 */
520 /* Currently 16 descriptors x 128 bytes = 2048 bytes */
521 #define SERIAL_DESCR_BUF_SIZE 256
522
523 #define SERIAL_PRESCALE_BASE 3125000 /* 3.125MHz */
524 #define DEF_BAUD_BASE SERIAL_PRESCALE_BASE
525
526 /* We don't want to load the system with massive fast timer interrupt
527 * on high baudrates so limit it to 250 us (4kHz) */
528 #define MIN_FLUSH_TIME_USEC 250
529
530 /* Add an x here to log a lot of timer stuff */
531 #define TIMERD(x)
532 /* Debug details of interrupt handling */
533 #define DINTR1(x) /* irq on/off, errors */
534 #define DINTR2(x) /* tx and rx */
535 /* Debug flip buffer stuff */
536 #define DFLIP(x)
537 /* Debug flow control and overview of data flow */
538 #define DFLOW(x)
539 #define DBAUD(x)
540 #define DLOG_INT_TRIG(x)
541
542 //#define DEBUG_LOG_INCLUDED
543 #ifndef DEBUG_LOG_INCLUDED
544 #define DEBUG_LOG(line, string, value)
545 #else
546 struct debug_log_info
547 {
548 unsigned long time;
549 unsigned long timer_data;
550 // int line;
551 const char *string;
552 int value;
553 };
554 #define DEBUG_LOG_SIZE 4096
555
556 struct debug_log_info debug_log[DEBUG_LOG_SIZE];
557 int debug_log_pos = 0;
558
559 #define DEBUG_LOG(_line, _string, _value) do { \
560 if ((_line) == SERIAL_DEBUG_LINE) {\
561 debug_log_func(_line, _string, _value); \
562 }\
563 }while(0)
564
565 void debug_log_func(int line, const char *string, int value)
566 {
567 if (debug_log_pos < DEBUG_LOG_SIZE) {
568 debug_log[debug_log_pos].time = jiffies;
569 debug_log[debug_log_pos].timer_data = *R_TIMER_DATA;
570 // debug_log[debug_log_pos].line = line;
571 debug_log[debug_log_pos].string = string;
572 debug_log[debug_log_pos].value = value;
573 debug_log_pos++;
574 }
575 /*printk(string, value);*/
576 }
577 #endif
578
579 #ifndef CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS
580 /* Default number of timer ticks before flushing rx fifo
581 * When using "little data, low latency applications: use 0
582 * When using "much data applications (PPP)" use ~5
583 */
584 #define CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS 5
585 #endif
586
587 unsigned long timer_data_to_ns(unsigned long timer_data);
588
589 static void change_speed(struct e100_serial *info);
590 static void rs_throttle(struct tty_struct * tty);
591 static void rs_wait_until_sent(struct tty_struct *tty, int timeout);
592 static int rs_write(struct tty_struct * tty, int from_user,
593 const unsigned char *buf, int count);
594 extern _INLINE_ int rs_raw_write(struct tty_struct * tty, int from_user,
595 const unsigned char *buf, int count);
596 #ifdef CONFIG_ETRAX_RS485
597 static int e100_write_rs485(struct tty_struct * tty, int from_user,
598 const unsigned char *buf, int count);
599 #endif
600 static int get_lsr_info(struct e100_serial * info, unsigned int *value);
601
602
603 #define DEF_BAUD 115200 /* 115.2 kbit/s */
604 #define STD_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
605 #define DEF_RX 0x20 /* or SERIAL_CTRL_W >> 8 */
606 /* Default value of tx_ctrl register: has txd(bit 7)=1 (idle) as default */
607 #define DEF_TX 0x80 /* or SERIAL_CTRL_B */
608
609 /* offsets from R_SERIALx_CTRL */
610
611 #define REG_DATA 0
612 #define REG_DATA_STATUS32 0 /* this is the 32 bit register R_SERIALx_READ */
613 #define REG_TR_DATA 0
614 #define REG_STATUS 1
615 #define REG_TR_CTRL 1
616 #define REG_REC_CTRL 2
617 #define REG_BAUD 3
618 #define REG_XOFF 4 /* this is a 32 bit register */
619
620 /* The bitfields are the same for all serial ports */
621 #define SER_RXD_MASK IO_MASK(R_SERIAL0_STATUS, rxd)
622 #define SER_DATA_AVAIL_MASK IO_MASK(R_SERIAL0_STATUS, data_avail)
623 #define SER_FRAMING_ERR_MASK IO_MASK(R_SERIAL0_STATUS, framing_err)
624 #define SER_PAR_ERR_MASK IO_MASK(R_SERIAL0_STATUS, par_err)
625 #define SER_OVERRUN_MASK IO_MASK(R_SERIAL0_STATUS, overrun)
626
627 #define SER_ERROR_MASK (SER_OVERRUN_MASK | SER_PAR_ERR_MASK | SER_FRAMING_ERR_MASK)
628
629 /* Values for info->errorcode */
630 #define ERRCODE_SET_BREAK (TTY_BREAK)
631 #define ERRCODE_INSERT 0x100
632 #define ERRCODE_INSERT_BREAK (ERRCODE_INSERT | TTY_BREAK)
633
634 #define FORCE_EOP(info) *R_SET_EOP = 1U << info->iseteop;
635
636 /*
637 * General note regarding the use of IO_* macros in this file:
638 *
639 * We will use the bits defined for DMA channel 6 when using various
640 * IO_* macros (e.g. IO_STATE, IO_MASK, IO_EXTRACT) and _assume_ they are
641 * the same for all channels (which of course they are).
642 *
643 * We will also use the bits defined for serial port 0 when writing commands
644 * to the different ports, as these bits too are the same for all ports.
645 */
646
647
648 /* Mask for the irqs possibly enabled in R_IRQ_MASK1_RD etc. */
649 static const unsigned long e100_ser_int_mask = 0
650 #ifdef CONFIG_ETRAX_SERIAL_PORT0
651 | IO_MASK(R_IRQ_MASK1_RD, ser0_data) | IO_MASK(R_IRQ_MASK1_RD, ser0_ready)
652 #endif
653 #ifdef CONFIG_ETRAX_SERIAL_PORT1
654 | IO_MASK(R_IRQ_MASK1_RD, ser1_data) | IO_MASK(R_IRQ_MASK1_RD, ser1_ready)
655 #endif
656 #ifdef CONFIG_ETRAX_SERIAL_PORT2
657 | IO_MASK(R_IRQ_MASK1_RD, ser2_data) | IO_MASK(R_IRQ_MASK1_RD, ser2_ready)
658 #endif
659 #ifdef CONFIG_ETRAX_SERIAL_PORT3
660 | IO_MASK(R_IRQ_MASK1_RD, ser3_data) | IO_MASK(R_IRQ_MASK1_RD, ser3_ready)
661 #endif
662 ;
663 unsigned long r_alt_ser_baudrate_shadow = 0;
664
665 /* this is the data for the four serial ports in the etrax100 */
666 /* DMA2(ser2), DMA4(ser3), DMA6(ser0) or DMA8(ser1) */
667 /* R_DMA_CHx_CLR_INTR, R_DMA_CHx_FIRST, R_DMA_CHx_CMD */
668
669 static struct e100_serial rs_table[] = {
670 { .baud = DEF_BAUD,
671 .port = (unsigned char *)R_SERIAL0_CTRL,
672 .irq = 1U << 12, /* uses DMA 6 and 7 */
673 .oclrintradr = R_DMA_CH6_CLR_INTR,
674 .ofirstadr = R_DMA_CH6_FIRST,
675 .ocmdadr = R_DMA_CH6_CMD,
676 .ostatusadr = R_DMA_CH6_STATUS,
677 .iclrintradr = R_DMA_CH7_CLR_INTR,
678 .ifirstadr = R_DMA_CH7_FIRST,
679 .icmdadr = R_DMA_CH7_CMD,
680 .idescradr = R_DMA_CH7_DESCR,
681 .flags = STD_FLAGS,
682 .rx_ctrl = DEF_RX,
683 .tx_ctrl = DEF_TX,
684 .iseteop = 2,
685 #ifdef CONFIG_ETRAX_SERIAL_PORT0
686 .enabled = 1,
687 #ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA6_OUT
688 .dma_out_enabled = 1,
689 #else
690 .dma_out_enabled = 0,
691 #endif
692 #ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA7_IN
693 .dma_in_enabled = 1,
694 #else
695 .dma_in_enabled = 0
696 #endif
697 #else
698 .enabled = 0,
699 .dma_out_enabled = 0,
700 .dma_in_enabled = 0
701 #endif
702
703 }, /* ttyS0 */
704 #ifndef CONFIG_SVINTO_SIM
705 { .baud = DEF_BAUD,
706 .port = (unsigned char *)R_SERIAL1_CTRL,
707 .irq = 1U << 16, /* uses DMA 8 and 9 */
708 .oclrintradr = R_DMA_CH8_CLR_INTR,
709 .ofirstadr = R_DMA_CH8_FIRST,
710 .ocmdadr = R_DMA_CH8_CMD,
711 .ostatusadr = R_DMA_CH8_STATUS,
712 .iclrintradr = R_DMA_CH9_CLR_INTR,
713 .ifirstadr = R_DMA_CH9_FIRST,
714 .icmdadr = R_DMA_CH9_CMD,
715 .idescradr = R_DMA_CH9_DESCR,
716 .flags = STD_FLAGS,
717 .rx_ctrl = DEF_RX,
718 .tx_ctrl = DEF_TX,
719 .iseteop = 3,
720 #ifdef CONFIG_ETRAX_SERIAL_PORT1
721 .enabled = 1,
722 #ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA8_OUT
723 .dma_out_enabled = 1,
724 #else
725 .dma_out_enabled = 0,
726 #endif
727 #ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA9_IN
728 .dma_in_enabled = 1,
729 #else
730 .dma_in_enabled = 0
731 #endif
732 #else
733 .enabled = 0,
734 .dma_out_enabled = 0,
735 .dma_in_enabled = 0
736 #endif
737 }, /* ttyS1 */
738
739 { .baud = DEF_BAUD,
740 .port = (unsigned char *)R_SERIAL2_CTRL,
741 .irq = 1U << 4, /* uses DMA 2 and 3 */
742 .oclrintradr = R_DMA_CH2_CLR_INTR,
743 .ofirstadr = R_DMA_CH2_FIRST,
744 .ocmdadr = R_DMA_CH2_CMD,
745 .ostatusadr = R_DMA_CH2_STATUS,
746 .iclrintradr = R_DMA_CH3_CLR_INTR,
747 .ifirstadr = R_DMA_CH3_FIRST,
748 .icmdadr = R_DMA_CH3_CMD,
749 .idescradr = R_DMA_CH3_DESCR,
750 .flags = STD_FLAGS,
751 .rx_ctrl = DEF_RX,
752 .tx_ctrl = DEF_TX,
753 .iseteop = 0,
754 #ifdef CONFIG_ETRAX_SERIAL_PORT2
755 .enabled = 1,
756 #ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA2_OUT
757 .dma_out_enabled = 1,
758 #else
759 .dma_out_enabled = 0,
760 #endif
761 #ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA3_IN
762 .dma_in_enabled = 1,
763 #else
764 .dma_in_enabled = 0
765 #endif
766 #else
767 .enabled = 0,
768 .dma_out_enabled = 0,
769 .dma_in_enabled = 0
770 #endif
771 }, /* ttyS2 */
772
773 { .baud = DEF_BAUD,
774 .port = (unsigned char *)R_SERIAL3_CTRL,
775 .irq = 1U << 8, /* uses DMA 4 and 5 */
776 .oclrintradr = R_DMA_CH4_CLR_INTR,
777 .ofirstadr = R_DMA_CH4_FIRST,
778 .ocmdadr = R_DMA_CH4_CMD,
779 .ostatusadr = R_DMA_CH4_STATUS,
780 .iclrintradr = R_DMA_CH5_CLR_INTR,
781 .ifirstadr = R_DMA_CH5_FIRST,
782 .icmdadr = R_DMA_CH5_CMD,
783 .idescradr = R_DMA_CH5_DESCR,
784 .flags = STD_FLAGS,
785 .rx_ctrl = DEF_RX,
786 .tx_ctrl = DEF_TX,
787 .iseteop = 1,
788 #ifdef CONFIG_ETRAX_SERIAL_PORT3
789 .enabled = 1,
790 #ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA4_OUT
791 .dma_out_enabled = 1,
792 #else
793 .dma_out_enabled = 0,
794 #endif
795 #ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA5_IN
796 .dma_in_enabled = 1,
797 #else
798 .dma_in_enabled = 0
799 #endif
800 #else
801 .enabled = 0,
802 .dma_out_enabled = 0,
803 .dma_in_enabled = 0
804 #endif
805 } /* ttyS3 */
806 #endif
807 };
808
809
810 #define NR_PORTS (sizeof(rs_table)/sizeof(struct e100_serial))
811
812 static struct termios *serial_termios[NR_PORTS];
813 static struct termios *serial_termios_locked[NR_PORTS];
814 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
815 static struct fast_timer fast_timers[NR_PORTS];
816 #endif
817
818 #ifdef CONFIG_ETRAX_SERIAL_PROC_ENTRY
819 #define PROCSTAT(x) x
820 struct ser_statistics_type {
821 int overrun_cnt;
822 int early_errors_cnt;
823 int ser_ints_ok_cnt;
824 int errors_cnt;
825 unsigned long int processing_flip;
826 unsigned long processing_flip_still_room;
827 unsigned long int timeout_flush_cnt;
828 int rx_dma_ints;
829 int tx_dma_ints;
830 int rx_tot;
831 int tx_tot;
832 };
833
834 static struct ser_statistics_type ser_stat[NR_PORTS];
835
836 #else
837
838 #define PROCSTAT(x)
839
840 #endif /* CONFIG_ETRAX_SERIAL_PROC_ENTRY */
841
842 /* RS-485 */
843 #if defined(CONFIG_ETRAX_RS485)
844 #ifdef CONFIG_ETRAX_FAST_TIMER
845 static struct fast_timer fast_timers_rs485[NR_PORTS];
846 #endif
847 #if defined(CONFIG_ETRAX_RS485_ON_PA)
848 static int rs485_pa_bit = CONFIG_ETRAX_RS485_ON_PA_BIT;
849 #endif
850 #if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
851 static int rs485_port_g_bit = CONFIG_ETRAX_RS485_ON_PORT_G_BIT;
852 #endif
853 #endif
854
855 /* Info and macros needed for each ports extra control/status signals. */
856 #define E100_STRUCT_PORT(line, pinname) \
857 ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \
858 (R_PORT_PA_DATA): ( \
859 (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \
860 (R_PORT_PB_DATA):&dummy_ser[line]))
861
862 #define E100_STRUCT_SHADOW(line, pinname) \
863 ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \
864 (&port_pa_data_shadow): ( \
865 (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \
866 (&port_pb_data_shadow):&dummy_ser[line]))
867 #define E100_STRUCT_MASK(line, pinname) \
868 ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \
869 (1<<CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT): ( \
870 (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \
871 (1<<CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT):DUMMY_##pinname##_MASK))
872
873 #define DUMMY_DTR_MASK 1
874 #define DUMMY_RI_MASK 2
875 #define DUMMY_DSR_MASK 4
876 #define DUMMY_CD_MASK 8
877 static unsigned char dummy_ser[NR_PORTS] = {0xFF, 0xFF, 0xFF,0xFF};
878
879 /* If not all status pins are used or disabled, use mixed mode */
880 #ifdef CONFIG_ETRAX_SERIAL_PORT0
881
882 #define SER0_PA_BITSUM (CONFIG_ETRAX_SER0_DTR_ON_PA_BIT+CONFIG_ETRAX_SER0_RI_ON_PA_BIT+CONFIG_ETRAX_SER0_DSR_ON_PA_BIT+CONFIG_ETRAX_SER0_CD_ON_PA_BIT)
883
884 #if SER0_PA_BITSUM != -4
885 # if CONFIG_ETRAX_SER0_DTR_ON_PA_BIT == -1
886 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
887 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
888 # endif
889 # endif
890 # if CONFIG_ETRAX_SER0_RI_ON_PA_BIT == -1
891 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
892 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
893 # endif
894 # endif
895 # if CONFIG_ETRAX_SER0_DSR_ON_PA_BIT == -1
896 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
897 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
898 # endif
899 # endif
900 # if CONFIG_ETRAX_SER0_CD_ON_PA_BIT == -1
901 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
902 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
903 # endif
904 # endif
905 #endif
906
907 #define SER0_PB_BITSUM (CONFIG_ETRAX_SER0_DTR_ON_PB_BIT+CONFIG_ETRAX_SER0_RI_ON_PB_BIT+CONFIG_ETRAX_SER0_DSR_ON_PB_BIT+CONFIG_ETRAX_SER0_CD_ON_PB_BIT)
908
909 #if SER0_PB_BITSUM != -4
910 # if CONFIG_ETRAX_SER0_DTR_ON_PB_BIT == -1
911 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
912 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
913 # endif
914 # endif
915 # if CONFIG_ETRAX_SER0_RI_ON_PB_BIT == -1
916 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
917 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
918 # endif
919 # endif
920 # if CONFIG_ETRAX_SER0_DSR_ON_PB_BIT == -1
921 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
922 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
923 # endif
924 # endif
925 # if CONFIG_ETRAX_SER0_CD_ON_PB_BIT == -1
926 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
927 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
928 # endif
929 # endif
930 #endif
931
932 #endif /* PORT0 */
933
934
935 #ifdef CONFIG_ETRAX_SERIAL_PORT1
936
937 #define SER1_PA_BITSUM (CONFIG_ETRAX_SER1_DTR_ON_PA_BIT+CONFIG_ETRAX_SER1_RI_ON_PA_BIT+CONFIG_ETRAX_SER1_DSR_ON_PA_BIT+CONFIG_ETRAX_SER1_CD_ON_PA_BIT)
938
939 #if SER1_PA_BITSUM != -4
940 # if CONFIG_ETRAX_SER1_DTR_ON_PA_BIT == -1
941 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
942 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
943 # endif
944 # endif
945 # if CONFIG_ETRAX_SER1_RI_ON_PA_BIT == -1
946 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
947 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
948 # endif
949 # endif
950 # if CONFIG_ETRAX_SER1_DSR_ON_PA_BIT == -1
951 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
952 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
953 # endif
954 # endif
955 # if CONFIG_ETRAX_SER1_CD_ON_PA_BIT == -1
956 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
957 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
958 # endif
959 # endif
960 #endif
961
962 #define SER1_PB_BITSUM (CONFIG_ETRAX_SER1_DTR_ON_PB_BIT+CONFIG_ETRAX_SER1_RI_ON_PB_BIT+CONFIG_ETRAX_SER1_DSR_ON_PB_BIT+CONFIG_ETRAX_SER1_CD_ON_PB_BIT)
963
964 #if SER1_PB_BITSUM != -4
965 # if CONFIG_ETRAX_SER1_DTR_ON_PB_BIT == -1
966 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
967 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
968 # endif
969 # endif
970 # if CONFIG_ETRAX_SER1_RI_ON_PB_BIT == -1
971 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
972 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
973 # endif
974 # endif
975 # if CONFIG_ETRAX_SER1_DSR_ON_PB_BIT == -1
976 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
977 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
978 # endif
979 # endif
980 # if CONFIG_ETRAX_SER1_CD_ON_PB_BIT == -1
981 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
982 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
983 # endif
984 # endif
985 #endif
986
987 #endif /* PORT1 */
988
989 #ifdef CONFIG_ETRAX_SERIAL_PORT2
990
991 #define SER2_PA_BITSUM (CONFIG_ETRAX_SER2_DTR_ON_PA_BIT+CONFIG_ETRAX_SER2_RI_ON_PA_BIT+CONFIG_ETRAX_SER2_DSR_ON_PA_BIT+CONFIG_ETRAX_SER2_CD_ON_PA_BIT)
992
993 #if SER2_PA_BITSUM != -4
994 # if CONFIG_ETRAX_SER2_DTR_ON_PA_BIT == -1
995 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
996 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
997 # endif
998 # endif
999 # if CONFIG_ETRAX_SER2_RI_ON_PA_BIT == -1
1000 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1001 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1002 # endif
1003 # endif
1004 # if CONFIG_ETRAX_SER2_DSR_ON_PA_BIT == -1
1005 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1006 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1007 # endif
1008 # endif
1009 # if CONFIG_ETRAX_SER2_CD_ON_PA_BIT == -1
1010 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1011 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1012 # endif
1013 # endif
1014 #endif
1015
1016 #define SER2_PB_BITSUM (CONFIG_ETRAX_SER2_DTR_ON_PB_BIT+CONFIG_ETRAX_SER2_RI_ON_PB_BIT+CONFIG_ETRAX_SER2_DSR_ON_PB_BIT+CONFIG_ETRAX_SER2_CD_ON_PB_BIT)
1017
1018 #if SER2_PB_BITSUM != -4
1019 # if CONFIG_ETRAX_SER2_DTR_ON_PB_BIT == -1
1020 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1021 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1022 # endif
1023 # endif
1024 # if CONFIG_ETRAX_SER2_RI_ON_PB_BIT == -1
1025 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1026 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1027 # endif
1028 # endif
1029 # if CONFIG_ETRAX_SER2_DSR_ON_PB_BIT == -1
1030 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1031 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1032 # endif
1033 # endif
1034 # if CONFIG_ETRAX_SER2_CD_ON_PB_BIT == -1
1035 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1036 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1037 # endif
1038 # endif
1039 #endif
1040
1041 #endif /* PORT2 */
1042
1043 #ifdef CONFIG_ETRAX_SERIAL_PORT3
1044
1045 #define SER3_PA_BITSUM (CONFIG_ETRAX_SER3_DTR_ON_PA_BIT+CONFIG_ETRAX_SER3_RI_ON_PA_BIT+CONFIG_ETRAX_SER3_DSR_ON_PA_BIT+CONFIG_ETRAX_SER3_CD_ON_PA_BIT)
1046
1047 #if SER3_PA_BITSUM != -4
1048 # if CONFIG_ETRAX_SER3_DTR_ON_PA_BIT == -1
1049 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1050 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1051 # endif
1052 # endif
1053 # if CONFIG_ETRAX_SER3_RI_ON_PA_BIT == -1
1054 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1055 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1056 # endif
1057 # endif
1058 # if CONFIG_ETRAX_SER3_DSR_ON_PA_BIT == -1
1059 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1060 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1061 # endif
1062 # endif
1063 # if CONFIG_ETRAX_SER3_CD_ON_PA_BIT == -1
1064 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1065 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1066 # endif
1067 # endif
1068 #endif
1069
1070 #define SER3_PB_BITSUM (CONFIG_ETRAX_SER3_DTR_ON_PB_BIT+CONFIG_ETRAX_SER3_RI_ON_PB_BIT+CONFIG_ETRAX_SER3_DSR_ON_PB_BIT+CONFIG_ETRAX_SER3_CD_ON_PB_BIT)
1071
1072 #if SER3_PB_BITSUM != -4
1073 # if CONFIG_ETRAX_SER3_DTR_ON_PB_BIT == -1
1074 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1075 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1076 # endif
1077 # endif
1078 # if CONFIG_ETRAX_SER3_RI_ON_PB_BIT == -1
1079 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1080 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1081 # endif
1082 # endif
1083 # if CONFIG_ETRAX_SER3_DSR_ON_PB_BIT == -1
1084 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1085 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1086 # endif
1087 # endif
1088 # if CONFIG_ETRAX_SER3_CD_ON_PB_BIT == -1
1089 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1090 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1091 # endif
1092 # endif
1093 #endif
1094
1095 #endif /* PORT3 */
1096
1097
1098 #if defined(CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED) || \
1099 defined(CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED) || \
1100 defined(CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED) || \
1101 defined(CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED)
1102 #define CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED
1103 #endif
1104
1105 #ifdef CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED
1106 /* The pins can be mixed on PA and PB */
1107 #define CONTROL_PINS_PORT_NOT_USED(line) \
1108 &dummy_ser[line], &dummy_ser[line], \
1109 &dummy_ser[line], &dummy_ser[line], \
1110 &dummy_ser[line], &dummy_ser[line], \
1111 &dummy_ser[line], &dummy_ser[line], \
1112 DUMMY_DTR_MASK, DUMMY_RI_MASK, DUMMY_DSR_MASK, DUMMY_CD_MASK
1113
1114
1115 struct control_pins
1116 {
1117 volatile unsigned char *dtr_port;
1118 unsigned char *dtr_shadow;
1119 volatile unsigned char *ri_port;
1120 unsigned char *ri_shadow;
1121 volatile unsigned char *dsr_port;
1122 unsigned char *dsr_shadow;
1123 volatile unsigned char *cd_port;
1124 unsigned char *cd_shadow;
1125
1126 unsigned char dtr_mask;
1127 unsigned char ri_mask;
1128 unsigned char dsr_mask;
1129 unsigned char cd_mask;
1130 };
1131
1132 static const struct control_pins e100_modem_pins[NR_PORTS] =
1133 {
1134 /* Ser 0 */
1135 {
1136 #ifdef CONFIG_ETRAX_SERIAL_PORT0
1137 E100_STRUCT_PORT(0,DTR), E100_STRUCT_SHADOW(0,DTR),
1138 E100_STRUCT_PORT(0,RI), E100_STRUCT_SHADOW(0,RI),
1139 E100_STRUCT_PORT(0,DSR), E100_STRUCT_SHADOW(0,DSR),
1140 E100_STRUCT_PORT(0,CD), E100_STRUCT_SHADOW(0,CD),
1141 E100_STRUCT_MASK(0,DTR),
1142 E100_STRUCT_MASK(0,RI),
1143 E100_STRUCT_MASK(0,DSR),
1144 E100_STRUCT_MASK(0,CD)
1145 #else
1146 CONTROL_PINS_PORT_NOT_USED(0)
1147 #endif
1148 },
1149
1150 /* Ser 1 */
1151 {
1152 #ifdef CONFIG_ETRAX_SERIAL_PORT1
1153 E100_STRUCT_PORT(1,DTR), E100_STRUCT_SHADOW(1,DTR),
1154 E100_STRUCT_PORT(1,RI), E100_STRUCT_SHADOW(1,RI),
1155 E100_STRUCT_PORT(1,DSR), E100_STRUCT_SHADOW(1,DSR),
1156 E100_STRUCT_PORT(1,CD), E100_STRUCT_SHADOW(1,CD),
1157 E100_STRUCT_MASK(1,DTR),
1158 E100_STRUCT_MASK(1,RI),
1159 E100_STRUCT_MASK(1,DSR),
1160 E100_STRUCT_MASK(1,CD)
1161 #else
1162 CONTROL_PINS_PORT_NOT_USED(1)
1163 #endif
1164 },
1165
1166 /* Ser 2 */
1167 {
1168 #ifdef CONFIG_ETRAX_SERIAL_PORT2
1169 E100_STRUCT_PORT(2,DTR), E100_STRUCT_SHADOW(2,DTR),
1170 E100_STRUCT_PORT(2,RI), E100_STRUCT_SHADOW(2,RI),
1171 E100_STRUCT_PORT(2,DSR), E100_STRUCT_SHADOW(2,DSR),
1172 E100_STRUCT_PORT(2,CD), E100_STRUCT_SHADOW(2,CD),
1173 E100_STRUCT_MASK(2,DTR),
1174 E100_STRUCT_MASK(2,RI),
1175 E100_STRUCT_MASK(2,DSR),
1176 E100_STRUCT_MASK(2,CD)
1177 #else
1178 CONTROL_PINS_PORT_NOT_USED(2)
1179 #endif
1180 },
1181
1182 /* Ser 3 */
1183 {
1184 #ifdef CONFIG_ETRAX_SERIAL_PORT3
1185 E100_STRUCT_PORT(3,DTR), E100_STRUCT_SHADOW(3,DTR),
1186 E100_STRUCT_PORT(3,RI), E100_STRUCT_SHADOW(3,RI),
1187 E100_STRUCT_PORT(3,DSR), E100_STRUCT_SHADOW(3,DSR),
1188 E100_STRUCT_PORT(3,CD), E100_STRUCT_SHADOW(3,CD),
1189 E100_STRUCT_MASK(3,DTR),
1190 E100_STRUCT_MASK(3,RI),
1191 E100_STRUCT_MASK(3,DSR),
1192 E100_STRUCT_MASK(3,CD)
1193 #else
1194 CONTROL_PINS_PORT_NOT_USED(3)
1195 #endif
1196 }
1197 };
1198 #else /* CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED */
1199
1200 /* All pins are on either PA or PB for each serial port */
1201 #define CONTROL_PINS_PORT_NOT_USED(line) \
1202 &dummy_ser[line], &dummy_ser[line], \
1203 DUMMY_DTR_MASK, DUMMY_RI_MASK, DUMMY_DSR_MASK, DUMMY_CD_MASK
1204
1205
1206 struct control_pins
1207 {
1208 volatile unsigned char *port;
1209 unsigned char *shadow;
1210
1211 unsigned char dtr_mask;
1212 unsigned char ri_mask;
1213 unsigned char dsr_mask;
1214 unsigned char cd_mask;
1215 };
1216
1217 #define dtr_port port
1218 #define dtr_shadow shadow
1219 #define ri_port port
1220 #define ri_shadow shadow
1221 #define dsr_port port
1222 #define dsr_shadow shadow
1223 #define cd_port port
1224 #define cd_shadow shadow
1225
1226 static const struct control_pins e100_modem_pins[NR_PORTS] =
1227 {
1228 /* Ser 0 */
1229 {
1230 #ifdef CONFIG_ETRAX_SERIAL_PORT0
1231 E100_STRUCT_PORT(0,DTR), E100_STRUCT_SHADOW(0,DTR),
1232 E100_STRUCT_MASK(0,DTR),
1233 E100_STRUCT_MASK(0,RI),
1234 E100_STRUCT_MASK(0,DSR),
1235 E100_STRUCT_MASK(0,CD)
1236 #else
1237 CONTROL_PINS_PORT_NOT_USED(0)
1238 #endif
1239 },
1240
1241 /* Ser 1 */
1242 {
1243 #ifdef CONFIG_ETRAX_SERIAL_PORT1
1244 E100_STRUCT_PORT(1,DTR), E100_STRUCT_SHADOW(1,DTR),
1245 E100_STRUCT_MASK(1,DTR),
1246 E100_STRUCT_MASK(1,RI),
1247 E100_STRUCT_MASK(1,DSR),
1248 E100_STRUCT_MASK(1,CD)
1249 #else
1250 CONTROL_PINS_PORT_NOT_USED(1)
1251 #endif
1252 },
1253
1254 /* Ser 2 */
1255 {
1256 #ifdef CONFIG_ETRAX_SERIAL_PORT2
1257 E100_STRUCT_PORT(2,DTR), E100_STRUCT_SHADOW(2,DTR),
1258 E100_STRUCT_MASK(2,DTR),
1259 E100_STRUCT_MASK(2,RI),
1260 E100_STRUCT_MASK(2,DSR),
1261 E100_STRUCT_MASK(2,CD)
1262 #else
1263 CONTROL_PINS_PORT_NOT_USED(2)
1264 #endif
1265 },
1266
1267 /* Ser 3 */
1268 {
1269 #ifdef CONFIG_ETRAX_SERIAL_PORT3
1270 E100_STRUCT_PORT(3,DTR), E100_STRUCT_SHADOW(3,DTR),
1271 E100_STRUCT_MASK(3,DTR),
1272 E100_STRUCT_MASK(3,RI),
1273 E100_STRUCT_MASK(3,DSR),
1274 E100_STRUCT_MASK(3,CD)
1275 #else
1276 CONTROL_PINS_PORT_NOT_USED(3)
1277 #endif
1278 }
1279 };
1280 #endif /* !CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED */
1281
1282 #define E100_RTS_MASK 0x20
1283 #define E100_CTS_MASK 0x40
1284
1285 /* All serial port signals are active low:
1286 * active = 0 -> 3.3V to RS-232 driver -> -12V on RS-232 level
1287 * inactive = 1 -> 0V to RS-232 driver -> +12V on RS-232 level
1288 *
1289 * These macros returns the pin value: 0=0V, >=1 = 3.3V on ETRAX chip
1290 */
1291
1292 /* Output */
1293 #define E100_RTS_GET(info) ((info)->rx_ctrl & E100_RTS_MASK)
1294 /* Input */
1295 #define E100_CTS_GET(info) ((info)->port[REG_STATUS] & E100_CTS_MASK)
1296
1297 /* These are typically PA or PB and 0 means 0V, 1 means 3.3V */
1298 /* Is an output */
1299 #define E100_DTR_GET(info) ((*e100_modem_pins[(info)->line].dtr_shadow) & e100_modem_pins[(info)->line].dtr_mask)
1300
1301 /* Normally inputs */
1302 #define E100_RI_GET(info) ((*e100_modem_pins[(info)->line].ri_port) & e100_modem_pins[(info)->line].ri_mask)
1303 #define E100_CD_GET(info) ((*e100_modem_pins[(info)->line].cd_port) & e100_modem_pins[(info)->line].cd_mask)
1304
1305 /* Input */
1306 #define E100_DSR_GET(info) ((*e100_modem_pins[(info)->line].dsr_port) & e100_modem_pins[(info)->line].dsr_mask)
1307
1308
1309 /*
1310 * tmp_buf is used as a temporary buffer by serial_write. We need to
1311 * lock it in case the memcpy_fromfs blocks while swapping in a page,
1312 * and some other program tries to do a serial write at the same time.
1313 * Since the lock will only come under contention when the system is
1314 * swapping and available memory is low, it makes sense to share one
1315 * buffer across all the serial ports, since it significantly saves
1316 * memory if large numbers of serial ports are open.
1317 */
1318 static unsigned char *tmp_buf;
1319 #ifdef DECLARE_MUTEX
1320 static DECLARE_MUTEX(tmp_buf_sem);
1321 #else
1322 static struct semaphore tmp_buf_sem = MUTEX;
1323 #endif
1324
1325 /* Calculate the chartime depending on baudrate, numbor of bits etc. */
1326 static void update_char_time(struct e100_serial * info)
1327 {
1328 tcflag_t cflags = info->tty->termios->c_cflag;
1329 int bits;
1330
1331 /* calc. number of bits / data byte */
1332 /* databits + startbit and 1 stopbit */
1333 if ((cflags & CSIZE) == CS7)
1334 bits = 9;
1335 else
1336 bits = 10;
1337
1338 if (cflags & CSTOPB) /* 2 stopbits ? */
1339 bits++;
1340
1341 if (cflags & PARENB) /* parity bit ? */
1342 bits++;
1343
1344 /* calc timeout */
1345 info->char_time_usec = ((bits * 1000000) / info->baud) + 1;
1346 info->flush_time_usec = 4*info->char_time_usec;
1347 if (info->flush_time_usec < MIN_FLUSH_TIME_USEC)
1348 info->flush_time_usec = MIN_FLUSH_TIME_USEC;
1349
1350 }
1351
1352 /*
1353 * This function maps from the Bxxxx defines in asm/termbits.h into real
1354 * baud rates.
1355 */
1356
1357 static int
1358 cflag_to_baud(unsigned int cflag)
1359 {
1360 static int baud_table[] = {
1361 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400,
1362 4800, 9600, 19200, 38400 };
1363
1364 static int ext_baud_table[] = {
1365 0, 57600, 115200, 230400, 460800, 921600, 1843200, 6250000,
1366 0, 0, 0, 0, 0, 0, 0, 0 };
1367
1368 if (cflag & CBAUDEX)
1369 return ext_baud_table[(cflag & CBAUD) & ~CBAUDEX];
1370 else
1371 return baud_table[cflag & CBAUD];
1372 }
1373
1374 /* and this maps to an etrax100 hardware baud constant */
1375
1376 static unsigned char
1377 cflag_to_etrax_baud(unsigned int cflag)
1378 {
1379 char retval;
1380
1381 static char baud_table[] = {
1382 -1, -1, -1, -1, -1, -1, -1, 0, 1, 2, -1, 3, 4, 5, 6, 7 };
1383
1384 static char ext_baud_table[] = {
1385 -1, 8, 9, 10, 11, 12, 13, 14, -1, -1, -1, -1, -1, -1, -1, -1 };
1386
1387 if (cflag & CBAUDEX)
1388 retval = ext_baud_table[(cflag & CBAUD) & ~CBAUDEX];
1389 else
1390 retval = baud_table[cflag & CBAUD];
1391
1392 if (retval < 0) {
1393 printk(KERN_WARNING "serdriver tried setting invalid baud rate, flags %x.\n", cflag);
1394 retval = 5; /* choose default 9600 instead */
1395 }
1396
1397 return retval | (retval << 4); /* choose same for both TX and RX */
1398 }
1399
1400
1401 /* Various static support functions */
1402
1403 /* Functions to set or clear DTR/RTS on the requested line */
1404 /* It is complicated by the fact that RTS is a serial port register, while
1405 * DTR might not be implemented in the HW at all, and if it is, it can be on
1406 * any general port.
1407 */
1408
1409
1410 static inline void
1411 e100_dtr(struct e100_serial *info, int set)
1412 {
1413 #ifndef CONFIG_SVINTO_SIM
1414 unsigned char mask = e100_modem_pins[info->line].dtr_mask;
1415
1416 #ifdef SERIAL_DEBUG_IO
1417 printk("ser%i dtr %i mask: 0x%02X\n", info->line, set, mask);
1418 printk("ser%i shadow before 0x%02X get: %i\n",
1419 info->line, *e100_modem_pins[info->line].dtr_shadow,
1420 E100_DTR_GET(info));
1421 #endif
1422 /* DTR is active low */
1423 {
1424 unsigned long flags;
1425
1426 save_flags(flags);
1427 cli();
1428 *e100_modem_pins[info->line].dtr_shadow &= ~mask;
1429 *e100_modem_pins[info->line].dtr_shadow |= (set ? 0 : mask);
1430 *e100_modem_pins[info->line].dtr_port = *e100_modem_pins[info->line].dtr_shadow;
1431 restore_flags(flags);
1432 }
1433
1434 #ifdef SERIAL_DEBUG_IO
1435 printk("ser%i shadow after 0x%02X get: %i\n",
1436 info->line, *e100_modem_pins[info->line].dtr_shadow,
1437 E100_DTR_GET(info));
1438 #endif
1439 #endif
1440 }
1441
1442 /* set = 0 means 3.3V on the pin, bitvalue: 0=active, 1=inactive
1443 * 0=0V , 1=3.3V
1444 */
1445 static inline void
1446 e100_rts(struct e100_serial *info, int set)
1447 {
1448 #ifndef CONFIG_SVINTO_SIM
1449 unsigned long flags;
1450 save_flags(flags);
1451 cli();
1452 info->rx_ctrl &= ~E100_RTS_MASK;
1453 info->rx_ctrl |= (set ? 0 : E100_RTS_MASK); /* RTS is active low */
1454 info->port[REG_REC_CTRL] = info->rx_ctrl;
1455 restore_flags(flags);
1456 #ifdef SERIAL_DEBUG_IO
1457 printk("ser%i rts %i\n", info->line, set);
1458 #endif
1459 #endif
1460 }
1461
1462
1463 /* If this behaves as a modem, RI and CD is an output */
1464 static inline void
1465 e100_ri_out(struct e100_serial *info, int set)
1466 {
1467 #ifndef CONFIG_SVINTO_SIM
1468 /* RI is active low */
1469 {
1470 unsigned char mask = e100_modem_pins[info->line].ri_mask;
1471 unsigned long flags;
1472
1473 save_flags(flags);
1474 cli();
1475 *e100_modem_pins[info->line].ri_shadow &= ~mask;
1476 *e100_modem_pins[info->line].ri_shadow |= (set ? 0 : mask);
1477 *e100_modem_pins[info->line].ri_port = *e100_modem_pins[info->line].ri_shadow;
1478 restore_flags(flags);
1479 }
1480 #endif
1481 }
1482 static inline void
1483 e100_cd_out(struct e100_serial *info, int set)
1484 {
1485 #ifndef CONFIG_SVINTO_SIM
1486 /* CD is active low */
1487 {
1488 unsigned char mask = e100_modem_pins[info->line].cd_mask;
1489 unsigned long flags;
1490
1491 save_flags(flags);
1492 cli();
1493 *e100_modem_pins[info->line].cd_shadow &= ~mask;
1494 *e100_modem_pins[info->line].cd_shadow |= (set ? 0 : mask);
1495 *e100_modem_pins[info->line].cd_port = *e100_modem_pins[info->line].cd_shadow;
1496 restore_flags(flags);
1497 }
1498 #endif
1499 }
1500
1501 static inline void
1502 e100_disable_rx(struct e100_serial *info)
1503 {
1504 #ifndef CONFIG_SVINTO_SIM
1505 /* disable the receiver */
1506 info->port[REG_REC_CTRL] =
1507 (info->rx_ctrl &= ~IO_MASK(R_SERIAL0_REC_CTRL, rec_enable));
1508 #endif
1509 }
1510
1511 static inline void
1512 e100_enable_rx(struct e100_serial *info)
1513 {
1514 #ifndef CONFIG_SVINTO_SIM
1515 /* enable the receiver */
1516 info->port[REG_REC_CTRL] =
1517 (info->rx_ctrl |= IO_MASK(R_SERIAL0_REC_CTRL, rec_enable));
1518 #endif
1519 }
1520
1521 /* the rx DMA uses both the dma_descr and the dma_eop interrupts */
1522
1523 static inline void
1524 e100_disable_rxdma_irq(struct e100_serial *info)
1525 {
1526 #ifdef SERIAL_DEBUG_INTR
1527 printk("rxdma_irq(%d): 0\n",info->line);
1528 #endif
1529 DINTR1(DEBUG_LOG(info->line,"IRQ disable_rxdma_irq %i\n", info->line));
1530 *R_IRQ_MASK2_CLR = (info->irq << 2) | (info->irq << 3);
1531 }
1532
1533 static inline void
1534 e100_enable_rxdma_irq(struct e100_serial *info)
1535 {
1536 #ifdef SERIAL_DEBUG_INTR
1537 printk("rxdma_irq(%d): 1\n",info->line);
1538 #endif
1539 DINTR1(DEBUG_LOG(info->line,"IRQ enable_rxdma_irq %i\n", info->line));
1540 *R_IRQ_MASK2_SET = (info->irq << 2) | (info->irq << 3);
1541 }
1542
1543 /* the tx DMA uses only dma_descr interrupt */
1544
1545 static _INLINE_ void
1546 e100_disable_txdma_irq(struct e100_serial *info)
1547 {
1548 #ifdef SERIAL_DEBUG_INTR
1549 printk("txdma_irq(%d): 0\n",info->line);
1550 #endif
1551 DINTR1(DEBUG_LOG(info->line,"IRQ disable_txdma_irq %i\n", info->line));
1552 *R_IRQ_MASK2_CLR = info->irq;
1553 }
1554
1555 static _INLINE_ void
1556 e100_enable_txdma_irq(struct e100_serial *info)
1557 {
1558 #ifdef SERIAL_DEBUG_INTR
1559 printk("txdma_irq(%d): 1\n",info->line);
1560 #endif
1561 DINTR1(DEBUG_LOG(info->line,"IRQ enable_txdma_irq %i\n", info->line));
1562 *R_IRQ_MASK2_SET = info->irq;
1563 }
1564
1565 static _INLINE_ void
1566 e100_disable_txdma_channel(struct e100_serial *info)
1567 {
1568 unsigned long flags;
1569
1570 /* Disable output DMA channel for the serial port in question
1571 * ( set to something other then serialX)
1572 */
1573 save_flags(flags);
1574 cli();
1575 DFLOW(DEBUG_LOG(info->line, "disable_txdma_channel %i\n", info->line));
1576 if (info->line == 0) {
1577 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma6)) ==
1578 IO_STATE(R_GEN_CONFIG, dma6, serial0)) {
1579 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma6);
1580 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma6, unused);
1581 }
1582 } else if (info->line == 1) {
1583 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma8)) ==
1584 IO_STATE(R_GEN_CONFIG, dma8, serial1)) {
1585 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma8);
1586 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma8, usb);
1587 }
1588 } else if (info->line == 2) {
1589 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma2)) ==
1590 IO_STATE(R_GEN_CONFIG, dma2, serial2)) {
1591 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma2);
1592 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma2, par0);
1593 }
1594 } else if (info->line == 3) {
1595 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma4)) ==
1596 IO_STATE(R_GEN_CONFIG, dma4, serial3)) {
1597 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma4);
1598 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma4, par1);
1599 }
1600 }
1601 *R_GEN_CONFIG = genconfig_shadow;
1602 restore_flags(flags);
1603 }
1604
1605
1606 static _INLINE_ void
1607 e100_enable_txdma_channel(struct e100_serial *info)
1608 {
1609 unsigned long flags;
1610
1611 save_flags(flags);
1612 cli();
1613 DFLOW(DEBUG_LOG(info->line, "enable_txdma_channel %i\n", info->line));
1614 /* Enable output DMA channel for the serial port in question */
1615 if (info->line == 0) {
1616 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma6);
1617 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma6, serial0);
1618 } else if (info->line == 1) {
1619 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma8);
1620 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma8, serial1);
1621 } else if (info->line == 2) {
1622 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma2);
1623 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma2, serial2);
1624 } else if (info->line == 3) {
1625 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma4);
1626 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma4, serial3);
1627 }
1628 *R_GEN_CONFIG = genconfig_shadow;
1629 restore_flags(flags);
1630 }
1631
1632 static _INLINE_ void
1633 e100_disable_rxdma_channel(struct e100_serial *info)
1634 {
1635 unsigned long flags;
1636
1637 /* Disable input DMA channel for the serial port in question
1638 * ( set to something other then serialX)
1639 */
1640 save_flags(flags);
1641 cli();
1642 if (info->line == 0) {
1643 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma7)) ==
1644 IO_STATE(R_GEN_CONFIG, dma7, serial0)) {
1645 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma7);
1646 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma7, unused);
1647 }
1648 } else if (info->line == 1) {
1649 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma9)) ==
1650 IO_STATE(R_GEN_CONFIG, dma9, serial1)) {
1651 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma9);
1652 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma9, usb);
1653 }
1654 } else if (info->line == 2) {
1655 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma3)) ==
1656 IO_STATE(R_GEN_CONFIG, dma3, serial2)) {
1657 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma3);
1658 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma3, par0);
1659 }
1660 } else if (info->line == 3) {
1661 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma5)) ==
1662 IO_STATE(R_GEN_CONFIG, dma5, serial3)) {
1663 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma5);
1664 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma5, par1);
1665 }
1666 }
1667 *R_GEN_CONFIG = genconfig_shadow;
1668 restore_flags(flags);
1669 }
1670
1671
1672 static _INLINE_ void
1673 e100_enable_rxdma_channel(struct e100_serial *info)
1674 {
1675 unsigned long flags;
1676
1677 save_flags(flags);
1678 cli();
1679 /* Enable input DMA channel for the serial port in question */
1680 if (info->line == 0) {
1681 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma7);
1682 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma7, serial0);
1683 } else if (info->line == 1) {
1684 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma9);
1685 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma9, serial1);
1686 } else if (info->line == 2) {
1687 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma3);
1688 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma3, serial2);
1689 } else if (info->line == 3) {
1690 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma5);
1691 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma5, serial3);
1692 }
1693 *R_GEN_CONFIG = genconfig_shadow;
1694 restore_flags(flags);
1695 }
1696
1697 #ifdef SERIAL_HANDLE_EARLY_ERRORS
1698 /* in order to detect and fix errors on the first byte
1699 we have to use the serial interrupts as well. */
1700
1701 static inline void
1702 e100_disable_serial_data_irq(struct e100_serial *info)
1703 {
1704 #ifdef SERIAL_DEBUG_INTR
1705 printk("ser_irq(%d): 0\n",info->line);
1706 #endif
1707 DINTR1(DEBUG_LOG(info->line,"IRQ disable data_irq %i\n", info->line));
1708 *R_IRQ_MASK1_CLR = (1U << (8+2*info->line));
1709 }
1710
1711 static inline void
1712 e100_enable_serial_data_irq(struct e100_serial *info)
1713 {
1714 #ifdef SERIAL_DEBUG_INTR
1715 printk("ser_irq(%d): 1\n",info->line);
1716 printk("**** %d = %d\n",
1717 (8+2*info->line),
1718 (1U << (8+2*info->line)));
1719 #endif
1720 DINTR1(DEBUG_LOG(info->line,"IRQ enable data_irq %i\n", info->line));
1721 *R_IRQ_MASK1_SET = (1U << (8+2*info->line));
1722 }
1723 #endif
1724
1725 static inline void
1726 e100_disable_serial_tx_ready_irq(struct e100_serial *info)
1727 {
1728 #ifdef SERIAL_DEBUG_INTR
1729 printk("ser_tx_irq(%d): 0\n",info->line);
1730 #endif
1731 DINTR1(DEBUG_LOG(info->line,"IRQ disable ready_irq %i\n", info->line));
1732 *R_IRQ_MASK1_CLR = (1U << (8+1+2*info->line));
1733 }
1734
1735 static inline void
1736 e100_enable_serial_tx_ready_irq(struct e100_serial *info)
1737 {
1738 #ifdef SERIAL_DEBUG_INTR
1739 printk("ser_tx_irq(%d): 1\n",info->line);
1740 printk("**** %d = %d\n",
1741 (8+1+2*info->line),
1742 (1U << (8+1+2*info->line)));
1743 #endif
1744 DINTR2(DEBUG_LOG(info->line,"IRQ enable ready_irq %i\n", info->line));
1745 *R_IRQ_MASK1_SET = (1U << (8+1+2*info->line));
1746 }
1747
1748 static inline void e100_enable_rx_irq(struct e100_serial *info)
1749 {
1750 if (info->uses_dma_in)
1751 e100_enable_rxdma_irq(info);
1752 else
1753 e100_enable_serial_data_irq(info);
1754 }
1755 static inline void e100_disable_rx_irq(struct e100_serial *info)
1756 {
1757 if (info->uses_dma_in)
1758 e100_disable_rxdma_irq(info);
1759 else
1760 e100_disable_serial_data_irq(info);
1761 }
1762
1763 #if defined(CONFIG_ETRAX_RS485)
1764 /* Enable RS-485 mode on selected port. This is UGLY. */
1765 static int
1766 e100_enable_rs485(struct tty_struct *tty,struct rs485_control *r)
1767 {
1768 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
1769
1770 #if defined(CONFIG_ETRAX_RS485_ON_PA)
1771 *R_PORT_PA_DATA = port_pa_data_shadow |= (1 << rs485_pa_bit);
1772 #endif
1773 #if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
1774 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
1775 rs485_port_g_bit, 1);
1776 #endif
1777 #if defined(CONFIG_ETRAX_RS485_LTC1387)
1778 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
1779 CONFIG_ETRAX_RS485_LTC1387_DXEN_PORT_G_BIT, 1);
1780 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
1781 CONFIG_ETRAX_RS485_LTC1387_RXEN_PORT_G_BIT, 1);
1782 #endif
1783
1784 info->rs485.rts_on_send = 0x01 & r->rts_on_send;
1785 info->rs485.rts_after_sent = 0x01 & r->rts_after_sent;
1786 if (r->delay_rts_before_send >= 1000)
1787 info->rs485.delay_rts_before_send = 1000;
1788 else
1789 info->rs485.delay_rts_before_send = r->delay_rts_before_send;
1790 info->rs485.enabled = r->enabled;
1791 /* printk("rts: on send = %i, after = %i, enabled = %i",
1792 info->rs485.rts_on_send,
1793 info->rs485.rts_after_sent,
1794 info->rs485.enabled
1795 );
1796 */
1797 return 0;
1798 }
1799
1800 static int
1801 e100_write_rs485(struct tty_struct *tty, int from_user,
1802 const unsigned char *buf, int count)
1803 {
1804 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
1805 int old_enabled = info->rs485.enabled;
1806
1807 /* rs485 is always implicitly enabled if we're using the ioctl()
1808 * but it doesn't have to be set in the rs485_control
1809 * (to be backward compatible with old apps)
1810 * So we store, set and restore it.
1811 */
1812 info->rs485.enabled = 1;
1813 /* rs_write now deals with RS485 if enabled */
1814 count = rs_write(tty, from_user, buf, count);
1815 info->rs485.enabled = old_enabled;
1816 return count;
1817 }
1818
1819 #ifdef CONFIG_ETRAX_FAST_TIMER
1820 /* Timer function to toggle RTS when using FAST_TIMER */
1821 static void rs485_toggle_rts_timer_function(unsigned long data)
1822 {
1823 struct e100_serial *info = (struct e100_serial *)data;
1824
1825 fast_timers_rs485[info->line].function = NULL;
1826 e100_rts(info, info->rs485.rts_after_sent);
1827 #if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER)
1828 e100_enable_rx(info);
1829 e100_enable_rx_irq(info);
1830 #endif
1831 }
1832 #endif
1833 #endif /* CONFIG_ETRAX_RS485 */
1834
1835 /*
1836 * ------------------------------------------------------------
1837 * rs_stop() and rs_start()
1838 *
1839 * This routines are called before setting or resetting tty->stopped.
1840 * They enable or disable transmitter using the XOFF registers, as necessary.
1841 * ------------------------------------------------------------
1842 */
1843
1844 static void
1845 rs_stop(struct tty_struct *tty)
1846 {
1847 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
1848 if (info) {
1849 unsigned long flags;
1850 unsigned long xoff;
1851
1852 save_flags(flags); cli();
1853 DFLOW(DEBUG_LOG(info->line, "XOFF rs_stop xmit %i\n",
1854 CIRC_CNT(info->xmit.head,
1855 info->xmit.tail,SERIAL_XMIT_SIZE)));
1856
1857 xoff = IO_FIELD(R_SERIAL0_XOFF, xoff_char, STOP_CHAR(info->tty));
1858 xoff |= IO_STATE(R_SERIAL0_XOFF, tx_stop, stop);
1859 if (tty->termios->c_iflag & IXON ) {
1860 xoff |= IO_STATE(R_SERIAL0_XOFF, auto_xoff, enable);
1861 }
1862
1863 *((unsigned long *)&info->port[REG_XOFF]) = xoff;
1864 restore_flags(flags);
1865 }
1866 }
1867
1868 static void
1869 rs_start(struct tty_struct *tty)
1870 {
1871 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
1872 if (info) {
1873 unsigned long flags;
1874 unsigned long xoff;
1875
1876 save_flags(flags); cli();
1877 DFLOW(DEBUG_LOG(info->line, "XOFF rs_start xmit %i\n",
1878 CIRC_CNT(info->xmit.head,
1879 info->xmit.tail,SERIAL_XMIT_SIZE)));
1880 xoff = IO_FIELD(R_SERIAL0_XOFF, xoff_char, STOP_CHAR(tty));
1881 xoff |= IO_STATE(R_SERIAL0_XOFF, tx_stop, enable);
1882 if (tty->termios->c_iflag & IXON ) {
1883 xoff |= IO_STATE(R_SERIAL0_XOFF, auto_xoff, enable);
1884 }
1885
1886 *((unsigned long *)&info->port[REG_XOFF]) = xoff;
1887 if (!info->uses_dma_out &&
1888 info->xmit.head != info->xmit.tail && info->xmit.buf)
1889 e100_enable_serial_tx_ready_irq(info);
1890
1891 restore_flags(flags);
1892 }
1893 }
1894
1895 /*
1896 * ----------------------------------------------------------------------
1897 *
1898 * Here starts the interrupt handling routines. All of the following
1899 * subroutines are declared as inline and are folded into
1900 * rs_interrupt(). They were separated out for readability's sake.
1901 *
1902 * Note: rs_interrupt() is a "fast" interrupt, which means that it
1903 * runs with interrupts turned off. People who may want to modify
1904 * rs_interrupt() should try to keep the interrupt handler as fast as
1905 * possible. After you are done making modifications, it is not a bad
1906 * idea to do:
1907 *
1908 * gcc -S -DKERNEL -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer serial.c
1909 *
1910 * and look at the resulting assemble code in serial.s.
1911 *
1912 * - Ted Ts'o (tytso@mit.edu), 7-Mar-93
1913 * -----------------------------------------------------------------------
1914 */
1915
1916 /*
1917 * This routine is used by the interrupt handler to schedule
1918 * processing in the software interrupt portion of the driver.
1919 */
1920 static _INLINE_ void
1921 rs_sched_event(struct e100_serial *info,
1922 int event)
1923 {
1924 if (info->event & (1 << event))
1925 return;
1926 info->event |= 1 << event;
1927 schedule_work(&info->work);
1928 }
1929
1930 /* The output DMA channel is free - use it to send as many chars as possible
1931 * NOTES:
1932 * We don't pay attention to info->x_char, which means if the TTY wants to
1933 * use XON/XOFF it will set info->x_char but we won't send any X char!
1934 *
1935 * To implement this, we'd just start a DMA send of 1 byte pointing at a
1936 * buffer containing the X char, and skip updating xmit. We'd also have to
1937 * check if the last sent char was the X char when we enter this function
1938 * the next time, to avoid updating xmit with the sent X value.
1939 */
1940
1941 static void
1942 transmit_chars_dma(struct e100_serial *info)
1943 {
1944 unsigned int c, sentl;
1945 struct etrax_dma_descr *descr;
1946
1947 #ifdef CONFIG_SVINTO_SIM
1948 /* This will output too little if tail is not 0 always since
1949 * we don't reloop to send the other part. Anyway this SHOULD be a
1950 * no-op - transmit_chars_dma would never really be called during sim
1951 * since rs_write does not write into the xmit buffer then.
1952 */
1953 if (info->xmit.tail)
1954 printk("Error in serial.c:transmit_chars-dma(), tail!=0\n");
1955 if (info->xmit.head != info->xmit.tail) {
1956 SIMCOUT(info->xmit.buf + info->xmit.tail,
1957 CIRC_CNT(info->xmit.head,
1958 info->xmit.tail,
1959 SERIAL_XMIT_SIZE));
1960 info->xmit.head = info->xmit.tail; /* move back head */
1961 info->tr_running = 0;
1962 }
1963 return;
1964 #endif
1965 /* acknowledge both dma_descr and dma_eop irq in R_DMA_CHx_CLR_INTR */
1966 *info->oclrintradr =
1967 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
1968 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
1969
1970 #ifdef SERIAL_DEBUG_INTR
1971 if (info->line == SERIAL_DEBUG_LINE)
1972 printk("tc\n");
1973 #endif
1974 if (!info->tr_running) {
1975 /* weirdo... we shouldn't get here! */
1976 printk(KERN_WARNING "Achtung: transmit_chars_dma with !tr_running\n");
1977 return;
1978 }
1979
1980 descr = &info->tr_descr;
1981
1982 /* first get the amount of bytes sent during the last DMA transfer,
1983 and update xmit accordingly */
1984
1985 /* if the stop bit was not set, all data has been sent */
1986 if (!(descr->status & d_stop)) {
1987 sentl = descr->sw_len;
1988 } else
1989 /* otherwise we find the amount of data sent here */
1990 sentl = descr->hw_len;
1991
1992 DFLOW(DEBUG_LOG(info->line, "TX %i done\n", sentl));
1993
1994 /* update stats */
1995 info->icount.tx += sentl;
1996
1997 /* update xmit buffer */
1998 info->xmit.tail = (info->xmit.tail + sentl) & (SERIAL_XMIT_SIZE - 1);
1999
2000 /* if there is only a few chars left in the buf, wake up the blocked
2001 write if any */
2002 if (CIRC_CNT(info->xmit.head,
2003 info->xmit.tail,
2004 SERIAL_XMIT_SIZE) < WAKEUP_CHARS)
2005 rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
2006
2007 /* find out the largest amount of consecutive bytes we want to send now */
2008
2009 c = CIRC_CNT_TO_END(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
2010
2011 /* Don't send all in one DMA transfer - divide it so we wake up
2012 * application before all is sent
2013 */
2014
2015 if (c >= 4*WAKEUP_CHARS)
2016 c = c/2;
2017
2018 if (c <= 0) {
2019 /* our job here is done, don't schedule any new DMA transfer */
2020 info->tr_running = 0;
2021
2022 #if defined(CONFIG_ETRAX_RS485) && defined(CONFIG_ETRAX_FAST_TIMER)
2023 if (info->rs485.enabled) {
2024 /* Set a short timer to toggle RTS */
2025 start_one_shot_timer(&fast_timers_rs485[info->line],
2026 rs485_toggle_rts_timer_function,
2027 (unsigned long)info,
2028 info->char_time_usec*2,
2029 "RS-485");
2030 }
2031 #endif /* RS485 */
2032 return;
2033 }
2034
2035 /* ok we can schedule a dma send of c chars starting at info->xmit.tail */
2036 /* set up the descriptor correctly for output */
2037 DFLOW(DEBUG_LOG(info->line, "TX %i\n", c));
2038 descr->ctrl = d_int | d_eol | d_wait; /* Wait needed for tty_wait_until_sent() */
2039 descr->sw_len = c;
2040 descr->buf = virt_to_phys(info->xmit.buf + info->xmit.tail);
2041 descr->status = 0;
2042
2043 *info->ofirstadr = virt_to_phys(descr); /* write to R_DMAx_FIRST */
2044 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, start);
2045
2046 /* DMA is now running (hopefully) */
2047 } /* transmit_chars_dma */
2048
2049 static void
2050 start_transmit(struct e100_serial *info)
2051 {
2052 #if 0
2053 if (info->line == SERIAL_DEBUG_LINE)
2054 printk("x\n");
2055 #endif
2056
2057 info->tr_descr.sw_len = 0;
2058 info->tr_descr.hw_len = 0;
2059 info->tr_descr.status = 0;
2060 info->tr_running = 1;
2061 if (info->uses_dma_out)
2062 transmit_chars_dma(info);
2063 else
2064 e100_enable_serial_tx_ready_irq(info);
2065 } /* start_transmit */
2066
2067 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
2068 static int serial_fast_timer_started = 0;
2069 static int serial_fast_timer_expired = 0;
2070 static void flush_timeout_function(unsigned long data);
2071 #define START_FLUSH_FAST_TIMER_TIME(info, string, usec) {\
2072 unsigned long timer_flags; \
2073 save_flags(timer_flags); \
2074 cli(); \
2075 if (fast_timers[info->line].function == NULL) { \
2076 serial_fast_timer_started++; \
2077 TIMERD(DEBUG_LOG(info->line, "start_timer %i ", info->line)); \
2078 TIMERD(DEBUG_LOG(info->line, "num started: %i\n", serial_fast_timer_started)); \
2079 start_one_shot_timer(&fast_timers[info->line], \
2080 flush_timeout_function, \
2081 (unsigned long)info, \
2082 (usec), \
2083 string); \
2084 } \
2085 else { \
2086 TIMERD(DEBUG_LOG(info->line, "timer %i already running\n", info->line)); \
2087 } \
2088 restore_flags(timer_flags); \
2089 }
2090 #define START_FLUSH_FAST_TIMER(info, string) START_FLUSH_FAST_TIMER_TIME(info, string, info->flush_time_usec)
2091
2092 #else
2093 #define START_FLUSH_FAST_TIMER_TIME(info, string, usec)
2094 #define START_FLUSH_FAST_TIMER(info, string)
2095 #endif
2096
2097 static struct etrax_recv_buffer *
2098 alloc_recv_buffer(unsigned int size)
2099 {
2100 struct etrax_recv_buffer *buffer;
2101
2102 if (!(buffer = kmalloc(sizeof *buffer + size, GFP_ATOMIC)))
2103 return NULL;
2104
2105 buffer->next = NULL;
2106 buffer->length = 0;
2107 buffer->error = TTY_NORMAL;
2108
2109 return buffer;
2110 }
2111
2112 static void
2113 append_recv_buffer(struct e100_serial *info, struct etrax_recv_buffer *buffer)
2114 {
2115 unsigned long flags;
2116
2117 save_flags(flags);
2118 cli();
2119
2120 if (!info->first_recv_buffer)
2121 info->first_recv_buffer = buffer;
2122 else
2123 info->last_recv_buffer->next = buffer;
2124
2125 info->last_recv_buffer = buffer;
2126
2127 info->recv_cnt += buffer->length;
2128 if (info->recv_cnt > info->max_recv_cnt)
2129 info->max_recv_cnt = info->recv_cnt;
2130
2131 restore_flags(flags);
2132 }
2133
2134 static int
2135 add_char_and_flag(struct e100_serial *info, unsigned char data, unsigned char flag)
2136 {
2137 struct etrax_recv_buffer *buffer;
2138 if (info->uses_dma_in) {
2139 if (!(buffer = alloc_recv_buffer(4)))
2140 return 0;
2141
2142 buffer->length = 1;
2143 buffer->error = flag;
2144 buffer->buffer[0] = data;
2145
2146 append_recv_buffer(info, buffer);
2147
2148 info->icount.rx++;
2149 } else {
2150 struct tty_struct *tty = info->tty;
2151 *tty->flip.char_buf_ptr = data;
2152 *tty->flip.flag_buf_ptr = flag;
2153 tty->flip.flag_buf_ptr++;
2154 tty->flip.char_buf_ptr++;
2155 tty->flip.count++;
2156 info->icount.rx++;
2157 }
2158
2159 return 1;
2160 }
2161
2162 extern _INLINE_ unsigned int
2163 handle_descr_data(struct e100_serial *info, struct etrax_dma_descr *descr, unsigned int recvl)
2164 {
2165 struct etrax_recv_buffer *buffer = phys_to_virt(descr->buf) - sizeof *buffer;
2166
2167 if (info->recv_cnt + recvl > 65536) {
2168 printk(KERN_CRIT
2169 "%s: Too much pending incoming serial data! Dropping %u bytes.\n", __FUNCTION__, recvl);
2170 return 0;
2171 }
2172
2173 buffer->length = recvl;
2174
2175 if (info->errorcode == ERRCODE_SET_BREAK)
2176 buffer->error = TTY_BREAK;
2177 info->errorcode = 0;
2178
2179 append_recv_buffer(info, buffer);
2180
2181 if (!(buffer = alloc_recv_buffer(SERIAL_DESCR_BUF_SIZE)))
2182 panic("%s: Failed to allocate memory for receive buffer!\n", __FUNCTION__);
2183
2184 descr->buf = virt_to_phys(buffer->buffer);
2185
2186 return recvl;
2187 }
2188
2189 static _INLINE_ unsigned int
2190 handle_all_descr_data(struct e100_serial *info)
2191 {
2192 struct etrax_dma_descr *descr;
2193 unsigned int recvl;
2194 unsigned int ret = 0;
2195
2196 while (1)
2197 {
2198 descr = &info->rec_descr[info->cur_rec_descr];
2199
2200 if (descr == phys_to_virt(*info->idescradr))
2201 break;
2202
2203 if (++info->cur_rec_descr == SERIAL_RECV_DESCRIPTORS)
2204 info->cur_rec_descr = 0;
2205
2206 /* find out how many bytes were read */
2207
2208 /* if the eop bit was not set, all data has been received */
2209 if (!(descr->status & d_eop)) {
2210 recvl = descr->sw_len;
2211 } else {
2212 /* otherwise we find the amount of data received here */
2213 recvl = descr->hw_len;
2214 }
2215
2216 /* Reset the status information */
2217 descr->status = 0;
2218
2219 DFLOW( DEBUG_LOG(info->line, "RX %lu\n", recvl);
2220 if (info->tty->stopped) {
2221 unsigned char *buf = phys_to_virt(descr->buf);
2222 DEBUG_LOG(info->line, "rx 0x%02X\n", buf[0]);
2223 DEBUG_LOG(info->line, "rx 0x%02X\n", buf[1]);
2224 DEBUG_LOG(info->line, "rx 0x%02X\n", buf[2]);
2225 }
2226 );
2227
2228 /* update stats */
2229 info->icount.rx += recvl;
2230
2231 ret += handle_descr_data(info, descr, recvl);
2232 }
2233
2234 return ret;
2235 }
2236
2237 static _INLINE_ void
2238 receive_chars_dma(struct e100_serial *info)
2239 {
2240 struct tty_struct *tty;
2241 unsigned char rstat;
2242
2243 #ifdef CONFIG_SVINTO_SIM
2244 /* No receive in the simulator. Will probably be when the rest of
2245 * the serial interface works, and this piece will just be removed.
2246 */
2247 return;
2248 #endif
2249
2250 /* Acknowledge both dma_descr and dma_eop irq in R_DMA_CHx_CLR_INTR */
2251 *info->iclrintradr =
2252 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
2253 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
2254
2255 tty = info->tty;
2256 if (!tty) /* Something wrong... */
2257 return;
2258
2259 #ifdef SERIAL_HANDLE_EARLY_ERRORS
2260 if (info->uses_dma_in)
2261 e100_enable_serial_data_irq(info);
2262 #endif
2263
2264 if (info->errorcode == ERRCODE_INSERT_BREAK)
2265 add_char_and_flag(info, '\0', TTY_BREAK);
2266
2267 handle_all_descr_data(info);
2268
2269 /* Read the status register to detect errors */
2270 rstat = info->port[REG_STATUS];
2271 if (rstat & IO_MASK(R_SERIAL0_STATUS, xoff_detect) ) {
2272 DFLOW(DEBUG_LOG(info->line, "XOFF detect stat %x\n", rstat));
2273 }
2274
2275 if (rstat & SER_ERROR_MASK) {
2276 /* If we got an error, we must reset it by reading the
2277 * data_in field
2278 */
2279 unsigned char data = info->port[REG_DATA];
2280
2281 PROCSTAT(ser_stat[info->line].errors_cnt++);
2282 DEBUG_LOG(info->line, "#dERR: s d 0x%04X\n",
2283 ((rstat & SER_ERROR_MASK) << 8) | data);
2284
2285 if (rstat & SER_PAR_ERR_MASK)
2286 add_char_and_flag(info, data, TTY_PARITY);
2287 else if (rstat & SER_OVERRUN_MASK)
2288 add_char_and_flag(info, data, TTY_OVERRUN);
2289 else if (rstat & SER_FRAMING_ERR_MASK)
2290 add_char_and_flag(info, data, TTY_FRAME);
2291 }
2292
2293 START_FLUSH_FAST_TIMER(info, "receive_chars");
2294
2295 /* Restart the receiving DMA */
2296 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, restart);
2297 }
2298
2299 static _INLINE_ int
2300 start_recv_dma(struct e100_serial *info)
2301 {
2302 struct etrax_dma_descr *descr = info->rec_descr;
2303 struct etrax_recv_buffer *buffer;
2304 int i;
2305
2306 /* Set up the receiving descriptors */
2307 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++) {
2308 if (!(buffer = alloc_recv_buffer(SERIAL_DESCR_BUF_SIZE)))
2309 panic("%s: Failed to allocate memory for receive buffer!\n", __FUNCTION__);
2310
2311 descr[i].ctrl = d_int;
2312 descr[i].buf = virt_to_phys(buffer->buffer);
2313 descr[i].sw_len = SERIAL_DESCR_BUF_SIZE;
2314 descr[i].hw_len = 0;
2315 descr[i].status = 0;
2316 descr[i].next = virt_to_phys(&descr[i+1]);
2317 }
2318
2319 /* Link the last descriptor to the first */
2320 descr[i-1].next = virt_to_phys(&descr[0]);
2321
2322 /* Start with the first descriptor in the list */
2323 info->cur_rec_descr = 0;
2324
2325 /* Start the DMA */
2326 *info->ifirstadr = virt_to_phys(&descr[info->cur_rec_descr]);
2327 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, start);
2328
2329 /* Input DMA should be running now */
2330 return 1;
2331 }
2332
2333 static void
2334 start_receive(struct e100_serial *info)
2335 {
2336 #ifdef CONFIG_SVINTO_SIM
2337 /* No receive in the simulator. Will probably be when the rest of
2338 * the serial interface works, and this piece will just be removed.
2339 */
2340 return;
2341 #endif
2342 info->tty->flip.count = 0;
2343 if (info->uses_dma_in) {
2344 /* reset the input dma channel to be sure it works */
2345
2346 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
2347 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->icmdadr) ==
2348 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, reset));
2349
2350 start_recv_dma(info);
2351 }
2352 }
2353
2354
2355 static _INLINE_ void
2356 status_handle(struct e100_serial *info, unsigned short status)
2357 {
2358 }
2359
2360 /* the bits in the MASK2 register are laid out like this:
2361 DMAI_EOP DMAI_DESCR DMAO_EOP DMAO_DESCR
2362 where I is the input channel and O is the output channel for the port.
2363 info->irq is the bit number for the DMAO_DESCR so to check the others we
2364 shift info->irq to the left.
2365 */
2366
2367 /* dma output channel interrupt handler
2368 this interrupt is called from DMA2(ser2), DMA4(ser3), DMA6(ser0) or
2369 DMA8(ser1) when they have finished a descriptor with the intr flag set.
2370 */
2371
2372 static irqreturn_t
2373 tr_interrupt(int irq, void *dev_id, struct pt_regs * regs)
2374 {
2375 struct e100_serial *info;
2376 unsigned long ireg;
2377 int i;
2378 int handled = 0;
2379
2380 #ifdef CONFIG_SVINTO_SIM
2381 /* No receive in the simulator. Will probably be when the rest of
2382 * the serial interface works, and this piece will just be removed.
2383 */
2384 {
2385 const char *s = "What? tr_interrupt in simulator??\n";
2386 SIMCOUT(s,strlen(s));
2387 }
2388 return IRQ_HANDLED;
2389 #endif
2390
2391 /* find out the line that caused this irq and get it from rs_table */
2392
2393 ireg = *R_IRQ_MASK2_RD; /* get the active irq bits for the dma channels */
2394
2395 for (i = 0; i < NR_PORTS; i++) {
2396 info = rs_table + i;
2397 if (!info->enabled || !info->uses_dma_out)
2398 continue;
2399 /* check for dma_descr (don't need to check for dma_eop in output dma for serial */
2400 if (ireg & info->irq) {
2401 handled = 1;
2402 /* we can send a new dma bunch. make it so. */
2403 DINTR2(DEBUG_LOG(info->line, "tr_interrupt %i\n", i));
2404 /* Read jiffies_usec first,
2405 * we want this time to be as late as possible
2406 */
2407 PROCSTAT(ser_stat[info->line].tx_dma_ints++);
2408 info->last_tx_active_usec = GET_JIFFIES_USEC();
2409 info->last_tx_active = jiffies;
2410 transmit_chars_dma(info);
2411 }
2412
2413 /* FIXME: here we should really check for a change in the
2414 status lines and if so call status_handle(info) */
2415 }
2416 return IRQ_RETVAL(handled);
2417 } /* tr_interrupt */
2418
2419 /* dma input channel interrupt handler */
2420
2421 static irqreturn_t
2422 rec_interrupt(int irq, void *dev_id, struct pt_regs * regs)
2423 {
2424 struct e100_serial *info;
2425 unsigned long ireg;
2426 int i;
2427 int handled = 0;
2428
2429 #ifdef CONFIG_SVINTO_SIM
2430 /* No receive in the simulator. Will probably be when the rest of
2431 * the serial interface works, and this piece will just be removed.
2432 */
2433 {
2434 const char *s = "What? rec_interrupt in simulator??\n";
2435 SIMCOUT(s,strlen(s));
2436 }
2437 return IRQ_HANDLED;
2438 #endif
2439
2440 /* find out the line that caused this irq and get it from rs_table */
2441
2442 ireg = *R_IRQ_MASK2_RD; /* get the active irq bits for the dma channels */
2443
2444 for (i = 0; i < NR_PORTS; i++) {
2445 info = rs_table + i;
2446 if (!info->enabled || !info->uses_dma_in)
2447 continue;
2448 /* check for both dma_eop and dma_descr for the input dma channel */
2449 if (ireg & ((info->irq << 2) | (info->irq << 3))) {
2450 handled = 1;
2451 /* we have received something */
2452 receive_chars_dma(info);
2453 }
2454
2455 /* FIXME: here we should really check for a change in the
2456 status lines and if so call status_handle(info) */
2457 }
2458 return IRQ_RETVAL(handled);
2459 } /* rec_interrupt */
2460
2461 static _INLINE_ int
2462 force_eop_if_needed(struct e100_serial *info)
2463 {
2464 /* We check data_avail bit to determine if data has
2465 * arrived since last time
2466 */
2467 unsigned char rstat = info->port[REG_STATUS];
2468
2469 /* error or datavail? */
2470 if (rstat & SER_ERROR_MASK) {
2471 /* Some error has occurred. If there has been valid data, an
2472 * EOP interrupt will be made automatically. If no data, the
2473 * normal ser_interrupt should be enabled and handle it.
2474 * So do nothing!
2475 */
2476 DEBUG_LOG(info->line, "timeout err: rstat 0x%03X\n",
2477 rstat | (info->line << 8));
2478 return 0;
2479 }
2480
2481 if (rstat & SER_DATA_AVAIL_MASK) {
2482 /* Ok data, no error, count it */
2483 TIMERD(DEBUG_LOG(info->line, "timeout: rstat 0x%03X\n",
2484 rstat | (info->line << 8)));
2485 /* Read data to clear status flags */
2486 (void)info->port[REG_DATA];
2487
2488 info->forced_eop = 0;
2489 START_FLUSH_FAST_TIMER(info, "magic");
2490 return 0;
2491 }
2492
2493 /* hit the timeout, force an EOP for the input
2494 * dma channel if we haven't already
2495 */
2496 if (!info->forced_eop) {
2497 info->forced_eop = 1;
2498 PROCSTAT(ser_stat[info->line].timeout_flush_cnt++);
2499 TIMERD(DEBUG_LOG(info->line, "timeout EOP %i\n", info->line));
2500 FORCE_EOP(info);
2501 }
2502
2503 return 1;
2504 }
2505
2506 extern _INLINE_ void
2507 flush_to_flip_buffer(struct e100_serial *info)
2508 {
2509 struct tty_struct *tty;
2510 struct etrax_recv_buffer *buffer;
2511 unsigned int length;
2512 unsigned long flags;
2513 int max_flip_size;
2514
2515 if (!info->first_recv_buffer)
2516 return;
2517
2518 save_flags(flags);
2519 cli();
2520
2521 if (!(tty = info->tty)) {
2522 restore_flags(flags);
2523 return;
2524 }
2525
2526 length = tty->flip.count;
2527 /* Don't flip more than the ldisc has room for.
2528 * The return value from ldisc.receive_room(tty) - might not be up to
2529 * date, the previous flip of up to TTY_FLIPBUF_SIZE might be on the
2530 * processed and not accounted for yet.
2531 * Since we use DMA, 1 SERIAL_DESCR_BUF_SIZE could be on the way.
2532 * Lets buffer data here and let flow control take care of it.
2533 * Since we normally flip large chunks, the ldisc don't react
2534 * with throttle until too late if we flip to much.
2535 */
2536 max_flip_size = tty->ldisc.receive_room(tty);
2537 if (max_flip_size < 0)
2538 max_flip_size = 0;
2539 if (max_flip_size <= (TTY_FLIPBUF_SIZE + /* Maybe not accounted for */
2540 length + info->recv_cnt + /* We have this queued */
2541 2*SERIAL_DESCR_BUF_SIZE + /* This could be on the way */
2542 TTY_THRESHOLD_THROTTLE)) { /* Some slack */
2543 /* check TTY_THROTTLED first so it indicates our state */
2544 if (!test_and_set_bit(TTY_THROTTLED, &tty->flags)) {
2545 DFLOW(DEBUG_LOG(info->line,"flush_to_flip throttles room %lu\n", max_flip_size));
2546 rs_throttle(tty);
2547 }
2548 #if 0
2549 else if (max_flip_size <= (TTY_FLIPBUF_SIZE + /* Maybe not accounted for */
2550 length + info->recv_cnt + /* We have this queued */
2551 SERIAL_DESCR_BUF_SIZE + /* This could be on the way */
2552 TTY_THRESHOLD_THROTTLE)) { /* Some slack */
2553 DFLOW(DEBUG_LOG(info->line,"flush_to_flip throttles again! %lu\n", max_flip_size));
2554 rs_throttle(tty);
2555 }
2556 #endif
2557 }
2558
2559 if (max_flip_size > TTY_FLIPBUF_SIZE)
2560 max_flip_size = TTY_FLIPBUF_SIZE;
2561
2562 while ((buffer = info->first_recv_buffer) && length < max_flip_size) {
2563 unsigned int count = buffer->length;
2564
2565 if (length + count > max_flip_size)
2566 count = max_flip_size - length;
2567
2568 memcpy(tty->flip.char_buf_ptr + length, buffer->buffer, count);
2569 memset(tty->flip.flag_buf_ptr + length, TTY_NORMAL, count);
2570 tty->flip.flag_buf_ptr[length] = buffer->error;
2571
2572 length += count;
2573 info->recv_cnt -= count;
2574 DFLIP(DEBUG_LOG(info->line,"flip: %i\n", length));
2575
2576 if (count == buffer->length) {
2577 info->first_recv_buffer = buffer->next;
2578 kfree(buffer);
2579 } else {
2580 buffer->length -= count;
2581 memmove(buffer->buffer, buffer->buffer + count, buffer->length);
2582 buffer->error = TTY_NORMAL;
2583 }
2584 }
2585
2586 if (!info->first_recv_buffer)
2587 info->last_recv_buffer = NULL;
2588
2589 tty->flip.count = length;
2590 DFLIP(if (tty->ldisc.chars_in_buffer(tty) > 3500) {
2591 DEBUG_LOG(info->line, "ldisc %lu\n",
2592 tty->ldisc.chars_in_buffer(tty));
2593 DEBUG_LOG(info->line, "flip.count %lu\n",
2594 tty->flip.count);
2595 }
2596 );
2597 restore_flags(flags);
2598
2599 DFLIP(
2600 if (1) {
2601
2602 if (test_bit(TTY_DONT_FLIP, &tty->flags)) {
2603 DEBUG_LOG(info->line, "*** TTY_DONT_FLIP set flip.count %i ***\n", tty->flip.count);
2604 DEBUG_LOG(info->line, "*** recv_cnt %i\n", info->recv_cnt);
2605 } else {
2606 }
2607 DEBUG_LOG(info->line, "*** rxtot %i\n", info->icount.rx);
2608 DEBUG_LOG(info->line, "ldisc %lu\n", tty->ldisc.chars_in_buffer(tty));
2609 DEBUG_LOG(info->line, "room %lu\n", tty->ldisc.receive_room(tty));
2610 }
2611
2612 );
2613
2614 /* this includes a check for low-latency */
2615 tty_flip_buffer_push(tty);
2616 }
2617
2618 static _INLINE_ void
2619 check_flush_timeout(struct e100_serial *info)
2620 {
2621 /* Flip what we've got (if we can) */
2622 flush_to_flip_buffer(info);
2623
2624 /* We might need to flip later, but not to fast
2625 * since the system is busy processing input... */
2626 if (info->first_recv_buffer)
2627 START_FLUSH_FAST_TIMER_TIME(info, "flip", 2000);
2628
2629 /* Force eop last, since data might have come while we're processing
2630 * and if we started the slow timer above, we won't start a fast
2631 * below.
2632 */
2633 force_eop_if_needed(info);
2634 }
2635
2636 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
2637 static void flush_timeout_function(unsigned long data)
2638 {
2639 struct e100_serial *info = (struct e100_serial *)data;
2640
2641 fast_timers[info->line].function = NULL;
2642 serial_fast_timer_expired++;
2643 TIMERD(DEBUG_LOG(info->line, "flush_timout %i ", info->line));
2644 TIMERD(DEBUG_LOG(info->line, "num expired: %i\n", serial_fast_timer_expired));
2645 check_flush_timeout(info);
2646 }
2647
2648 #else
2649
2650 /* dma fifo/buffer timeout handler
2651 forces an end-of-packet for the dma input channel if no chars
2652 have been received for CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS/100 s.
2653 */
2654
2655 static struct timer_list flush_timer;
2656
2657 static void
2658 timed_flush_handler(unsigned long ptr)
2659 {
2660 struct e100_serial *info;
2661 int i;
2662
2663 #ifdef CONFIG_SVINTO_SIM
2664 return;
2665 #endif
2666
2667 for (i = 0; i < NR_PORTS; i++) {
2668 info = rs_table + i;
2669 if (info->uses_dma_in)
2670 check_flush_timeout(info);
2671 }
2672
2673 /* restart flush timer */
2674 mod_timer(&flush_timer, jiffies + CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS);
2675 }
2676 #endif
2677
2678 #ifdef SERIAL_HANDLE_EARLY_ERRORS
2679
2680 /* If there is an error (ie break) when the DMA is running and
2681 * there are no bytes in the fifo the DMA is stopped and we get no
2682 * eop interrupt. Thus we have to monitor the first bytes on a DMA
2683 * transfer, and if it is without error we can turn the serial
2684 * interrupts off.
2685 */
2686
2687 /*
2688 BREAK handling on ETRAX 100:
2689 ETRAX will generate interrupt although there is no stop bit between the
2690 characters.
2691
2692 Depending on how long the break sequence is, the end of the breaksequence
2693 will look differently:
2694 | indicates start/end of a character.
2695
2696 B= Break character (0x00) with framing error.
2697 E= Error byte with parity error received after B characters.
2698 F= "Faked" valid byte received immediately after B characters.
2699 V= Valid byte
2700
2701 1.
2702 B BL ___________________________ V
2703 .._|__________|__________| |valid data |
2704
2705 Multiple frame errors with data == 0x00 (B),
2706 the timing matches up "perfectly" so no extra ending char is detected.
2707 The RXD pin is 1 in the last interrupt, in that case
2708 we set info->errorcode = ERRCODE_INSERT_BREAK, but we can't really
2709 know if another byte will come and this really is case 2. below
2710 (e.g F=0xFF or 0xFE)
2711 If RXD pin is 0 we can expect another character (see 2. below).
2712
2713
2714 2.
2715
2716 B B E or F__________________..__ V
2717 .._|__________|__________|______ | |valid data
2718 "valid" or
2719 parity error
2720
2721 Multiple frame errors with data == 0x00 (B),
2722 but the part of the break trigs is interpreted as a start bit (and possibly
2723 some 0 bits followed by a number of 1 bits and a stop bit).
2724 Depending on parity settings etc. this last character can be either
2725 a fake "valid" char (F) or have a parity error (E).
2726
2727 If the character is valid it will be put in the buffer,
2728 we set info->errorcode = ERRCODE_SET_BREAK so the receive interrupt
2729 will set the flags so the tty will handle it,
2730 if it's an error byte it will not be put in the buffer
2731 and we set info->errorcode = ERRCODE_INSERT_BREAK.
2732
2733 To distinguish a V byte in 1. from an F byte in 2. we keep a timestamp
2734 of the last faulty char (B) and compares it with the current time:
2735 If the time elapsed time is less then 2*char_time_usec we will assume
2736 it's a faked F char and not a Valid char and set
2737 info->errorcode = ERRCODE_SET_BREAK.
2738
2739 Flaws in the above solution:
2740 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
2741 We use the timer to distinguish a F character from a V character,
2742 if a V character is to close after the break we might make the wrong decision.
2743
2744 TODO: The break will be delayed until an F or V character is received.
2745
2746 */
2747
2748 extern _INLINE_
2749 struct e100_serial * handle_ser_rx_interrupt_no_dma(struct e100_serial *info)
2750 {
2751 unsigned long data_read;
2752 struct tty_struct *tty = info->tty;
2753
2754 if (!tty) {
2755 printk("!NO TTY!\n");
2756 return info;
2757 }
2758 if (tty->flip.count >= TTY_FLIPBUF_SIZE - TTY_THRESHOLD_THROTTLE) {
2759 /* check TTY_THROTTLED first so it indicates our state */
2760 if (!test_and_set_bit(TTY_THROTTLED, &tty->flags)) {
2761 DFLOW(DEBUG_LOG(info->line, "rs_throttle flip.count: %i\n", tty->flip.count));
2762 rs_throttle(tty);
2763 }
2764 }
2765 if (tty->flip.count >= TTY_FLIPBUF_SIZE) {
2766 DEBUG_LOG(info->line, "force FLIP! %i\n", tty->flip.count);
2767 tty->flip.work.func((void *) tty);
2768 if (tty->flip.count >= TTY_FLIPBUF_SIZE) {
2769 DEBUG_LOG(info->line, "FLIP FULL! %i\n", tty->flip.count);
2770 return info; /* if TTY_DONT_FLIP is set */
2771 }
2772 }
2773 /* Read data and status at the same time */
2774 data_read = *((unsigned long *)&info->port[REG_DATA_STATUS32]);
2775 more_data:
2776 if (data_read & IO_MASK(R_SERIAL0_READ, xoff_detect) ) {
2777 DFLOW(DEBUG_LOG(info->line, "XOFF detect\n", 0));
2778 }
2779 DINTR2(DEBUG_LOG(info->line, "ser_rx %c\n", IO_EXTRACT(R_SERIAL0_READ, data_in, data_read)));
2780
2781 if (data_read & ( IO_MASK(R_SERIAL0_READ, framing_err) |
2782 IO_MASK(R_SERIAL0_READ, par_err) |
2783 IO_MASK(R_SERIAL0_READ, overrun) )) {
2784 /* An error */
2785 info->last_rx_active_usec = GET_JIFFIES_USEC();
2786 info->last_rx_active = jiffies;
2787 DINTR1(DEBUG_LOG(info->line, "ser_rx err stat_data %04X\n", data_read));
2788 DLOG_INT_TRIG(
2789 if (!log_int_trig1_pos) {
2790 log_int_trig1_pos = log_int_pos;
2791 log_int(rdpc(), 0, 0);
2792 }
2793 );
2794
2795
2796 if ( ((data_read & IO_MASK(R_SERIAL0_READ, data_in)) == 0) &&
2797 (data_read & IO_MASK(R_SERIAL0_READ, framing_err)) ) {
2798 /* Most likely a break, but we get interrupts over and
2799 * over again.
2800 */
2801
2802 if (!info->break_detected_cnt) {
2803 DEBUG_LOG(info->line, "#BRK start\n", 0);
2804 }
2805 if (data_read & IO_MASK(R_SERIAL0_READ, rxd)) {
2806 /* The RX pin is high now, so the break
2807 * must be over, but....
2808 * we can't really know if we will get another
2809 * last byte ending the break or not.
2810 * And we don't know if the byte (if any) will
2811 * have an error or look valid.
2812 */
2813 DEBUG_LOG(info->line, "# BL BRK\n", 0);
2814 info->errorcode = ERRCODE_INSERT_BREAK;
2815 }
2816 info->break_detected_cnt++;
2817 } else {
2818 /* The error does not look like a break, but could be
2819 * the end of one
2820 */
2821 if (info->break_detected_cnt) {
2822 DEBUG_LOG(info->line, "EBRK %i\n", info->break_detected_cnt);
2823 info->errorcode = ERRCODE_INSERT_BREAK;
2824 } else {
2825 if (info->errorcode == ERRCODE_INSERT_BREAK) {
2826 info->icount.brk++;
2827 *tty->flip.char_buf_ptr = 0;
2828 *tty->flip.flag_buf_ptr = TTY_BREAK;
2829 tty->flip.flag_buf_ptr++;
2830 tty->flip.char_buf_ptr++;
2831 tty->flip.count++;
2832 info->icount.rx++;
2833 }
2834 *tty->flip.char_buf_ptr = IO_EXTRACT(R_SERIAL0_READ, data_in, data_read);
2835
2836 if (data_read & IO_MASK(R_SERIAL0_READ, par_err)) {
2837 info->icount.parity++;
2838 *tty->flip.flag_buf_ptr = TTY_PARITY;
2839 } else if (data_read & IO_MASK(R_SERIAL0_READ, overrun)) {
2840 info->icount.overrun++;
2841 *tty->flip.flag_buf_ptr = TTY_OVERRUN;
2842 } else if (data_read & IO_MASK(R_SERIAL0_READ, framing_err)) {
2843 info->icount.frame++;
2844 *tty->flip.flag_buf_ptr = TTY_FRAME;
2845 }
2846 info->errorcode = 0;
2847 }
2848 info->break_detected_cnt = 0;
2849 }
2850 } else if (data_read & IO_MASK(R_SERIAL0_READ, data_avail)) {
2851 /* No error */
2852 DLOG_INT_TRIG(
2853 if (!log_int_trig1_pos) {
2854 if (log_int_pos >= log_int_size) {
2855 log_int_pos = 0;
2856 }
2857 log_int_trig0_pos = log_int_pos;
2858 log_int(rdpc(), 0, 0);
2859 }
2860 );
2861 *tty->flip.char_buf_ptr = IO_EXTRACT(R_SERIAL0_READ, data_in, data_read);
2862 *tty->flip.flag_buf_ptr = 0;
2863 } else {
2864 DEBUG_LOG(info->line, "ser_rx int but no data_avail %08lX\n", data_read);
2865 }
2866
2867
2868 tty->flip.flag_buf_ptr++;
2869 tty->flip.char_buf_ptr++;
2870 tty->flip.count++;
2871 info->icount.rx++;
2872 data_read = *((unsigned long *)&info->port[REG_DATA_STATUS32]);
2873 if (data_read & IO_MASK(R_SERIAL0_READ, data_avail)) {
2874 DEBUG_LOG(info->line, "ser_rx %c in loop\n", IO_EXTRACT(R_SERIAL0_READ, data_in, data_read));
2875 goto more_data;
2876 }
2877
2878 tty_flip_buffer_push(info->tty);
2879 return info;
2880 }
2881
2882 extern _INLINE_
2883 struct e100_serial* handle_ser_rx_interrupt(struct e100_serial *info)
2884 {
2885 unsigned char rstat;
2886
2887 #ifdef SERIAL_DEBUG_INTR
2888 printk("Interrupt from serport %d\n", i);
2889 #endif
2890 /* DEBUG_LOG(info->line, "ser_interrupt stat %03X\n", rstat | (i << 8)); */
2891 if (!info->uses_dma_in) {
2892 return handle_ser_rx_interrupt_no_dma(info);
2893 }
2894 /* DMA is used */
2895 rstat = info->port[REG_STATUS];
2896 if (rstat & IO_MASK(R_SERIAL0_STATUS, xoff_detect) ) {
2897 DFLOW(DEBUG_LOG(info->line, "XOFF detect\n", 0));
2898 }
2899
2900 if (rstat & SER_ERROR_MASK) {
2901 unsigned char data;
2902
2903 info->last_rx_active_usec = GET_JIFFIES_USEC();
2904 info->last_rx_active = jiffies;
2905 /* If we got an error, we must reset it by reading the
2906 * data_in field
2907 */
2908 data = info->port[REG_DATA];
2909 DINTR1(DEBUG_LOG(info->line, "ser_rx! %c\n", data));
2910 DINTR1(DEBUG_LOG(info->line, "ser_rx err stat %02X\n", rstat));
2911 if (!data && (rstat & SER_FRAMING_ERR_MASK)) {
2912 /* Most likely a break, but we get interrupts over and
2913 * over again.
2914 */
2915
2916 if (!info->break_detected_cnt) {
2917 DEBUG_LOG(info->line, "#BRK start\n", 0);
2918 }
2919 if (rstat & SER_RXD_MASK) {
2920 /* The RX pin is high now, so the break
2921 * must be over, but....
2922 * we can't really know if we will get another
2923 * last byte ending the break or not.
2924 * And we don't know if the byte (if any) will
2925 * have an error or look valid.
2926 */
2927 DEBUG_LOG(info->line, "# BL BRK\n", 0);
2928 info->errorcode = ERRCODE_INSERT_BREAK;
2929 }
2930 info->break_detected_cnt++;
2931 } else {
2932 /* The error does not look like a break, but could be
2933 * the end of one
2934 */
2935 if (info->break_detected_cnt) {
2936 DEBUG_LOG(info->line, "EBRK %i\n", info->break_detected_cnt);
2937 info->errorcode = ERRCODE_INSERT_BREAK;
2938 } else {
2939 if (info->errorcode == ERRCODE_INSERT_BREAK) {
2940 info->icount.brk++;
2941 add_char_and_flag(info, '\0', TTY_BREAK);
2942 }
2943
2944 if (rstat & SER_PAR_ERR_MASK) {
2945 info->icount.parity++;
2946 add_char_and_flag(info, data, TTY_PARITY);
2947 } else if (rstat & SER_OVERRUN_MASK) {
2948 info->icount.overrun++;
2949 add_char_and_flag(info, data, TTY_OVERRUN);
2950 } else if (rstat & SER_FRAMING_ERR_MASK) {
2951 info->icount.frame++;
2952 add_char_and_flag(info, data, TTY_FRAME);
2953 }
2954
2955 info->errorcode = 0;
2956 }
2957 info->break_detected_cnt = 0;
2958 DEBUG_LOG(info->line, "#iERR s d %04X\n",
2959 ((rstat & SER_ERROR_MASK) << 8) | data);
2960 }
2961 PROCSTAT(ser_stat[info->line].early_errors_cnt++);
2962 } else { /* It was a valid byte, now let the DMA do the rest */
2963 unsigned long curr_time_u = GET_JIFFIES_USEC();
2964 unsigned long curr_time = jiffies;
2965
2966 if (info->break_detected_cnt) {
2967 /* Detect if this character is a new valid char or the
2968 * last char in a break sequence: If LSBits are 0 and
2969 * MSBits are high AND the time is close to the
2970 * previous interrupt we should discard it.
2971 */
2972 long elapsed_usec =
2973 (curr_time - info->last_rx_active) * (1000000/HZ) +
2974 curr_time_u - info->last_rx_active_usec;
2975 if (elapsed_usec < 2*info->char_time_usec) {
2976 DEBUG_LOG(info->line, "FBRK %i\n", info->line);
2977 /* Report as BREAK (error) and let
2978 * receive_chars_dma() handle it
2979 */
2980 info->errorcode = ERRCODE_SET_BREAK;
2981 } else {
2982 DEBUG_LOG(info->line, "Not end of BRK (V)%i\n", info->line);
2983 }
2984 DEBUG_LOG(info->line, "num brk %i\n", info->break_detected_cnt);
2985 }
2986
2987 #ifdef SERIAL_DEBUG_INTR
2988 printk("** OK, disabling ser_interrupts\n");
2989 #endif
2990 e100_disable_serial_data_irq(info);
2991 DINTR2(DEBUG_LOG(info->line, "ser_rx OK %d\n", info->line));
2992 info->break_detected_cnt = 0;
2993
2994 PROCSTAT(ser_stat[info->line].ser_ints_ok_cnt++);
2995 }
2996 /* Restarting the DMA never hurts */
2997 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, restart);
2998 START_FLUSH_FAST_TIMER(info, "ser_int");
2999 return info;
3000 } /* handle_ser_rx_interrupt */
3001
3002 extern _INLINE_ void handle_ser_tx_interrupt(struct e100_serial *info)
3003 {
3004 unsigned long flags;
3005
3006 if (info->x_char) {
3007 unsigned char rstat;
3008 DFLOW(DEBUG_LOG(info->line, "tx_int: xchar 0x%02X\n", info->x_char));
3009 save_flags(flags); cli();
3010 rstat = info->port[REG_STATUS];
3011 DFLOW(DEBUG_LOG(info->line, "stat %x\n", rstat));
3012
3013 info->port[REG_TR_DATA] = info->x_char;
3014 info->icount.tx++;
3015 info->x_char = 0;
3016 /* We must enable since it is disabled in ser_interrupt */
3017 e100_enable_serial_tx_ready_irq(info);
3018 restore_flags(flags);
3019 return;
3020 }
3021 if (info->uses_dma_out) {
3022 unsigned char rstat;
3023 int i;
3024 /* We only use normal tx interrupt when sending x_char */
3025 DFLOW(DEBUG_LOG(info->line, "tx_int: xchar sent\n", 0));
3026 save_flags(flags); cli();
3027 rstat = info->port[REG_STATUS];
3028 DFLOW(DEBUG_LOG(info->line, "stat %x\n", rstat));
3029 e100_disable_serial_tx_ready_irq(info);
3030 if (info->tty->stopped)
3031 rs_stop(info->tty);
3032 /* Enable the DMA channel and tell it to continue */
3033 e100_enable_txdma_channel(info);
3034 /* Wait 12 cycles before doing the DMA command */
3035 for(i = 6; i > 0; i--)
3036 nop();
3037
3038 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, continue);
3039 restore_flags(flags);
3040 return;
3041 }
3042 /* Normal char-by-char interrupt */
3043 if (info->xmit.head == info->xmit.tail
3044 || info->tty->stopped
3045 || info->tty->hw_stopped) {
3046 DFLOW(DEBUG_LOG(info->line, "tx_int: stopped %i\n", info->tty->stopped));
3047 e100_disable_serial_tx_ready_irq(info);
3048 info->tr_running = 0;
3049 return;
3050 }
3051 DINTR2(DEBUG_LOG(info->line, "tx_int %c\n", info->xmit.buf[info->xmit.tail]));
3052 /* Send a byte, rs485 timing is critical so turn of ints */
3053 save_flags(flags); cli();
3054 info->port[REG_TR_DATA] = info->xmit.buf[info->xmit.tail];
3055 info->xmit.tail = (info->xmit.tail + 1) & (SERIAL_XMIT_SIZE-1);
3056 info->icount.tx++;
3057 if (info->xmit.head == info->xmit.tail) {
3058 #if defined(CONFIG_ETRAX_RS485) && defined(CONFIG_ETRAX_FAST_TIMER)
3059 if (info->rs485.enabled) {
3060 /* Set a short timer to toggle RTS */
3061 start_one_shot_timer(&fast_timers_rs485[info->line],
3062 rs485_toggle_rts_timer_function,
3063 (unsigned long)info,
3064 info->char_time_usec*2,
3065 "RS-485");
3066 }
3067 #endif /* RS485 */
3068 info->last_tx_active_usec = GET_JIFFIES_USEC();
3069 info->last_tx_active = jiffies;
3070 e100_disable_serial_tx_ready_irq(info);
3071 info->tr_running = 0;
3072 DFLOW(DEBUG_LOG(info->line, "tx_int: stop2\n", 0));
3073 } else {
3074 /* We must enable since it is disabled in ser_interrupt */
3075 e100_enable_serial_tx_ready_irq(info);
3076 }
3077 restore_flags(flags);
3078
3079 if (CIRC_CNT(info->xmit.head,
3080 info->xmit.tail,
3081 SERIAL_XMIT_SIZE) < WAKEUP_CHARS)
3082 rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
3083
3084 } /* handle_ser_tx_interrupt */
3085
3086 /* result of time measurements:
3087 * RX duration 54-60 us when doing something, otherwise 6-9 us
3088 * ser_int duration: just sending: 8-15 us normally, up to 73 us
3089 */
3090 static irqreturn_t
3091 ser_interrupt(int irq, void *dev_id, struct pt_regs *regs)
3092 {
3093 static volatile int tx_started = 0;
3094 struct e100_serial *info;
3095 int i;
3096 unsigned long flags;
3097 unsigned long irq_mask1_rd;
3098 unsigned long data_mask = (1 << (8+2*0)); /* ser0 data_avail */
3099 int handled = 0;
3100 static volatile unsigned long reentered_ready_mask = 0;
3101
3102 save_flags(flags); cli();
3103 irq_mask1_rd = *R_IRQ_MASK1_RD;
3104 /* First handle all rx interrupts with ints disabled */
3105 info = rs_table;
3106 irq_mask1_rd &= e100_ser_int_mask;
3107 for (i = 0; i < NR_PORTS; i++) {
3108 /* Which line caused the data irq? */
3109 if (irq_mask1_rd & data_mask) {
3110 handled = 1;
3111 handle_ser_rx_interrupt(info);
3112 }
3113 info += 1;
3114 data_mask <<= 2;
3115 }
3116 /* Handle tx interrupts with interrupts enabled so we
3117 * can take care of new data interrupts while transmitting
3118 * We protect the tx part with the tx_started flag.
3119 * We disable the tr_ready interrupts we are about to handle and
3120 * unblock the serial interrupt so new serial interrupts may come.
3121 *
3122 * If we get a new interrupt:
3123 * - it migth be due to synchronous serial ports.
3124 * - serial irq will be blocked by general irq handler.
3125 * - async data will be handled above (sync will be ignored).
3126 * - tx_started flag will prevent us from trying to send again and
3127 * we will exit fast - no need to unblock serial irq.
3128 * - Next (sync) serial interrupt handler will be runned with
3129 * disabled interrupt due to restore_flags() at end of function,
3130 * so sync handler will not be preempted or reentered.
3131 */
3132 if (!tx_started) {
3133 unsigned long ready_mask;
3134 unsigned long
3135 tx_started = 1;
3136 /* Only the tr_ready interrupts left */
3137 irq_mask1_rd &= (IO_MASK(R_IRQ_MASK1_RD, ser0_ready) |
3138 IO_MASK(R_IRQ_MASK1_RD, ser1_ready) |
3139 IO_MASK(R_IRQ_MASK1_RD, ser2_ready) |
3140 IO_MASK(R_IRQ_MASK1_RD, ser3_ready));
3141 while (irq_mask1_rd) {
3142 /* Disable those we are about to handle */
3143 *R_IRQ_MASK1_CLR = irq_mask1_rd;
3144 /* Unblock the serial interrupt */
3145 *R_VECT_MASK_SET = IO_STATE(R_VECT_MASK_SET, serial, set);
3146
3147 sti();
3148 ready_mask = (1 << (8+1+2*0)); /* ser0 tr_ready */
3149 info = rs_table;
3150 for (i = 0; i < NR_PORTS; i++) {
3151 /* Which line caused the ready irq? */
3152 if (irq_mask1_rd & ready_mask) {
3153 handled = 1;
3154 handle_ser_tx_interrupt(info);
3155 }
3156 info += 1;
3157 ready_mask <<= 2;
3158 }
3159 /* handle_ser_tx_interrupt enables tr_ready interrupts */
3160 cli();
3161 /* Handle reentered TX interrupt */
3162 irq_mask1_rd = reentered_ready_mask;
3163 }
3164 cli();
3165 tx_started = 0;
3166 } else {
3167 unsigned long ready_mask;
3168 ready_mask = irq_mask1_rd & (IO_MASK(R_IRQ_MASK1_RD, ser0_ready) |
3169 IO_MASK(R_IRQ_MASK1_RD, ser1_ready) |
3170 IO_MASK(R_IRQ_MASK1_RD, ser2_ready) |
3171 IO_MASK(R_IRQ_MASK1_RD, ser3_ready));
3172 if (ready_mask) {
3173 reentered_ready_mask |= ready_mask;
3174 /* Disable those we are about to handle */
3175 *R_IRQ_MASK1_CLR = ready_mask;
3176 DFLOW(DEBUG_LOG(SERIAL_DEBUG_LINE, "ser_int reentered with TX %X\n", ready_mask));
3177 }
3178 }
3179
3180 restore_flags(flags);
3181 return IRQ_RETVAL(handled);
3182 } /* ser_interrupt */
3183 #endif
3184
3185 /*
3186 * -------------------------------------------------------------------
3187 * Here ends the serial interrupt routines.
3188 * -------------------------------------------------------------------
3189 */
3190
3191 /*
3192 * This routine is used to handle the "bottom half" processing for the
3193 * serial driver, known also the "software interrupt" processing.
3194 * This processing is done at the kernel interrupt level, after the
3195 * rs_interrupt() has returned, BUT WITH INTERRUPTS TURNED ON. This
3196 * is where time-consuming activities which can not be done in the
3197 * interrupt driver proper are done; the interrupt driver schedules
3198 * them using rs_sched_event(), and they get done here.
3199 */
3200 static void
3201 do_softint(void *private_)
3202 {
3203 struct e100_serial *info = (struct e100_serial *) private_;
3204 struct tty_struct *tty;
3205
3206 tty = info->tty;
3207 if (!tty)
3208 return;
3209
3210 if (test_and_clear_bit(RS_EVENT_WRITE_WAKEUP, &info->event)) {
3211 if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
3212 tty->ldisc.write_wakeup)
3213 (tty->ldisc.write_wakeup)(tty);
3214 wake_up_interruptible(&tty->write_wait);
3215 }
3216 }
3217
3218 static int
3219 startup(struct e100_serial * info)
3220 {
3221 unsigned long flags;
3222 unsigned long xmit_page;
3223 int i;
3224
3225 xmit_page = get_zeroed_page(GFP_KERNEL);
3226 if (!xmit_page)
3227 return -ENOMEM;
3228
3229 save_flags(flags);
3230 cli();
3231
3232 /* if it was already initialized, skip this */
3233
3234 if (info->flags & ASYNC_INITIALIZED) {
3235 restore_flags(flags);
3236 free_page(xmit_page);
3237 return 0;
3238 }
3239
3240 if (info->xmit.buf)
3241 free_page(xmit_page);
3242 else
3243 info->xmit.buf = (unsigned char *) xmit_page;
3244
3245 #ifdef SERIAL_DEBUG_OPEN
3246 printk("starting up ttyS%d (xmit_buf 0x%p)...\n", info->line, info->xmit.buf);
3247 #endif
3248
3249 #ifdef CONFIG_SVINTO_SIM
3250 /* Bits and pieces collected from below. Better to have them
3251 in one ifdef:ed clause than to mix in a lot of ifdefs,
3252 right? */
3253 if (info->tty)
3254 clear_bit(TTY_IO_ERROR, &info->tty->flags);
3255
3256 info->xmit.head = info->xmit.tail = 0;
3257 info->first_recv_buffer = info->last_recv_buffer = NULL;
3258 info->recv_cnt = info->max_recv_cnt = 0;
3259
3260 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++)
3261 info->rec_descr[i].buf = NULL;
3262
3263 /* No real action in the simulator, but may set info important
3264 to ioctl. */
3265 change_speed(info);
3266 #else
3267
3268 /*
3269 * Clear the FIFO buffers and disable them
3270 * (they will be reenabled in change_speed())
3271 */
3272
3273 /*
3274 * Reset the DMA channels and make sure their interrupts are cleared
3275 */
3276
3277 if (info->dma_in_enabled) {
3278 info->uses_dma_in = 1;
3279 e100_enable_rxdma_channel(info);
3280
3281 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
3282
3283 /* Wait until reset cycle is complete */
3284 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->icmdadr) ==
3285 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, reset));
3286
3287 /* Make sure the irqs are cleared */
3288 *info->iclrintradr =
3289 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
3290 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
3291 } else {
3292 e100_disable_rxdma_channel(info);
3293 }
3294
3295 if (info->dma_out_enabled) {
3296 info->uses_dma_out = 1;
3297 e100_enable_txdma_channel(info);
3298 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
3299
3300 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->ocmdadr) ==
3301 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, reset));
3302
3303 /* Make sure the irqs are cleared */
3304 *info->oclrintradr =
3305 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
3306 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
3307 } else {
3308 e100_disable_txdma_channel(info);
3309 }
3310
3311 if (info->tty)
3312 clear_bit(TTY_IO_ERROR, &info->tty->flags);
3313
3314 info->xmit.head = info->xmit.tail = 0;
3315 info->first_recv_buffer = info->last_recv_buffer = NULL;
3316 info->recv_cnt = info->max_recv_cnt = 0;
3317
3318 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++)
3319 info->rec_descr[i].buf = 0;
3320
3321 /*
3322 * and set the speed and other flags of the serial port
3323 * this will start the rx/tx as well
3324 */
3325 #ifdef SERIAL_HANDLE_EARLY_ERRORS
3326 e100_enable_serial_data_irq(info);
3327 #endif
3328 change_speed(info);
3329
3330 /* dummy read to reset any serial errors */
3331
3332 (void)info->port[REG_DATA];
3333
3334 /* enable the interrupts */
3335 if (info->uses_dma_out)
3336 e100_enable_txdma_irq(info);
3337
3338 e100_enable_rx_irq(info);
3339
3340 info->tr_running = 0; /* to be sure we don't lock up the transmitter */
3341
3342 /* setup the dma input descriptor and start dma */
3343
3344 start_receive(info);
3345
3346 /* for safety, make sure the descriptors last result is 0 bytes written */
3347
3348 info->tr_descr.sw_len = 0;
3349 info->tr_descr.hw_len = 0;
3350 info->tr_descr.status = 0;
3351
3352 /* enable RTS/DTR last */
3353
3354 e100_rts(info, 1);
3355 e100_dtr(info, 1);
3356
3357 #endif /* CONFIG_SVINTO_SIM */
3358
3359 info->flags |= ASYNC_INITIALIZED;
3360
3361 restore_flags(flags);
3362 return 0;
3363 }
3364
3365 /*
3366 * This routine will shutdown a serial port; interrupts are disabled, and
3367 * DTR is dropped if the hangup on close termio flag is on.
3368 */
3369 static void
3370 shutdown(struct e100_serial * info)
3371 {
3372 unsigned long flags;
3373 struct etrax_dma_descr *descr = info->rec_descr;
3374 struct etrax_recv_buffer *buffer;
3375 int i;
3376
3377 #ifndef CONFIG_SVINTO_SIM
3378 /* shut down the transmitter and receiver */
3379 DFLOW(DEBUG_LOG(info->line, "shutdown %i\n", info->line));
3380 e100_disable_rx(info);
3381 info->port[REG_TR_CTRL] = (info->tx_ctrl &= ~0x40);
3382
3383 /* disable interrupts, reset dma channels */
3384 if (info->uses_dma_in) {
3385 e100_disable_rxdma_irq(info);
3386 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
3387 info->uses_dma_in = 0;
3388 } else {
3389 e100_disable_serial_data_irq(info);
3390 }
3391
3392 if (info->uses_dma_out) {
3393 e100_disable_txdma_irq(info);
3394 info->tr_running = 0;
3395 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
3396 info->uses_dma_out = 0;
3397 } else {
3398 e100_disable_serial_tx_ready_irq(info);
3399 info->tr_running = 0;
3400 }
3401
3402 #endif /* CONFIG_SVINTO_SIM */
3403
3404 if (!(info->flags & ASYNC_INITIALIZED))
3405 return;
3406
3407 #ifdef SERIAL_DEBUG_OPEN
3408 printk("Shutting down serial port %d (irq %d)....\n", info->line,
3409 info->irq);
3410 #endif
3411
3412 save_flags(flags);
3413 cli(); /* Disable interrupts */
3414
3415 if (info->xmit.buf) {
3416 free_page((unsigned long)info->xmit.buf);
3417 info->xmit.buf = NULL;
3418 }
3419
3420 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++)
3421 if (descr[i].buf) {
3422 buffer = phys_to_virt(descr[i].buf) - sizeof *buffer;
3423 kfree(buffer);
3424 descr[i].buf = 0;
3425 }
3426
3427 if (!info->tty || (info->tty->termios->c_cflag & HUPCL)) {
3428 /* hang up DTR and RTS if HUPCL is enabled */
3429 e100_dtr(info, 0);
3430 e100_rts(info, 0); /* could check CRTSCTS before doing this */
3431 }
3432
3433 if (info->tty)
3434 set_bit(TTY_IO_ERROR, &info->tty->flags);
3435
3436 info->flags &= ~ASYNC_INITIALIZED;
3437 restore_flags(flags);
3438 }
3439
3440
3441 /* change baud rate and other assorted parameters */
3442
3443 static void
3444 change_speed(struct e100_serial *info)
3445 {
3446 unsigned int cflag;
3447 unsigned long xoff;
3448 unsigned long flags;
3449 /* first some safety checks */
3450
3451 if (!info->tty || !info->tty->termios)
3452 return;
3453 if (!info->port)
3454 return;
3455
3456 cflag = info->tty->termios->c_cflag;
3457
3458 /* possibly, the tx/rx should be disabled first to do this safely */
3459
3460 /* change baud-rate and write it to the hardware */
3461 if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST) {
3462 /* Special baudrate */
3463 u32 mask = 0xFF << (info->line*8); /* Each port has 8 bits */
3464 unsigned long alt_source =
3465 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, normal) |
3466 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, normal);
3467 /* R_ALT_SER_BAUDRATE selects the source */
3468 DBAUD(printk("Custom baudrate: baud_base/divisor %lu/%i\n",
3469 (unsigned long)info->baud_base, info->custom_divisor));
3470 if (info->baud_base == SERIAL_PRESCALE_BASE) {
3471 /* 0, 2-65535 (0=65536) */
3472 u16 divisor = info->custom_divisor;
3473 /* R_SERIAL_PRESCALE (upper 16 bits of R_CLOCK_PRESCALE) */
3474 /* baudrate is 3.125MHz/custom_divisor */
3475 alt_source =
3476 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, prescale) |
3477 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, prescale);
3478 alt_source = 0x11;
3479 DBAUD(printk("Writing SERIAL_PRESCALE: divisor %i\n", divisor));
3480 *R_SERIAL_PRESCALE = divisor;
3481 info->baud = SERIAL_PRESCALE_BASE/divisor;
3482 }
3483 #ifdef CONFIG_ETRAX_EXTERN_PB6CLK_ENABLED
3484 else if ((info->baud_base==CONFIG_ETRAX_EXTERN_PB6CLK_FREQ/8 &&
3485 info->custom_divisor == 1) ||
3486 (info->baud_base==CONFIG_ETRAX_EXTERN_PB6CLK_FREQ &&
3487 info->custom_divisor == 8)) {
3488 /* ext_clk selected */
3489 alt_source =
3490 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, extern) |
3491 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, extern);
3492 DBAUD(printk("using external baudrate: %lu\n", CONFIG_ETRAX_EXTERN_PB6CLK_FREQ/8));
3493 info->baud = CONFIG_ETRAX_EXTERN_PB6CLK_FREQ/8;
3494 }
3495 }
3496 #endif
3497 else
3498 {
3499 /* Bad baudbase, we don't support using timer0
3500 * for baudrate.
3501 */
3502 printk(KERN_WARNING "Bad baud_base/custom_divisor: %lu/%i\n",
3503 (unsigned long)info->baud_base, info->custom_divisor);
3504 }
3505 r_alt_ser_baudrate_shadow &= ~mask;
3506 r_alt_ser_baudrate_shadow |= (alt_source << (info->line*8));
3507 *R_ALT_SER_BAUDRATE = r_alt_ser_baudrate_shadow;
3508 } else {
3509 /* Normal baudrate */
3510 /* Make sure we use normal baudrate */
3511 u32 mask = 0xFF << (info->line*8); /* Each port has 8 bits */
3512 unsigned long alt_source =
3513 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, normal) |
3514 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, normal);
3515 r_alt_ser_baudrate_shadow &= ~mask;
3516 r_alt_ser_baudrate_shadow |= (alt_source << (info->line*8));
3517 #ifndef CONFIG_SVINTO_SIM
3518 *R_ALT_SER_BAUDRATE = r_alt_ser_baudrate_shadow;
3519 #endif /* CONFIG_SVINTO_SIM */
3520
3521 info->baud = cflag_to_baud(cflag);
3522 #ifndef CONFIG_SVINTO_SIM
3523 info->port[REG_BAUD] = cflag_to_etrax_baud(cflag);
3524 #endif /* CONFIG_SVINTO_SIM */
3525 }
3526
3527 #ifndef CONFIG_SVINTO_SIM
3528 /* start with default settings and then fill in changes */
3529 save_flags(flags);
3530 cli();
3531 /* 8 bit, no/even parity */
3532 info->rx_ctrl &= ~(IO_MASK(R_SERIAL0_REC_CTRL, rec_bitnr) |
3533 IO_MASK(R_SERIAL0_REC_CTRL, rec_par_en) |
3534 IO_MASK(R_SERIAL0_REC_CTRL, rec_par));
3535
3536 /* 8 bit, no/even parity, 1 stop bit, no cts */
3537 info->tx_ctrl &= ~(IO_MASK(R_SERIAL0_TR_CTRL, tr_bitnr) |
3538 IO_MASK(R_SERIAL0_TR_CTRL, tr_par_en) |
3539 IO_MASK(R_SERIAL0_TR_CTRL, tr_par) |
3540 IO_MASK(R_SERIAL0_TR_CTRL, stop_bits) |
3541 IO_MASK(R_SERIAL0_TR_CTRL, auto_cts));
3542
3543 if ((cflag & CSIZE) == CS7) {
3544 /* set 7 bit mode */
3545 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_bitnr, tr_7bit);
3546 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_bitnr, rec_7bit);
3547 }
3548
3549 if (cflag & CSTOPB) {
3550 /* set 2 stop bit mode */
3551 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, stop_bits, two_bits);
3552 }
3553
3554 if (cflag & PARENB) {
3555 /* enable parity */
3556 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_par_en, enable);
3557 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_par_en, enable);
3558 }
3559
3560 if (cflag & CMSPAR) {
3561 /* enable stick parity, PARODD mean Mark which matches ETRAX */
3562 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_stick_par, stick);
3563 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_stick_par, stick);
3564 }
3565 if (cflag & PARODD) {
3566 /* set odd parity (or Mark if CMSPAR) */
3567 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_par, odd);
3568 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_par, odd);
3569 }
3570
3571 if (cflag & CRTSCTS) {
3572 /* enable automatic CTS handling */
3573 DFLOW(DEBUG_LOG(info->line, "FLOW auto_cts enabled\n", 0));
3574 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, auto_cts, active);
3575 }
3576
3577 /* make sure the tx and rx are enabled */
3578
3579 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_enable, enable);
3580 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_enable, enable);
3581
3582 /* actually write the control regs to the hardware */
3583
3584 info->port[REG_TR_CTRL] = info->tx_ctrl;
3585 info->port[REG_REC_CTRL] = info->rx_ctrl;
3586 xoff = IO_FIELD(R_SERIAL0_XOFF, xoff_char, STOP_CHAR(info->tty));
3587 xoff |= IO_STATE(R_SERIAL0_XOFF, tx_stop, enable);
3588 if (info->tty->termios->c_iflag & IXON ) {
3589 DFLOW(DEBUG_LOG(info->line, "FLOW XOFF enabled 0x%02X\n", STOP_CHAR(info->tty)));
3590 xoff |= IO_STATE(R_SERIAL0_XOFF, auto_xoff, enable);
3591 }
3592
3593 *((unsigned long *)&info->port[REG_XOFF]) = xoff;
3594 restore_flags(flags);
3595 #endif /* !CONFIG_SVINTO_SIM */
3596
3597 update_char_time(info);
3598
3599 } /* change_speed */
3600
3601 /* start transmitting chars NOW */
3602
3603 static void
3604 rs_flush_chars(struct tty_struct *tty)
3605 {
3606 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3607 unsigned long flags;
3608
3609 if (info->tr_running ||
3610 info->xmit.head == info->xmit.tail ||
3611 tty->stopped ||
3612 tty->hw_stopped ||
3613 !info->xmit.buf)
3614 return;
3615
3616 #ifdef SERIAL_DEBUG_FLOW
3617 printk("rs_flush_chars\n");
3618 #endif
3619
3620 /* this protection might not exactly be necessary here */
3621
3622 save_flags(flags);
3623 cli();
3624 start_transmit(info);
3625 restore_flags(flags);
3626 }
3627
3628 extern _INLINE_ int
3629 rs_raw_write(struct tty_struct * tty, int from_user,
3630 const unsigned char *buf, int count)
3631 {
3632 int c, ret = 0;
3633 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3634 unsigned long flags;
3635
3636 /* first some sanity checks */
3637
3638 if (!tty || !info->xmit.buf || !tmp_buf)
3639 return 0;
3640
3641 #ifdef SERIAL_DEBUG_DATA
3642 if (info->line == SERIAL_DEBUG_LINE)
3643 printk("rs_raw_write (%d), status %d\n",
3644 count, info->port[REG_STATUS]);
3645 #endif
3646
3647 #ifdef CONFIG_SVINTO_SIM
3648 /* Really simple. The output is here and now. */
3649 SIMCOUT(buf, count);
3650 return count;
3651 #endif
3652 save_flags(flags);
3653 DFLOW(DEBUG_LOG(info->line, "write count %i ", count));
3654 DFLOW(DEBUG_LOG(info->line, "ldisc %i\n", tty->ldisc.chars_in_buffer(tty)));
3655
3656
3657 /* the cli/restore_flags pairs below are needed because the
3658 * DMA interrupt handler moves the info->xmit values. the memcpy
3659 * needs to be in the critical region unfortunately, because we
3660 * need to read xmit values, memcpy, write xmit values in one
3661 * atomic operation... this could perhaps be avoided by more clever
3662 * design.
3663 */
3664 if (from_user) {
3665 down(&tmp_buf_sem);
3666 while (1) {
3667 int c1;
3668 c = CIRC_SPACE_TO_END(info->xmit.head,
3669 info->xmit.tail,
3670 SERIAL_XMIT_SIZE);
3671 if (count < c)
3672 c = count;
3673 if (c <= 0)
3674 break;
3675
3676 c -= copy_from_user(tmp_buf, buf, c);
3677 if (!c) {
3678 if (!ret)
3679 ret = -EFAULT;
3680 break;
3681 }
3682 cli();
3683 c1 = CIRC_SPACE_TO_END(info->xmit.head,
3684 info->xmit.tail,
3685 SERIAL_XMIT_SIZE);
3686 if (c1 < c)
3687 c = c1;
3688 memcpy(info->xmit.buf + info->xmit.head, tmp_buf, c);
3689 info->xmit.head = ((info->xmit.head + c) &
3690 (SERIAL_XMIT_SIZE-1));
3691 restore_flags(flags);
3692 buf += c;
3693 count -= c;
3694 ret += c;
3695 }
3696 up(&tmp_buf_sem);
3697 } else {
3698 cli();
3699 while (count) {
3700 c = CIRC_SPACE_TO_END(info->xmit.head,
3701 info->xmit.tail,
3702 SERIAL_XMIT_SIZE);
3703
3704 if (count < c)
3705 c = count;
3706 if (c <= 0)
3707 break;
3708
3709 memcpy(info->xmit.buf + info->xmit.head, buf, c);
3710 info->xmit.head = (info->xmit.head + c) &
3711 (SERIAL_XMIT_SIZE-1);
3712 buf += c;
3713 count -= c;
3714 ret += c;
3715 }
3716 restore_flags(flags);
3717 }
3718
3719 /* enable transmitter if not running, unless the tty is stopped
3720 * this does not need IRQ protection since if tr_running == 0
3721 * the IRQ's are not running anyway for this port.
3722 */
3723 DFLOW(DEBUG_LOG(info->line, "write ret %i\n", ret));
3724
3725 if (info->xmit.head != info->xmit.tail &&
3726 !tty->stopped &&
3727 !tty->hw_stopped &&
3728 !info->tr_running) {
3729 start_transmit(info);
3730 }
3731
3732 return ret;
3733 } /* raw_raw_write() */
3734
3735 static int
3736 rs_write(struct tty_struct * tty, int from_user,
3737 const unsigned char *buf, int count)
3738 {
3739 #if defined(CONFIG_ETRAX_RS485)
3740 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3741
3742 if (info->rs485.enabled)
3743 {
3744 /* If we are in RS-485 mode, we need to toggle RTS and disable
3745 * the receiver before initiating a DMA transfer
3746 */
3747 #ifdef CONFIG_ETRAX_FAST_TIMER
3748 /* Abort any started timer */
3749 fast_timers_rs485[info->line].function = NULL;
3750 del_fast_timer(&fast_timers_rs485[info->line]);
3751 #endif
3752 e100_rts(info, info->rs485.rts_on_send);
3753 #if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER)
3754 e100_disable_rx(info);
3755 e100_enable_rx_irq(info);
3756 #endif
3757
3758 if (info->rs485.delay_rts_before_send > 0)
3759 msleep(info->rs485.delay_rts_before_send);
3760 }
3761 #endif /* CONFIG_ETRAX_RS485 */
3762
3763 count = rs_raw_write(tty, from_user, buf, count);
3764
3765 #if defined(CONFIG_ETRAX_RS485)
3766 if (info->rs485.enabled)
3767 {
3768 unsigned int val;
3769 /* If we are in RS-485 mode the following has to be done:
3770 * wait until DMA is ready
3771 * wait on transmit shift register
3772 * toggle RTS
3773 * enable the receiver
3774 */
3775
3776 /* Sleep until all sent */
3777 tty_wait_until_sent(tty, 0);
3778 #ifdef CONFIG_ETRAX_FAST_TIMER
3779 /* Now sleep a little more so that shift register is empty */
3780 schedule_usleep(info->char_time_usec * 2);
3781 #endif
3782 /* wait on transmit shift register */
3783 do{
3784 get_lsr_info(info, &val);
3785 }while (!(val & TIOCSER_TEMT));
3786
3787 e100_rts(info, info->rs485.rts_after_sent);
3788
3789 #if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER)
3790 e100_enable_rx(info);
3791 e100_enable_rxdma_irq(info);
3792 #endif
3793 }
3794 #endif /* CONFIG_ETRAX_RS485 */
3795
3796 return count;
3797 } /* rs_write */
3798
3799
3800 /* how much space is available in the xmit buffer? */
3801
3802 static int
3803 rs_write_room(struct tty_struct *tty)
3804 {
3805 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3806
3807 return CIRC_SPACE(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
3808 }
3809
3810 /* How many chars are in the xmit buffer?
3811 * This does not include any chars in the transmitter FIFO.
3812 * Use wait_until_sent for waiting for FIFO drain.
3813 */
3814
3815 static int
3816 rs_chars_in_buffer(struct tty_struct *tty)
3817 {
3818 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3819
3820 return CIRC_CNT(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
3821 }
3822
3823 /* discard everything in the xmit buffer */
3824
3825 static void
3826 rs_flush_buffer(struct tty_struct *tty)
3827 {
3828 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3829 unsigned long flags;
3830
3831 save_flags(flags);
3832 cli();
3833 info->xmit.head = info->xmit.tail = 0;
3834 restore_flags(flags);
3835
3836 wake_up_interruptible(&tty->write_wait);
3837
3838 if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
3839 tty->ldisc.write_wakeup)
3840 (tty->ldisc.write_wakeup)(tty);
3841 }
3842
3843 /*
3844 * This function is used to send a high-priority XON/XOFF character to
3845 * the device
3846 *
3847 * Since we use DMA we don't check for info->x_char in transmit_chars_dma(),
3848 * but we do it in handle_ser_tx_interrupt().
3849 * We disable DMA channel and enable tx ready interrupt and write the
3850 * character when possible.
3851 */
3852 static void rs_send_xchar(struct tty_struct *tty, char ch)
3853 {
3854 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3855 unsigned long flags;
3856 save_flags(flags); cli();
3857 if (info->uses_dma_out) {
3858 /* Put the DMA on hold and disable the channel */
3859 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, hold);
3860 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->ocmdadr) !=
3861 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, hold));
3862 e100_disable_txdma_channel(info);
3863 }
3864
3865 /* Must make sure transmitter is not stopped before we can transmit */
3866 if (tty->stopped)
3867 rs_start(tty);
3868
3869 /* Enable manual transmit interrupt and send from there */
3870 DFLOW(DEBUG_LOG(info->line, "rs_send_xchar 0x%02X\n", ch));
3871 info->x_char = ch;
3872 e100_enable_serial_tx_ready_irq(info);
3873 restore_flags(flags);
3874 }
3875
3876 /*
3877 * ------------------------------------------------------------
3878 * rs_throttle()
3879 *
3880 * This routine is called by the upper-layer tty layer to signal that
3881 * incoming characters should be throttled.
3882 * ------------------------------------------------------------
3883 */
3884 static void
3885 rs_throttle(struct tty_struct * tty)
3886 {
3887 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3888 #ifdef SERIAL_DEBUG_THROTTLE
3889 char buf[64];
3890
3891 printk("throttle %s: %lu....\n", tty_name(tty, buf),
3892 (unsigned long)tty->ldisc.chars_in_buffer(tty));
3893 #endif
3894 DFLOW(DEBUG_LOG(info->line,"rs_throttle %lu\n", tty->ldisc.chars_in_buffer(tty)));
3895
3896 /* Do RTS before XOFF since XOFF might take some time */
3897 if (tty->termios->c_cflag & CRTSCTS) {
3898 /* Turn off RTS line */
3899 e100_rts(info, 0);
3900 }
3901 if (I_IXOFF(tty))
3902 rs_send_xchar(tty, STOP_CHAR(tty));
3903
3904 }
3905
3906 static void
3907 rs_unthrottle(struct tty_struct * tty)
3908 {
3909 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3910 #ifdef SERIAL_DEBUG_THROTTLE
3911 char buf[64];
3912
3913 printk("unthrottle %s: %lu....\n", tty_name(tty, buf),
3914 (unsigned long)tty->ldisc.chars_in_buffer(tty));
3915 #endif
3916 DFLOW(DEBUG_LOG(info->line,"rs_unthrottle ldisc %d\n", tty->ldisc.chars_in_buffer(tty)));
3917 DFLOW(DEBUG_LOG(info->line,"rs_unthrottle flip.count: %i\n", tty->flip.count));
3918 /* Do RTS before XOFF since XOFF might take some time */
3919 if (tty->termios->c_cflag & CRTSCTS) {
3920 /* Assert RTS line */
3921 e100_rts(info, 1);
3922 }
3923
3924 if (I_IXOFF(tty)) {
3925 if (info->x_char)
3926 info->x_char = 0;
3927 else
3928 rs_send_xchar(tty, START_CHAR(tty));
3929 }
3930
3931 }
3932
3933 /*
3934 * ------------------------------------------------------------
3935 * rs_ioctl() and friends
3936 * ------------------------------------------------------------
3937 */
3938
3939 static int
3940 get_serial_info(struct e100_serial * info,
3941 struct serial_struct * retinfo)
3942 {
3943 struct serial_struct tmp;
3944
3945 /* this is all probably wrong, there are a lot of fields
3946 * here that we don't have in e100_serial and maybe we
3947 * should set them to something else than 0.
3948 */
3949
3950 if (!retinfo)
3951 return -EFAULT;
3952 memset(&tmp, 0, sizeof(tmp));
3953 tmp.type = info->type;
3954 tmp.line = info->line;
3955 tmp.port = (int)info->port;
3956 tmp.irq = info->irq;
3957 tmp.flags = info->flags;
3958 tmp.baud_base = info->baud_base;
3959 tmp.close_delay = info->close_delay;
3960 tmp.closing_wait = info->closing_wait;
3961 tmp.custom_divisor = info->custom_divisor;
3962 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
3963 return -EFAULT;
3964 return 0;
3965 }
3966
3967 static int
3968 set_serial_info(struct e100_serial *info,
3969 struct serial_struct *new_info)
3970 {
3971 struct serial_struct new_serial;
3972 struct e100_serial old_info;
3973 int retval = 0;
3974
3975 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
3976 return -EFAULT;
3977
3978 old_info = *info;
3979
3980 if (!capable(CAP_SYS_ADMIN)) {
3981 if ((new_serial.type != info->type) ||
3982 (new_serial.close_delay != info->close_delay) ||
3983 ((new_serial.flags & ~ASYNC_USR_MASK) !=
3984 (info->flags & ~ASYNC_USR_MASK)))
3985 return -EPERM;
3986 info->flags = ((info->flags & ~ASYNC_USR_MASK) |
3987 (new_serial.flags & ASYNC_USR_MASK));
3988 goto check_and_exit;
3989 }
3990
3991 if (info->count > 1)
3992 return -EBUSY;
3993
3994 /*
3995 * OK, past this point, all the error checking has been done.
3996 * At this point, we start making changes.....
3997 */
3998
3999 info->baud_base = new_serial.baud_base;
4000 info->flags = ((info->flags & ~ASYNC_FLAGS) |
4001 (new_serial.flags & ASYNC_FLAGS));
4002 info->custom_divisor = new_serial.custom_divisor;
4003 info->type = new_serial.type;
4004 info->close_delay = new_serial.close_delay;
4005 info->closing_wait = new_serial.closing_wait;
4006 info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
4007
4008 check_and_exit:
4009 if (info->flags & ASYNC_INITIALIZED) {
4010 change_speed(info);
4011 } else
4012 retval = startup(info);
4013 return retval;
4014 }
4015
4016 /*
4017 * get_lsr_info - get line status register info
4018 *
4019 * Purpose: Let user call ioctl() to get info when the UART physically
4020 * is emptied. On bus types like RS485, the transmitter must
4021 * release the bus after transmitting. This must be done when
4022 * the transmit shift register is empty, not be done when the
4023 * transmit holding register is empty. This functionality
4024 * allows an RS485 driver to be written in user space.
4025 */
4026 static int
4027 get_lsr_info(struct e100_serial * info, unsigned int *value)
4028 {
4029 unsigned int result = TIOCSER_TEMT;
4030 #ifndef CONFIG_SVINTO_SIM
4031 unsigned long curr_time = jiffies;
4032 unsigned long curr_time_usec = GET_JIFFIES_USEC();
4033 unsigned long elapsed_usec =
4034 (curr_time - info->last_tx_active) * 1000000/HZ +
4035 curr_time_usec - info->last_tx_active_usec;
4036
4037 if (info->xmit.head != info->xmit.tail ||
4038 elapsed_usec < 2*info->char_time_usec) {
4039 result = 0;
4040 }
4041 #endif
4042
4043 if (copy_to_user(value, &result, sizeof(int)))
4044 return -EFAULT;
4045 return 0;
4046 }
4047
4048 #ifdef SERIAL_DEBUG_IO
4049 struct state_str
4050 {
4051 int state;
4052 const char *str;
4053 };
4054
4055 const struct state_str control_state_str[] = {
4056 {TIOCM_DTR, "DTR" },
4057 {TIOCM_RTS, "RTS"},
4058 {TIOCM_ST, "ST?" },
4059 {TIOCM_SR, "SR?" },
4060 {TIOCM_CTS, "CTS" },
4061 {TIOCM_CD, "CD" },
4062 {TIOCM_RI, "RI" },
4063 {TIOCM_DSR, "DSR" },
4064 {0, NULL }
4065 };
4066
4067 char *get_control_state_str(int MLines, char *s)
4068 {
4069 int i = 0;
4070
4071 s[0]='\0';
4072 while (control_state_str[i].str != NULL) {
4073 if (MLines & control_state_str[i].state) {
4074 if (s[0] != '\0') {
4075 strcat(s, ", ");
4076 }
4077 strcat(s, control_state_str[i].str);
4078 }
4079 i++;
4080 }
4081 return s;
4082 }
4083 #endif
4084
4085 static int
4086 get_modem_info(struct e100_serial * info, unsigned int *value)
4087 {
4088 unsigned int result;
4089 /* Polarity isn't verified */
4090 #if 0 /*def SERIAL_DEBUG_IO */
4091
4092 printk("get_modem_info: RTS: %i DTR: %i CD: %i RI: %i DSR: %i CTS: %i\n",
4093 E100_RTS_GET(info),
4094 E100_DTR_GET(info),
4095 E100_CD_GET(info),
4096 E100_RI_GET(info),
4097 E100_DSR_GET(info),
4098 E100_CTS_GET(info));
4099 #endif
4100
4101 result =
4102 (!E100_RTS_GET(info) ? TIOCM_RTS : 0)
4103 | (!E100_DTR_GET(info) ? TIOCM_DTR : 0)
4104 | (!E100_RI_GET(info) ? TIOCM_RNG : 0)
4105 | (!E100_DSR_GET(info) ? TIOCM_DSR : 0)
4106 | (!E100_CD_GET(info) ? TIOCM_CAR : 0)
4107 | (!E100_CTS_GET(info) ? TIOCM_CTS : 0);
4108
4109 #ifdef SERIAL_DEBUG_IO
4110 printk("e100ser: modem state: %i 0x%08X\n", result, result);
4111 {
4112 char s[100];
4113
4114 get_control_state_str(result, s);
4115 printk("state: %s\n", s);
4116 }
4117 #endif
4118 if (copy_to_user(value, &result, sizeof(int)))
4119 return -EFAULT;
4120 return 0;
4121 }
4122
4123
4124 static int
4125 set_modem_info(struct e100_serial * info, unsigned int cmd,
4126 unsigned int *value)
4127 {
4128 unsigned int arg;
4129
4130 if (copy_from_user(&arg, value, sizeof(int)))
4131 return -EFAULT;
4132
4133 switch (cmd) {
4134 case TIOCMBIS:
4135 if (arg & TIOCM_RTS) {
4136 e100_rts(info, 1);
4137 }
4138 if (arg & TIOCM_DTR) {
4139 e100_dtr(info, 1);
4140 }
4141 /* Handle FEMALE behaviour */
4142 if (arg & TIOCM_RI) {
4143 e100_ri_out(info, 1);
4144 }
4145 if (arg & TIOCM_CD) {
4146 e100_cd_out(info, 1);
4147 }
4148 break;
4149 case TIOCMBIC:
4150 if (arg & TIOCM_RTS) {
4151 e100_rts(info, 0);
4152 }
4153 if (arg & TIOCM_DTR) {
4154 e100_dtr(info, 0);
4155 }
4156 /* Handle FEMALE behaviour */
4157 if (arg & TIOCM_RI) {
4158 e100_ri_out(info, 0);
4159 }
4160 if (arg & TIOCM_CD) {
4161 e100_cd_out(info, 0);
4162 }
4163 break;
4164 case TIOCMSET:
4165 e100_rts(info, arg & TIOCM_RTS);
4166 e100_dtr(info, arg & TIOCM_DTR);
4167 /* Handle FEMALE behaviour */
4168 e100_ri_out(info, arg & TIOCM_RI);
4169 e100_cd_out(info, arg & TIOCM_CD);
4170 break;
4171 default:
4172 return -EINVAL;
4173 }
4174 return 0;
4175 }
4176
4177
4178 static void
4179 rs_break(struct tty_struct *tty, int break_state)
4180 {
4181 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
4182 unsigned long flags;
4183
4184 if (!info->port)
4185 return;
4186
4187 save_flags(flags);
4188 cli();
4189 if (break_state == -1) {
4190 /* Go to manual mode and set the txd pin to 0 */
4191 info->tx_ctrl &= 0x3F; /* Clear bit 7 (txd) and 6 (tr_enable) */
4192 } else {
4193 info->tx_ctrl |= (0x80 | 0x40); /* Set bit 7 (txd) and 6 (tr_enable) */
4194 }
4195 info->port[REG_TR_CTRL] = info->tx_ctrl;
4196 restore_flags(flags);
4197 }
4198
4199 static int
4200 rs_ioctl(struct tty_struct *tty, struct file * file,
4201 unsigned int cmd, unsigned long arg)
4202 {
4203 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
4204
4205 if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
4206 (cmd != TIOCSERCONFIG) && (cmd != TIOCSERGWILD) &&
4207 (cmd != TIOCSERSWILD) && (cmd != TIOCSERGSTRUCT)) {
4208 if (tty->flags & (1 << TTY_IO_ERROR))
4209 return -EIO;
4210 }
4211
4212 switch (cmd) {
4213 case TIOCMGET:
4214 return get_modem_info(info, (unsigned int *) arg);
4215 case TIOCMBIS:
4216 case TIOCMBIC:
4217 case TIOCMSET:
4218 return set_modem_info(info, cmd, (unsigned int *) arg);
4219 case TIOCGSERIAL:
4220 return get_serial_info(info,
4221 (struct serial_struct *) arg);
4222 case TIOCSSERIAL:
4223 return set_serial_info(info,
4224 (struct serial_struct *) arg);
4225 case TIOCSERGETLSR: /* Get line status register */
4226 return get_lsr_info(info, (unsigned int *) arg);
4227
4228 case TIOCSERGSTRUCT:
4229 if (copy_to_user((struct e100_serial *) arg,
4230 info, sizeof(struct e100_serial)))
4231 return -EFAULT;
4232 return 0;
4233
4234 #if defined(CONFIG_ETRAX_RS485)
4235 case TIOCSERSETRS485:
4236 {
4237 struct rs485_control rs485ctrl;
4238 if (copy_from_user(&rs485ctrl, (struct rs485_control*)arg, sizeof(rs485ctrl)))
4239 return -EFAULT;
4240
4241 return e100_enable_rs485(tty, &rs485ctrl);
4242 }
4243
4244 case TIOCSERWRRS485:
4245 {
4246 struct rs485_write rs485wr;
4247 if (copy_from_user(&rs485wr, (struct rs485_write*)arg, sizeof(rs485wr)))
4248 return -EFAULT;
4249
4250 return e100_write_rs485(tty, 1, rs485wr.outc, rs485wr.outc_size);
4251 }
4252 #endif
4253
4254 default:
4255 return -ENOIOCTLCMD;
4256 }
4257 return 0;
4258 }
4259
4260 static void
4261 rs_set_termios(struct tty_struct *tty, struct termios *old_termios)
4262 {
4263 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
4264
4265 if (tty->termios->c_cflag == old_termios->c_cflag &&
4266 tty->termios->c_iflag == old_termios->c_iflag)
4267 return;
4268
4269 change_speed(info);
4270
4271 /* Handle turning off CRTSCTS */
4272 if ((old_termios->c_cflag & CRTSCTS) &&
4273 !(tty->termios->c_cflag & CRTSCTS)) {
4274 tty->hw_stopped = 0;
4275 rs_start(tty);
4276 }
4277
4278 }
4279
4280 /* In debugport.c - register a console write function that uses the normal
4281 * serial driver
4282 */
4283 typedef int (*debugport_write_function)(int i, const char *buf, unsigned int len);
4284
4285 extern debugport_write_function debug_write_function;
4286
4287 static int rs_debug_write_function(int i, const char *buf, unsigned int len)
4288 {
4289 int cnt;
4290 int written = 0;
4291 struct tty_struct *tty;
4292 static int recurse_cnt = 0;
4293
4294 tty = rs_table[i].tty;
4295 if (tty) {
4296 unsigned long flags;
4297 if (recurse_cnt > 5) /* We skip this debug output */
4298 return 1;
4299
4300 local_irq_save(flags);
4301 recurse_cnt++;
4302 local_irq_restore(flags);
4303 do {
4304 cnt = rs_write(tty, 0, buf + written, len);
4305 if (cnt >= 0) {
4306 written += cnt;
4307 buf += cnt;
4308 len -= cnt;
4309 } else
4310 len = cnt;
4311 } while(len > 0);
4312 local_irq_save(flags);
4313 recurse_cnt--;
4314 local_irq_restore(flags);
4315 return 1;
4316 }
4317 return 0;
4318 }
4319
4320 /*
4321 * ------------------------------------------------------------
4322 * rs_close()
4323 *
4324 * This routine is called when the serial port gets closed. First, we
4325 * wait for the last remaining data to be sent. Then, we unlink its
4326 * S structure from the interrupt chain if necessary, and we free
4327 * that IRQ if nothing is left in the chain.
4328 * ------------------------------------------------------------
4329 */
4330 static void
4331 rs_close(struct tty_struct *tty, struct file * filp)
4332 {
4333 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
4334 unsigned long flags;
4335
4336 if (!info)
4337 return;
4338
4339 /* interrupts are disabled for this entire function */
4340
4341 save_flags(flags);
4342 cli();
4343
4344 if (tty_hung_up_p(filp)) {
4345 restore_flags(flags);
4346 return;
4347 }
4348
4349 #ifdef SERIAL_DEBUG_OPEN
4350 printk("[%d] rs_close ttyS%d, count = %d\n", current->pid,
4351 info->line, info->count);
4352 #endif
4353 if ((tty->count == 1) && (info->count != 1)) {
4354 /*
4355 * Uh, oh. tty->count is 1, which means that the tty
4356 * structure will be freed. Info->count should always
4357 * be one in these conditions. If it's greater than
4358 * one, we've got real problems, since it means the
4359 * serial port won't be shutdown.
4360 */
4361 printk(KERN_CRIT
4362 "rs_close: bad serial port count; tty->count is 1, "
4363 "info->count is %d\n", info->count);
4364 info->count = 1;
4365 }
4366 if (--info->count < 0) {
4367 printk(KERN_CRIT "rs_close: bad serial port count for ttyS%d: %d\n",
4368 info->line, info->count);
4369 info->count = 0;
4370 }
4371 if (info->count) {
4372 restore_flags(flags);
4373 return;
4374 }
4375 info->flags |= ASYNC_CLOSING;
4376 /*
4377 * Save the termios structure, since this port may have
4378 * separate termios for callout and dialin.
4379 */
4380 if (info->flags & ASYNC_NORMAL_ACTIVE)
4381 info->normal_termios = *tty->termios;
4382 /*
4383 * Now we wait for the transmit buffer to clear; and we notify
4384 * the line discipline to only process XON/XOFF characters.
4385 */
4386 tty->closing = 1;
4387 if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE)
4388 tty_wait_until_sent(tty, info->closing_wait);
4389 /*
4390 * At this point we stop accepting input. To do this, we
4391 * disable the serial receiver and the DMA receive interrupt.
4392 */
4393 #ifdef SERIAL_HANDLE_EARLY_ERRORS
4394 e100_disable_serial_data_irq(info);
4395 #endif
4396
4397 #ifndef CONFIG_SVINTO_SIM
4398 e100_disable_rx(info);
4399 e100_disable_rx_irq(info);
4400
4401 if (info->flags & ASYNC_INITIALIZED) {
4402 /*
4403 * Before we drop DTR, make sure the UART transmitter
4404 * has completely drained; this is especially
4405 * important as we have a transmit FIFO!
4406 */
4407 rs_wait_until_sent(tty, HZ);
4408 }
4409 #endif
4410
4411 shutdown(info);
4412 if (tty->driver->flush_buffer)
4413 tty->driver->flush_buffer(tty);
4414 if (tty->ldisc.flush_buffer)
4415 tty->ldisc.flush_buffer(tty);
4416 tty->closing = 0;
4417 info->event = 0;
4418 info->tty = 0;
4419 if (info->blocked_open) {
4420 if (info->close_delay) {
4421 set_current_state(TASK_INTERRUPTIBLE);
4422 schedule_timeout(info->close_delay);
4423 }
4424 wake_up_interruptible(&info->open_wait);
4425 }
4426 info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
4427 wake_up_interruptible(&info->close_wait);
4428 restore_flags(flags);
4429
4430 /* port closed */
4431
4432 #if defined(CONFIG_ETRAX_RS485)
4433 if (info->rs485.enabled) {
4434 info->rs485.enabled = 0;
4435 #if defined(CONFIG_ETRAX_RS485_ON_PA)
4436 *R_PORT_PA_DATA = port_pa_data_shadow &= ~(1 << rs485_pa_bit);
4437 #endif
4438 #if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
4439 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
4440 rs485_port_g_bit, 0);
4441 #endif
4442 #if defined(CONFIG_ETRAX_RS485_LTC1387)
4443 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
4444 CONFIG_ETRAX_RS485_LTC1387_DXEN_PORT_G_BIT, 0);
4445 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
4446 CONFIG_ETRAX_RS485_LTC1387_RXEN_PORT_G_BIT, 0);
4447 #endif
4448 }
4449 #endif
4450 }
4451
4452 /*
4453 * rs_wait_until_sent() --- wait until the transmitter is empty
4454 */
4455 static void rs_wait_until_sent(struct tty_struct *tty, int timeout)
4456 {
4457 unsigned long orig_jiffies;
4458 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
4459 unsigned long curr_time = jiffies;
4460 unsigned long curr_time_usec = GET_JIFFIES_USEC();
4461 long elapsed_usec =
4462 (curr_time - info->last_tx_active) * (1000000/HZ) +
4463 curr_time_usec - info->last_tx_active_usec;
4464
4465 /*
4466 * Check R_DMA_CHx_STATUS bit 0-6=number of available bytes in FIFO
4467 * R_DMA_CHx_HWSW bit 31-16=nbr of bytes left in DMA buffer (0=64k)
4468 */
4469 orig_jiffies = jiffies;
4470 while (info->xmit.head != info->xmit.tail || /* More in send queue */
4471 (*info->ostatusadr & 0x007f) || /* more in FIFO */
4472 (elapsed_usec < 2*info->char_time_usec)) {
4473 set_current_state(TASK_INTERRUPTIBLE);
4474 schedule_timeout(1);
4475 if (signal_pending(current))
4476 break;
4477 if (timeout && time_after(jiffies, orig_jiffies + timeout))
4478 break;
4479 curr_time = jiffies;
4480 curr_time_usec = GET_JIFFIES_USEC();
4481 elapsed_usec =
4482 (curr_time - info->last_tx_active) * (1000000/HZ) +
4483 curr_time_usec - info->last_tx_active_usec;
4484 }
4485 set_current_state(TASK_RUNNING);
4486 }
4487
4488 /*
4489 * rs_hangup() --- called by tty_hangup() when a hangup is signaled.
4490 */
4491 void
4492 rs_hangup(struct tty_struct *tty)
4493 {
4494 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
4495
4496 rs_flush_buffer(tty);
4497 shutdown(info);
4498 info->event = 0;
4499 info->count = 0;
4500 info->flags &= ~ASYNC_NORMAL_ACTIVE;
4501 info->tty = 0;
4502 wake_up_interruptible(&info->open_wait);
4503 }
4504
4505 /*
4506 * ------------------------------------------------------------
4507 * rs_open() and friends
4508 * ------------------------------------------------------------
4509 */
4510 static int
4511 block_til_ready(struct tty_struct *tty, struct file * filp,
4512 struct e100_serial *info)
4513 {
4514 DECLARE_WAITQUEUE(wait, current);
4515 unsigned long flags;
4516 int retval;
4517 int do_clocal = 0, extra_count = 0;
4518
4519 /*
4520 * If the device is in the middle of being closed, then block
4521 * until it's done, and then try again.
4522 */
4523 if (tty_hung_up_p(filp) ||
4524 (info->flags & ASYNC_CLOSING)) {
4525 if (info->flags & ASYNC_CLOSING)
4526 interruptible_sleep_on(&info->close_wait);
4527 #ifdef SERIAL_DO_RESTART
4528 if (info->flags & ASYNC_HUP_NOTIFY)
4529 return -EAGAIN;
4530 else
4531 return -ERESTARTSYS;
4532 #else
4533 return -EAGAIN;
4534 #endif
4535 }
4536
4537 /*
4538 * If non-blocking mode is set, or the port is not enabled,
4539 * then make the check up front and then exit.
4540 */
4541 if ((filp->f_flags & O_NONBLOCK) ||
4542 (tty->flags & (1 << TTY_IO_ERROR))) {
4543 info->flags |= ASYNC_NORMAL_ACTIVE;
4544 return 0;
4545 }
4546
4547 if (tty->termios->c_cflag & CLOCAL) {
4548 do_clocal = 1;
4549 }
4550
4551 /*
4552 * Block waiting for the carrier detect and the line to become
4553 * free (i.e., not in use by the callout). While we are in
4554 * this loop, info->count is dropped by one, so that
4555 * rs_close() knows when to free things. We restore it upon
4556 * exit, either normal or abnormal.
4557 */
4558 retval = 0;
4559 add_wait_queue(&info->open_wait, &wait);
4560 #ifdef SERIAL_DEBUG_OPEN
4561 printk("block_til_ready before block: ttyS%d, count = %d\n",
4562 info->line, info->count);
4563 #endif
4564 save_flags(flags);
4565 cli();
4566 if (!tty_hung_up_p(filp)) {
4567 extra_count++;
4568 info->count--;
4569 }
4570 restore_flags(flags);
4571 info->blocked_open++;
4572 while (1) {
4573 save_flags(flags);
4574 cli();
4575 /* assert RTS and DTR */
4576 e100_rts(info, 1);
4577 e100_dtr(info, 1);
4578 restore_flags(flags);
4579 set_current_state(TASK_INTERRUPTIBLE);
4580 if (tty_hung_up_p(filp) ||
4581 !(info->flags & ASYNC_INITIALIZED)) {
4582 #ifdef SERIAL_DO_RESTART
4583 if (info->flags & ASYNC_HUP_NOTIFY)
4584 retval = -EAGAIN;
4585 else
4586 retval = -ERESTARTSYS;
4587 #else
4588 retval = -EAGAIN;
4589 #endif
4590 break;
4591 }
4592 if (!(info->flags & ASYNC_CLOSING) && do_clocal)
4593 /* && (do_clocal || DCD_IS_ASSERTED) */
4594 break;
4595 if (signal_pending(current)) {
4596 retval = -ERESTARTSYS;
4597 break;
4598 }
4599 #ifdef SERIAL_DEBUG_OPEN
4600 printk("block_til_ready blocking: ttyS%d, count = %d\n",
4601 info->line, info->count);
4602 #endif
4603 schedule();
4604 }
4605 set_current_state(TASK_RUNNING);
4606 remove_wait_queue(&info->open_wait, &wait);
4607 if (extra_count)
4608 info->count++;
4609 info->blocked_open--;
4610 #ifdef SERIAL_DEBUG_OPEN
4611 printk("block_til_ready after blocking: ttyS%d, count = %d\n",
4612 info->line, info->count);
4613 #endif
4614 if (retval)
4615 return retval;
4616 info->flags |= ASYNC_NORMAL_ACTIVE;
4617 return 0;
4618 }
4619
4620 /*
4621 * This routine is called whenever a serial port is opened.
4622 * It performs the serial-specific initialization for the tty structure.
4623 */
4624 static int
4625 rs_open(struct tty_struct *tty, struct file * filp)
4626 {
4627 struct e100_serial *info;
4628 int retval, line;
4629 unsigned long page;
4630
4631 /* find which port we want to open */
4632
4633 line = tty->index;
4634
4635 if (line < 0 || line >= NR_PORTS)
4636 return -ENODEV;
4637
4638 /* find the corresponding e100_serial struct in the table */
4639 info = rs_table + line;
4640
4641 /* don't allow the opening of ports that are not enabled in the HW config */
4642 if (!info->enabled)
4643 return -ENODEV;
4644
4645 #ifdef SERIAL_DEBUG_OPEN
4646 printk("[%d] rs_open %s, count = %d\n", current->pid, tty->name,
4647 info->count);
4648 #endif
4649
4650 info->count++;
4651 tty->driver_data = info;
4652 info->tty = tty;
4653
4654 info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
4655
4656 if (!tmp_buf) {
4657 page = get_zeroed_page(GFP_KERNEL);
4658 if (!page) {
4659 return -ENOMEM;
4660 }
4661 if (tmp_buf)
4662 free_page(page);
4663 else
4664 tmp_buf = (unsigned char *) page;
4665 }
4666
4667 /*
4668 * If the port is in the middle of closing, bail out now
4669 */
4670 if (tty_hung_up_p(filp) ||
4671 (info->flags & ASYNC_CLOSING)) {
4672 if (info->flags & ASYNC_CLOSING)
4673 interruptible_sleep_on(&info->close_wait);
4674 #ifdef SERIAL_DO_RESTART
4675 return ((info->flags & ASYNC_HUP_NOTIFY) ?
4676 -EAGAIN : -ERESTARTSYS);
4677 #else
4678 return -EAGAIN;
4679 #endif
4680 }
4681
4682 /*
4683 * Start up the serial port
4684 */
4685
4686 retval = startup(info);
4687 if (retval)
4688 return retval;
4689
4690 retval = block_til_ready(tty, filp, info);
4691 if (retval) {
4692 #ifdef SERIAL_DEBUG_OPEN
4693 printk("rs_open returning after block_til_ready with %d\n",
4694 retval);
4695 #endif
4696 return retval;
4697 }
4698
4699 if ((info->count == 1) && (info->flags & ASYNC_SPLIT_TERMIOS)) {
4700 *tty->termios = info->normal_termios;
4701 change_speed(info);
4702 }
4703
4704 #ifdef SERIAL_DEBUG_OPEN
4705 printk("rs_open ttyS%d successful...\n", info->line);
4706 #endif
4707 DLOG_INT_TRIG( log_int_pos = 0);
4708
4709 DFLIP( if (info->line == SERIAL_DEBUG_LINE) {
4710 info->icount.rx = 0;
4711 } );
4712
4713 return 0;
4714 }
4715
4716 /*
4717 * /proc fs routines....
4718 */
4719
4720 extern _INLINE_ int line_info(char *buf, struct e100_serial *info)
4721 {
4722 char stat_buf[30];
4723 int ret;
4724 unsigned long tmp;
4725
4726 ret = sprintf(buf, "%d: uart:E100 port:%lX irq:%d",
4727 info->line, (unsigned long)info->port, info->irq);
4728
4729 if (!info->port || (info->type == PORT_UNKNOWN)) {
4730 ret += sprintf(buf+ret, "\n");
4731 return ret;
4732 }
4733
4734 stat_buf[0] = 0;
4735 stat_buf[1] = 0;
4736 if (!E100_RTS_GET(info))
4737 strcat(stat_buf, "|RTS");
4738 if (!E100_CTS_GET(info))
4739 strcat(stat_buf, "|CTS");
4740 if (!E100_DTR_GET(info))
4741 strcat(stat_buf, "|DTR");
4742 if (!E100_DSR_GET(info))
4743 strcat(stat_buf, "|DSR");
4744 if (!E100_CD_GET(info))
4745 strcat(stat_buf, "|CD");
4746 if (!E100_RI_GET(info))
4747 strcat(stat_buf, "|RI");
4748
4749 ret += sprintf(buf+ret, " baud:%d", info->baud);
4750
4751 ret += sprintf(buf+ret, " tx:%lu rx:%lu",
4752 (unsigned long)info->icount.tx,
4753 (unsigned long)info->icount.rx);
4754 tmp = CIRC_CNT(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
4755 if (tmp) {
4756 ret += sprintf(buf+ret, " tx_pend:%lu/%lu",
4757 (unsigned long)tmp,
4758 (unsigned long)SERIAL_XMIT_SIZE);
4759 }
4760
4761 ret += sprintf(buf+ret, " rx_pend:%lu/%lu",
4762 (unsigned long)info->recv_cnt,
4763 (unsigned long)info->max_recv_cnt);
4764
4765 #if 1
4766 if (info->tty) {
4767
4768 if (info->tty->stopped)
4769 ret += sprintf(buf+ret, " stopped:%i",
4770 (int)info->tty->stopped);
4771 if (info->tty->hw_stopped)
4772 ret += sprintf(buf+ret, " hw_stopped:%i",
4773 (int)info->tty->hw_stopped);
4774 }
4775
4776 {
4777 unsigned char rstat = info->port[REG_STATUS];
4778 if (rstat & IO_MASK(R_SERIAL0_STATUS, xoff_detect) )
4779 ret += sprintf(buf+ret, " xoff_detect:1");
4780 }
4781
4782 #endif
4783
4784
4785
4786
4787 if (info->icount.frame)
4788 ret += sprintf(buf+ret, " fe:%lu",
4789 (unsigned long)info->icount.frame);
4790
4791 if (info->icount.parity)
4792 ret += sprintf(buf+ret, " pe:%lu",
4793 (unsigned long)info->icount.parity);
4794
4795 if (info->icount.brk)
4796 ret += sprintf(buf+ret, " brk:%lu",
4797 (unsigned long)info->icount.brk);
4798
4799 if (info->icount.overrun)
4800 ret += sprintf(buf+ret, " oe:%lu",
4801 (unsigned long)info->icount.overrun);
4802
4803 /*
4804 * Last thing is the RS-232 status lines
4805 */
4806 ret += sprintf(buf+ret, " %s\n", stat_buf+1);
4807 return ret;
4808 }
4809
4810 int rs_read_proc(char *page, char **start, off_t off, int count,
4811 int *eof, void *data)
4812 {
4813 int i, len = 0, l;
4814 off_t begin = 0;
4815
4816 len += sprintf(page, "serinfo:1.0 driver:%s\n",
4817 serial_version);
4818 for (i = 0; i < NR_PORTS && len < 4000; i++) {
4819 if (!rs_table[i].enabled)
4820 continue;
4821 l = line_info(page + len, &rs_table[i]);
4822 len += l;
4823 if (len+begin > off+count)
4824 goto done;
4825 if (len+begin < off) {
4826 begin += len;
4827 len = 0;
4828 }
4829 }
4830 #ifdef DEBUG_LOG_INCLUDED
4831 for (i = 0; i < debug_log_pos; i++) {
4832 len += sprintf(page + len, "%-4i %lu.%lu ", i, debug_log[i].time, timer_data_to_ns(debug_log[i].timer_data));
4833 len += sprintf(page + len, debug_log[i].string, debug_log[i].value);
4834 if (len+begin > off+count)
4835 goto done;
4836 if (len+begin < off) {
4837 begin += len;
4838 len = 0;
4839 }
4840 }
4841 len += sprintf(page + len, "debug_log %i/%i %li bytes\n",
4842 i, DEBUG_LOG_SIZE, begin+len);
4843 debug_log_pos = 0;
4844 #endif
4845
4846 *eof = 1;
4847 done:
4848 if (off >= len+begin)
4849 return 0;
4850 *start = page + (off-begin);
4851 return ((count < begin+len-off) ? count : begin+len-off);
4852 }
4853
4854 /* Finally, routines used to initialize the serial driver. */
4855
4856 static void
4857 show_serial_version(void)
4858 {
4859 printk(KERN_INFO
4860 "ETRAX 100LX serial-driver %s, (c) 2000-2004 Axis Communications AB\r\n",
4861 &serial_version[11]); /* "$Revision: x.yy" */
4862 }
4863
4864 /* rs_init inits the driver at boot (using the module_init chain) */
4865
4866 static struct tty_operations rs_ops = {
4867 .open = rs_open,
4868 .close = rs_close,
4869 .write = rs_write,
4870 .flush_chars = rs_flush_chars,
4871 .write_room = rs_write_room,
4872 .chars_in_buffer = rs_chars_in_buffer,
4873 .flush_buffer = rs_flush_buffer,
4874 .ioctl = rs_ioctl,
4875 .throttle = rs_throttle,
4876 .unthrottle = rs_unthrottle,
4877 .set_termios = rs_set_termios,
4878 .stop = rs_stop,
4879 .start = rs_start,
4880 .hangup = rs_hangup,
4881 .break_ctl = rs_break,
4882 .send_xchar = rs_send_xchar,
4883 .wait_until_sent = rs_wait_until_sent,
4884 .read_proc = rs_read_proc,
4885 };
4886
4887 static int __init
4888 rs_init(void)
4889 {
4890 int i;
4891 struct e100_serial *info;
4892 struct tty_driver *driver = alloc_tty_driver(NR_PORTS);
4893
4894 if (!driver)
4895 return -ENOMEM;
4896
4897 show_serial_version();
4898
4899 /* Setup the timed flush handler system */
4900
4901 #if !defined(CONFIG_ETRAX_SERIAL_FAST_TIMER)
4902 init_timer(&flush_timer);
4903 flush_timer.function = timed_flush_handler;
4904 mod_timer(&flush_timer, jiffies + CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS);
4905 #endif
4906
4907 /* Initialize the tty_driver structure */
4908
4909 driver->driver_name = "serial";
4910 driver->name = "ttyS";
4911 driver->major = TTY_MAJOR;
4912 driver->minor_start = 64;
4913 driver->type = TTY_DRIVER_TYPE_SERIAL;
4914 driver->subtype = SERIAL_TYPE_NORMAL;
4915 driver->init_termios = tty_std_termios;
4916 driver->init_termios.c_cflag =
4917 B115200 | CS8 | CREAD | HUPCL | CLOCAL; /* is normally B9600 default... */
4918 driver->flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_NO_DEVFS;
4919 driver->termios = serial_termios;
4920 driver->termios_locked = serial_termios_locked;
4921
4922 tty_set_operations(driver, &rs_ops);
4923 serial_driver = driver;
4924 if (tty_register_driver(driver))
4925 panic("Couldn't register serial driver\n");
4926 /* do some initializing for the separate ports */
4927
4928 for (i = 0, info = rs_table; i < NR_PORTS; i++,info++) {
4929 info->uses_dma_in = 0;
4930 info->uses_dma_out = 0;
4931 info->line = i;
4932 info->tty = 0;
4933 info->type = PORT_ETRAX;
4934 info->tr_running = 0;
4935 info->forced_eop = 0;
4936 info->baud_base = DEF_BAUD_BASE;
4937 info->custom_divisor = 0;
4938 info->flags = 0;
4939 info->close_delay = 5*HZ/10;
4940 info->closing_wait = 30*HZ;
4941 info->x_char = 0;
4942 info->event = 0;
4943 info->count = 0;
4944 info->blocked_open = 0;
4945 info->normal_termios = driver->init_termios;
4946 init_waitqueue_head(&info->open_wait);
4947 init_waitqueue_head(&info->close_wait);
4948 info->xmit.buf = NULL;
4949 info->xmit.tail = info->xmit.head = 0;
4950 info->first_recv_buffer = info->last_recv_buffer = NULL;
4951 info->recv_cnt = info->max_recv_cnt = 0;
4952 info->last_tx_active_usec = 0;
4953 info->last_tx_active = 0;
4954
4955 #if defined(CONFIG_ETRAX_RS485)
4956 /* Set sane defaults */
4957 info->rs485.rts_on_send = 0;
4958 info->rs485.rts_after_sent = 1;
4959 info->rs485.delay_rts_before_send = 0;
4960 info->rs485.enabled = 0;
4961 #endif
4962 INIT_WORK(&info->work, do_softint, info);
4963
4964 if (info->enabled) {
4965 printk(KERN_INFO "%s%d at 0x%x is a builtin UART with DMA\n",
4966 serial_driver->name, info->line, (unsigned int)info->port);
4967 }
4968 }
4969 #ifdef CONFIG_ETRAX_FAST_TIMER
4970 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
4971 memset(fast_timers, 0, sizeof(fast_timers));
4972 #endif
4973 #ifdef CONFIG_ETRAX_RS485
4974 memset(fast_timers_rs485, 0, sizeof(fast_timers_rs485));
4975 #endif
4976 fast_timer_init();
4977 #endif
4978
4979 #ifndef CONFIG_SVINTO_SIM
4980 /* Not needed in simulator. May only complicate stuff. */
4981 /* hook the irq's for DMA channel 6 and 7, serial output and input, and some more... */
4982
4983 if (request_irq(SERIAL_IRQ_NBR, ser_interrupt, SA_SHIRQ | SA_INTERRUPT, "serial ", NULL))
4984 panic("irq8");
4985
4986 #ifdef CONFIG_ETRAX_SERIAL_PORT0
4987 #ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA6_OUT
4988 if (request_irq(SER0_DMA_TX_IRQ_NBR, tr_interrupt, SA_INTERRUPT, "serial 0 dma tr", NULL))
4989 panic("irq22");
4990 #endif
4991 #ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA7_IN
4992 if (request_irq(SER0_DMA_RX_IRQ_NBR, rec_interrupt, SA_INTERRUPT, "serial 0 dma rec", NULL))
4993 panic("irq23");
4994 #endif
4995 #endif
4996
4997 #ifdef CONFIG_ETRAX_SERIAL_PORT1
4998 #ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA8_OUT
4999 if (request_irq(SER1_DMA_TX_IRQ_NBR, tr_interrupt, SA_INTERRUPT, "serial 1 dma tr", NULL))
5000 panic("irq24");
5001 #endif
5002 #ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA9_IN
5003 if (request_irq(SER1_DMA_RX_IRQ_NBR, rec_interrupt, SA_INTERRUPT, "serial 1 dma rec", NULL))
5004 panic("irq25");
5005 #endif
5006 #endif
5007 #ifdef CONFIG_ETRAX_SERIAL_PORT2
5008 /* DMA Shared with par0 (and SCSI0 and ATA) */
5009 #ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA2_OUT
5010 if (request_irq(SER2_DMA_TX_IRQ_NBR, tr_interrupt, SA_SHIRQ | SA_INTERRUPT, "serial 2 dma tr", NULL))
5011 panic("irq18");
5012 #endif
5013 #ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA3_IN
5014 if (request_irq(SER2_DMA_RX_IRQ_NBR, rec_interrupt, SA_SHIRQ | SA_INTERRUPT, "serial 2 dma rec", NULL))
5015 panic("irq19");
5016 #endif
5017 #endif
5018 #ifdef CONFIG_ETRAX_SERIAL_PORT3
5019 /* DMA Shared with par1 (and SCSI1 and Extern DMA 0) */
5020 #ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA4_OUT
5021 if (request_irq(SER3_DMA_TX_IRQ_NBR, tr_interrupt, SA_SHIRQ | SA_INTERRUPT, "serial 3 dma tr", NULL))
5022 panic("irq20");
5023 #endif
5024 #ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA5_IN
5025 if (request_irq(SER3_DMA_RX_IRQ_NBR, rec_interrupt, SA_SHIRQ | SA_INTERRUPT, "serial 3 dma rec", NULL))
5026 panic("irq21");
5027 #endif
5028 #endif
5029
5030 #ifdef CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST
5031 if (request_irq(TIMER1_IRQ_NBR, timeout_interrupt, SA_SHIRQ | SA_INTERRUPT,
5032 "fast serial dma timeout", NULL)) {
5033 printk(KERN_CRIT "err: timer1 irq\n");
5034 }
5035 #endif
5036 #endif /* CONFIG_SVINTO_SIM */
5037 debug_write_function = rs_debug_write_function;
5038 return 0;
5039 }
5040
5041 /* this makes sure that rs_init is called during kernel boot */
5042
5043 module_init(rs_init);
5044
5045 /*
5046 * register_serial and unregister_serial allows for serial ports to be
5047 * configured at run-time, to support PCMCIA modems.
5048 */
5049 int
5050 register_serial(struct serial_struct *req)
5051 {
5052 return -1;
5053 }
5054
5055 void unregister_serial(int line)
5056 {
5057 }
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