2 * Serial port driver for the ETRAX 100LX chip
4 * Copyright (C) 1998-2007 Axis Communications AB
6 * Many, many authors. Based once upon a time on serial.c for 16x50.
10 static char *serial_version
= "$Revision: 1.25 $";
12 #include <linux/types.h>
13 #include <linux/errno.h>
14 #include <linux/signal.h>
15 #include <linux/sched.h>
16 #include <linux/timer.h>
17 #include <linux/interrupt.h>
18 #include <linux/tty.h>
19 #include <linux/tty_flip.h>
20 #include <linux/major.h>
21 #include <linux/string.h>
22 #include <linux/fcntl.h>
24 #include <linux/slab.h>
25 #include <linux/init.h>
26 #include <asm/uaccess.h>
27 #include <linux/kernel.h>
28 #include <linux/mutex.h>
29 #include <linux/bitops.h>
34 #include <asm/system.h>
35 #include <linux/delay.h>
37 #include <asm/arch/svinto.h>
39 /* non-arch dependent serial structures are in linux/serial.h */
40 #include <linux/serial.h>
41 /* while we keep our own stuff (struct e100_serial) in a local .h file */
43 #include <asm/fasttimer.h>
44 #include <asm/arch/io_interface_mux.h>
46 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
47 #ifndef CONFIG_ETRAX_FAST_TIMER
48 #error "Enable FAST_TIMER to use SERIAL_FAST_TIMER"
52 #if defined(CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS) && \
53 (CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS == 0)
54 #error "RX_TIMEOUT_TICKS == 0 not allowed, use 1"
57 #if defined(CONFIG_ETRAX_RS485_ON_PA) && defined(CONFIG_ETRAX_RS485_ON_PORT_G)
58 #error "Disable either CONFIG_ETRAX_RS485_ON_PA or CONFIG_ETRAX_RS485_ON_PORT_G"
62 * All of the compatibilty code so we can compile serial.c against
63 * older kernels is hidden in serial_compat.h
65 #if defined(LOCAL_HEADERS)
66 #include "serial_compat.h"
69 struct tty_driver
*serial_driver
;
71 /* number of characters left in xmit buffer before we ask for more */
72 #define WAKEUP_CHARS 256
74 //#define SERIAL_DEBUG_INTR
75 //#define SERIAL_DEBUG_OPEN
76 //#define SERIAL_DEBUG_FLOW
77 //#define SERIAL_DEBUG_DATA
78 //#define SERIAL_DEBUG_THROTTLE
79 //#define SERIAL_DEBUG_IO /* Debug for Extra control and status pins */
80 //#define SERIAL_DEBUG_LINE 0 /* What serport we want to debug */
82 /* Enable this to use serial interrupts to handle when you
83 expect the first received event on the serial port to
84 be an error, break or similar. Used to be able to flash IRMA
86 #define SERIAL_HANDLE_EARLY_ERRORS
88 /* Currently 16 descriptors x 128 bytes = 2048 bytes */
89 #define SERIAL_DESCR_BUF_SIZE 256
91 #define SERIAL_PRESCALE_BASE 3125000 /* 3.125MHz */
92 #define DEF_BAUD_BASE SERIAL_PRESCALE_BASE
94 /* We don't want to load the system with massive fast timer interrupt
95 * on high baudrates so limit it to 250 us (4kHz) */
96 #define MIN_FLUSH_TIME_USEC 250
98 /* Add an x here to log a lot of timer stuff */
100 /* Debug details of interrupt handling */
101 #define DINTR1(x) /* irq on/off, errors */
102 #define DINTR2(x) /* tx and rx */
103 /* Debug flip buffer stuff */
105 /* Debug flow control and overview of data flow */
108 #define DLOG_INT_TRIG(x)
110 //#define DEBUG_LOG_INCLUDED
111 #ifndef DEBUG_LOG_INCLUDED
112 #define DEBUG_LOG(line, string, value)
114 struct debug_log_info
117 unsigned long timer_data
;
122 #define DEBUG_LOG_SIZE 4096
124 struct debug_log_info debug_log
[DEBUG_LOG_SIZE
];
125 int debug_log_pos
= 0;
127 #define DEBUG_LOG(_line, _string, _value) do { \
128 if ((_line) == SERIAL_DEBUG_LINE) {\
129 debug_log_func(_line, _string, _value); \
133 void debug_log_func(int line
, const char *string
, int value
)
135 if (debug_log_pos
< DEBUG_LOG_SIZE
) {
136 debug_log
[debug_log_pos
].time
= jiffies
;
137 debug_log
[debug_log_pos
].timer_data
= *R_TIMER_DATA
;
138 // debug_log[debug_log_pos].line = line;
139 debug_log
[debug_log_pos
].string
= string
;
140 debug_log
[debug_log_pos
].value
= value
;
143 /*printk(string, value);*/
147 #ifndef CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS
148 /* Default number of timer ticks before flushing rx fifo
149 * When using "little data, low latency applications: use 0
150 * When using "much data applications (PPP)" use ~5
152 #define CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS 5
155 unsigned long timer_data_to_ns(unsigned long timer_data
);
157 static void change_speed(struct e100_serial
*info
);
158 static void rs_throttle(struct tty_struct
* tty
);
159 static void rs_wait_until_sent(struct tty_struct
*tty
, int timeout
);
160 static int rs_write(struct tty_struct
*tty
,
161 const unsigned char *buf
, int count
);
162 #ifdef CONFIG_ETRAX_RS485
163 static int e100_write_rs485(struct tty_struct
*tty
,
164 const unsigned char *buf
, int count
);
166 static int get_lsr_info(struct e100_serial
*info
, unsigned int *value
);
169 #define DEF_BAUD 115200 /* 115.2 kbit/s */
170 #define STD_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
171 #define DEF_RX 0x20 /* or SERIAL_CTRL_W >> 8 */
172 /* Default value of tx_ctrl register: has txd(bit 7)=1 (idle) as default */
173 #define DEF_TX 0x80 /* or SERIAL_CTRL_B */
175 /* offsets from R_SERIALx_CTRL */
178 #define REG_DATA_STATUS32 0 /* this is the 32 bit register R_SERIALx_READ */
179 #define REG_TR_DATA 0
181 #define REG_TR_CTRL 1
182 #define REG_REC_CTRL 2
184 #define REG_XOFF 4 /* this is a 32 bit register */
186 /* The bitfields are the same for all serial ports */
187 #define SER_RXD_MASK IO_MASK(R_SERIAL0_STATUS, rxd)
188 #define SER_DATA_AVAIL_MASK IO_MASK(R_SERIAL0_STATUS, data_avail)
189 #define SER_FRAMING_ERR_MASK IO_MASK(R_SERIAL0_STATUS, framing_err)
190 #define SER_PAR_ERR_MASK IO_MASK(R_SERIAL0_STATUS, par_err)
191 #define SER_OVERRUN_MASK IO_MASK(R_SERIAL0_STATUS, overrun)
193 #define SER_ERROR_MASK (SER_OVERRUN_MASK | SER_PAR_ERR_MASK | SER_FRAMING_ERR_MASK)
195 /* Values for info->errorcode */
196 #define ERRCODE_SET_BREAK (TTY_BREAK)
197 #define ERRCODE_INSERT 0x100
198 #define ERRCODE_INSERT_BREAK (ERRCODE_INSERT | TTY_BREAK)
200 #define FORCE_EOP(info) *R_SET_EOP = 1U << info->iseteop;
203 * General note regarding the use of IO_* macros in this file:
205 * We will use the bits defined for DMA channel 6 when using various
206 * IO_* macros (e.g. IO_STATE, IO_MASK, IO_EXTRACT) and _assume_ they are
207 * the same for all channels (which of course they are).
209 * We will also use the bits defined for serial port 0 when writing commands
210 * to the different ports, as these bits too are the same for all ports.
214 /* Mask for the irqs possibly enabled in R_IRQ_MASK1_RD etc. */
215 static const unsigned long e100_ser_int_mask
= 0
216 #ifdef CONFIG_ETRAX_SERIAL_PORT0
217 | IO_MASK(R_IRQ_MASK1_RD
, ser0_data
) | IO_MASK(R_IRQ_MASK1_RD
, ser0_ready
)
219 #ifdef CONFIG_ETRAX_SERIAL_PORT1
220 | IO_MASK(R_IRQ_MASK1_RD
, ser1_data
) | IO_MASK(R_IRQ_MASK1_RD
, ser1_ready
)
222 #ifdef CONFIG_ETRAX_SERIAL_PORT2
223 | IO_MASK(R_IRQ_MASK1_RD
, ser2_data
) | IO_MASK(R_IRQ_MASK1_RD
, ser2_ready
)
225 #ifdef CONFIG_ETRAX_SERIAL_PORT3
226 | IO_MASK(R_IRQ_MASK1_RD
, ser3_data
) | IO_MASK(R_IRQ_MASK1_RD
, ser3_ready
)
229 unsigned long r_alt_ser_baudrate_shadow
= 0;
231 /* this is the data for the four serial ports in the etrax100 */
232 /* DMA2(ser2), DMA4(ser3), DMA6(ser0) or DMA8(ser1) */
233 /* R_DMA_CHx_CLR_INTR, R_DMA_CHx_FIRST, R_DMA_CHx_CMD */
235 static struct e100_serial rs_table
[] = {
237 .port
= (unsigned char *)R_SERIAL0_CTRL
,
238 .irq
= 1U << 12, /* uses DMA 6 and 7 */
239 .oclrintradr
= R_DMA_CH6_CLR_INTR
,
240 .ofirstadr
= R_DMA_CH6_FIRST
,
241 .ocmdadr
= R_DMA_CH6_CMD
,
242 .ostatusadr
= R_DMA_CH6_STATUS
,
243 .iclrintradr
= R_DMA_CH7_CLR_INTR
,
244 .ifirstadr
= R_DMA_CH7_FIRST
,
245 .icmdadr
= R_DMA_CH7_CMD
,
246 .idescradr
= R_DMA_CH7_DESCR
,
251 .dma_owner
= dma_ser0
,
252 .io_if
= if_serial_0
,
253 #ifdef CONFIG_ETRAX_SERIAL_PORT0
255 #ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA6_OUT
256 .dma_out_enabled
= 1,
257 .dma_out_nbr
= SER0_TX_DMA_NBR
,
258 .dma_out_irq_nbr
= SER0_DMA_TX_IRQ_NBR
,
259 .dma_out_irq_flags
= IRQF_DISABLED
,
260 .dma_out_irq_description
= "serial 0 dma tr",
262 .dma_out_enabled
= 0,
263 .dma_out_nbr
= UINT_MAX
,
264 .dma_out_irq_nbr
= 0,
265 .dma_out_irq_flags
= 0,
266 .dma_out_irq_description
= NULL
,
268 #ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA7_IN
270 .dma_in_nbr
= SER0_RX_DMA_NBR
,
271 .dma_in_irq_nbr
= SER0_DMA_RX_IRQ_NBR
,
272 .dma_in_irq_flags
= IRQF_DISABLED
,
273 .dma_in_irq_description
= "serial 0 dma rec",
276 .dma_in_nbr
= UINT_MAX
,
278 .dma_in_irq_flags
= 0,
279 .dma_in_irq_description
= NULL
,
283 .io_if_description
= NULL
,
284 .dma_out_enabled
= 0,
289 #ifndef CONFIG_SVINTO_SIM
291 .port
= (unsigned char *)R_SERIAL1_CTRL
,
292 .irq
= 1U << 16, /* uses DMA 8 and 9 */
293 .oclrintradr
= R_DMA_CH8_CLR_INTR
,
294 .ofirstadr
= R_DMA_CH8_FIRST
,
295 .ocmdadr
= R_DMA_CH8_CMD
,
296 .ostatusadr
= R_DMA_CH8_STATUS
,
297 .iclrintradr
= R_DMA_CH9_CLR_INTR
,
298 .ifirstadr
= R_DMA_CH9_FIRST
,
299 .icmdadr
= R_DMA_CH9_CMD
,
300 .idescradr
= R_DMA_CH9_DESCR
,
305 .dma_owner
= dma_ser1
,
306 .io_if
= if_serial_1
,
307 #ifdef CONFIG_ETRAX_SERIAL_PORT1
309 .io_if_description
= "ser1",
310 #ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA8_OUT
311 .dma_out_enabled
= 1,
312 .dma_out_nbr
= SER1_TX_DMA_NBR
,
313 .dma_out_irq_nbr
= SER1_DMA_TX_IRQ_NBR
,
314 .dma_out_irq_flags
= IRQF_DISABLED
,
315 .dma_out_irq_description
= "serial 1 dma tr",
317 .dma_out_enabled
= 0,
318 .dma_out_nbr
= UINT_MAX
,
319 .dma_out_irq_nbr
= 0,
320 .dma_out_irq_flags
= 0,
321 .dma_out_irq_description
= NULL
,
323 #ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA9_IN
325 .dma_in_nbr
= SER1_RX_DMA_NBR
,
326 .dma_in_irq_nbr
= SER1_DMA_RX_IRQ_NBR
,
327 .dma_in_irq_flags
= IRQF_DISABLED
,
328 .dma_in_irq_description
= "serial 1 dma rec",
332 .dma_in_nbr
= UINT_MAX
,
334 .dma_in_irq_flags
= 0,
335 .dma_in_irq_description
= NULL
,
339 .io_if_description
= NULL
,
341 .dma_out_enabled
= 0,
347 .port
= (unsigned char *)R_SERIAL2_CTRL
,
348 .irq
= 1U << 4, /* uses DMA 2 and 3 */
349 .oclrintradr
= R_DMA_CH2_CLR_INTR
,
350 .ofirstadr
= R_DMA_CH2_FIRST
,
351 .ocmdadr
= R_DMA_CH2_CMD
,
352 .ostatusadr
= R_DMA_CH2_STATUS
,
353 .iclrintradr
= R_DMA_CH3_CLR_INTR
,
354 .ifirstadr
= R_DMA_CH3_FIRST
,
355 .icmdadr
= R_DMA_CH3_CMD
,
356 .idescradr
= R_DMA_CH3_DESCR
,
361 .dma_owner
= dma_ser2
,
362 .io_if
= if_serial_2
,
363 #ifdef CONFIG_ETRAX_SERIAL_PORT2
365 .io_if_description
= "ser2",
366 #ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA2_OUT
367 .dma_out_enabled
= 1,
368 .dma_out_nbr
= SER2_TX_DMA_NBR
,
369 .dma_out_irq_nbr
= SER2_DMA_TX_IRQ_NBR
,
370 .dma_out_irq_flags
= IRQF_DISABLED
,
371 .dma_out_irq_description
= "serial 2 dma tr",
373 .dma_out_enabled
= 0,
374 .dma_out_nbr
= UINT_MAX
,
375 .dma_out_irq_nbr
= 0,
376 .dma_out_irq_flags
= 0,
377 .dma_out_irq_description
= NULL
,
379 #ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA3_IN
381 .dma_in_nbr
= SER2_RX_DMA_NBR
,
382 .dma_in_irq_nbr
= SER2_DMA_RX_IRQ_NBR
,
383 .dma_in_irq_flags
= IRQF_DISABLED
,
384 .dma_in_irq_description
= "serial 2 dma rec",
387 .dma_in_nbr
= UINT_MAX
,
389 .dma_in_irq_flags
= 0,
390 .dma_in_irq_description
= NULL
,
394 .io_if_description
= NULL
,
395 .dma_out_enabled
= 0,
401 .port
= (unsigned char *)R_SERIAL3_CTRL
,
402 .irq
= 1U << 8, /* uses DMA 4 and 5 */
403 .oclrintradr
= R_DMA_CH4_CLR_INTR
,
404 .ofirstadr
= R_DMA_CH4_FIRST
,
405 .ocmdadr
= R_DMA_CH4_CMD
,
406 .ostatusadr
= R_DMA_CH4_STATUS
,
407 .iclrintradr
= R_DMA_CH5_CLR_INTR
,
408 .ifirstadr
= R_DMA_CH5_FIRST
,
409 .icmdadr
= R_DMA_CH5_CMD
,
410 .idescradr
= R_DMA_CH5_DESCR
,
415 .dma_owner
= dma_ser3
,
416 .io_if
= if_serial_3
,
417 #ifdef CONFIG_ETRAX_SERIAL_PORT3
419 .io_if_description
= "ser3",
420 #ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA4_OUT
421 .dma_out_enabled
= 1,
422 .dma_out_nbr
= SER3_TX_DMA_NBR
,
423 .dma_out_irq_nbr
= SER3_DMA_TX_IRQ_NBR
,
424 .dma_out_irq_flags
= IRQF_DISABLED
,
425 .dma_out_irq_description
= "serial 3 dma tr",
427 .dma_out_enabled
= 0,
428 .dma_out_nbr
= UINT_MAX
,
429 .dma_out_irq_nbr
= 0,
430 .dma_out_irq_flags
= 0,
431 .dma_out_irq_description
= NULL
,
433 #ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA5_IN
435 .dma_in_nbr
= SER3_RX_DMA_NBR
,
436 .dma_in_irq_nbr
= SER3_DMA_RX_IRQ_NBR
,
437 .dma_in_irq_flags
= IRQF_DISABLED
,
438 .dma_in_irq_description
= "serial 3 dma rec",
441 .dma_in_nbr
= UINT_MAX
,
443 .dma_in_irq_flags
= 0,
444 .dma_in_irq_description
= NULL
448 .io_if_description
= NULL
,
449 .dma_out_enabled
= 0,
457 #define NR_PORTS (sizeof(rs_table)/sizeof(struct e100_serial))
459 static struct ktermios
*serial_termios
[NR_PORTS
];
460 static struct ktermios
*serial_termios_locked
[NR_PORTS
];
461 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
462 static struct fast_timer fast_timers
[NR_PORTS
];
465 #ifdef CONFIG_ETRAX_SERIAL_PROC_ENTRY
466 #define PROCSTAT(x) x
467 struct ser_statistics_type
{
469 int early_errors_cnt
;
472 unsigned long int processing_flip
;
473 unsigned long processing_flip_still_room
;
474 unsigned long int timeout_flush_cnt
;
481 static struct ser_statistics_type ser_stat
[NR_PORTS
];
487 #endif /* CONFIG_ETRAX_SERIAL_PROC_ENTRY */
490 #if defined(CONFIG_ETRAX_RS485)
491 #ifdef CONFIG_ETRAX_FAST_TIMER
492 static struct fast_timer fast_timers_rs485
[NR_PORTS
];
494 #if defined(CONFIG_ETRAX_RS485_ON_PA)
495 static int rs485_pa_bit
= CONFIG_ETRAX_RS485_ON_PA_BIT
;
497 #if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
498 static int rs485_port_g_bit
= CONFIG_ETRAX_RS485_ON_PORT_G_BIT
;
502 /* Info and macros needed for each ports extra control/status signals. */
503 #define E100_STRUCT_PORT(line, pinname) \
504 ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \
505 (R_PORT_PA_DATA): ( \
506 (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \
507 (R_PORT_PB_DATA):&dummy_ser[line]))
509 #define E100_STRUCT_SHADOW(line, pinname) \
510 ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \
511 (&port_pa_data_shadow): ( \
512 (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \
513 (&port_pb_data_shadow):&dummy_ser[line]))
514 #define E100_STRUCT_MASK(line, pinname) \
515 ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \
516 (1<<CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT): ( \
517 (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \
518 (1<<CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT):DUMMY_##pinname##_MASK))
520 #define DUMMY_DTR_MASK 1
521 #define DUMMY_RI_MASK 2
522 #define DUMMY_DSR_MASK 4
523 #define DUMMY_CD_MASK 8
524 static unsigned char dummy_ser
[NR_PORTS
] = {0xFF, 0xFF, 0xFF,0xFF};
526 /* If not all status pins are used or disabled, use mixed mode */
527 #ifdef CONFIG_ETRAX_SERIAL_PORT0
529 #define SER0_PA_BITSUM (CONFIG_ETRAX_SER0_DTR_ON_PA_BIT+CONFIG_ETRAX_SER0_RI_ON_PA_BIT+CONFIG_ETRAX_SER0_DSR_ON_PA_BIT+CONFIG_ETRAX_SER0_CD_ON_PA_BIT)
531 #if SER0_PA_BITSUM != -4
532 # if CONFIG_ETRAX_SER0_DTR_ON_PA_BIT == -1
533 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
534 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
537 # if CONFIG_ETRAX_SER0_RI_ON_PA_BIT == -1
538 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
539 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
542 # if CONFIG_ETRAX_SER0_DSR_ON_PA_BIT == -1
543 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
544 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
547 # if CONFIG_ETRAX_SER0_CD_ON_PA_BIT == -1
548 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
549 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
554 #define SER0_PB_BITSUM (CONFIG_ETRAX_SER0_DTR_ON_PB_BIT+CONFIG_ETRAX_SER0_RI_ON_PB_BIT+CONFIG_ETRAX_SER0_DSR_ON_PB_BIT+CONFIG_ETRAX_SER0_CD_ON_PB_BIT)
556 #if SER0_PB_BITSUM != -4
557 # if CONFIG_ETRAX_SER0_DTR_ON_PB_BIT == -1
558 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
559 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
562 # if CONFIG_ETRAX_SER0_RI_ON_PB_BIT == -1
563 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
564 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
567 # if CONFIG_ETRAX_SER0_DSR_ON_PB_BIT == -1
568 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
569 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
572 # if CONFIG_ETRAX_SER0_CD_ON_PB_BIT == -1
573 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
574 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
582 #ifdef CONFIG_ETRAX_SERIAL_PORT1
584 #define SER1_PA_BITSUM (CONFIG_ETRAX_SER1_DTR_ON_PA_BIT+CONFIG_ETRAX_SER1_RI_ON_PA_BIT+CONFIG_ETRAX_SER1_DSR_ON_PA_BIT+CONFIG_ETRAX_SER1_CD_ON_PA_BIT)
586 #if SER1_PA_BITSUM != -4
587 # if CONFIG_ETRAX_SER1_DTR_ON_PA_BIT == -1
588 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
589 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
592 # if CONFIG_ETRAX_SER1_RI_ON_PA_BIT == -1
593 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
594 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
597 # if CONFIG_ETRAX_SER1_DSR_ON_PA_BIT == -1
598 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
599 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
602 # if CONFIG_ETRAX_SER1_CD_ON_PA_BIT == -1
603 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
604 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
609 #define SER1_PB_BITSUM (CONFIG_ETRAX_SER1_DTR_ON_PB_BIT+CONFIG_ETRAX_SER1_RI_ON_PB_BIT+CONFIG_ETRAX_SER1_DSR_ON_PB_BIT+CONFIG_ETRAX_SER1_CD_ON_PB_BIT)
611 #if SER1_PB_BITSUM != -4
612 # if CONFIG_ETRAX_SER1_DTR_ON_PB_BIT == -1
613 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
614 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
617 # if CONFIG_ETRAX_SER1_RI_ON_PB_BIT == -1
618 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
619 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
622 # if CONFIG_ETRAX_SER1_DSR_ON_PB_BIT == -1
623 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
624 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
627 # if CONFIG_ETRAX_SER1_CD_ON_PB_BIT == -1
628 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
629 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
636 #ifdef CONFIG_ETRAX_SERIAL_PORT2
638 #define SER2_PA_BITSUM (CONFIG_ETRAX_SER2_DTR_ON_PA_BIT+CONFIG_ETRAX_SER2_RI_ON_PA_BIT+CONFIG_ETRAX_SER2_DSR_ON_PA_BIT+CONFIG_ETRAX_SER2_CD_ON_PA_BIT)
640 #if SER2_PA_BITSUM != -4
641 # if CONFIG_ETRAX_SER2_DTR_ON_PA_BIT == -1
642 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
643 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
646 # if CONFIG_ETRAX_SER2_RI_ON_PA_BIT == -1
647 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
648 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
651 # if CONFIG_ETRAX_SER2_DSR_ON_PA_BIT == -1
652 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
653 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
656 # if CONFIG_ETRAX_SER2_CD_ON_PA_BIT == -1
657 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
658 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
663 #define SER2_PB_BITSUM (CONFIG_ETRAX_SER2_DTR_ON_PB_BIT+CONFIG_ETRAX_SER2_RI_ON_PB_BIT+CONFIG_ETRAX_SER2_DSR_ON_PB_BIT+CONFIG_ETRAX_SER2_CD_ON_PB_BIT)
665 #if SER2_PB_BITSUM != -4
666 # if CONFIG_ETRAX_SER2_DTR_ON_PB_BIT == -1
667 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
668 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
671 # if CONFIG_ETRAX_SER2_RI_ON_PB_BIT == -1
672 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
673 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
676 # if CONFIG_ETRAX_SER2_DSR_ON_PB_BIT == -1
677 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
678 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
681 # if CONFIG_ETRAX_SER2_CD_ON_PB_BIT == -1
682 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
683 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
690 #ifdef CONFIG_ETRAX_SERIAL_PORT3
692 #define SER3_PA_BITSUM (CONFIG_ETRAX_SER3_DTR_ON_PA_BIT+CONFIG_ETRAX_SER3_RI_ON_PA_BIT+CONFIG_ETRAX_SER3_DSR_ON_PA_BIT+CONFIG_ETRAX_SER3_CD_ON_PA_BIT)
694 #if SER3_PA_BITSUM != -4
695 # if CONFIG_ETRAX_SER3_DTR_ON_PA_BIT == -1
696 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
697 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
700 # if CONFIG_ETRAX_SER3_RI_ON_PA_BIT == -1
701 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
702 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
705 # if CONFIG_ETRAX_SER3_DSR_ON_PA_BIT == -1
706 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
707 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
710 # if CONFIG_ETRAX_SER3_CD_ON_PA_BIT == -1
711 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
712 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
717 #define SER3_PB_BITSUM (CONFIG_ETRAX_SER3_DTR_ON_PB_BIT+CONFIG_ETRAX_SER3_RI_ON_PB_BIT+CONFIG_ETRAX_SER3_DSR_ON_PB_BIT+CONFIG_ETRAX_SER3_CD_ON_PB_BIT)
719 #if SER3_PB_BITSUM != -4
720 # if CONFIG_ETRAX_SER3_DTR_ON_PB_BIT == -1
721 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
722 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
725 # if CONFIG_ETRAX_SER3_RI_ON_PB_BIT == -1
726 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
727 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
730 # if CONFIG_ETRAX_SER3_DSR_ON_PB_BIT == -1
731 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
732 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
735 # if CONFIG_ETRAX_SER3_CD_ON_PB_BIT == -1
736 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
737 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
745 #if defined(CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED) || \
746 defined(CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED) || \
747 defined(CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED) || \
748 defined(CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED)
749 #define CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED
752 #ifdef CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED
753 /* The pins can be mixed on PA and PB */
754 #define CONTROL_PINS_PORT_NOT_USED(line) \
755 &dummy_ser[line], &dummy_ser[line], \
756 &dummy_ser[line], &dummy_ser[line], \
757 &dummy_ser[line], &dummy_ser[line], \
758 &dummy_ser[line], &dummy_ser[line], \
759 DUMMY_DTR_MASK, DUMMY_RI_MASK, DUMMY_DSR_MASK, DUMMY_CD_MASK
764 volatile unsigned char *dtr_port
;
765 unsigned char *dtr_shadow
;
766 volatile unsigned char *ri_port
;
767 unsigned char *ri_shadow
;
768 volatile unsigned char *dsr_port
;
769 unsigned char *dsr_shadow
;
770 volatile unsigned char *cd_port
;
771 unsigned char *cd_shadow
;
773 unsigned char dtr_mask
;
774 unsigned char ri_mask
;
775 unsigned char dsr_mask
;
776 unsigned char cd_mask
;
779 static const struct control_pins e100_modem_pins
[NR_PORTS
] =
783 #ifdef CONFIG_ETRAX_SERIAL_PORT0
784 E100_STRUCT_PORT(0,DTR
), E100_STRUCT_SHADOW(0,DTR
),
785 E100_STRUCT_PORT(0,RI
), E100_STRUCT_SHADOW(0,RI
),
786 E100_STRUCT_PORT(0,DSR
), E100_STRUCT_SHADOW(0,DSR
),
787 E100_STRUCT_PORT(0,CD
), E100_STRUCT_SHADOW(0,CD
),
788 E100_STRUCT_MASK(0,DTR
),
789 E100_STRUCT_MASK(0,RI
),
790 E100_STRUCT_MASK(0,DSR
),
791 E100_STRUCT_MASK(0,CD
)
793 CONTROL_PINS_PORT_NOT_USED(0)
799 #ifdef CONFIG_ETRAX_SERIAL_PORT1
800 E100_STRUCT_PORT(1,DTR
), E100_STRUCT_SHADOW(1,DTR
),
801 E100_STRUCT_PORT(1,RI
), E100_STRUCT_SHADOW(1,RI
),
802 E100_STRUCT_PORT(1,DSR
), E100_STRUCT_SHADOW(1,DSR
),
803 E100_STRUCT_PORT(1,CD
), E100_STRUCT_SHADOW(1,CD
),
804 E100_STRUCT_MASK(1,DTR
),
805 E100_STRUCT_MASK(1,RI
),
806 E100_STRUCT_MASK(1,DSR
),
807 E100_STRUCT_MASK(1,CD
)
809 CONTROL_PINS_PORT_NOT_USED(1)
815 #ifdef CONFIG_ETRAX_SERIAL_PORT2
816 E100_STRUCT_PORT(2,DTR
), E100_STRUCT_SHADOW(2,DTR
),
817 E100_STRUCT_PORT(2,RI
), E100_STRUCT_SHADOW(2,RI
),
818 E100_STRUCT_PORT(2,DSR
), E100_STRUCT_SHADOW(2,DSR
),
819 E100_STRUCT_PORT(2,CD
), E100_STRUCT_SHADOW(2,CD
),
820 E100_STRUCT_MASK(2,DTR
),
821 E100_STRUCT_MASK(2,RI
),
822 E100_STRUCT_MASK(2,DSR
),
823 E100_STRUCT_MASK(2,CD
)
825 CONTROL_PINS_PORT_NOT_USED(2)
831 #ifdef CONFIG_ETRAX_SERIAL_PORT3
832 E100_STRUCT_PORT(3,DTR
), E100_STRUCT_SHADOW(3,DTR
),
833 E100_STRUCT_PORT(3,RI
), E100_STRUCT_SHADOW(3,RI
),
834 E100_STRUCT_PORT(3,DSR
), E100_STRUCT_SHADOW(3,DSR
),
835 E100_STRUCT_PORT(3,CD
), E100_STRUCT_SHADOW(3,CD
),
836 E100_STRUCT_MASK(3,DTR
),
837 E100_STRUCT_MASK(3,RI
),
838 E100_STRUCT_MASK(3,DSR
),
839 E100_STRUCT_MASK(3,CD
)
841 CONTROL_PINS_PORT_NOT_USED(3)
845 #else /* CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED */
847 /* All pins are on either PA or PB for each serial port */
848 #define CONTROL_PINS_PORT_NOT_USED(line) \
849 &dummy_ser[line], &dummy_ser[line], \
850 DUMMY_DTR_MASK, DUMMY_RI_MASK, DUMMY_DSR_MASK, DUMMY_CD_MASK
855 volatile unsigned char *port
;
856 unsigned char *shadow
;
858 unsigned char dtr_mask
;
859 unsigned char ri_mask
;
860 unsigned char dsr_mask
;
861 unsigned char cd_mask
;
864 #define dtr_port port
865 #define dtr_shadow shadow
867 #define ri_shadow shadow
868 #define dsr_port port
869 #define dsr_shadow shadow
871 #define cd_shadow shadow
873 static const struct control_pins e100_modem_pins
[NR_PORTS
] =
877 #ifdef CONFIG_ETRAX_SERIAL_PORT0
878 E100_STRUCT_PORT(0,DTR
), E100_STRUCT_SHADOW(0,DTR
),
879 E100_STRUCT_MASK(0,DTR
),
880 E100_STRUCT_MASK(0,RI
),
881 E100_STRUCT_MASK(0,DSR
),
882 E100_STRUCT_MASK(0,CD
)
884 CONTROL_PINS_PORT_NOT_USED(0)
890 #ifdef CONFIG_ETRAX_SERIAL_PORT1
891 E100_STRUCT_PORT(1,DTR
), E100_STRUCT_SHADOW(1,DTR
),
892 E100_STRUCT_MASK(1,DTR
),
893 E100_STRUCT_MASK(1,RI
),
894 E100_STRUCT_MASK(1,DSR
),
895 E100_STRUCT_MASK(1,CD
)
897 CONTROL_PINS_PORT_NOT_USED(1)
903 #ifdef CONFIG_ETRAX_SERIAL_PORT2
904 E100_STRUCT_PORT(2,DTR
), E100_STRUCT_SHADOW(2,DTR
),
905 E100_STRUCT_MASK(2,DTR
),
906 E100_STRUCT_MASK(2,RI
),
907 E100_STRUCT_MASK(2,DSR
),
908 E100_STRUCT_MASK(2,CD
)
910 CONTROL_PINS_PORT_NOT_USED(2)
916 #ifdef CONFIG_ETRAX_SERIAL_PORT3
917 E100_STRUCT_PORT(3,DTR
), E100_STRUCT_SHADOW(3,DTR
),
918 E100_STRUCT_MASK(3,DTR
),
919 E100_STRUCT_MASK(3,RI
),
920 E100_STRUCT_MASK(3,DSR
),
921 E100_STRUCT_MASK(3,CD
)
923 CONTROL_PINS_PORT_NOT_USED(3)
927 #endif /* !CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED */
929 #define E100_RTS_MASK 0x20
930 #define E100_CTS_MASK 0x40
932 /* All serial port signals are active low:
933 * active = 0 -> 3.3V to RS-232 driver -> -12V on RS-232 level
934 * inactive = 1 -> 0V to RS-232 driver -> +12V on RS-232 level
936 * These macros returns the pin value: 0=0V, >=1 = 3.3V on ETRAX chip
940 #define E100_RTS_GET(info) ((info)->rx_ctrl & E100_RTS_MASK)
942 #define E100_CTS_GET(info) ((info)->port[REG_STATUS] & E100_CTS_MASK)
944 /* These are typically PA or PB and 0 means 0V, 1 means 3.3V */
946 #define E100_DTR_GET(info) ((*e100_modem_pins[(info)->line].dtr_shadow) & e100_modem_pins[(info)->line].dtr_mask)
948 /* Normally inputs */
949 #define E100_RI_GET(info) ((*e100_modem_pins[(info)->line].ri_port) & e100_modem_pins[(info)->line].ri_mask)
950 #define E100_CD_GET(info) ((*e100_modem_pins[(info)->line].cd_port) & e100_modem_pins[(info)->line].cd_mask)
953 #define E100_DSR_GET(info) ((*e100_modem_pins[(info)->line].dsr_port) & e100_modem_pins[(info)->line].dsr_mask)
957 * tmp_buf is used as a temporary buffer by serial_write. We need to
958 * lock it in case the memcpy_fromfs blocks while swapping in a page,
959 * and some other program tries to do a serial write at the same time.
960 * Since the lock will only come under contention when the system is
961 * swapping and available memory is low, it makes sense to share one
962 * buffer across all the serial ports, since it significantly saves
963 * memory if large numbers of serial ports are open.
965 static unsigned char *tmp_buf
;
966 static DEFINE_MUTEX(tmp_buf_mutex
);
968 /* Calculate the chartime depending on baudrate, numbor of bits etc. */
969 static void update_char_time(struct e100_serial
* info
)
971 tcflag_t cflags
= info
->port
.tty
->termios
->c_cflag
;
974 /* calc. number of bits / data byte */
975 /* databits + startbit and 1 stopbit */
976 if ((cflags
& CSIZE
) == CS7
)
981 if (cflags
& CSTOPB
) /* 2 stopbits ? */
984 if (cflags
& PARENB
) /* parity bit ? */
988 info
->char_time_usec
= ((bits
* 1000000) / info
->baud
) + 1;
989 info
->flush_time_usec
= 4*info
->char_time_usec
;
990 if (info
->flush_time_usec
< MIN_FLUSH_TIME_USEC
)
991 info
->flush_time_usec
= MIN_FLUSH_TIME_USEC
;
996 * This function maps from the Bxxxx defines in asm/termbits.h into real
1001 cflag_to_baud(unsigned int cflag
)
1003 static int baud_table
[] = {
1004 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400,
1005 4800, 9600, 19200, 38400 };
1007 static int ext_baud_table
[] = {
1008 0, 57600, 115200, 230400, 460800, 921600, 1843200, 6250000,
1009 0, 0, 0, 0, 0, 0, 0, 0 };
1011 if (cflag
& CBAUDEX
)
1012 return ext_baud_table
[(cflag
& CBAUD
) & ~CBAUDEX
];
1014 return baud_table
[cflag
& CBAUD
];
1017 /* and this maps to an etrax100 hardware baud constant */
1019 static unsigned char
1020 cflag_to_etrax_baud(unsigned int cflag
)
1024 static char baud_table
[] = {
1025 -1, -1, -1, -1, -1, -1, -1, 0, 1, 2, -1, 3, 4, 5, 6, 7 };
1027 static char ext_baud_table
[] = {
1028 -1, 8, 9, 10, 11, 12, 13, 14, -1, -1, -1, -1, -1, -1, -1, -1 };
1030 if (cflag
& CBAUDEX
)
1031 retval
= ext_baud_table
[(cflag
& CBAUD
) & ~CBAUDEX
];
1033 retval
= baud_table
[cflag
& CBAUD
];
1036 printk(KERN_WARNING
"serdriver tried setting invalid baud rate, flags %x.\n", cflag
);
1037 retval
= 5; /* choose default 9600 instead */
1040 return retval
| (retval
<< 4); /* choose same for both TX and RX */
1044 /* Various static support functions */
1046 /* Functions to set or clear DTR/RTS on the requested line */
1047 /* It is complicated by the fact that RTS is a serial port register, while
1048 * DTR might not be implemented in the HW at all, and if it is, it can be on
1054 e100_dtr(struct e100_serial
*info
, int set
)
1056 #ifndef CONFIG_SVINTO_SIM
1057 unsigned char mask
= e100_modem_pins
[info
->line
].dtr_mask
;
1059 #ifdef SERIAL_DEBUG_IO
1060 printk("ser%i dtr %i mask: 0x%02X\n", info
->line
, set
, mask
);
1061 printk("ser%i shadow before 0x%02X get: %i\n",
1062 info
->line
, *e100_modem_pins
[info
->line
].dtr_shadow
,
1063 E100_DTR_GET(info
));
1065 /* DTR is active low */
1067 unsigned long flags
;
1069 local_irq_save(flags
);
1070 *e100_modem_pins
[info
->line
].dtr_shadow
&= ~mask
;
1071 *e100_modem_pins
[info
->line
].dtr_shadow
|= (set
? 0 : mask
);
1072 *e100_modem_pins
[info
->line
].dtr_port
= *e100_modem_pins
[info
->line
].dtr_shadow
;
1073 local_irq_restore(flags
);
1076 #ifdef SERIAL_DEBUG_IO
1077 printk("ser%i shadow after 0x%02X get: %i\n",
1078 info
->line
, *e100_modem_pins
[info
->line
].dtr_shadow
,
1079 E100_DTR_GET(info
));
1084 /* set = 0 means 3.3V on the pin, bitvalue: 0=active, 1=inactive
1088 e100_rts(struct e100_serial
*info
, int set
)
1090 #ifndef CONFIG_SVINTO_SIM
1091 unsigned long flags
;
1092 local_irq_save(flags
);
1093 info
->rx_ctrl
&= ~E100_RTS_MASK
;
1094 info
->rx_ctrl
|= (set
? 0 : E100_RTS_MASK
); /* RTS is active low */
1095 info
->port
[REG_REC_CTRL
] = info
->rx_ctrl
;
1096 local_irq_restore(flags
);
1097 #ifdef SERIAL_DEBUG_IO
1098 printk("ser%i rts %i\n", info
->line
, set
);
1104 /* If this behaves as a modem, RI and CD is an output */
1106 e100_ri_out(struct e100_serial
*info
, int set
)
1108 #ifndef CONFIG_SVINTO_SIM
1109 /* RI is active low */
1111 unsigned char mask
= e100_modem_pins
[info
->line
].ri_mask
;
1112 unsigned long flags
;
1114 local_irq_save(flags
);
1115 *e100_modem_pins
[info
->line
].ri_shadow
&= ~mask
;
1116 *e100_modem_pins
[info
->line
].ri_shadow
|= (set
? 0 : mask
);
1117 *e100_modem_pins
[info
->line
].ri_port
= *e100_modem_pins
[info
->line
].ri_shadow
;
1118 local_irq_restore(flags
);
1123 e100_cd_out(struct e100_serial
*info
, int set
)
1125 #ifndef CONFIG_SVINTO_SIM
1126 /* CD is active low */
1128 unsigned char mask
= e100_modem_pins
[info
->line
].cd_mask
;
1129 unsigned long flags
;
1131 local_irq_save(flags
);
1132 *e100_modem_pins
[info
->line
].cd_shadow
&= ~mask
;
1133 *e100_modem_pins
[info
->line
].cd_shadow
|= (set
? 0 : mask
);
1134 *e100_modem_pins
[info
->line
].cd_port
= *e100_modem_pins
[info
->line
].cd_shadow
;
1135 local_irq_restore(flags
);
1141 e100_disable_rx(struct e100_serial
*info
)
1143 #ifndef CONFIG_SVINTO_SIM
1144 /* disable the receiver */
1145 info
->port
[REG_REC_CTRL
] =
1146 (info
->rx_ctrl
&= ~IO_MASK(R_SERIAL0_REC_CTRL
, rec_enable
));
1151 e100_enable_rx(struct e100_serial
*info
)
1153 #ifndef CONFIG_SVINTO_SIM
1154 /* enable the receiver */
1155 info
->port
[REG_REC_CTRL
] =
1156 (info
->rx_ctrl
|= IO_MASK(R_SERIAL0_REC_CTRL
, rec_enable
));
1160 /* the rx DMA uses both the dma_descr and the dma_eop interrupts */
1163 e100_disable_rxdma_irq(struct e100_serial
*info
)
1165 #ifdef SERIAL_DEBUG_INTR
1166 printk("rxdma_irq(%d): 0\n",info
->line
);
1168 DINTR1(DEBUG_LOG(info
->line
,"IRQ disable_rxdma_irq %i\n", info
->line
));
1169 *R_IRQ_MASK2_CLR
= (info
->irq
<< 2) | (info
->irq
<< 3);
1173 e100_enable_rxdma_irq(struct e100_serial
*info
)
1175 #ifdef SERIAL_DEBUG_INTR
1176 printk("rxdma_irq(%d): 1\n",info
->line
);
1178 DINTR1(DEBUG_LOG(info
->line
,"IRQ enable_rxdma_irq %i\n", info
->line
));
1179 *R_IRQ_MASK2_SET
= (info
->irq
<< 2) | (info
->irq
<< 3);
1182 /* the tx DMA uses only dma_descr interrupt */
1184 static void e100_disable_txdma_irq(struct e100_serial
*info
)
1186 #ifdef SERIAL_DEBUG_INTR
1187 printk("txdma_irq(%d): 0\n",info
->line
);
1189 DINTR1(DEBUG_LOG(info
->line
,"IRQ disable_txdma_irq %i\n", info
->line
));
1190 *R_IRQ_MASK2_CLR
= info
->irq
;
1193 static void e100_enable_txdma_irq(struct e100_serial
*info
)
1195 #ifdef SERIAL_DEBUG_INTR
1196 printk("txdma_irq(%d): 1\n",info
->line
);
1198 DINTR1(DEBUG_LOG(info
->line
,"IRQ enable_txdma_irq %i\n", info
->line
));
1199 *R_IRQ_MASK2_SET
= info
->irq
;
1202 static void e100_disable_txdma_channel(struct e100_serial
*info
)
1204 unsigned long flags
;
1206 /* Disable output DMA channel for the serial port in question
1207 * ( set to something other then serialX)
1209 local_irq_save(flags
);
1210 DFLOW(DEBUG_LOG(info
->line
, "disable_txdma_channel %i\n", info
->line
));
1211 if (info
->line
== 0) {
1212 if ((genconfig_shadow
& IO_MASK(R_GEN_CONFIG
, dma6
)) ==
1213 IO_STATE(R_GEN_CONFIG
, dma6
, serial0
)) {
1214 genconfig_shadow
&= ~IO_MASK(R_GEN_CONFIG
, dma6
);
1215 genconfig_shadow
|= IO_STATE(R_GEN_CONFIG
, dma6
, unused
);
1217 } else if (info
->line
== 1) {
1218 if ((genconfig_shadow
& IO_MASK(R_GEN_CONFIG
, dma8
)) ==
1219 IO_STATE(R_GEN_CONFIG
, dma8
, serial1
)) {
1220 genconfig_shadow
&= ~IO_MASK(R_GEN_CONFIG
, dma8
);
1221 genconfig_shadow
|= IO_STATE(R_GEN_CONFIG
, dma8
, usb
);
1223 } else if (info
->line
== 2) {
1224 if ((genconfig_shadow
& IO_MASK(R_GEN_CONFIG
, dma2
)) ==
1225 IO_STATE(R_GEN_CONFIG
, dma2
, serial2
)) {
1226 genconfig_shadow
&= ~IO_MASK(R_GEN_CONFIG
, dma2
);
1227 genconfig_shadow
|= IO_STATE(R_GEN_CONFIG
, dma2
, par0
);
1229 } else if (info
->line
== 3) {
1230 if ((genconfig_shadow
& IO_MASK(R_GEN_CONFIG
, dma4
)) ==
1231 IO_STATE(R_GEN_CONFIG
, dma4
, serial3
)) {
1232 genconfig_shadow
&= ~IO_MASK(R_GEN_CONFIG
, dma4
);
1233 genconfig_shadow
|= IO_STATE(R_GEN_CONFIG
, dma4
, par1
);
1236 *R_GEN_CONFIG
= genconfig_shadow
;
1237 local_irq_restore(flags
);
1241 static void e100_enable_txdma_channel(struct e100_serial
*info
)
1243 unsigned long flags
;
1245 local_irq_save(flags
);
1246 DFLOW(DEBUG_LOG(info
->line
, "enable_txdma_channel %i\n", info
->line
));
1247 /* Enable output DMA channel for the serial port in question */
1248 if (info
->line
== 0) {
1249 genconfig_shadow
&= ~IO_MASK(R_GEN_CONFIG
, dma6
);
1250 genconfig_shadow
|= IO_STATE(R_GEN_CONFIG
, dma6
, serial0
);
1251 } else if (info
->line
== 1) {
1252 genconfig_shadow
&= ~IO_MASK(R_GEN_CONFIG
, dma8
);
1253 genconfig_shadow
|= IO_STATE(R_GEN_CONFIG
, dma8
, serial1
);
1254 } else if (info
->line
== 2) {
1255 genconfig_shadow
&= ~IO_MASK(R_GEN_CONFIG
, dma2
);
1256 genconfig_shadow
|= IO_STATE(R_GEN_CONFIG
, dma2
, serial2
);
1257 } else if (info
->line
== 3) {
1258 genconfig_shadow
&= ~IO_MASK(R_GEN_CONFIG
, dma4
);
1259 genconfig_shadow
|= IO_STATE(R_GEN_CONFIG
, dma4
, serial3
);
1261 *R_GEN_CONFIG
= genconfig_shadow
;
1262 local_irq_restore(flags
);
1265 static void e100_disable_rxdma_channel(struct e100_serial
*info
)
1267 unsigned long flags
;
1269 /* Disable input DMA channel for the serial port in question
1270 * ( set to something other then serialX)
1272 local_irq_save(flags
);
1273 if (info
->line
== 0) {
1274 if ((genconfig_shadow
& IO_MASK(R_GEN_CONFIG
, dma7
)) ==
1275 IO_STATE(R_GEN_CONFIG
, dma7
, serial0
)) {
1276 genconfig_shadow
&= ~IO_MASK(R_GEN_CONFIG
, dma7
);
1277 genconfig_shadow
|= IO_STATE(R_GEN_CONFIG
, dma7
, unused
);
1279 } else if (info
->line
== 1) {
1280 if ((genconfig_shadow
& IO_MASK(R_GEN_CONFIG
, dma9
)) ==
1281 IO_STATE(R_GEN_CONFIG
, dma9
, serial1
)) {
1282 genconfig_shadow
&= ~IO_MASK(R_GEN_CONFIG
, dma9
);
1283 genconfig_shadow
|= IO_STATE(R_GEN_CONFIG
, dma9
, usb
);
1285 } else if (info
->line
== 2) {
1286 if ((genconfig_shadow
& IO_MASK(R_GEN_CONFIG
, dma3
)) ==
1287 IO_STATE(R_GEN_CONFIG
, dma3
, serial2
)) {
1288 genconfig_shadow
&= ~IO_MASK(R_GEN_CONFIG
, dma3
);
1289 genconfig_shadow
|= IO_STATE(R_GEN_CONFIG
, dma3
, par0
);
1291 } else if (info
->line
== 3) {
1292 if ((genconfig_shadow
& IO_MASK(R_GEN_CONFIG
, dma5
)) ==
1293 IO_STATE(R_GEN_CONFIG
, dma5
, serial3
)) {
1294 genconfig_shadow
&= ~IO_MASK(R_GEN_CONFIG
, dma5
);
1295 genconfig_shadow
|= IO_STATE(R_GEN_CONFIG
, dma5
, par1
);
1298 *R_GEN_CONFIG
= genconfig_shadow
;
1299 local_irq_restore(flags
);
1303 static void e100_enable_rxdma_channel(struct e100_serial
*info
)
1305 unsigned long flags
;
1307 local_irq_save(flags
);
1308 /* Enable input DMA channel for the serial port in question */
1309 if (info
->line
== 0) {
1310 genconfig_shadow
&= ~IO_MASK(R_GEN_CONFIG
, dma7
);
1311 genconfig_shadow
|= IO_STATE(R_GEN_CONFIG
, dma7
, serial0
);
1312 } else if (info
->line
== 1) {
1313 genconfig_shadow
&= ~IO_MASK(R_GEN_CONFIG
, dma9
);
1314 genconfig_shadow
|= IO_STATE(R_GEN_CONFIG
, dma9
, serial1
);
1315 } else if (info
->line
== 2) {
1316 genconfig_shadow
&= ~IO_MASK(R_GEN_CONFIG
, dma3
);
1317 genconfig_shadow
|= IO_STATE(R_GEN_CONFIG
, dma3
, serial2
);
1318 } else if (info
->line
== 3) {
1319 genconfig_shadow
&= ~IO_MASK(R_GEN_CONFIG
, dma5
);
1320 genconfig_shadow
|= IO_STATE(R_GEN_CONFIG
, dma5
, serial3
);
1322 *R_GEN_CONFIG
= genconfig_shadow
;
1323 local_irq_restore(flags
);
1326 #ifdef SERIAL_HANDLE_EARLY_ERRORS
1327 /* in order to detect and fix errors on the first byte
1328 we have to use the serial interrupts as well. */
1331 e100_disable_serial_data_irq(struct e100_serial
*info
)
1333 #ifdef SERIAL_DEBUG_INTR
1334 printk("ser_irq(%d): 0\n",info
->line
);
1336 DINTR1(DEBUG_LOG(info
->line
,"IRQ disable data_irq %i\n", info
->line
));
1337 *R_IRQ_MASK1_CLR
= (1U << (8+2*info
->line
));
1341 e100_enable_serial_data_irq(struct e100_serial
*info
)
1343 #ifdef SERIAL_DEBUG_INTR
1344 printk("ser_irq(%d): 1\n",info
->line
);
1345 printk("**** %d = %d\n",
1347 (1U << (8+2*info
->line
)));
1349 DINTR1(DEBUG_LOG(info
->line
,"IRQ enable data_irq %i\n", info
->line
));
1350 *R_IRQ_MASK1_SET
= (1U << (8+2*info
->line
));
1355 e100_disable_serial_tx_ready_irq(struct e100_serial
*info
)
1357 #ifdef SERIAL_DEBUG_INTR
1358 printk("ser_tx_irq(%d): 0\n",info
->line
);
1360 DINTR1(DEBUG_LOG(info
->line
,"IRQ disable ready_irq %i\n", info
->line
));
1361 *R_IRQ_MASK1_CLR
= (1U << (8+1+2*info
->line
));
1365 e100_enable_serial_tx_ready_irq(struct e100_serial
*info
)
1367 #ifdef SERIAL_DEBUG_INTR
1368 printk("ser_tx_irq(%d): 1\n",info
->line
);
1369 printk("**** %d = %d\n",
1371 (1U << (8+1+2*info
->line
)));
1373 DINTR2(DEBUG_LOG(info
->line
,"IRQ enable ready_irq %i\n", info
->line
));
1374 *R_IRQ_MASK1_SET
= (1U << (8+1+2*info
->line
));
1377 static inline void e100_enable_rx_irq(struct e100_serial
*info
)
1379 if (info
->uses_dma_in
)
1380 e100_enable_rxdma_irq(info
);
1382 e100_enable_serial_data_irq(info
);
1384 static inline void e100_disable_rx_irq(struct e100_serial
*info
)
1386 if (info
->uses_dma_in
)
1387 e100_disable_rxdma_irq(info
);
1389 e100_disable_serial_data_irq(info
);
1392 #if defined(CONFIG_ETRAX_RS485)
1393 /* Enable RS-485 mode on selected port. This is UGLY. */
1395 e100_enable_rs485(struct tty_struct
*tty
,struct rs485_control
*r
)
1397 struct e100_serial
* info
= (struct e100_serial
*)tty
->driver_data
;
1399 #if defined(CONFIG_ETRAX_RS485_ON_PA)
1400 *R_PORT_PA_DATA
= port_pa_data_shadow
|= (1 << rs485_pa_bit
);
1402 #if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
1403 REG_SHADOW_SET(R_PORT_G_DATA
, port_g_data_shadow
,
1404 rs485_port_g_bit
, 1);
1406 #if defined(CONFIG_ETRAX_RS485_LTC1387)
1407 REG_SHADOW_SET(R_PORT_G_DATA
, port_g_data_shadow
,
1408 CONFIG_ETRAX_RS485_LTC1387_DXEN_PORT_G_BIT
, 1);
1409 REG_SHADOW_SET(R_PORT_G_DATA
, port_g_data_shadow
,
1410 CONFIG_ETRAX_RS485_LTC1387_RXEN_PORT_G_BIT
, 1);
1413 info
->rs485
.rts_on_send
= 0x01 & r
->rts_on_send
;
1414 info
->rs485
.rts_after_sent
= 0x01 & r
->rts_after_sent
;
1415 if (r
->delay_rts_before_send
>= 1000)
1416 info
->rs485
.delay_rts_before_send
= 1000;
1418 info
->rs485
.delay_rts_before_send
= r
->delay_rts_before_send
;
1419 info
->rs485
.enabled
= r
->enabled
;
1420 /* printk("rts: on send = %i, after = %i, enabled = %i",
1421 info->rs485.rts_on_send,
1422 info->rs485.rts_after_sent,
1430 e100_write_rs485(struct tty_struct
*tty
,
1431 const unsigned char *buf
, int count
)
1433 struct e100_serial
* info
= (struct e100_serial
*)tty
->driver_data
;
1434 int old_enabled
= info
->rs485
.enabled
;
1436 /* rs485 is always implicitly enabled if we're using the ioctl()
1437 * but it doesn't have to be set in the rs485_control
1438 * (to be backward compatible with old apps)
1439 * So we store, set and restore it.
1441 info
->rs485
.enabled
= 1;
1442 /* rs_write now deals with RS485 if enabled */
1443 count
= rs_write(tty
, buf
, count
);
1444 info
->rs485
.enabled
= old_enabled
;
1448 #ifdef CONFIG_ETRAX_FAST_TIMER
1449 /* Timer function to toggle RTS when using FAST_TIMER */
1450 static void rs485_toggle_rts_timer_function(unsigned long data
)
1452 struct e100_serial
*info
= (struct e100_serial
*)data
;
1454 fast_timers_rs485
[info
->line
].function
= NULL
;
1455 e100_rts(info
, info
->rs485
.rts_after_sent
);
1456 #if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER)
1457 e100_enable_rx(info
);
1458 e100_enable_rx_irq(info
);
1462 #endif /* CONFIG_ETRAX_RS485 */
1465 * ------------------------------------------------------------
1466 * rs_stop() and rs_start()
1468 * This routines are called before setting or resetting tty->stopped.
1469 * They enable or disable transmitter using the XOFF registers, as necessary.
1470 * ------------------------------------------------------------
1474 rs_stop(struct tty_struct
*tty
)
1476 struct e100_serial
*info
= (struct e100_serial
*)tty
->driver_data
;
1478 unsigned long flags
;
1481 local_irq_save(flags
);
1482 DFLOW(DEBUG_LOG(info
->line
, "XOFF rs_stop xmit %i\n",
1483 CIRC_CNT(info
->xmit
.head
,
1484 info
->xmit
.tail
,SERIAL_XMIT_SIZE
)));
1486 xoff
= IO_FIELD(R_SERIAL0_XOFF
, xoff_char
,
1487 STOP_CHAR(info
->port
.tty
));
1488 xoff
|= IO_STATE(R_SERIAL0_XOFF
, tx_stop
, stop
);
1489 if (tty
->termios
->c_iflag
& IXON
) {
1490 xoff
|= IO_STATE(R_SERIAL0_XOFF
, auto_xoff
, enable
);
1493 *((unsigned long *)&info
->port
[REG_XOFF
]) = xoff
;
1494 local_irq_restore(flags
);
1499 rs_start(struct tty_struct
*tty
)
1501 struct e100_serial
*info
= (struct e100_serial
*)tty
->driver_data
;
1503 unsigned long flags
;
1506 local_irq_save(flags
);
1507 DFLOW(DEBUG_LOG(info
->line
, "XOFF rs_start xmit %i\n",
1508 CIRC_CNT(info
->xmit
.head
,
1509 info
->xmit
.tail
,SERIAL_XMIT_SIZE
)));
1510 xoff
= IO_FIELD(R_SERIAL0_XOFF
, xoff_char
, STOP_CHAR(tty
));
1511 xoff
|= IO_STATE(R_SERIAL0_XOFF
, tx_stop
, enable
);
1512 if (tty
->termios
->c_iflag
& IXON
) {
1513 xoff
|= IO_STATE(R_SERIAL0_XOFF
, auto_xoff
, enable
);
1516 *((unsigned long *)&info
->port
[REG_XOFF
]) = xoff
;
1517 if (!info
->uses_dma_out
&&
1518 info
->xmit
.head
!= info
->xmit
.tail
&& info
->xmit
.buf
)
1519 e100_enable_serial_tx_ready_irq(info
);
1521 local_irq_restore(flags
);
1526 * ----------------------------------------------------------------------
1528 * Here starts the interrupt handling routines. All of the following
1529 * subroutines are declared as inline and are folded into
1530 * rs_interrupt(). They were separated out for readability's sake.
1532 * Note: rs_interrupt() is a "fast" interrupt, which means that it
1533 * runs with interrupts turned off. People who may want to modify
1534 * rs_interrupt() should try to keep the interrupt handler as fast as
1535 * possible. After you are done making modifications, it is not a bad
1538 * gcc -S -DKERNEL -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer serial.c
1540 * and look at the resulting assemble code in serial.s.
1542 * - Ted Ts'o (tytso@mit.edu), 7-Mar-93
1543 * -----------------------------------------------------------------------
1547 * This routine is used by the interrupt handler to schedule
1548 * processing in the software interrupt portion of the driver.
1550 static void rs_sched_event(struct e100_serial
*info
, int event
)
1552 if (info
->event
& (1 << event
))
1554 info
->event
|= 1 << event
;
1555 schedule_work(&info
->work
);
1558 /* The output DMA channel is free - use it to send as many chars as possible
1560 * We don't pay attention to info->x_char, which means if the TTY wants to
1561 * use XON/XOFF it will set info->x_char but we won't send any X char!
1563 * To implement this, we'd just start a DMA send of 1 byte pointing at a
1564 * buffer containing the X char, and skip updating xmit. We'd also have to
1565 * check if the last sent char was the X char when we enter this function
1566 * the next time, to avoid updating xmit with the sent X value.
1570 transmit_chars_dma(struct e100_serial
*info
)
1572 unsigned int c
, sentl
;
1573 struct etrax_dma_descr
*descr
;
1575 #ifdef CONFIG_SVINTO_SIM
1576 /* This will output too little if tail is not 0 always since
1577 * we don't reloop to send the other part. Anyway this SHOULD be a
1578 * no-op - transmit_chars_dma would never really be called during sim
1579 * since rs_write does not write into the xmit buffer then.
1581 if (info
->xmit
.tail
)
1582 printk("Error in serial.c:transmit_chars-dma(), tail!=0\n");
1583 if (info
->xmit
.head
!= info
->xmit
.tail
) {
1584 SIMCOUT(info
->xmit
.buf
+ info
->xmit
.tail
,
1585 CIRC_CNT(info
->xmit
.head
,
1588 info
->xmit
.head
= info
->xmit
.tail
; /* move back head */
1589 info
->tr_running
= 0;
1593 /* acknowledge both dma_descr and dma_eop irq in R_DMA_CHx_CLR_INTR */
1594 *info
->oclrintradr
=
1595 IO_STATE(R_DMA_CH6_CLR_INTR
, clr_descr
, do) |
1596 IO_STATE(R_DMA_CH6_CLR_INTR
, clr_eop
, do);
1598 #ifdef SERIAL_DEBUG_INTR
1599 if (info
->line
== SERIAL_DEBUG_LINE
)
1602 if (!info
->tr_running
) {
1603 /* weirdo... we shouldn't get here! */
1604 printk(KERN_WARNING
"Achtung: transmit_chars_dma with !tr_running\n");
1608 descr
= &info
->tr_descr
;
1610 /* first get the amount of bytes sent during the last DMA transfer,
1611 and update xmit accordingly */
1613 /* if the stop bit was not set, all data has been sent */
1614 if (!(descr
->status
& d_stop
)) {
1615 sentl
= descr
->sw_len
;
1617 /* otherwise we find the amount of data sent here */
1618 sentl
= descr
->hw_len
;
1620 DFLOW(DEBUG_LOG(info
->line
, "TX %i done\n", sentl
));
1623 info
->icount
.tx
+= sentl
;
1625 /* update xmit buffer */
1626 info
->xmit
.tail
= (info
->xmit
.tail
+ sentl
) & (SERIAL_XMIT_SIZE
- 1);
1628 /* if there is only a few chars left in the buf, wake up the blocked
1630 if (CIRC_CNT(info
->xmit
.head
,
1632 SERIAL_XMIT_SIZE
) < WAKEUP_CHARS
)
1633 rs_sched_event(info
, RS_EVENT_WRITE_WAKEUP
);
1635 /* find out the largest amount of consecutive bytes we want to send now */
1637 c
= CIRC_CNT_TO_END(info
->xmit
.head
, info
->xmit
.tail
, SERIAL_XMIT_SIZE
);
1639 /* Don't send all in one DMA transfer - divide it so we wake up
1640 * application before all is sent
1643 if (c
>= 4*WAKEUP_CHARS
)
1647 /* our job here is done, don't schedule any new DMA transfer */
1648 info
->tr_running
= 0;
1650 #if defined(CONFIG_ETRAX_RS485) && defined(CONFIG_ETRAX_FAST_TIMER)
1651 if (info
->rs485
.enabled
) {
1652 /* Set a short timer to toggle RTS */
1653 start_one_shot_timer(&fast_timers_rs485
[info
->line
],
1654 rs485_toggle_rts_timer_function
,
1655 (unsigned long)info
,
1656 info
->char_time_usec
*2,
1663 /* ok we can schedule a dma send of c chars starting at info->xmit.tail */
1664 /* set up the descriptor correctly for output */
1665 DFLOW(DEBUG_LOG(info
->line
, "TX %i\n", c
));
1666 descr
->ctrl
= d_int
| d_eol
| d_wait
; /* Wait needed for tty_wait_until_sent() */
1668 descr
->buf
= virt_to_phys(info
->xmit
.buf
+ info
->xmit
.tail
);
1671 *info
->ofirstadr
= virt_to_phys(descr
); /* write to R_DMAx_FIRST */
1672 *info
->ocmdadr
= IO_STATE(R_DMA_CH6_CMD
, cmd
, start
);
1674 /* DMA is now running (hopefully) */
1675 } /* transmit_chars_dma */
1678 start_transmit(struct e100_serial
*info
)
1681 if (info
->line
== SERIAL_DEBUG_LINE
)
1685 info
->tr_descr
.sw_len
= 0;
1686 info
->tr_descr
.hw_len
= 0;
1687 info
->tr_descr
.status
= 0;
1688 info
->tr_running
= 1;
1689 if (info
->uses_dma_out
)
1690 transmit_chars_dma(info
);
1692 e100_enable_serial_tx_ready_irq(info
);
1693 } /* start_transmit */
1695 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
1696 static int serial_fast_timer_started
= 0;
1697 static int serial_fast_timer_expired
= 0;
1698 static void flush_timeout_function(unsigned long data
);
1699 #define START_FLUSH_FAST_TIMER_TIME(info, string, usec) {\
1700 unsigned long timer_flags; \
1701 local_irq_save(timer_flags); \
1702 if (fast_timers[info->line].function == NULL) { \
1703 serial_fast_timer_started++; \
1704 TIMERD(DEBUG_LOG(info->line, "start_timer %i ", info->line)); \
1705 TIMERD(DEBUG_LOG(info->line, "num started: %i\n", serial_fast_timer_started)); \
1706 start_one_shot_timer(&fast_timers[info->line], \
1707 flush_timeout_function, \
1708 (unsigned long)info, \
1713 TIMERD(DEBUG_LOG(info->line, "timer %i already running\n", info->line)); \
1715 local_irq_restore(timer_flags); \
1717 #define START_FLUSH_FAST_TIMER(info, string) START_FLUSH_FAST_TIMER_TIME(info, string, info->flush_time_usec)
1720 #define START_FLUSH_FAST_TIMER_TIME(info, string, usec)
1721 #define START_FLUSH_FAST_TIMER(info, string)
1724 static struct etrax_recv_buffer
*
1725 alloc_recv_buffer(unsigned int size
)
1727 struct etrax_recv_buffer
*buffer
;
1729 if (!(buffer
= kmalloc(sizeof *buffer
+ size
, GFP_ATOMIC
)))
1732 buffer
->next
= NULL
;
1734 buffer
->error
= TTY_NORMAL
;
1740 append_recv_buffer(struct e100_serial
*info
, struct etrax_recv_buffer
*buffer
)
1742 unsigned long flags
;
1744 local_irq_save(flags
);
1746 if (!info
->first_recv_buffer
)
1747 info
->first_recv_buffer
= buffer
;
1749 info
->last_recv_buffer
->next
= buffer
;
1751 info
->last_recv_buffer
= buffer
;
1753 info
->recv_cnt
+= buffer
->length
;
1754 if (info
->recv_cnt
> info
->max_recv_cnt
)
1755 info
->max_recv_cnt
= info
->recv_cnt
;
1757 local_irq_restore(flags
);
1761 add_char_and_flag(struct e100_serial
*info
, unsigned char data
, unsigned char flag
)
1763 struct etrax_recv_buffer
*buffer
;
1764 if (info
->uses_dma_in
) {
1765 if (!(buffer
= alloc_recv_buffer(4)))
1769 buffer
->error
= flag
;
1770 buffer
->buffer
[0] = data
;
1772 append_recv_buffer(info
, buffer
);
1776 struct tty_struct
*tty
= info
->port
.tty
;
1777 tty_insert_flip_char(tty
, data
, flag
);
1784 static unsigned int handle_descr_data(struct e100_serial
*info
,
1785 struct etrax_dma_descr
*descr
,
1788 struct etrax_recv_buffer
*buffer
= phys_to_virt(descr
->buf
) - sizeof *buffer
;
1790 if (info
->recv_cnt
+ recvl
> 65536) {
1792 "%s: Too much pending incoming serial data! Dropping %u bytes.\n", __func__
, recvl
);
1796 buffer
->length
= recvl
;
1798 if (info
->errorcode
== ERRCODE_SET_BREAK
)
1799 buffer
->error
= TTY_BREAK
;
1800 info
->errorcode
= 0;
1802 append_recv_buffer(info
, buffer
);
1804 if (!(buffer
= alloc_recv_buffer(SERIAL_DESCR_BUF_SIZE
)))
1805 panic("%s: Failed to allocate memory for receive buffer!\n", __func__
);
1807 descr
->buf
= virt_to_phys(buffer
->buffer
);
1812 static unsigned int handle_all_descr_data(struct e100_serial
*info
)
1814 struct etrax_dma_descr
*descr
;
1816 unsigned int ret
= 0;
1820 descr
= &info
->rec_descr
[info
->cur_rec_descr
];
1822 if (descr
== phys_to_virt(*info
->idescradr
))
1825 if (++info
->cur_rec_descr
== SERIAL_RECV_DESCRIPTORS
)
1826 info
->cur_rec_descr
= 0;
1828 /* find out how many bytes were read */
1830 /* if the eop bit was not set, all data has been received */
1831 if (!(descr
->status
& d_eop
)) {
1832 recvl
= descr
->sw_len
;
1834 /* otherwise we find the amount of data received here */
1835 recvl
= descr
->hw_len
;
1838 /* Reset the status information */
1841 DFLOW( DEBUG_LOG(info
->line
, "RX %lu\n", recvl
);
1842 if (info
->port
.tty
->stopped
) {
1843 unsigned char *buf
= phys_to_virt(descr
->buf
);
1844 DEBUG_LOG(info
->line
, "rx 0x%02X\n", buf
[0]);
1845 DEBUG_LOG(info
->line
, "rx 0x%02X\n", buf
[1]);
1846 DEBUG_LOG(info
->line
, "rx 0x%02X\n", buf
[2]);
1851 info
->icount
.rx
+= recvl
;
1853 ret
+= handle_descr_data(info
, descr
, recvl
);
1859 static void receive_chars_dma(struct e100_serial
*info
)
1861 struct tty_struct
*tty
;
1862 unsigned char rstat
;
1864 #ifdef CONFIG_SVINTO_SIM
1865 /* No receive in the simulator. Will probably be when the rest of
1866 * the serial interface works, and this piece will just be removed.
1871 /* Acknowledge both dma_descr and dma_eop irq in R_DMA_CHx_CLR_INTR */
1872 *info
->iclrintradr
=
1873 IO_STATE(R_DMA_CH6_CLR_INTR
, clr_descr
, do) |
1874 IO_STATE(R_DMA_CH6_CLR_INTR
, clr_eop
, do);
1876 tty
= info
->port
.tty
;
1877 if (!tty
) /* Something wrong... */
1880 #ifdef SERIAL_HANDLE_EARLY_ERRORS
1881 if (info
->uses_dma_in
)
1882 e100_enable_serial_data_irq(info
);
1885 if (info
->errorcode
== ERRCODE_INSERT_BREAK
)
1886 add_char_and_flag(info
, '\0', TTY_BREAK
);
1888 handle_all_descr_data(info
);
1890 /* Read the status register to detect errors */
1891 rstat
= info
->port
[REG_STATUS
];
1892 if (rstat
& IO_MASK(R_SERIAL0_STATUS
, xoff_detect
) ) {
1893 DFLOW(DEBUG_LOG(info
->line
, "XOFF detect stat %x\n", rstat
));
1896 if (rstat
& SER_ERROR_MASK
) {
1897 /* If we got an error, we must reset it by reading the
1900 unsigned char data
= info
->port
[REG_DATA
];
1902 PROCSTAT(ser_stat
[info
->line
].errors_cnt
++);
1903 DEBUG_LOG(info
->line
, "#dERR: s d 0x%04X\n",
1904 ((rstat
& SER_ERROR_MASK
) << 8) | data
);
1906 if (rstat
& SER_PAR_ERR_MASK
)
1907 add_char_and_flag(info
, data
, TTY_PARITY
);
1908 else if (rstat
& SER_OVERRUN_MASK
)
1909 add_char_and_flag(info
, data
, TTY_OVERRUN
);
1910 else if (rstat
& SER_FRAMING_ERR_MASK
)
1911 add_char_and_flag(info
, data
, TTY_FRAME
);
1914 START_FLUSH_FAST_TIMER(info
, "receive_chars");
1916 /* Restart the receiving DMA */
1917 *info
->icmdadr
= IO_STATE(R_DMA_CH6_CMD
, cmd
, restart
);
1920 static int start_recv_dma(struct e100_serial
*info
)
1922 struct etrax_dma_descr
*descr
= info
->rec_descr
;
1923 struct etrax_recv_buffer
*buffer
;
1926 /* Set up the receiving descriptors */
1927 for (i
= 0; i
< SERIAL_RECV_DESCRIPTORS
; i
++) {
1928 if (!(buffer
= alloc_recv_buffer(SERIAL_DESCR_BUF_SIZE
)))
1929 panic("%s: Failed to allocate memory for receive buffer!\n", __func__
);
1931 descr
[i
].ctrl
= d_int
;
1932 descr
[i
].buf
= virt_to_phys(buffer
->buffer
);
1933 descr
[i
].sw_len
= SERIAL_DESCR_BUF_SIZE
;
1934 descr
[i
].hw_len
= 0;
1935 descr
[i
].status
= 0;
1936 descr
[i
].next
= virt_to_phys(&descr
[i
+1]);
1939 /* Link the last descriptor to the first */
1940 descr
[i
-1].next
= virt_to_phys(&descr
[0]);
1942 /* Start with the first descriptor in the list */
1943 info
->cur_rec_descr
= 0;
1946 *info
->ifirstadr
= virt_to_phys(&descr
[info
->cur_rec_descr
]);
1947 *info
->icmdadr
= IO_STATE(R_DMA_CH6_CMD
, cmd
, start
);
1949 /* Input DMA should be running now */
1954 start_receive(struct e100_serial
*info
)
1956 #ifdef CONFIG_SVINTO_SIM
1957 /* No receive in the simulator. Will probably be when the rest of
1958 * the serial interface works, and this piece will just be removed.
1962 if (info
->uses_dma_in
) {
1963 /* reset the input dma channel to be sure it works */
1965 *info
->icmdadr
= IO_STATE(R_DMA_CH6_CMD
, cmd
, reset
);
1966 while (IO_EXTRACT(R_DMA_CH6_CMD
, cmd
, *info
->icmdadr
) ==
1967 IO_STATE_VALUE(R_DMA_CH6_CMD
, cmd
, reset
));
1969 start_recv_dma(info
);
1974 /* the bits in the MASK2 register are laid out like this:
1975 DMAI_EOP DMAI_DESCR DMAO_EOP DMAO_DESCR
1976 where I is the input channel and O is the output channel for the port.
1977 info->irq is the bit number for the DMAO_DESCR so to check the others we
1978 shift info->irq to the left.
1981 /* dma output channel interrupt handler
1982 this interrupt is called from DMA2(ser2), DMA4(ser3), DMA6(ser0) or
1983 DMA8(ser1) when they have finished a descriptor with the intr flag set.
1987 tr_interrupt(int irq
, void *dev_id
)
1989 struct e100_serial
*info
;
1994 #ifdef CONFIG_SVINTO_SIM
1995 /* No receive in the simulator. Will probably be when the rest of
1996 * the serial interface works, and this piece will just be removed.
1999 const char *s
= "What? tr_interrupt in simulator??\n";
2000 SIMCOUT(s
,strlen(s
));
2005 /* find out the line that caused this irq and get it from rs_table */
2007 ireg
= *R_IRQ_MASK2_RD
; /* get the active irq bits for the dma channels */
2009 for (i
= 0; i
< NR_PORTS
; i
++) {
2010 info
= rs_table
+ i
;
2011 if (!info
->enabled
|| !info
->uses_dma_out
)
2013 /* check for dma_descr (don't need to check for dma_eop in output dma for serial */
2014 if (ireg
& info
->irq
) {
2016 /* we can send a new dma bunch. make it so. */
2017 DINTR2(DEBUG_LOG(info
->line
, "tr_interrupt %i\n", i
));
2018 /* Read jiffies_usec first,
2019 * we want this time to be as late as possible
2021 PROCSTAT(ser_stat
[info
->line
].tx_dma_ints
++);
2022 info
->last_tx_active_usec
= GET_JIFFIES_USEC();
2023 info
->last_tx_active
= jiffies
;
2024 transmit_chars_dma(info
);
2027 /* FIXME: here we should really check for a change in the
2028 status lines and if so call status_handle(info) */
2030 return IRQ_RETVAL(handled
);
2031 } /* tr_interrupt */
2033 /* dma input channel interrupt handler */
2036 rec_interrupt(int irq
, void *dev_id
)
2038 struct e100_serial
*info
;
2043 #ifdef CONFIG_SVINTO_SIM
2044 /* No receive in the simulator. Will probably be when the rest of
2045 * the serial interface works, and this piece will just be removed.
2048 const char *s
= "What? rec_interrupt in simulator??\n";
2049 SIMCOUT(s
,strlen(s
));
2054 /* find out the line that caused this irq and get it from rs_table */
2056 ireg
= *R_IRQ_MASK2_RD
; /* get the active irq bits for the dma channels */
2058 for (i
= 0; i
< NR_PORTS
; i
++) {
2059 info
= rs_table
+ i
;
2060 if (!info
->enabled
|| !info
->uses_dma_in
)
2062 /* check for both dma_eop and dma_descr for the input dma channel */
2063 if (ireg
& ((info
->irq
<< 2) | (info
->irq
<< 3))) {
2065 /* we have received something */
2066 receive_chars_dma(info
);
2069 /* FIXME: here we should really check for a change in the
2070 status lines and if so call status_handle(info) */
2072 return IRQ_RETVAL(handled
);
2073 } /* rec_interrupt */
2075 static int force_eop_if_needed(struct e100_serial
*info
)
2077 /* We check data_avail bit to determine if data has
2078 * arrived since last time
2080 unsigned char rstat
= info
->port
[REG_STATUS
];
2082 /* error or datavail? */
2083 if (rstat
& SER_ERROR_MASK
) {
2084 /* Some error has occurred. If there has been valid data, an
2085 * EOP interrupt will be made automatically. If no data, the
2086 * normal ser_interrupt should be enabled and handle it.
2089 DEBUG_LOG(info
->line
, "timeout err: rstat 0x%03X\n",
2090 rstat
| (info
->line
<< 8));
2094 if (rstat
& SER_DATA_AVAIL_MASK
) {
2095 /* Ok data, no error, count it */
2096 TIMERD(DEBUG_LOG(info
->line
, "timeout: rstat 0x%03X\n",
2097 rstat
| (info
->line
<< 8)));
2098 /* Read data to clear status flags */
2099 (void)info
->port
[REG_DATA
];
2101 info
->forced_eop
= 0;
2102 START_FLUSH_FAST_TIMER(info
, "magic");
2106 /* hit the timeout, force an EOP for the input
2107 * dma channel if we haven't already
2109 if (!info
->forced_eop
) {
2110 info
->forced_eop
= 1;
2111 PROCSTAT(ser_stat
[info
->line
].timeout_flush_cnt
++);
2112 TIMERD(DEBUG_LOG(info
->line
, "timeout EOP %i\n", info
->line
));
2119 static void flush_to_flip_buffer(struct e100_serial
*info
)
2121 struct tty_struct
*tty
;
2122 struct etrax_recv_buffer
*buffer
;
2123 unsigned long flags
;
2125 local_irq_save(flags
);
2126 tty
= info
->port
.tty
;
2129 local_irq_restore(flags
);
2133 while ((buffer
= info
->first_recv_buffer
) != NULL
) {
2134 unsigned int count
= buffer
->length
;
2136 tty_insert_flip_string(tty
, buffer
->buffer
, count
);
2137 info
->recv_cnt
-= count
;
2139 if (count
== buffer
->length
) {
2140 info
->first_recv_buffer
= buffer
->next
;
2143 buffer
->length
-= count
;
2144 memmove(buffer
->buffer
, buffer
->buffer
+ count
, buffer
->length
);
2145 buffer
->error
= TTY_NORMAL
;
2149 if (!info
->first_recv_buffer
)
2150 info
->last_recv_buffer
= NULL
;
2152 local_irq_restore(flags
);
2154 /* This includes a check for low-latency */
2155 tty_flip_buffer_push(tty
);
2158 static void check_flush_timeout(struct e100_serial
*info
)
2160 /* Flip what we've got (if we can) */
2161 flush_to_flip_buffer(info
);
2163 /* We might need to flip later, but not to fast
2164 * since the system is busy processing input... */
2165 if (info
->first_recv_buffer
)
2166 START_FLUSH_FAST_TIMER_TIME(info
, "flip", 2000);
2168 /* Force eop last, since data might have come while we're processing
2169 * and if we started the slow timer above, we won't start a fast
2172 force_eop_if_needed(info
);
2175 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
2176 static void flush_timeout_function(unsigned long data
)
2178 struct e100_serial
*info
= (struct e100_serial
*)data
;
2180 fast_timers
[info
->line
].function
= NULL
;
2181 serial_fast_timer_expired
++;
2182 TIMERD(DEBUG_LOG(info
->line
, "flush_timout %i ", info
->line
));
2183 TIMERD(DEBUG_LOG(info
->line
, "num expired: %i\n", serial_fast_timer_expired
));
2184 check_flush_timeout(info
);
2189 /* dma fifo/buffer timeout handler
2190 forces an end-of-packet for the dma input channel if no chars
2191 have been received for CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS/100 s.
2194 static struct timer_list flush_timer
;
2197 timed_flush_handler(unsigned long ptr
)
2199 struct e100_serial
*info
;
2202 #ifdef CONFIG_SVINTO_SIM
2206 for (i
= 0; i
< NR_PORTS
; i
++) {
2207 info
= rs_table
+ i
;
2208 if (info
->uses_dma_in
)
2209 check_flush_timeout(info
);
2212 /* restart flush timer */
2213 mod_timer(&flush_timer
, jiffies
+ CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS
);
2217 #ifdef SERIAL_HANDLE_EARLY_ERRORS
2219 /* If there is an error (ie break) when the DMA is running and
2220 * there are no bytes in the fifo the DMA is stopped and we get no
2221 * eop interrupt. Thus we have to monitor the first bytes on a DMA
2222 * transfer, and if it is without error we can turn the serial
2227 BREAK handling on ETRAX 100:
2228 ETRAX will generate interrupt although there is no stop bit between the
2231 Depending on how long the break sequence is, the end of the breaksequence
2232 will look differently:
2233 | indicates start/end of a character.
2235 B= Break character (0x00) with framing error.
2236 E= Error byte with parity error received after B characters.
2237 F= "Faked" valid byte received immediately after B characters.
2241 B BL ___________________________ V
2242 .._|__________|__________| |valid data |
2244 Multiple frame errors with data == 0x00 (B),
2245 the timing matches up "perfectly" so no extra ending char is detected.
2246 The RXD pin is 1 in the last interrupt, in that case
2247 we set info->errorcode = ERRCODE_INSERT_BREAK, but we can't really
2248 know if another byte will come and this really is case 2. below
2249 (e.g F=0xFF or 0xFE)
2250 If RXD pin is 0 we can expect another character (see 2. below).
2255 B B E or F__________________..__ V
2256 .._|__________|__________|______ | |valid data
2260 Multiple frame errors with data == 0x00 (B),
2261 but the part of the break trigs is interpreted as a start bit (and possibly
2262 some 0 bits followed by a number of 1 bits and a stop bit).
2263 Depending on parity settings etc. this last character can be either
2264 a fake "valid" char (F) or have a parity error (E).
2266 If the character is valid it will be put in the buffer,
2267 we set info->errorcode = ERRCODE_SET_BREAK so the receive interrupt
2268 will set the flags so the tty will handle it,
2269 if it's an error byte it will not be put in the buffer
2270 and we set info->errorcode = ERRCODE_INSERT_BREAK.
2272 To distinguish a V byte in 1. from an F byte in 2. we keep a timestamp
2273 of the last faulty char (B) and compares it with the current time:
2274 If the time elapsed time is less then 2*char_time_usec we will assume
2275 it's a faked F char and not a Valid char and set
2276 info->errorcode = ERRCODE_SET_BREAK.
2278 Flaws in the above solution:
2279 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
2280 We use the timer to distinguish a F character from a V character,
2281 if a V character is to close after the break we might make the wrong decision.
2283 TODO: The break will be delayed until an F or V character is received.
2288 struct e100_serial
* handle_ser_rx_interrupt_no_dma(struct e100_serial
*info
)
2290 unsigned long data_read
;
2291 struct tty_struct
*tty
= info
->port
.tty
;
2294 printk("!NO TTY!\n");
2298 /* Read data and status at the same time */
2299 data_read
= *((unsigned long *)&info
->port
[REG_DATA_STATUS32
]);
2301 if (data_read
& IO_MASK(R_SERIAL0_READ
, xoff_detect
) ) {
2302 DFLOW(DEBUG_LOG(info
->line
, "XOFF detect\n", 0));
2304 DINTR2(DEBUG_LOG(info
->line
, "ser_rx %c\n", IO_EXTRACT(R_SERIAL0_READ
, data_in
, data_read
)));
2306 if (data_read
& ( IO_MASK(R_SERIAL0_READ
, framing_err
) |
2307 IO_MASK(R_SERIAL0_READ
, par_err
) |
2308 IO_MASK(R_SERIAL0_READ
, overrun
) )) {
2310 info
->last_rx_active_usec
= GET_JIFFIES_USEC();
2311 info
->last_rx_active
= jiffies
;
2312 DINTR1(DEBUG_LOG(info
->line
, "ser_rx err stat_data %04X\n", data_read
));
2314 if (!log_int_trig1_pos
) {
2315 log_int_trig1_pos
= log_int_pos
;
2316 log_int(rdpc(), 0, 0);
2321 if ( ((data_read
& IO_MASK(R_SERIAL0_READ
, data_in
)) == 0) &&
2322 (data_read
& IO_MASK(R_SERIAL0_READ
, framing_err
)) ) {
2323 /* Most likely a break, but we get interrupts over and
2327 if (!info
->break_detected_cnt
) {
2328 DEBUG_LOG(info
->line
, "#BRK start\n", 0);
2330 if (data_read
& IO_MASK(R_SERIAL0_READ
, rxd
)) {
2331 /* The RX pin is high now, so the break
2332 * must be over, but....
2333 * we can't really know if we will get another
2334 * last byte ending the break or not.
2335 * And we don't know if the byte (if any) will
2336 * have an error or look valid.
2338 DEBUG_LOG(info
->line
, "# BL BRK\n", 0);
2339 info
->errorcode
= ERRCODE_INSERT_BREAK
;
2341 info
->break_detected_cnt
++;
2343 /* The error does not look like a break, but could be
2346 if (info
->break_detected_cnt
) {
2347 DEBUG_LOG(info
->line
, "EBRK %i\n", info
->break_detected_cnt
);
2348 info
->errorcode
= ERRCODE_INSERT_BREAK
;
2350 unsigned char data
= IO_EXTRACT(R_SERIAL0_READ
,
2351 data_in
, data_read
);
2352 char flag
= TTY_NORMAL
;
2353 if (info
->errorcode
== ERRCODE_INSERT_BREAK
) {
2354 struct tty_struct
*tty
= info
->port
.tty
;
2355 tty_insert_flip_char(tty
, 0, flag
);
2359 if (data_read
& IO_MASK(R_SERIAL0_READ
, par_err
)) {
2360 info
->icount
.parity
++;
2362 } else if (data_read
& IO_MASK(R_SERIAL0_READ
, overrun
)) {
2363 info
->icount
.overrun
++;
2365 } else if (data_read
& IO_MASK(R_SERIAL0_READ
, framing_err
)) {
2366 info
->icount
.frame
++;
2369 tty_insert_flip_char(tty
, data
, flag
);
2370 info
->errorcode
= 0;
2372 info
->break_detected_cnt
= 0;
2374 } else if (data_read
& IO_MASK(R_SERIAL0_READ
, data_avail
)) {
2377 if (!log_int_trig1_pos
) {
2378 if (log_int_pos
>= log_int_size
) {
2381 log_int_trig0_pos
= log_int_pos
;
2382 log_int(rdpc(), 0, 0);
2385 tty_insert_flip_char(tty
,
2386 IO_EXTRACT(R_SERIAL0_READ
, data_in
, data_read
),
2389 DEBUG_LOG(info
->line
, "ser_rx int but no data_avail %08lX\n", data_read
);
2394 data_read
= *((unsigned long *)&info
->port
[REG_DATA_STATUS32
]);
2395 if (data_read
& IO_MASK(R_SERIAL0_READ
, data_avail
)) {
2396 DEBUG_LOG(info
->line
, "ser_rx %c in loop\n", IO_EXTRACT(R_SERIAL0_READ
, data_in
, data_read
));
2400 tty_flip_buffer_push(info
->port
.tty
);
2404 static struct e100_serial
* handle_ser_rx_interrupt(struct e100_serial
*info
)
2406 unsigned char rstat
;
2408 #ifdef SERIAL_DEBUG_INTR
2409 printk("Interrupt from serport %d\n", i
);
2411 /* DEBUG_LOG(info->line, "ser_interrupt stat %03X\n", rstat | (i << 8)); */
2412 if (!info
->uses_dma_in
) {
2413 return handle_ser_rx_interrupt_no_dma(info
);
2416 rstat
= info
->port
[REG_STATUS
];
2417 if (rstat
& IO_MASK(R_SERIAL0_STATUS
, xoff_detect
) ) {
2418 DFLOW(DEBUG_LOG(info
->line
, "XOFF detect\n", 0));
2421 if (rstat
& SER_ERROR_MASK
) {
2424 info
->last_rx_active_usec
= GET_JIFFIES_USEC();
2425 info
->last_rx_active
= jiffies
;
2426 /* If we got an error, we must reset it by reading the
2429 data
= info
->port
[REG_DATA
];
2430 DINTR1(DEBUG_LOG(info
->line
, "ser_rx! %c\n", data
));
2431 DINTR1(DEBUG_LOG(info
->line
, "ser_rx err stat %02X\n", rstat
));
2432 if (!data
&& (rstat
& SER_FRAMING_ERR_MASK
)) {
2433 /* Most likely a break, but we get interrupts over and
2437 if (!info
->break_detected_cnt
) {
2438 DEBUG_LOG(info
->line
, "#BRK start\n", 0);
2440 if (rstat
& SER_RXD_MASK
) {
2441 /* The RX pin is high now, so the break
2442 * must be over, but....
2443 * we can't really know if we will get another
2444 * last byte ending the break or not.
2445 * And we don't know if the byte (if any) will
2446 * have an error or look valid.
2448 DEBUG_LOG(info
->line
, "# BL BRK\n", 0);
2449 info
->errorcode
= ERRCODE_INSERT_BREAK
;
2451 info
->break_detected_cnt
++;
2453 /* The error does not look like a break, but could be
2456 if (info
->break_detected_cnt
) {
2457 DEBUG_LOG(info
->line
, "EBRK %i\n", info
->break_detected_cnt
);
2458 info
->errorcode
= ERRCODE_INSERT_BREAK
;
2460 if (info
->errorcode
== ERRCODE_INSERT_BREAK
) {
2462 add_char_and_flag(info
, '\0', TTY_BREAK
);
2465 if (rstat
& SER_PAR_ERR_MASK
) {
2466 info
->icount
.parity
++;
2467 add_char_and_flag(info
, data
, TTY_PARITY
);
2468 } else if (rstat
& SER_OVERRUN_MASK
) {
2469 info
->icount
.overrun
++;
2470 add_char_and_flag(info
, data
, TTY_OVERRUN
);
2471 } else if (rstat
& SER_FRAMING_ERR_MASK
) {
2472 info
->icount
.frame
++;
2473 add_char_and_flag(info
, data
, TTY_FRAME
);
2476 info
->errorcode
= 0;
2478 info
->break_detected_cnt
= 0;
2479 DEBUG_LOG(info
->line
, "#iERR s d %04X\n",
2480 ((rstat
& SER_ERROR_MASK
) << 8) | data
);
2482 PROCSTAT(ser_stat
[info
->line
].early_errors_cnt
++);
2483 } else { /* It was a valid byte, now let the DMA do the rest */
2484 unsigned long curr_time_u
= GET_JIFFIES_USEC();
2485 unsigned long curr_time
= jiffies
;
2487 if (info
->break_detected_cnt
) {
2488 /* Detect if this character is a new valid char or the
2489 * last char in a break sequence: If LSBits are 0 and
2490 * MSBits are high AND the time is close to the
2491 * previous interrupt we should discard it.
2494 (curr_time
- info
->last_rx_active
) * (1000000/HZ
) +
2495 curr_time_u
- info
->last_rx_active_usec
;
2496 if (elapsed_usec
< 2*info
->char_time_usec
) {
2497 DEBUG_LOG(info
->line
, "FBRK %i\n", info
->line
);
2498 /* Report as BREAK (error) and let
2499 * receive_chars_dma() handle it
2501 info
->errorcode
= ERRCODE_SET_BREAK
;
2503 DEBUG_LOG(info
->line
, "Not end of BRK (V)%i\n", info
->line
);
2505 DEBUG_LOG(info
->line
, "num brk %i\n", info
->break_detected_cnt
);
2508 #ifdef SERIAL_DEBUG_INTR
2509 printk("** OK, disabling ser_interrupts\n");
2511 e100_disable_serial_data_irq(info
);
2512 DINTR2(DEBUG_LOG(info
->line
, "ser_rx OK %d\n", info
->line
));
2513 info
->break_detected_cnt
= 0;
2515 PROCSTAT(ser_stat
[info
->line
].ser_ints_ok_cnt
++);
2517 /* Restarting the DMA never hurts */
2518 *info
->icmdadr
= IO_STATE(R_DMA_CH6_CMD
, cmd
, restart
);
2519 START_FLUSH_FAST_TIMER(info
, "ser_int");
2521 } /* handle_ser_rx_interrupt */
2523 static void handle_ser_tx_interrupt(struct e100_serial
*info
)
2525 unsigned long flags
;
2528 unsigned char rstat
;
2529 DFLOW(DEBUG_LOG(info
->line
, "tx_int: xchar 0x%02X\n", info
->x_char
));
2530 local_irq_save(flags
);
2531 rstat
= info
->port
[REG_STATUS
];
2532 DFLOW(DEBUG_LOG(info
->line
, "stat %x\n", rstat
));
2534 info
->port
[REG_TR_DATA
] = info
->x_char
;
2537 /* We must enable since it is disabled in ser_interrupt */
2538 e100_enable_serial_tx_ready_irq(info
);
2539 local_irq_restore(flags
);
2542 if (info
->uses_dma_out
) {
2543 unsigned char rstat
;
2545 /* We only use normal tx interrupt when sending x_char */
2546 DFLOW(DEBUG_LOG(info
->line
, "tx_int: xchar sent\n", 0));
2547 local_irq_save(flags
);
2548 rstat
= info
->port
[REG_STATUS
];
2549 DFLOW(DEBUG_LOG(info
->line
, "stat %x\n", rstat
));
2550 e100_disable_serial_tx_ready_irq(info
);
2551 if (info
->port
.tty
->stopped
)
2552 rs_stop(info
->port
.tty
);
2553 /* Enable the DMA channel and tell it to continue */
2554 e100_enable_txdma_channel(info
);
2555 /* Wait 12 cycles before doing the DMA command */
2556 for(i
= 6; i
> 0; i
--)
2559 *info
->ocmdadr
= IO_STATE(R_DMA_CH6_CMD
, cmd
, continue);
2560 local_irq_restore(flags
);
2563 /* Normal char-by-char interrupt */
2564 if (info
->xmit
.head
== info
->xmit
.tail
2565 || info
->port
.tty
->stopped
2566 || info
->port
.tty
->hw_stopped
) {
2567 DFLOW(DEBUG_LOG(info
->line
, "tx_int: stopped %i\n",
2568 info
->port
.tty
->stopped
));
2569 e100_disable_serial_tx_ready_irq(info
);
2570 info
->tr_running
= 0;
2573 DINTR2(DEBUG_LOG(info
->line
, "tx_int %c\n", info
->xmit
.buf
[info
->xmit
.tail
]));
2574 /* Send a byte, rs485 timing is critical so turn of ints */
2575 local_irq_save(flags
);
2576 info
->port
[REG_TR_DATA
] = info
->xmit
.buf
[info
->xmit
.tail
];
2577 info
->xmit
.tail
= (info
->xmit
.tail
+ 1) & (SERIAL_XMIT_SIZE
-1);
2579 if (info
->xmit
.head
== info
->xmit
.tail
) {
2580 #if defined(CONFIG_ETRAX_RS485) && defined(CONFIG_ETRAX_FAST_TIMER)
2581 if (info
->rs485
.enabled
) {
2582 /* Set a short timer to toggle RTS */
2583 start_one_shot_timer(&fast_timers_rs485
[info
->line
],
2584 rs485_toggle_rts_timer_function
,
2585 (unsigned long)info
,
2586 info
->char_time_usec
*2,
2590 info
->last_tx_active_usec
= GET_JIFFIES_USEC();
2591 info
->last_tx_active
= jiffies
;
2592 e100_disable_serial_tx_ready_irq(info
);
2593 info
->tr_running
= 0;
2594 DFLOW(DEBUG_LOG(info
->line
, "tx_int: stop2\n", 0));
2596 /* We must enable since it is disabled in ser_interrupt */
2597 e100_enable_serial_tx_ready_irq(info
);
2599 local_irq_restore(flags
);
2601 if (CIRC_CNT(info
->xmit
.head
,
2603 SERIAL_XMIT_SIZE
) < WAKEUP_CHARS
)
2604 rs_sched_event(info
, RS_EVENT_WRITE_WAKEUP
);
2606 } /* handle_ser_tx_interrupt */
2608 /* result of time measurements:
2609 * RX duration 54-60 us when doing something, otherwise 6-9 us
2610 * ser_int duration: just sending: 8-15 us normally, up to 73 us
2613 ser_interrupt(int irq
, void *dev_id
)
2615 static volatile int tx_started
= 0;
2616 struct e100_serial
*info
;
2618 unsigned long flags
;
2619 unsigned long irq_mask1_rd
;
2620 unsigned long data_mask
= (1 << (8+2*0)); /* ser0 data_avail */
2622 static volatile unsigned long reentered_ready_mask
= 0;
2624 local_irq_save(flags
);
2625 irq_mask1_rd
= *R_IRQ_MASK1_RD
;
2626 /* First handle all rx interrupts with ints disabled */
2628 irq_mask1_rd
&= e100_ser_int_mask
;
2629 for (i
= 0; i
< NR_PORTS
; i
++) {
2630 /* Which line caused the data irq? */
2631 if (irq_mask1_rd
& data_mask
) {
2633 handle_ser_rx_interrupt(info
);
2638 /* Handle tx interrupts with interrupts enabled so we
2639 * can take care of new data interrupts while transmitting
2640 * We protect the tx part with the tx_started flag.
2641 * We disable the tr_ready interrupts we are about to handle and
2642 * unblock the serial interrupt so new serial interrupts may come.
2644 * If we get a new interrupt:
2645 * - it migth be due to synchronous serial ports.
2646 * - serial irq will be blocked by general irq handler.
2647 * - async data will be handled above (sync will be ignored).
2648 * - tx_started flag will prevent us from trying to send again and
2649 * we will exit fast - no need to unblock serial irq.
2650 * - Next (sync) serial interrupt handler will be runned with
2651 * disabled interrupt due to restore_flags() at end of function,
2652 * so sync handler will not be preempted or reentered.
2655 unsigned long ready_mask
;
2658 /* Only the tr_ready interrupts left */
2659 irq_mask1_rd
&= (IO_MASK(R_IRQ_MASK1_RD
, ser0_ready
) |
2660 IO_MASK(R_IRQ_MASK1_RD
, ser1_ready
) |
2661 IO_MASK(R_IRQ_MASK1_RD
, ser2_ready
) |
2662 IO_MASK(R_IRQ_MASK1_RD
, ser3_ready
));
2663 while (irq_mask1_rd
) {
2664 /* Disable those we are about to handle */
2665 *R_IRQ_MASK1_CLR
= irq_mask1_rd
;
2666 /* Unblock the serial interrupt */
2667 *R_VECT_MASK_SET
= IO_STATE(R_VECT_MASK_SET
, serial
, set
);
2670 ready_mask
= (1 << (8+1+2*0)); /* ser0 tr_ready */
2672 for (i
= 0; i
< NR_PORTS
; i
++) {
2673 /* Which line caused the ready irq? */
2674 if (irq_mask1_rd
& ready_mask
) {
2676 handle_ser_tx_interrupt(info
);
2681 /* handle_ser_tx_interrupt enables tr_ready interrupts */
2682 local_irq_disable();
2683 /* Handle reentered TX interrupt */
2684 irq_mask1_rd
= reentered_ready_mask
;
2686 local_irq_disable();
2689 unsigned long ready_mask
;
2690 ready_mask
= irq_mask1_rd
& (IO_MASK(R_IRQ_MASK1_RD
, ser0_ready
) |
2691 IO_MASK(R_IRQ_MASK1_RD
, ser1_ready
) |
2692 IO_MASK(R_IRQ_MASK1_RD
, ser2_ready
) |
2693 IO_MASK(R_IRQ_MASK1_RD
, ser3_ready
));
2695 reentered_ready_mask
|= ready_mask
;
2696 /* Disable those we are about to handle */
2697 *R_IRQ_MASK1_CLR
= ready_mask
;
2698 DFLOW(DEBUG_LOG(SERIAL_DEBUG_LINE
, "ser_int reentered with TX %X\n", ready_mask
));
2702 local_irq_restore(flags
);
2703 return IRQ_RETVAL(handled
);
2704 } /* ser_interrupt */
2708 * -------------------------------------------------------------------
2709 * Here ends the serial interrupt routines.
2710 * -------------------------------------------------------------------
2714 * This routine is used to handle the "bottom half" processing for the
2715 * serial driver, known also the "software interrupt" processing.
2716 * This processing is done at the kernel interrupt level, after the
2717 * rs_interrupt() has returned, BUT WITH INTERRUPTS TURNED ON. This
2718 * is where time-consuming activities which can not be done in the
2719 * interrupt driver proper are done; the interrupt driver schedules
2720 * them using rs_sched_event(), and they get done here.
2723 do_softint(struct work_struct
*work
)
2725 struct e100_serial
*info
;
2726 struct tty_struct
*tty
;
2728 info
= container_of(work
, struct e100_serial
, work
);
2730 tty
= info
->port
.tty
;
2734 if (test_and_clear_bit(RS_EVENT_WRITE_WAKEUP
, &info
->event
))
2739 startup(struct e100_serial
* info
)
2741 unsigned long flags
;
2742 unsigned long xmit_page
;
2745 xmit_page
= get_zeroed_page(GFP_KERNEL
);
2749 local_irq_save(flags
);
2751 /* if it was already initialized, skip this */
2753 if (info
->flags
& ASYNC_INITIALIZED
) {
2754 local_irq_restore(flags
);
2755 free_page(xmit_page
);
2760 free_page(xmit_page
);
2762 info
->xmit
.buf
= (unsigned char *) xmit_page
;
2764 #ifdef SERIAL_DEBUG_OPEN
2765 printk("starting up ttyS%d (xmit_buf 0x%p)...\n", info
->line
, info
->xmit
.buf
);
2768 #ifdef CONFIG_SVINTO_SIM
2769 /* Bits and pieces collected from below. Better to have them
2770 in one ifdef:ed clause than to mix in a lot of ifdefs,
2773 clear_bit(TTY_IO_ERROR
, &info
->port
.tty
->flags
);
2775 info
->xmit
.head
= info
->xmit
.tail
= 0;
2776 info
->first_recv_buffer
= info
->last_recv_buffer
= NULL
;
2777 info
->recv_cnt
= info
->max_recv_cnt
= 0;
2779 for (i
= 0; i
< SERIAL_RECV_DESCRIPTORS
; i
++)
2780 info
->rec_descr
[i
].buf
= NULL
;
2782 /* No real action in the simulator, but may set info important
2788 * Clear the FIFO buffers and disable them
2789 * (they will be reenabled in change_speed())
2793 * Reset the DMA channels and make sure their interrupts are cleared
2796 if (info
->dma_in_enabled
) {
2797 info
->uses_dma_in
= 1;
2798 e100_enable_rxdma_channel(info
);
2800 *info
->icmdadr
= IO_STATE(R_DMA_CH6_CMD
, cmd
, reset
);
2802 /* Wait until reset cycle is complete */
2803 while (IO_EXTRACT(R_DMA_CH6_CMD
, cmd
, *info
->icmdadr
) ==
2804 IO_STATE_VALUE(R_DMA_CH6_CMD
, cmd
, reset
));
2806 /* Make sure the irqs are cleared */
2807 *info
->iclrintradr
=
2808 IO_STATE(R_DMA_CH6_CLR_INTR
, clr_descr
, do) |
2809 IO_STATE(R_DMA_CH6_CLR_INTR
, clr_eop
, do);
2811 e100_disable_rxdma_channel(info
);
2814 if (info
->dma_out_enabled
) {
2815 info
->uses_dma_out
= 1;
2816 e100_enable_txdma_channel(info
);
2817 *info
->ocmdadr
= IO_STATE(R_DMA_CH6_CMD
, cmd
, reset
);
2819 while (IO_EXTRACT(R_DMA_CH6_CMD
, cmd
, *info
->ocmdadr
) ==
2820 IO_STATE_VALUE(R_DMA_CH6_CMD
, cmd
, reset
));
2822 /* Make sure the irqs are cleared */
2823 *info
->oclrintradr
=
2824 IO_STATE(R_DMA_CH6_CLR_INTR
, clr_descr
, do) |
2825 IO_STATE(R_DMA_CH6_CLR_INTR
, clr_eop
, do);
2827 e100_disable_txdma_channel(info
);
2831 clear_bit(TTY_IO_ERROR
, &info
->port
.tty
->flags
);
2833 info
->xmit
.head
= info
->xmit
.tail
= 0;
2834 info
->first_recv_buffer
= info
->last_recv_buffer
= NULL
;
2835 info
->recv_cnt
= info
->max_recv_cnt
= 0;
2837 for (i
= 0; i
< SERIAL_RECV_DESCRIPTORS
; i
++)
2838 info
->rec_descr
[i
].buf
= 0;
2841 * and set the speed and other flags of the serial port
2842 * this will start the rx/tx as well
2844 #ifdef SERIAL_HANDLE_EARLY_ERRORS
2845 e100_enable_serial_data_irq(info
);
2849 /* dummy read to reset any serial errors */
2851 (void)info
->port
[REG_DATA
];
2853 /* enable the interrupts */
2854 if (info
->uses_dma_out
)
2855 e100_enable_txdma_irq(info
);
2857 e100_enable_rx_irq(info
);
2859 info
->tr_running
= 0; /* to be sure we don't lock up the transmitter */
2861 /* setup the dma input descriptor and start dma */
2863 start_receive(info
);
2865 /* for safety, make sure the descriptors last result is 0 bytes written */
2867 info
->tr_descr
.sw_len
= 0;
2868 info
->tr_descr
.hw_len
= 0;
2869 info
->tr_descr
.status
= 0;
2871 /* enable RTS/DTR last */
2876 #endif /* CONFIG_SVINTO_SIM */
2878 info
->flags
|= ASYNC_INITIALIZED
;
2880 local_irq_restore(flags
);
2885 * This routine will shutdown a serial port; interrupts are disabled, and
2886 * DTR is dropped if the hangup on close termio flag is on.
2889 shutdown(struct e100_serial
* info
)
2891 unsigned long flags
;
2892 struct etrax_dma_descr
*descr
= info
->rec_descr
;
2893 struct etrax_recv_buffer
*buffer
;
2896 #ifndef CONFIG_SVINTO_SIM
2897 /* shut down the transmitter and receiver */
2898 DFLOW(DEBUG_LOG(info
->line
, "shutdown %i\n", info
->line
));
2899 e100_disable_rx(info
);
2900 info
->port
[REG_TR_CTRL
] = (info
->tx_ctrl
&= ~0x40);
2902 /* disable interrupts, reset dma channels */
2903 if (info
->uses_dma_in
) {
2904 e100_disable_rxdma_irq(info
);
2905 *info
->icmdadr
= IO_STATE(R_DMA_CH6_CMD
, cmd
, reset
);
2906 info
->uses_dma_in
= 0;
2908 e100_disable_serial_data_irq(info
);
2911 if (info
->uses_dma_out
) {
2912 e100_disable_txdma_irq(info
);
2913 info
->tr_running
= 0;
2914 *info
->ocmdadr
= IO_STATE(R_DMA_CH6_CMD
, cmd
, reset
);
2915 info
->uses_dma_out
= 0;
2917 e100_disable_serial_tx_ready_irq(info
);
2918 info
->tr_running
= 0;
2921 #endif /* CONFIG_SVINTO_SIM */
2923 if (!(info
->flags
& ASYNC_INITIALIZED
))
2926 #ifdef SERIAL_DEBUG_OPEN
2927 printk("Shutting down serial port %d (irq %d)....\n", info
->line
,
2931 local_irq_save(flags
);
2933 if (info
->xmit
.buf
) {
2934 free_page((unsigned long)info
->xmit
.buf
);
2935 info
->xmit
.buf
= NULL
;
2938 for (i
= 0; i
< SERIAL_RECV_DESCRIPTORS
; i
++)
2940 buffer
= phys_to_virt(descr
[i
].buf
) - sizeof *buffer
;
2945 if (!info
->port
.tty
|| (info
->port
.tty
->termios
->c_cflag
& HUPCL
)) {
2946 /* hang up DTR and RTS if HUPCL is enabled */
2948 e100_rts(info
, 0); /* could check CRTSCTS before doing this */
2952 set_bit(TTY_IO_ERROR
, &info
->port
.tty
->flags
);
2954 info
->flags
&= ~ASYNC_INITIALIZED
;
2955 local_irq_restore(flags
);
2959 /* change baud rate and other assorted parameters */
2962 change_speed(struct e100_serial
*info
)
2966 unsigned long flags
;
2967 /* first some safety checks */
2969 if (!info
->port
.tty
|| !info
->port
.tty
->termios
)
2974 cflag
= info
->port
.tty
->termios
->c_cflag
;
2976 /* possibly, the tx/rx should be disabled first to do this safely */
2978 /* change baud-rate and write it to the hardware */
2979 if ((info
->flags
& ASYNC_SPD_MASK
) == ASYNC_SPD_CUST
) {
2980 /* Special baudrate */
2981 u32 mask
= 0xFF << (info
->line
*8); /* Each port has 8 bits */
2982 unsigned long alt_source
=
2983 IO_STATE(R_ALT_SER_BAUDRATE
, ser0_rec
, normal
) |
2984 IO_STATE(R_ALT_SER_BAUDRATE
, ser0_tr
, normal
);
2985 /* R_ALT_SER_BAUDRATE selects the source */
2986 DBAUD(printk("Custom baudrate: baud_base/divisor %lu/%i\n",
2987 (unsigned long)info
->baud_base
, info
->custom_divisor
));
2988 if (info
->baud_base
== SERIAL_PRESCALE_BASE
) {
2989 /* 0, 2-65535 (0=65536) */
2990 u16 divisor
= info
->custom_divisor
;
2991 /* R_SERIAL_PRESCALE (upper 16 bits of R_CLOCK_PRESCALE) */
2992 /* baudrate is 3.125MHz/custom_divisor */
2994 IO_STATE(R_ALT_SER_BAUDRATE
, ser0_rec
, prescale
) |
2995 IO_STATE(R_ALT_SER_BAUDRATE
, ser0_tr
, prescale
);
2997 DBAUD(printk("Writing SERIAL_PRESCALE: divisor %i\n", divisor
));
2998 *R_SERIAL_PRESCALE
= divisor
;
2999 info
->baud
= SERIAL_PRESCALE_BASE
/divisor
;
3001 #ifdef CONFIG_ETRAX_EXTERN_PB6CLK_ENABLED
3002 else if ((info
->baud_base
==CONFIG_ETRAX_EXTERN_PB6CLK_FREQ
/8 &&
3003 info
->custom_divisor
== 1) ||
3004 (info
->baud_base
==CONFIG_ETRAX_EXTERN_PB6CLK_FREQ
&&
3005 info
->custom_divisor
== 8)) {
3006 /* ext_clk selected */
3008 IO_STATE(R_ALT_SER_BAUDRATE
, ser0_rec
, extern) |
3009 IO_STATE(R_ALT_SER_BAUDRATE
, ser0_tr
, extern);
3010 DBAUD(printk("using external baudrate: %lu\n", CONFIG_ETRAX_EXTERN_PB6CLK_FREQ
/8));
3011 info
->baud
= CONFIG_ETRAX_EXTERN_PB6CLK_FREQ
/8;
3016 /* Bad baudbase, we don't support using timer0
3019 printk(KERN_WARNING
"Bad baud_base/custom_divisor: %lu/%i\n",
3020 (unsigned long)info
->baud_base
, info
->custom_divisor
);
3022 r_alt_ser_baudrate_shadow
&= ~mask
;
3023 r_alt_ser_baudrate_shadow
|= (alt_source
<< (info
->line
*8));
3024 *R_ALT_SER_BAUDRATE
= r_alt_ser_baudrate_shadow
;
3026 /* Normal baudrate */
3027 /* Make sure we use normal baudrate */
3028 u32 mask
= 0xFF << (info
->line
*8); /* Each port has 8 bits */
3029 unsigned long alt_source
=
3030 IO_STATE(R_ALT_SER_BAUDRATE
, ser0_rec
, normal
) |
3031 IO_STATE(R_ALT_SER_BAUDRATE
, ser0_tr
, normal
);
3032 r_alt_ser_baudrate_shadow
&= ~mask
;
3033 r_alt_ser_baudrate_shadow
|= (alt_source
<< (info
->line
*8));
3034 #ifndef CONFIG_SVINTO_SIM
3035 *R_ALT_SER_BAUDRATE
= r_alt_ser_baudrate_shadow
;
3036 #endif /* CONFIG_SVINTO_SIM */
3038 info
->baud
= cflag_to_baud(cflag
);
3039 #ifndef CONFIG_SVINTO_SIM
3040 info
->port
[REG_BAUD
] = cflag_to_etrax_baud(cflag
);
3041 #endif /* CONFIG_SVINTO_SIM */
3044 #ifndef CONFIG_SVINTO_SIM
3045 /* start with default settings and then fill in changes */
3046 local_irq_save(flags
);
3047 /* 8 bit, no/even parity */
3048 info
->rx_ctrl
&= ~(IO_MASK(R_SERIAL0_REC_CTRL
, rec_bitnr
) |
3049 IO_MASK(R_SERIAL0_REC_CTRL
, rec_par_en
) |
3050 IO_MASK(R_SERIAL0_REC_CTRL
, rec_par
));
3052 /* 8 bit, no/even parity, 1 stop bit, no cts */
3053 info
->tx_ctrl
&= ~(IO_MASK(R_SERIAL0_TR_CTRL
, tr_bitnr
) |
3054 IO_MASK(R_SERIAL0_TR_CTRL
, tr_par_en
) |
3055 IO_MASK(R_SERIAL0_TR_CTRL
, tr_par
) |
3056 IO_MASK(R_SERIAL0_TR_CTRL
, stop_bits
) |
3057 IO_MASK(R_SERIAL0_TR_CTRL
, auto_cts
));
3059 if ((cflag
& CSIZE
) == CS7
) {
3060 /* set 7 bit mode */
3061 info
->tx_ctrl
|= IO_STATE(R_SERIAL0_TR_CTRL
, tr_bitnr
, tr_7bit
);
3062 info
->rx_ctrl
|= IO_STATE(R_SERIAL0_REC_CTRL
, rec_bitnr
, rec_7bit
);
3065 if (cflag
& CSTOPB
) {
3066 /* set 2 stop bit mode */
3067 info
->tx_ctrl
|= IO_STATE(R_SERIAL0_TR_CTRL
, stop_bits
, two_bits
);
3070 if (cflag
& PARENB
) {
3072 info
->tx_ctrl
|= IO_STATE(R_SERIAL0_TR_CTRL
, tr_par_en
, enable
);
3073 info
->rx_ctrl
|= IO_STATE(R_SERIAL0_REC_CTRL
, rec_par_en
, enable
);
3076 if (cflag
& CMSPAR
) {
3077 /* enable stick parity, PARODD mean Mark which matches ETRAX */
3078 info
->tx_ctrl
|= IO_STATE(R_SERIAL0_TR_CTRL
, tr_stick_par
, stick
);
3079 info
->rx_ctrl
|= IO_STATE(R_SERIAL0_REC_CTRL
, rec_stick_par
, stick
);
3081 if (cflag
& PARODD
) {
3082 /* set odd parity (or Mark if CMSPAR) */
3083 info
->tx_ctrl
|= IO_STATE(R_SERIAL0_TR_CTRL
, tr_par
, odd
);
3084 info
->rx_ctrl
|= IO_STATE(R_SERIAL0_REC_CTRL
, rec_par
, odd
);
3087 if (cflag
& CRTSCTS
) {
3088 /* enable automatic CTS handling */
3089 DFLOW(DEBUG_LOG(info
->line
, "FLOW auto_cts enabled\n", 0));
3090 info
->tx_ctrl
|= IO_STATE(R_SERIAL0_TR_CTRL
, auto_cts
, active
);
3093 /* make sure the tx and rx are enabled */
3095 info
->tx_ctrl
|= IO_STATE(R_SERIAL0_TR_CTRL
, tr_enable
, enable
);
3096 info
->rx_ctrl
|= IO_STATE(R_SERIAL0_REC_CTRL
, rec_enable
, enable
);
3098 /* actually write the control regs to the hardware */
3100 info
->port
[REG_TR_CTRL
] = info
->tx_ctrl
;
3101 info
->port
[REG_REC_CTRL
] = info
->rx_ctrl
;
3102 xoff
= IO_FIELD(R_SERIAL0_XOFF
, xoff_char
, STOP_CHAR(info
->port
.tty
));
3103 xoff
|= IO_STATE(R_SERIAL0_XOFF
, tx_stop
, enable
);
3104 if (info
->port
.tty
->termios
->c_iflag
& IXON
) {
3105 DFLOW(DEBUG_LOG(info
->line
, "FLOW XOFF enabled 0x%02X\n",
3106 STOP_CHAR(info
->port
.tty
)));
3107 xoff
|= IO_STATE(R_SERIAL0_XOFF
, auto_xoff
, enable
);
3110 *((unsigned long *)&info
->port
[REG_XOFF
]) = xoff
;
3111 local_irq_restore(flags
);
3112 #endif /* !CONFIG_SVINTO_SIM */
3114 update_char_time(info
);
3116 } /* change_speed */
3118 /* start transmitting chars NOW */
3121 rs_flush_chars(struct tty_struct
*tty
)
3123 struct e100_serial
*info
= (struct e100_serial
*)tty
->driver_data
;
3124 unsigned long flags
;
3126 if (info
->tr_running
||
3127 info
->xmit
.head
== info
->xmit
.tail
||
3133 #ifdef SERIAL_DEBUG_FLOW
3134 printk("rs_flush_chars\n");
3137 /* this protection might not exactly be necessary here */
3139 local_irq_save(flags
);
3140 start_transmit(info
);
3141 local_irq_restore(flags
);
3144 static int rs_raw_write(struct tty_struct
*tty
,
3145 const unsigned char *buf
, int count
)
3148 struct e100_serial
*info
= (struct e100_serial
*)tty
->driver_data
;
3149 unsigned long flags
;
3151 /* first some sanity checks */
3153 if (!tty
|| !info
->xmit
.buf
|| !tmp_buf
)
3156 #ifdef SERIAL_DEBUG_DATA
3157 if (info
->line
== SERIAL_DEBUG_LINE
)
3158 printk("rs_raw_write (%d), status %d\n",
3159 count
, info
->port
[REG_STATUS
]);
3162 #ifdef CONFIG_SVINTO_SIM
3163 /* Really simple. The output is here and now. */
3164 SIMCOUT(buf
, count
);
3167 local_save_flags(flags
);
3168 DFLOW(DEBUG_LOG(info
->line
, "write count %i ", count
));
3169 DFLOW(DEBUG_LOG(info
->line
, "ldisc %i\n", tty
->ldisc
.chars_in_buffer(tty
)));
3172 /* The local_irq_disable/restore_flags pairs below are needed
3173 * because the DMA interrupt handler moves the info->xmit values.
3174 * the memcpy needs to be in the critical region unfortunately,
3175 * because we need to read xmit values, memcpy, write xmit values
3176 * in one atomic operation... this could perhaps be avoided by
3177 * more clever design.
3179 local_irq_disable();
3181 c
= CIRC_SPACE_TO_END(info
->xmit
.head
,
3190 memcpy(info
->xmit
.buf
+ info
->xmit
.head
, buf
, c
);
3191 info
->xmit
.head
= (info
->xmit
.head
+ c
) &
3192 (SERIAL_XMIT_SIZE
-1);
3197 local_irq_restore(flags
);
3199 /* enable transmitter if not running, unless the tty is stopped
3200 * this does not need IRQ protection since if tr_running == 0
3201 * the IRQ's are not running anyway for this port.
3203 DFLOW(DEBUG_LOG(info
->line
, "write ret %i\n", ret
));
3205 if (info
->xmit
.head
!= info
->xmit
.tail
&&
3208 !info
->tr_running
) {
3209 start_transmit(info
);
3213 } /* raw_raw_write() */
3216 rs_write(struct tty_struct
*tty
,
3217 const unsigned char *buf
, int count
)
3219 #if defined(CONFIG_ETRAX_RS485)
3220 struct e100_serial
*info
= (struct e100_serial
*)tty
->driver_data
;
3222 if (info
->rs485
.enabled
)
3224 /* If we are in RS-485 mode, we need to toggle RTS and disable
3225 * the receiver before initiating a DMA transfer
3227 #ifdef CONFIG_ETRAX_FAST_TIMER
3228 /* Abort any started timer */
3229 fast_timers_rs485
[info
->line
].function
= NULL
;
3230 del_fast_timer(&fast_timers_rs485
[info
->line
]);
3232 e100_rts(info
, info
->rs485
.rts_on_send
);
3233 #if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER)
3234 e100_disable_rx(info
);
3235 e100_enable_rx_irq(info
);
3238 if (info
->rs485
.delay_rts_before_send
> 0)
3239 msleep(info
->rs485
.delay_rts_before_send
);
3241 #endif /* CONFIG_ETRAX_RS485 */
3243 count
= rs_raw_write(tty
, buf
, count
);
3245 #if defined(CONFIG_ETRAX_RS485)
3246 if (info
->rs485
.enabled
)
3249 /* If we are in RS-485 mode the following has to be done:
3250 * wait until DMA is ready
3251 * wait on transmit shift register
3253 * enable the receiver
3256 /* Sleep until all sent */
3257 tty_wait_until_sent(tty
, 0);
3258 #ifdef CONFIG_ETRAX_FAST_TIMER
3259 /* Now sleep a little more so that shift register is empty */
3260 schedule_usleep(info
->char_time_usec
* 2);
3262 /* wait on transmit shift register */
3264 get_lsr_info(info
, &val
);
3265 }while (!(val
& TIOCSER_TEMT
));
3267 e100_rts(info
, info
->rs485
.rts_after_sent
);
3269 #if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER)
3270 e100_enable_rx(info
);
3271 e100_enable_rxdma_irq(info
);
3274 #endif /* CONFIG_ETRAX_RS485 */
3280 /* how much space is available in the xmit buffer? */
3283 rs_write_room(struct tty_struct
*tty
)
3285 struct e100_serial
*info
= (struct e100_serial
*)tty
->driver_data
;
3287 return CIRC_SPACE(info
->xmit
.head
, info
->xmit
.tail
, SERIAL_XMIT_SIZE
);
3290 /* How many chars are in the xmit buffer?
3291 * This does not include any chars in the transmitter FIFO.
3292 * Use wait_until_sent for waiting for FIFO drain.
3296 rs_chars_in_buffer(struct tty_struct
*tty
)
3298 struct e100_serial
*info
= (struct e100_serial
*)tty
->driver_data
;
3300 return CIRC_CNT(info
->xmit
.head
, info
->xmit
.tail
, SERIAL_XMIT_SIZE
);
3303 /* discard everything in the xmit buffer */
3306 rs_flush_buffer(struct tty_struct
*tty
)
3308 struct e100_serial
*info
= (struct e100_serial
*)tty
->driver_data
;
3309 unsigned long flags
;
3311 local_irq_save(flags
);
3312 info
->xmit
.head
= info
->xmit
.tail
= 0;
3313 local_irq_restore(flags
);
3319 * This function is used to send a high-priority XON/XOFF character to
3322 * Since we use DMA we don't check for info->x_char in transmit_chars_dma(),
3323 * but we do it in handle_ser_tx_interrupt().
3324 * We disable DMA channel and enable tx ready interrupt and write the
3325 * character when possible.
3327 static void rs_send_xchar(struct tty_struct
*tty
, char ch
)
3329 struct e100_serial
*info
= (struct e100_serial
*)tty
->driver_data
;
3330 unsigned long flags
;
3331 local_irq_save(flags
);
3332 if (info
->uses_dma_out
) {
3333 /* Put the DMA on hold and disable the channel */
3334 *info
->ocmdadr
= IO_STATE(R_DMA_CH6_CMD
, cmd
, hold
);
3335 while (IO_EXTRACT(R_DMA_CH6_CMD
, cmd
, *info
->ocmdadr
) !=
3336 IO_STATE_VALUE(R_DMA_CH6_CMD
, cmd
, hold
));
3337 e100_disable_txdma_channel(info
);
3340 /* Must make sure transmitter is not stopped before we can transmit */
3344 /* Enable manual transmit interrupt and send from there */
3345 DFLOW(DEBUG_LOG(info
->line
, "rs_send_xchar 0x%02X\n", ch
));
3347 e100_enable_serial_tx_ready_irq(info
);
3348 local_irq_restore(flags
);
3352 * ------------------------------------------------------------
3355 * This routine is called by the upper-layer tty layer to signal that
3356 * incoming characters should be throttled.
3357 * ------------------------------------------------------------
3360 rs_throttle(struct tty_struct
* tty
)
3362 struct e100_serial
*info
= (struct e100_serial
*)tty
->driver_data
;
3363 #ifdef SERIAL_DEBUG_THROTTLE
3366 printk("throttle %s: %lu....\n", tty_name(tty
, buf
),
3367 (unsigned long)tty
->ldisc
.chars_in_buffer(tty
));
3369 DFLOW(DEBUG_LOG(info
->line
,"rs_throttle %lu\n", tty
->ldisc
.chars_in_buffer(tty
)));
3371 /* Do RTS before XOFF since XOFF might take some time */
3372 if (tty
->termios
->c_cflag
& CRTSCTS
) {
3373 /* Turn off RTS line */
3377 rs_send_xchar(tty
, STOP_CHAR(tty
));
3382 rs_unthrottle(struct tty_struct
* tty
)
3384 struct e100_serial
*info
= (struct e100_serial
*)tty
->driver_data
;
3385 #ifdef SERIAL_DEBUG_THROTTLE
3388 printk("unthrottle %s: %lu....\n", tty_name(tty
, buf
),
3389 (unsigned long)tty
->ldisc
.chars_in_buffer(tty
));
3391 DFLOW(DEBUG_LOG(info
->line
,"rs_unthrottle ldisc %d\n", tty
->ldisc
.chars_in_buffer(tty
)));
3392 DFLOW(DEBUG_LOG(info
->line
,"rs_unthrottle flip.count: %i\n", tty
->flip
.count
));
3393 /* Do RTS before XOFF since XOFF might take some time */
3394 if (tty
->termios
->c_cflag
& CRTSCTS
) {
3395 /* Assert RTS line */
3403 rs_send_xchar(tty
, START_CHAR(tty
));
3409 * ------------------------------------------------------------
3410 * rs_ioctl() and friends
3411 * ------------------------------------------------------------
3415 get_serial_info(struct e100_serial
* info
,
3416 struct serial_struct
* retinfo
)
3418 struct serial_struct tmp
;
3420 /* this is all probably wrong, there are a lot of fields
3421 * here that we don't have in e100_serial and maybe we
3422 * should set them to something else than 0.
3427 memset(&tmp
, 0, sizeof(tmp
));
3428 tmp
.type
= info
->type
;
3429 tmp
.line
= info
->line
;
3430 tmp
.port
= (int)info
->port
;
3431 tmp
.irq
= info
->irq
;
3432 tmp
.flags
= info
->flags
;
3433 tmp
.baud_base
= info
->baud_base
;
3434 tmp
.close_delay
= info
->close_delay
;
3435 tmp
.closing_wait
= info
->closing_wait
;
3436 tmp
.custom_divisor
= info
->custom_divisor
;
3437 if (copy_to_user(retinfo
, &tmp
, sizeof(*retinfo
)))
3443 set_serial_info(struct e100_serial
*info
,
3444 struct serial_struct
*new_info
)
3446 struct serial_struct new_serial
;
3447 struct e100_serial old_info
;
3450 if (copy_from_user(&new_serial
, new_info
, sizeof(new_serial
)))
3455 if (!capable(CAP_SYS_ADMIN
)) {
3456 if ((new_serial
.type
!= info
->type
) ||
3457 (new_serial
.close_delay
!= info
->close_delay
) ||
3458 ((new_serial
.flags
& ~ASYNC_USR_MASK
) !=
3459 (info
->flags
& ~ASYNC_USR_MASK
)))
3461 info
->flags
= ((info
->flags
& ~ASYNC_USR_MASK
) |
3462 (new_serial
.flags
& ASYNC_USR_MASK
));
3463 goto check_and_exit
;
3466 if (info
->count
> 1)
3470 * OK, past this point, all the error checking has been done.
3471 * At this point, we start making changes.....
3474 info
->baud_base
= new_serial
.baud_base
;
3475 info
->flags
= ((info
->flags
& ~ASYNC_FLAGS
) |
3476 (new_serial
.flags
& ASYNC_FLAGS
));
3477 info
->custom_divisor
= new_serial
.custom_divisor
;
3478 info
->type
= new_serial
.type
;
3479 info
->close_delay
= new_serial
.close_delay
;
3480 info
->closing_wait
= new_serial
.closing_wait
;
3481 info
->port
.tty
->low_latency
= (info
->flags
& ASYNC_LOW_LATENCY
) ? 1 : 0;
3484 if (info
->flags
& ASYNC_INITIALIZED
) {
3487 retval
= startup(info
);
3492 * get_lsr_info - get line status register info
3494 * Purpose: Let user call ioctl() to get info when the UART physically
3495 * is emptied. On bus types like RS485, the transmitter must
3496 * release the bus after transmitting. This must be done when
3497 * the transmit shift register is empty, not be done when the
3498 * transmit holding register is empty. This functionality
3499 * allows an RS485 driver to be written in user space.
3502 get_lsr_info(struct e100_serial
* info
, unsigned int *value
)
3504 unsigned int result
= TIOCSER_TEMT
;
3505 #ifndef CONFIG_SVINTO_SIM
3506 unsigned long curr_time
= jiffies
;
3507 unsigned long curr_time_usec
= GET_JIFFIES_USEC();
3508 unsigned long elapsed_usec
=
3509 (curr_time
- info
->last_tx_active
) * 1000000/HZ
+
3510 curr_time_usec
- info
->last_tx_active_usec
;
3512 if (info
->xmit
.head
!= info
->xmit
.tail
||
3513 elapsed_usec
< 2*info
->char_time_usec
) {
3518 if (copy_to_user(value
, &result
, sizeof(int)))
3523 #ifdef SERIAL_DEBUG_IO
3530 const struct state_str control_state_str
[] = {
3531 {TIOCM_DTR
, "DTR" },
3535 {TIOCM_CTS
, "CTS" },
3538 {TIOCM_DSR
, "DSR" },
3542 char *get_control_state_str(int MLines
, char *s
)
3547 while (control_state_str
[i
].str
!= NULL
) {
3548 if (MLines
& control_state_str
[i
].state
) {
3552 strcat(s
, control_state_str
[i
].str
);
3561 rs_break(struct tty_struct
*tty
, int break_state
)
3563 struct e100_serial
*info
= (struct e100_serial
*)tty
->driver_data
;
3564 unsigned long flags
;
3569 local_irq_save(flags
);
3570 if (break_state
== -1) {
3571 /* Go to manual mode and set the txd pin to 0 */
3572 /* Clear bit 7 (txd) and 6 (tr_enable) */
3573 info
->tx_ctrl
&= 0x3F;
3575 /* Set bit 7 (txd) and 6 (tr_enable) */
3576 info
->tx_ctrl
|= (0x80 | 0x40);
3578 info
->port
[REG_TR_CTRL
] = info
->tx_ctrl
;
3579 local_irq_restore(flags
);
3583 rs_tiocmset(struct tty_struct
*tty
, struct file
*file
,
3584 unsigned int set
, unsigned int clear
)
3586 struct e100_serial
*info
= (struct e100_serial
*)tty
->driver_data
;
3587 unsigned long flags
;
3589 local_irq_save(flags
);
3591 if (clear
& TIOCM_RTS
)
3593 if (clear
& TIOCM_DTR
)
3595 /* Handle FEMALE behaviour */
3596 if (clear
& TIOCM_RI
)
3597 e100_ri_out(info
, 0);
3598 if (clear
& TIOCM_CD
)
3599 e100_cd_out(info
, 0);
3601 if (set
& TIOCM_RTS
)
3603 if (set
& TIOCM_DTR
)
3605 /* Handle FEMALE behaviour */
3607 e100_ri_out(info
, 1);
3609 e100_cd_out(info
, 1);
3611 local_irq_restore(flags
);
3616 rs_tiocmget(struct tty_struct
*tty
, struct file
*file
)
3618 struct e100_serial
*info
= (struct e100_serial
*)tty
->driver_data
;
3619 unsigned int result
;
3620 unsigned long flags
;
3622 local_irq_save(flags
);
3625 (!E100_RTS_GET(info
) ? TIOCM_RTS
: 0)
3626 | (!E100_DTR_GET(info
) ? TIOCM_DTR
: 0)
3627 | (!E100_RI_GET(info
) ? TIOCM_RNG
: 0)
3628 | (!E100_DSR_GET(info
) ? TIOCM_DSR
: 0)
3629 | (!E100_CD_GET(info
) ? TIOCM_CAR
: 0)
3630 | (!E100_CTS_GET(info
) ? TIOCM_CTS
: 0);
3632 local_irq_restore(flags
);
3634 #ifdef SERIAL_DEBUG_IO
3635 printk(KERN_DEBUG
"ser%i: modem state: %i 0x%08X\n",
3636 info
->line
, result
, result
);
3640 get_control_state_str(result
, s
);
3641 printk(KERN_DEBUG
"state: %s\n", s
);
3650 rs_ioctl(struct tty_struct
*tty
, struct file
* file
,
3651 unsigned int cmd
, unsigned long arg
)
3653 struct e100_serial
* info
= (struct e100_serial
*)tty
->driver_data
;
3655 if ((cmd
!= TIOCGSERIAL
) && (cmd
!= TIOCSSERIAL
) &&
3656 (cmd
!= TIOCSERCONFIG
) && (cmd
!= TIOCSERGWILD
) &&
3657 (cmd
!= TIOCSERSWILD
) && (cmd
!= TIOCSERGSTRUCT
)) {
3658 if (tty
->flags
& (1 << TTY_IO_ERROR
))
3664 return get_serial_info(info
,
3665 (struct serial_struct
*) arg
);
3667 return set_serial_info(info
,
3668 (struct serial_struct
*) arg
);
3669 case TIOCSERGETLSR
: /* Get line status register */
3670 return get_lsr_info(info
, (unsigned int *) arg
);
3672 case TIOCSERGSTRUCT
:
3673 if (copy_to_user((struct e100_serial
*) arg
,
3674 info
, sizeof(struct e100_serial
)))
3678 #if defined(CONFIG_ETRAX_RS485)
3679 case TIOCSERSETRS485
:
3681 struct rs485_control rs485ctrl
;
3682 if (copy_from_user(&rs485ctrl
, (struct rs485_control
*)arg
,
3686 return e100_enable_rs485(tty
, &rs485ctrl
);
3689 case TIOCSERWRRS485
:
3691 struct rs485_write rs485wr
;
3692 if (copy_from_user(&rs485wr
, (struct rs485_write
*)arg
,
3696 return e100_write_rs485(tty
, rs485wr
.outc
, rs485wr
.outc_size
);
3701 return -ENOIOCTLCMD
;
3707 rs_set_termios(struct tty_struct
*tty
, struct ktermios
*old_termios
)
3709 struct e100_serial
*info
= (struct e100_serial
*)tty
->driver_data
;
3713 /* Handle turning off CRTSCTS */
3714 if ((old_termios
->c_cflag
& CRTSCTS
) &&
3715 !(tty
->termios
->c_cflag
& CRTSCTS
)) {
3716 tty
->hw_stopped
= 0;
3723 * ------------------------------------------------------------
3726 * This routine is called when the serial port gets closed. First, we
3727 * wait for the last remaining data to be sent. Then, we unlink its
3728 * S structure from the interrupt chain if necessary, and we free
3729 * that IRQ if nothing is left in the chain.
3730 * ------------------------------------------------------------
3733 rs_close(struct tty_struct
*tty
, struct file
* filp
)
3735 struct e100_serial
* info
= (struct e100_serial
*)tty
->driver_data
;
3736 unsigned long flags
;
3741 /* interrupts are disabled for this entire function */
3743 local_irq_save(flags
);
3745 if (tty_hung_up_p(filp
)) {
3746 local_irq_restore(flags
);
3750 #ifdef SERIAL_DEBUG_OPEN
3751 printk("[%d] rs_close ttyS%d, count = %d\n", current
->pid
,
3752 info
->line
, info
->count
);
3754 if ((tty
->count
== 1) && (info
->count
!= 1)) {
3756 * Uh, oh. tty->count is 1, which means that the tty
3757 * structure will be freed. Info->count should always
3758 * be one in these conditions. If it's greater than
3759 * one, we've got real problems, since it means the
3760 * serial port won't be shutdown.
3763 "rs_close: bad serial port count; tty->count is 1, "
3764 "info->count is %d\n", info
->count
);
3767 if (--info
->count
< 0) {
3768 printk(KERN_CRIT
"rs_close: bad serial port count for ttyS%d: %d\n",
3769 info
->line
, info
->count
);
3773 local_irq_restore(flags
);
3776 info
->flags
|= ASYNC_CLOSING
;
3778 * Save the termios structure, since this port may have
3779 * separate termios for callout and dialin.
3781 if (info
->flags
& ASYNC_NORMAL_ACTIVE
)
3782 info
->normal_termios
= *tty
->termios
;
3784 * Now we wait for the transmit buffer to clear; and we notify
3785 * the line discipline to only process XON/XOFF characters.
3788 if (info
->closing_wait
!= ASYNC_CLOSING_WAIT_NONE
)
3789 tty_wait_until_sent(tty
, info
->closing_wait
);
3791 * At this point we stop accepting input. To do this, we
3792 * disable the serial receiver and the DMA receive interrupt.
3794 #ifdef SERIAL_HANDLE_EARLY_ERRORS
3795 e100_disable_serial_data_irq(info
);
3798 #ifndef CONFIG_SVINTO_SIM
3799 e100_disable_rx(info
);
3800 e100_disable_rx_irq(info
);
3802 if (info
->flags
& ASYNC_INITIALIZED
) {
3804 * Before we drop DTR, make sure the UART transmitter
3805 * has completely drained; this is especially
3806 * important as we have a transmit FIFO!
3808 rs_wait_until_sent(tty
, HZ
);
3813 rs_flush_buffer(tty
);
3814 tty_ldisc_flush(tty
);
3817 info
->port
.tty
= NULL
;
3818 if (info
->blocked_open
) {
3819 if (info
->close_delay
)
3820 schedule_timeout_interruptible(info
->close_delay
);
3821 wake_up_interruptible(&info
->open_wait
);
3823 info
->flags
&= ~(ASYNC_NORMAL_ACTIVE
|ASYNC_CLOSING
);
3824 wake_up_interruptible(&info
->close_wait
);
3825 local_irq_restore(flags
);
3829 #if defined(CONFIG_ETRAX_RS485)
3830 if (info
->rs485
.enabled
) {
3831 info
->rs485
.enabled
= 0;
3832 #if defined(CONFIG_ETRAX_RS485_ON_PA)
3833 *R_PORT_PA_DATA
= port_pa_data_shadow
&= ~(1 << rs485_pa_bit
);
3835 #if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
3836 REG_SHADOW_SET(R_PORT_G_DATA
, port_g_data_shadow
,
3837 rs485_port_g_bit
, 0);
3839 #if defined(CONFIG_ETRAX_RS485_LTC1387)
3840 REG_SHADOW_SET(R_PORT_G_DATA
, port_g_data_shadow
,
3841 CONFIG_ETRAX_RS485_LTC1387_DXEN_PORT_G_BIT
, 0);
3842 REG_SHADOW_SET(R_PORT_G_DATA
, port_g_data_shadow
,
3843 CONFIG_ETRAX_RS485_LTC1387_RXEN_PORT_G_BIT
, 0);
3849 * Release any allocated DMA irq's.
3851 if (info
->dma_in_enabled
) {
3852 free_irq(info
->dma_in_irq_nbr
, info
);
3853 cris_free_dma(info
->dma_in_nbr
, info
->dma_in_irq_description
);
3854 info
->uses_dma_in
= 0;
3855 #ifdef SERIAL_DEBUG_OPEN
3856 printk(KERN_DEBUG
"DMA irq '%s' freed\n",
3857 info
->dma_in_irq_description
);
3860 if (info
->dma_out_enabled
) {
3861 free_irq(info
->dma_out_irq_nbr
, info
);
3862 cris_free_dma(info
->dma_out_nbr
, info
->dma_out_irq_description
);
3863 info
->uses_dma_out
= 0;
3864 #ifdef SERIAL_DEBUG_OPEN
3865 printk(KERN_DEBUG
"DMA irq '%s' freed\n",
3866 info
->dma_out_irq_description
);
3872 * rs_wait_until_sent() --- wait until the transmitter is empty
3874 static void rs_wait_until_sent(struct tty_struct
*tty
, int timeout
)
3876 unsigned long orig_jiffies
;
3877 struct e100_serial
*info
= (struct e100_serial
*)tty
->driver_data
;
3878 unsigned long curr_time
= jiffies
;
3879 unsigned long curr_time_usec
= GET_JIFFIES_USEC();
3881 (curr_time
- info
->last_tx_active
) * (1000000/HZ
) +
3882 curr_time_usec
- info
->last_tx_active_usec
;
3885 * Check R_DMA_CHx_STATUS bit 0-6=number of available bytes in FIFO
3886 * R_DMA_CHx_HWSW bit 31-16=nbr of bytes left in DMA buffer (0=64k)
3889 orig_jiffies
= jiffies
;
3890 while (info
->xmit
.head
!= info
->xmit
.tail
|| /* More in send queue */
3891 (*info
->ostatusadr
& 0x007f) || /* more in FIFO */
3892 (elapsed_usec
< 2*info
->char_time_usec
)) {
3893 schedule_timeout_interruptible(1);
3894 if (signal_pending(current
))
3896 if (timeout
&& time_after(jiffies
, orig_jiffies
+ timeout
))
3898 curr_time
= jiffies
;
3899 curr_time_usec
= GET_JIFFIES_USEC();
3901 (curr_time
- info
->last_tx_active
) * (1000000/HZ
) +
3902 curr_time_usec
- info
->last_tx_active_usec
;
3904 set_current_state(TASK_RUNNING
);
3909 * rs_hangup() --- called by tty_hangup() when a hangup is signaled.
3912 rs_hangup(struct tty_struct
*tty
)
3914 struct e100_serial
* info
= (struct e100_serial
*)tty
->driver_data
;
3916 rs_flush_buffer(tty
);
3920 info
->flags
&= ~ASYNC_NORMAL_ACTIVE
;
3921 info
->port
.tty
= NULL
;
3922 wake_up_interruptible(&info
->open_wait
);
3926 * ------------------------------------------------------------
3927 * rs_open() and friends
3928 * ------------------------------------------------------------
3931 block_til_ready(struct tty_struct
*tty
, struct file
* filp
,
3932 struct e100_serial
*info
)
3934 DECLARE_WAITQUEUE(wait
, current
);
3935 unsigned long flags
;
3937 int do_clocal
= 0, extra_count
= 0;
3940 * If the device is in the middle of being closed, then block
3941 * until it's done, and then try again.
3943 if (tty_hung_up_p(filp
) ||
3944 (info
->flags
& ASYNC_CLOSING
)) {
3945 wait_event_interruptible(info
->close_wait
,
3946 !(info
->flags
& ASYNC_CLOSING
));
3947 #ifdef SERIAL_DO_RESTART
3948 if (info
->flags
& ASYNC_HUP_NOTIFY
)
3951 return -ERESTARTSYS
;
3958 * If non-blocking mode is set, or the port is not enabled,
3959 * then make the check up front and then exit.
3961 if ((filp
->f_flags
& O_NONBLOCK
) ||
3962 (tty
->flags
& (1 << TTY_IO_ERROR
))) {
3963 info
->flags
|= ASYNC_NORMAL_ACTIVE
;
3967 if (tty
->termios
->c_cflag
& CLOCAL
) {
3972 * Block waiting for the carrier detect and the line to become
3973 * free (i.e., not in use by the callout). While we are in
3974 * this loop, info->count is dropped by one, so that
3975 * rs_close() knows when to free things. We restore it upon
3976 * exit, either normal or abnormal.
3979 add_wait_queue(&info
->open_wait
, &wait
);
3980 #ifdef SERIAL_DEBUG_OPEN
3981 printk("block_til_ready before block: ttyS%d, count = %d\n",
3982 info
->line
, info
->count
);
3984 local_irq_save(flags
);
3985 if (!tty_hung_up_p(filp
)) {
3989 local_irq_restore(flags
);
3990 info
->blocked_open
++;
3992 local_irq_save(flags
);
3993 /* assert RTS and DTR */
3996 local_irq_restore(flags
);
3997 set_current_state(TASK_INTERRUPTIBLE
);
3998 if (tty_hung_up_p(filp
) ||
3999 !(info
->flags
& ASYNC_INITIALIZED
)) {
4000 #ifdef SERIAL_DO_RESTART
4001 if (info
->flags
& ASYNC_HUP_NOTIFY
)
4004 retval
= -ERESTARTSYS
;
4010 if (!(info
->flags
& ASYNC_CLOSING
) && do_clocal
)
4011 /* && (do_clocal || DCD_IS_ASSERTED) */
4013 if (signal_pending(current
)) {
4014 retval
= -ERESTARTSYS
;
4017 #ifdef SERIAL_DEBUG_OPEN
4018 printk("block_til_ready blocking: ttyS%d, count = %d\n",
4019 info
->line
, info
->count
);
4023 set_current_state(TASK_RUNNING
);
4024 remove_wait_queue(&info
->open_wait
, &wait
);
4027 info
->blocked_open
--;
4028 #ifdef SERIAL_DEBUG_OPEN
4029 printk("block_til_ready after blocking: ttyS%d, count = %d\n",
4030 info
->line
, info
->count
);
4034 info
->flags
|= ASYNC_NORMAL_ACTIVE
;
4039 deinit_port(struct e100_serial
*info
)
4041 if (info
->dma_out_enabled
) {
4042 cris_free_dma(info
->dma_out_nbr
, info
->dma_out_irq_description
);
4043 free_irq(info
->dma_out_irq_nbr
, info
);
4045 if (info
->dma_in_enabled
) {
4046 cris_free_dma(info
->dma_in_nbr
, info
->dma_in_irq_description
);
4047 free_irq(info
->dma_in_irq_nbr
, info
);
4052 * This routine is called whenever a serial port is opened.
4053 * It performs the serial-specific initialization for the tty structure.
4056 rs_open(struct tty_struct
*tty
, struct file
* filp
)
4058 struct e100_serial
*info
;
4061 int allocated_resources
= 0;
4063 /* find which port we want to open */
4066 if (line
< 0 || line
>= NR_PORTS
)
4069 /* find the corresponding e100_serial struct in the table */
4070 info
= rs_table
+ line
;
4072 /* don't allow the opening of ports that are not enabled in the HW config */
4076 #ifdef SERIAL_DEBUG_OPEN
4077 printk("[%d] rs_open %s, count = %d\n", current
->pid
, tty
->name
,
4082 tty
->driver_data
= info
;
4083 info
->port
.tty
= tty
;
4085 info
->port
.tty
->low_latency
= (info
->flags
& ASYNC_LOW_LATENCY
) ? 1 : 0;
4088 page
= get_zeroed_page(GFP_KERNEL
);
4095 tmp_buf
= (unsigned char *) page
;
4099 * If the port is in the middle of closing, bail out now
4101 if (tty_hung_up_p(filp
) ||
4102 (info
->flags
& ASYNC_CLOSING
)) {
4103 wait_event_interruptible(info
->close_wait
,
4104 !(info
->flags
& ASYNC_CLOSING
));
4105 #ifdef SERIAL_DO_RESTART
4106 return ((info
->flags
& ASYNC_HUP_NOTIFY
) ?
4107 -EAGAIN
: -ERESTARTSYS
);
4114 * If DMA is enabled try to allocate the irq's.
4116 if (info
->count
== 1) {
4117 allocated_resources
= 1;
4118 if (info
->dma_in_enabled
) {
4119 if (request_irq(info
->dma_in_irq_nbr
,
4121 info
->dma_in_irq_flags
,
4122 info
->dma_in_irq_description
,
4124 printk(KERN_WARNING
"DMA irq '%s' busy; "
4125 "falling back to non-DMA mode\n",
4126 info
->dma_in_irq_description
);
4127 /* Make sure we never try to use DMA in */
4128 /* for the port again. */
4129 info
->dma_in_enabled
= 0;
4130 } else if (cris_request_dma(info
->dma_in_nbr
,
4131 info
->dma_in_irq_description
,
4132 DMA_VERBOSE_ON_ERROR
,
4134 free_irq(info
->dma_in_irq_nbr
, info
);
4135 printk(KERN_WARNING
"DMA '%s' busy; "
4136 "falling back to non-DMA mode\n",
4137 info
->dma_in_irq_description
);
4138 /* Make sure we never try to use DMA in */
4139 /* for the port again. */
4140 info
->dma_in_enabled
= 0;
4142 #ifdef SERIAL_DEBUG_OPEN
4144 printk(KERN_DEBUG
"DMA irq '%s' allocated\n",
4145 info
->dma_in_irq_description
);
4148 if (info
->dma_out_enabled
) {
4149 if (request_irq(info
->dma_out_irq_nbr
,
4151 info
->dma_out_irq_flags
,
4152 info
->dma_out_irq_description
,
4154 printk(KERN_WARNING
"DMA irq '%s' busy; "
4155 "falling back to non-DMA mode\n",
4156 info
->dma_out_irq_description
);
4157 /* Make sure we never try to use DMA out */
4158 /* for the port again. */
4159 info
->dma_out_enabled
= 0;
4160 } else if (cris_request_dma(info
->dma_out_nbr
,
4161 info
->dma_out_irq_description
,
4162 DMA_VERBOSE_ON_ERROR
,
4164 free_irq(info
->dma_out_irq_nbr
, info
);
4165 printk(KERN_WARNING
"DMA '%s' busy; "
4166 "falling back to non-DMA mode\n",
4167 info
->dma_out_irq_description
);
4168 /* Make sure we never try to use DMA out */
4169 /* for the port again. */
4170 info
->dma_out_enabled
= 0;
4172 #ifdef SERIAL_DEBUG_OPEN
4174 printk(KERN_DEBUG
"DMA irq '%s' allocated\n",
4175 info
->dma_out_irq_description
);
4181 * Start up the serial port
4184 retval
= startup(info
);
4186 if (allocated_resources
)
4189 /* FIXME Decrease count info->count here too? */
4194 retval
= block_til_ready(tty
, filp
, info
);
4196 #ifdef SERIAL_DEBUG_OPEN
4197 printk("rs_open returning after block_til_ready with %d\n",
4200 if (allocated_resources
)
4206 if ((info
->count
== 1) && (info
->flags
& ASYNC_SPLIT_TERMIOS
)) {
4207 *tty
->termios
= info
->normal_termios
;
4211 #ifdef SERIAL_DEBUG_OPEN
4212 printk("rs_open ttyS%d successful...\n", info
->line
);
4214 DLOG_INT_TRIG( log_int_pos
= 0);
4216 DFLIP( if (info
->line
== SERIAL_DEBUG_LINE
) {
4217 info
->icount
.rx
= 0;
4224 * /proc fs routines....
4227 static int line_info(char *buf
, struct e100_serial
*info
)
4233 ret
= sprintf(buf
, "%d: uart:E100 port:%lX irq:%d",
4234 info
->line
, (unsigned long)info
->port
, info
->irq
);
4236 if (!info
->port
|| (info
->type
== PORT_UNKNOWN
)) {
4237 ret
+= sprintf(buf
+ret
, "\n");
4243 if (!E100_RTS_GET(info
))
4244 strcat(stat_buf
, "|RTS");
4245 if (!E100_CTS_GET(info
))
4246 strcat(stat_buf
, "|CTS");
4247 if (!E100_DTR_GET(info
))
4248 strcat(stat_buf
, "|DTR");
4249 if (!E100_DSR_GET(info
))
4250 strcat(stat_buf
, "|DSR");
4251 if (!E100_CD_GET(info
))
4252 strcat(stat_buf
, "|CD");
4253 if (!E100_RI_GET(info
))
4254 strcat(stat_buf
, "|RI");
4256 ret
+= sprintf(buf
+ret
, " baud:%d", info
->baud
);
4258 ret
+= sprintf(buf
+ret
, " tx:%lu rx:%lu",
4259 (unsigned long)info
->icount
.tx
,
4260 (unsigned long)info
->icount
.rx
);
4261 tmp
= CIRC_CNT(info
->xmit
.head
, info
->xmit
.tail
, SERIAL_XMIT_SIZE
);
4263 ret
+= sprintf(buf
+ret
, " tx_pend:%lu/%lu",
4265 (unsigned long)SERIAL_XMIT_SIZE
);
4268 ret
+= sprintf(buf
+ret
, " rx_pend:%lu/%lu",
4269 (unsigned long)info
->recv_cnt
,
4270 (unsigned long)info
->max_recv_cnt
);
4273 if (info
->port
.tty
) {
4275 if (info
->port
.tty
->stopped
)
4276 ret
+= sprintf(buf
+ret
, " stopped:%i",
4277 (int)info
->port
.tty
->stopped
);
4278 if (info
->port
.tty
->hw_stopped
)
4279 ret
+= sprintf(buf
+ret
, " hw_stopped:%i",
4280 (int)info
->port
.tty
->hw_stopped
);
4284 unsigned char rstat
= info
->port
[REG_STATUS
];
4285 if (rstat
& IO_MASK(R_SERIAL0_STATUS
, xoff_detect
) )
4286 ret
+= sprintf(buf
+ret
, " xoff_detect:1");
4294 if (info
->icount
.frame
)
4295 ret
+= sprintf(buf
+ret
, " fe:%lu",
4296 (unsigned long)info
->icount
.frame
);
4298 if (info
->icount
.parity
)
4299 ret
+= sprintf(buf
+ret
, " pe:%lu",
4300 (unsigned long)info
->icount
.parity
);
4302 if (info
->icount
.brk
)
4303 ret
+= sprintf(buf
+ret
, " brk:%lu",
4304 (unsigned long)info
->icount
.brk
);
4306 if (info
->icount
.overrun
)
4307 ret
+= sprintf(buf
+ret
, " oe:%lu",
4308 (unsigned long)info
->icount
.overrun
);
4311 * Last thing is the RS-232 status lines
4313 ret
+= sprintf(buf
+ret
, " %s\n", stat_buf
+1);
4317 int rs_read_proc(char *page
, char **start
, off_t off
, int count
,
4318 int *eof
, void *data
)
4323 len
+= sprintf(page
, "serinfo:1.0 driver:%s\n",
4325 for (i
= 0; i
< NR_PORTS
&& len
< 4000; i
++) {
4326 if (!rs_table
[i
].enabled
)
4328 l
= line_info(page
+ len
, &rs_table
[i
]);
4330 if (len
+begin
> off
+count
)
4332 if (len
+begin
< off
) {
4337 #ifdef DEBUG_LOG_INCLUDED
4338 for (i
= 0; i
< debug_log_pos
; i
++) {
4339 len
+= sprintf(page
+ len
, "%-4i %lu.%lu ", i
, debug_log
[i
].time
, timer_data_to_ns(debug_log
[i
].timer_data
));
4340 len
+= sprintf(page
+ len
, debug_log
[i
].string
, debug_log
[i
].value
);
4341 if (len
+begin
> off
+count
)
4343 if (len
+begin
< off
) {
4348 len
+= sprintf(page
+ len
, "debug_log %i/%i %li bytes\n",
4349 i
, DEBUG_LOG_SIZE
, begin
+len
);
4355 if (off
>= len
+begin
)
4357 *start
= page
+ (off
-begin
);
4358 return ((count
< begin
+len
-off
) ? count
: begin
+len
-off
);
4361 /* Finally, routines used to initialize the serial driver. */
4364 show_serial_version(void)
4367 "ETRAX 100LX serial-driver %s, (c) 2000-2004 Axis Communications AB\r\n",
4368 &serial_version
[11]); /* "$Revision: x.yy" */
4371 /* rs_init inits the driver at boot (using the module_init chain) */
4373 static const struct tty_operations rs_ops
= {
4377 .flush_chars
= rs_flush_chars
,
4378 .write_room
= rs_write_room
,
4379 .chars_in_buffer
= rs_chars_in_buffer
,
4380 .flush_buffer
= rs_flush_buffer
,
4382 .throttle
= rs_throttle
,
4383 .unthrottle
= rs_unthrottle
,
4384 .set_termios
= rs_set_termios
,
4387 .hangup
= rs_hangup
,
4388 .break_ctl
= rs_break
,
4389 .send_xchar
= rs_send_xchar
,
4390 .wait_until_sent
= rs_wait_until_sent
,
4391 .read_proc
= rs_read_proc
,
4392 .tiocmget
= rs_tiocmget
,
4393 .tiocmset
= rs_tiocmset
4400 struct e100_serial
*info
;
4401 struct tty_driver
*driver
= alloc_tty_driver(NR_PORTS
);
4406 show_serial_version();
4408 /* Setup the timed flush handler system */
4410 #if !defined(CONFIG_ETRAX_SERIAL_FAST_TIMER)
4411 setup_timer(&flush_timer
, timed_flush_handler
, 0);
4412 mod_timer(&flush_timer
, jiffies
+ 5);
4415 #if defined(CONFIG_ETRAX_RS485)
4416 #if defined(CONFIG_ETRAX_RS485_ON_PA)
4417 if (cris_io_interface_allocate_pins(if_ser0
, 'a', rs485_pa_bit
,
4419 printk(KERN_CRIT
"ETRAX100LX serial: Could not allocate "
4424 #if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
4425 if (cris_io_interface_allocate_pins(if_ser0
, 'g', rs485_pa_bit
,
4426 rs485_port_g_bit
)) {
4427 printk(KERN_CRIT
"ETRAX100LX serial: Could not allocate "
4434 /* Initialize the tty_driver structure */
4436 driver
->driver_name
= "serial";
4437 driver
->name
= "ttyS";
4438 driver
->major
= TTY_MAJOR
;
4439 driver
->minor_start
= 64;
4440 driver
->type
= TTY_DRIVER_TYPE_SERIAL
;
4441 driver
->subtype
= SERIAL_TYPE_NORMAL
;
4442 driver
->init_termios
= tty_std_termios
;
4443 driver
->init_termios
.c_cflag
=
4444 B115200
| CS8
| CREAD
| HUPCL
| CLOCAL
; /* is normally B9600 default... */
4445 driver
->init_termios
.c_ispeed
= 115200;
4446 driver
->init_termios
.c_ospeed
= 115200;
4447 driver
->flags
= TTY_DRIVER_REAL_RAW
| TTY_DRIVER_DYNAMIC_DEV
;
4448 driver
->termios
= serial_termios
;
4449 driver
->termios_locked
= serial_termios_locked
;
4451 tty_set_operations(driver
, &rs_ops
);
4452 serial_driver
= driver
;
4453 if (tty_register_driver(driver
))
4454 panic("Couldn't register serial driver\n");
4455 /* do some initializing for the separate ports */
4457 for (i
= 0, info
= rs_table
; i
< NR_PORTS
; i
++,info
++) {
4458 if (info
->enabled
) {
4459 if (cris_request_io_interface(info
->io_if
,
4460 info
->io_if_description
)) {
4461 printk(KERN_CRIT
"ETRAX100LX async serial: "
4462 "Could not allocate IO pins for "
4464 info
->io_if_description
, i
);
4468 info
->uses_dma_in
= 0;
4469 info
->uses_dma_out
= 0;
4471 info
->port
.tty
= NULL
;
4472 info
->type
= PORT_ETRAX
;
4473 info
->tr_running
= 0;
4474 info
->forced_eop
= 0;
4475 info
->baud_base
= DEF_BAUD_BASE
;
4476 info
->custom_divisor
= 0;
4478 info
->close_delay
= 5*HZ
/10;
4479 info
->closing_wait
= 30*HZ
;
4483 info
->blocked_open
= 0;
4484 info
->normal_termios
= driver
->init_termios
;
4485 init_waitqueue_head(&info
->open_wait
);
4486 init_waitqueue_head(&info
->close_wait
);
4487 info
->xmit
.buf
= NULL
;
4488 info
->xmit
.tail
= info
->xmit
.head
= 0;
4489 info
->first_recv_buffer
= info
->last_recv_buffer
= NULL
;
4490 info
->recv_cnt
= info
->max_recv_cnt
= 0;
4491 info
->last_tx_active_usec
= 0;
4492 info
->last_tx_active
= 0;
4494 #if defined(CONFIG_ETRAX_RS485)
4495 /* Set sane defaults */
4496 info
->rs485
.rts_on_send
= 0;
4497 info
->rs485
.rts_after_sent
= 1;
4498 info
->rs485
.delay_rts_before_send
= 0;
4499 info
->rs485
.enabled
= 0;
4501 INIT_WORK(&info
->work
, do_softint
);
4503 if (info
->enabled
) {
4504 printk(KERN_INFO
"%s%d at 0x%x is a builtin UART with DMA\n",
4505 serial_driver
->name
, info
->line
, (unsigned int)info
->port
);
4508 #ifdef CONFIG_ETRAX_FAST_TIMER
4509 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
4510 memset(fast_timers
, 0, sizeof(fast_timers
));
4512 #ifdef CONFIG_ETRAX_RS485
4513 memset(fast_timers_rs485
, 0, sizeof(fast_timers_rs485
));
4518 #ifndef CONFIG_SVINTO_SIM
4519 #ifndef CONFIG_ETRAX_KGDB
4520 /* Not needed in simulator. May only complicate stuff. */
4521 /* hook the irq's for DMA channel 6 and 7, serial output and input, and some more... */
4523 if (request_irq(SERIAL_IRQ_NBR
, ser_interrupt
,
4524 IRQF_SHARED
| IRQF_DISABLED
, "serial ", driver
))
4525 panic("%s: Failed to request irq8", __func__
);
4528 #endif /* CONFIG_SVINTO_SIM */
4533 /* this makes sure that rs_init is called during kernel boot */
4535 module_init(rs_init
);