2 * Driver for the PSC of the Freescale MPC52xx PSCs configured as UARTs.
4 * FIXME According to the usermanual the status bits in the status register
5 * are only updated when the peripherals access the FIFO and not when the
6 * CPU access them. So since we use this bits to know when we stop writing
7 * and reading, they may not be updated in-time and a race condition may
8 * exists. But I haven't be able to prove this and I don't care. But if
9 * any problem arises, it might worth checking. The TX/RX FIFO Stats
10 * registers should be used in addition.
11 * Update: Actually, they seem updated ... At least the bits we use.
14 * Maintainer : Sylvain Munaut <tnt@246tNt.com>
16 * Some of the code has been inspired/copied from the 2.4 code written
17 * by Dale Farnsworth <dfarnsworth@mvista.com>.
19 * Copyright (C) 2004-2005 Sylvain Munaut <tnt@246tNt.com>
20 * Copyright (C) 2003 MontaVista, Software, Inc.
22 * This file is licensed under the terms of the GNU General Public License
23 * version 2. This program is licensed "as is" without any warranty of any
24 * kind, whether express or implied.
27 /* Platform device Usage :
29 * Since PSCs can have multiple function, the correct driver for each one
30 * is selected by calling mpc52xx_match_psc_function(...). The function
31 * handled by this driver is "uart".
33 * The driver init all necessary registers to place the PSC in uart mode without
34 * DCD. However, the pin multiplexing aren't changed and should be set either
35 * by the bootloader or in the platform init code.
37 * The idx field must be equal to the PSC index ( e.g. 0 for PSC1, 1 for PSC2,
38 * and so on). So the PSC1 is mapped to /dev/ttyPSC0, PSC2 to /dev/ttyPSC1 and
39 * so on. But be warned, it's an ABSOLUTE REQUIREMENT ! This is needed mainly
40 * fpr the console code : without this 1:1 mapping, at early boot time, when we
41 * are parsing the kernel args console=ttyPSC?, we wouldn't know which PSC it
45 #include <linux/platform_device.h>
46 #include <linux/module.h>
47 #include <linux/tty.h>
48 #include <linux/serial.h>
49 #include <linux/sysrq.h>
50 #include <linux/console.h>
52 #include <asm/delay.h>
55 #include <asm/mpc52xx.h>
56 #include <asm/mpc52xx_psc.h>
58 #if defined(CONFIG_SERIAL_MPC52xx_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
62 #include <linux/serial_core.h>
65 /* We've been assigned a range on the "Low-density serial ports" major */
66 #define SERIAL_PSC_MAJOR 204
67 #define SERIAL_PSC_MINOR 148
70 #define ISR_PASS_LIMIT 256 /* Max number of iteration in the interrupt */
73 static struct uart_port mpc52xx_uart_ports
[MPC52xx_PSC_MAXNUM
];
74 /* Rem: - We use the read_status_mask as a shadow of
75 * psc->mpc52xx_psc_imr
76 * - It's important that is array is all zero on start as we
77 * use it to know if it's initialized or not ! If it's not sure
78 * it's cleared, then a memset(...,0,...) should be added to
82 #define PSC(port) ((struct mpc52xx_psc __iomem *)((port)->membase))
85 /* Forward declaration of the interruption handling routine */
86 static irqreturn_t
mpc52xx_uart_int(int irq
,void *dev_id
);
89 /* Simple macro to test if a port is console or not. This one is taken
90 * for serial_core.c and maybe should be moved to serial_core.h ? */
91 #ifdef CONFIG_SERIAL_CORE_CONSOLE
92 #define uart_console(port) ((port)->cons && (port)->cons->index == (port)->line)
94 #define uart_console(port) (0)
98 /* ======================================================================== */
100 /* ======================================================================== */
103 mpc52xx_uart_tx_empty(struct uart_port
*port
)
105 int status
= in_be16(&PSC(port
)->mpc52xx_psc_status
);
106 return (status
& MPC52xx_PSC_SR_TXEMP
) ? TIOCSER_TEMT
: 0;
110 mpc52xx_uart_set_mctrl(struct uart_port
*port
, unsigned int mctrl
)
112 /* Not implemented */
116 mpc52xx_uart_get_mctrl(struct uart_port
*port
)
118 /* Not implemented */
119 return TIOCM_CTS
| TIOCM_DSR
| TIOCM_CAR
;
123 mpc52xx_uart_stop_tx(struct uart_port
*port
)
125 /* port->lock taken by caller */
126 port
->read_status_mask
&= ~MPC52xx_PSC_IMR_TXRDY
;
127 out_be16(&PSC(port
)->mpc52xx_psc_imr
,port
->read_status_mask
);
131 mpc52xx_uart_start_tx(struct uart_port
*port
)
133 /* port->lock taken by caller */
134 port
->read_status_mask
|= MPC52xx_PSC_IMR_TXRDY
;
135 out_be16(&PSC(port
)->mpc52xx_psc_imr
,port
->read_status_mask
);
139 mpc52xx_uart_send_xchar(struct uart_port
*port
, char ch
)
142 spin_lock_irqsave(&port
->lock
, flags
);
146 /* Make sure tx interrupts are on */
147 /* Truly necessary ??? They should be anyway */
148 port
->read_status_mask
|= MPC52xx_PSC_IMR_TXRDY
;
149 out_be16(&PSC(port
)->mpc52xx_psc_imr
,port
->read_status_mask
);
152 spin_unlock_irqrestore(&port
->lock
, flags
);
156 mpc52xx_uart_stop_rx(struct uart_port
*port
)
158 /* port->lock taken by caller */
159 port
->read_status_mask
&= ~MPC52xx_PSC_IMR_RXRDY
;
160 out_be16(&PSC(port
)->mpc52xx_psc_imr
,port
->read_status_mask
);
164 mpc52xx_uart_enable_ms(struct uart_port
*port
)
166 /* Not implemented */
170 mpc52xx_uart_break_ctl(struct uart_port
*port
, int ctl
)
173 spin_lock_irqsave(&port
->lock
, flags
);
176 out_8(&PSC(port
)->command
,MPC52xx_PSC_START_BRK
);
178 out_8(&PSC(port
)->command
,MPC52xx_PSC_STOP_BRK
);
180 spin_unlock_irqrestore(&port
->lock
, flags
);
184 mpc52xx_uart_startup(struct uart_port
*port
)
186 struct mpc52xx_psc __iomem
*psc
= PSC(port
);
190 ret
= request_irq(port
->irq
, mpc52xx_uart_int
,
191 IRQF_DISABLED
| IRQF_SAMPLE_RANDOM
, "mpc52xx_psc_uart", port
);
195 /* Reset/activate the port, clear and enable interrupts */
196 out_8(&psc
->command
,MPC52xx_PSC_RST_RX
);
197 out_8(&psc
->command
,MPC52xx_PSC_RST_TX
);
199 out_be32(&psc
->sicr
,0); /* UART mode DCD ignored */
201 out_be16(&psc
->mpc52xx_psc_clock_select
, 0xdd00); /* /16 prescaler on */
203 out_8(&psc
->rfcntl
, 0x00);
204 out_be16(&psc
->rfalarm
, 0x1ff);
205 out_8(&psc
->tfcntl
, 0x07);
206 out_be16(&psc
->tfalarm
, 0x80);
208 port
->read_status_mask
|= MPC52xx_PSC_IMR_RXRDY
| MPC52xx_PSC_IMR_TXRDY
;
209 out_be16(&psc
->mpc52xx_psc_imr
,port
->read_status_mask
);
211 out_8(&psc
->command
,MPC52xx_PSC_TX_ENABLE
);
212 out_8(&psc
->command
,MPC52xx_PSC_RX_ENABLE
);
218 mpc52xx_uart_shutdown(struct uart_port
*port
)
220 struct mpc52xx_psc __iomem
*psc
= PSC(port
);
222 /* Shut down the port, interrupt and all */
223 out_8(&psc
->command
,MPC52xx_PSC_RST_RX
);
224 out_8(&psc
->command
,MPC52xx_PSC_RST_TX
);
226 port
->read_status_mask
= 0;
227 out_be16(&psc
->mpc52xx_psc_imr
,port
->read_status_mask
);
229 /* Release interrupt */
230 free_irq(port
->irq
, port
);
234 mpc52xx_uart_set_termios(struct uart_port
*port
, struct termios
*new,
237 struct mpc52xx_psc __iomem
*psc
= PSC(port
);
239 unsigned char mr1
, mr2
;
241 unsigned int j
, baud
, quot
;
243 /* Prepare what we're gonna write */
246 switch (new->c_cflag
& CSIZE
) {
247 case CS5
: mr1
|= MPC52xx_PSC_MODE_5_BITS
;
249 case CS6
: mr1
|= MPC52xx_PSC_MODE_6_BITS
;
251 case CS7
: mr1
|= MPC52xx_PSC_MODE_7_BITS
;
254 default: mr1
|= MPC52xx_PSC_MODE_8_BITS
;
257 if (new->c_cflag
& PARENB
) {
258 mr1
|= (new->c_cflag
& PARODD
) ?
259 MPC52xx_PSC_MODE_PARODD
: MPC52xx_PSC_MODE_PAREVEN
;
261 mr1
|= MPC52xx_PSC_MODE_PARNONE
;
266 if (new->c_cflag
& CSTOPB
)
267 mr2
|= MPC52xx_PSC_MODE_TWO_STOP
;
269 mr2
|= ((new->c_cflag
& CSIZE
) == CS5
) ?
270 MPC52xx_PSC_MODE_ONE_STOP_5_BITS
:
271 MPC52xx_PSC_MODE_ONE_STOP
;
274 baud
= uart_get_baud_rate(port
, new, old
, 0, port
->uartclk
/16);
275 quot
= uart_get_divisor(port
, baud
);
279 spin_lock_irqsave(&port
->lock
, flags
);
281 /* Update the per-port timeout */
282 uart_update_timeout(port
, new->c_cflag
, baud
);
284 /* Do our best to flush TX & RX, so we don't loose anything */
285 /* But we don't wait indefinitly ! */
286 j
= 5000000; /* Maximum wait */
287 /* FIXME Can't receive chars since set_termios might be called at early
288 * boot for the console, all stuff is not yet ready to receive at that
289 * time and that just makes the kernel oops */
290 /* while (j-- && mpc52xx_uart_int_rx_chars(port)); */
291 while (!(in_be16(&psc
->mpc52xx_psc_status
) & MPC52xx_PSC_SR_TXEMP
) &&
296 printk( KERN_ERR
"mpc52xx_uart.c: "
297 "Unable to flush RX & TX fifos in-time in set_termios."
298 "Some chars may have been lost.\n" );
300 /* Reset the TX & RX */
301 out_8(&psc
->command
,MPC52xx_PSC_RST_RX
);
302 out_8(&psc
->command
,MPC52xx_PSC_RST_TX
);
304 /* Send new mode settings */
305 out_8(&psc
->command
,MPC52xx_PSC_SEL_MODE_REG_1
);
306 out_8(&psc
->mode
,mr1
);
307 out_8(&psc
->mode
,mr2
);
308 out_8(&psc
->ctur
,ctr
>> 8);
309 out_8(&psc
->ctlr
,ctr
& 0xff);
311 /* Reenable TX & RX */
312 out_8(&psc
->command
,MPC52xx_PSC_TX_ENABLE
);
313 out_8(&psc
->command
,MPC52xx_PSC_RX_ENABLE
);
315 /* We're all set, release the lock */
316 spin_unlock_irqrestore(&port
->lock
, flags
);
320 mpc52xx_uart_type(struct uart_port
*port
)
322 return port
->type
== PORT_MPC52xx
? "MPC52xx PSC" : NULL
;
326 mpc52xx_uart_release_port(struct uart_port
*port
)
328 if (port
->flags
& UPF_IOREMAP
) { /* remapped by us ? */
329 iounmap(port
->membase
);
330 port
->membase
= NULL
;
333 release_mem_region(port
->mapbase
, MPC52xx_PSC_SIZE
);
337 mpc52xx_uart_request_port(struct uart_port
*port
)
341 if (port
->flags
& UPF_IOREMAP
) /* Need to remap ? */
342 port
->membase
= ioremap(port
->mapbase
, MPC52xx_PSC_SIZE
);
347 err
= request_mem_region(port
->mapbase
, MPC52xx_PSC_SIZE
,
348 "mpc52xx_psc_uart") != NULL
? 0 : -EBUSY
;
350 if (err
&& (port
->flags
& UPF_IOREMAP
)) {
351 iounmap(port
->membase
);
352 port
->membase
= NULL
;
359 mpc52xx_uart_config_port(struct uart_port
*port
, int flags
)
361 if ( (flags
& UART_CONFIG_TYPE
) &&
362 (mpc52xx_uart_request_port(port
) == 0) )
363 port
->type
= PORT_MPC52xx
;
367 mpc52xx_uart_verify_port(struct uart_port
*port
, struct serial_struct
*ser
)
369 if ( ser
->type
!= PORT_UNKNOWN
&& ser
->type
!= PORT_MPC52xx
)
372 if ( (ser
->irq
!= port
->irq
) ||
373 (ser
->io_type
!= SERIAL_IO_MEM
) ||
374 (ser
->baud_base
!= port
->uartclk
) ||
375 (ser
->iomem_base
!= (void*)port
->mapbase
) ||
383 static struct uart_ops mpc52xx_uart_ops
= {
384 .tx_empty
= mpc52xx_uart_tx_empty
,
385 .set_mctrl
= mpc52xx_uart_set_mctrl
,
386 .get_mctrl
= mpc52xx_uart_get_mctrl
,
387 .stop_tx
= mpc52xx_uart_stop_tx
,
388 .start_tx
= mpc52xx_uart_start_tx
,
389 .send_xchar
= mpc52xx_uart_send_xchar
,
390 .stop_rx
= mpc52xx_uart_stop_rx
,
391 .enable_ms
= mpc52xx_uart_enable_ms
,
392 .break_ctl
= mpc52xx_uart_break_ctl
,
393 .startup
= mpc52xx_uart_startup
,
394 .shutdown
= mpc52xx_uart_shutdown
,
395 .set_termios
= mpc52xx_uart_set_termios
,
396 /* .pm = mpc52xx_uart_pm, Not supported yet */
397 /* .set_wake = mpc52xx_uart_set_wake, Not supported yet */
398 .type
= mpc52xx_uart_type
,
399 .release_port
= mpc52xx_uart_release_port
,
400 .request_port
= mpc52xx_uart_request_port
,
401 .config_port
= mpc52xx_uart_config_port
,
402 .verify_port
= mpc52xx_uart_verify_port
406 /* ======================================================================== */
407 /* Interrupt handling */
408 /* ======================================================================== */
411 mpc52xx_uart_int_rx_chars(struct uart_port
*port
)
413 struct tty_struct
*tty
= port
->info
->tty
;
414 unsigned char ch
, flag
;
415 unsigned short status
;
417 /* While we can read, do so ! */
418 while ( (status
= in_be16(&PSC(port
)->mpc52xx_psc_status
)) &
419 MPC52xx_PSC_SR_RXRDY
) {
422 ch
= in_8(&PSC(port
)->mpc52xx_psc_buffer_8
);
424 /* Handle sysreq char */
426 if (uart_handle_sysrq_char(port
, ch
)) {
437 if ( status
& (MPC52xx_PSC_SR_PE
|
439 MPC52xx_PSC_SR_RB
) ) {
441 if (status
& MPC52xx_PSC_SR_RB
) {
443 uart_handle_break(port
);
444 } else if (status
& MPC52xx_PSC_SR_PE
)
446 else if (status
& MPC52xx_PSC_SR_FE
)
449 /* Clear error condition */
450 out_8(&PSC(port
)->command
,MPC52xx_PSC_RST_ERR_STAT
);
453 tty_insert_flip_char(tty
, ch
, flag
);
454 if (status
& MPC52xx_PSC_SR_OE
) {
456 * Overrun is special, since it's
457 * reported immediately, and doesn't
458 * affect the current character
460 tty_insert_flip_char(tty
, 0, TTY_OVERRUN
);
464 tty_flip_buffer_push(tty
);
466 return in_be16(&PSC(port
)->mpc52xx_psc_status
) & MPC52xx_PSC_SR_RXRDY
;
470 mpc52xx_uart_int_tx_chars(struct uart_port
*port
)
472 struct circ_buf
*xmit
= &port
->info
->xmit
;
474 /* Process out of band chars */
476 out_8(&PSC(port
)->mpc52xx_psc_buffer_8
, port
->x_char
);
482 /* Nothing to do ? */
483 if (uart_circ_empty(xmit
) || uart_tx_stopped(port
)) {
484 mpc52xx_uart_stop_tx(port
);
489 while (in_be16(&PSC(port
)->mpc52xx_psc_status
) & MPC52xx_PSC_SR_TXRDY
) {
490 out_8(&PSC(port
)->mpc52xx_psc_buffer_8
, xmit
->buf
[xmit
->tail
]);
491 xmit
->tail
= (xmit
->tail
+ 1) & (UART_XMIT_SIZE
- 1);
493 if (uart_circ_empty(xmit
))
498 if (uart_circ_chars_pending(xmit
) < WAKEUP_CHARS
)
499 uart_write_wakeup(port
);
501 /* Maybe we're done after all */
502 if (uart_circ_empty(xmit
)) {
503 mpc52xx_uart_stop_tx(port
);
511 mpc52xx_uart_int(int irq
, void *dev_id
)
513 struct uart_port
*port
= dev_id
;
514 unsigned long pass
= ISR_PASS_LIMIT
;
515 unsigned int keepgoing
;
516 unsigned short status
;
518 spin_lock(&port
->lock
);
520 /* While we have stuff to do, we continue */
522 /* If we don't find anything to do, we stop */
526 status
= in_be16(&PSC(port
)->mpc52xx_psc_isr
);
527 status
&= port
->read_status_mask
;
529 /* Do we need to receive chars ? */
530 /* For this RX interrupts must be on and some chars waiting */
531 if ( status
& MPC52xx_PSC_IMR_RXRDY
)
532 keepgoing
|= mpc52xx_uart_int_rx_chars(port
);
534 /* Do we need to send chars ? */
535 /* For this, TX must be ready and TX interrupt enabled */
536 if ( status
& MPC52xx_PSC_IMR_TXRDY
)
537 keepgoing
|= mpc52xx_uart_int_tx_chars(port
);
539 /* Limit number of iteration */
545 spin_unlock(&port
->lock
);
551 /* ======================================================================== */
552 /* Console ( if applicable ) */
553 /* ======================================================================== */
555 #ifdef CONFIG_SERIAL_MPC52xx_CONSOLE
558 mpc52xx_console_get_options(struct uart_port
*port
,
559 int *baud
, int *parity
, int *bits
, int *flow
)
561 struct mpc52xx_psc __iomem
*psc
= PSC(port
);
564 /* Read the mode registers */
565 out_8(&psc
->command
,MPC52xx_PSC_SEL_MODE_REG_1
);
566 mr1
= in_8(&psc
->mode
);
568 /* CT{U,L}R are write-only ! */
569 *baud
= __res
.bi_baudrate
?
570 __res
.bi_baudrate
: CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD
;
573 switch (mr1
& MPC52xx_PSC_MODE_BITS_MASK
) {
574 case MPC52xx_PSC_MODE_5_BITS
: *bits
= 5; break;
575 case MPC52xx_PSC_MODE_6_BITS
: *bits
= 6; break;
576 case MPC52xx_PSC_MODE_7_BITS
: *bits
= 7; break;
577 case MPC52xx_PSC_MODE_8_BITS
:
581 if (mr1
& MPC52xx_PSC_MODE_PARNONE
)
584 *parity
= mr1
& MPC52xx_PSC_MODE_PARODD
? 'o' : 'e';
588 mpc52xx_console_write(struct console
*co
, const char *s
, unsigned int count
)
590 struct uart_port
*port
= &mpc52xx_uart_ports
[co
->index
];
591 struct mpc52xx_psc __iomem
*psc
= PSC(port
);
594 /* Disable interrupts */
595 out_be16(&psc
->mpc52xx_psc_imr
, 0);
597 /* Wait the TX buffer to be empty */
598 j
= 5000000; /* Maximum wait */
599 while (!(in_be16(&psc
->mpc52xx_psc_status
) & MPC52xx_PSC_SR_TXEMP
) &&
603 /* Write all the chars */
604 for (i
= 0; i
< count
; i
++, s
++) {
605 /* Line return handling */
607 out_8(&psc
->mpc52xx_psc_buffer_8
, '\r');
610 out_8(&psc
->mpc52xx_psc_buffer_8
, *s
);
612 /* Wait the TX buffer to be empty */
613 j
= 20000; /* Maximum wait */
614 while (!(in_be16(&psc
->mpc52xx_psc_status
) &
615 MPC52xx_PSC_SR_TXEMP
) && --j
)
619 /* Restore interrupt state */
620 out_be16(&psc
->mpc52xx_psc_imr
, port
->read_status_mask
);
624 mpc52xx_console_setup(struct console
*co
, char *options
)
626 struct uart_port
*port
= &mpc52xx_uart_ports
[co
->index
];
628 int baud
= CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD
;
633 if (co
->index
< 0 || co
->index
>= MPC52xx_PSC_MAXNUM
)
636 /* Basic port init. Needed since we use some uart_??? func before
637 * real init for early access */
638 spin_lock_init(&port
->lock
);
639 port
->uartclk
= __res
.bi_ipbfreq
/ 2; /* Look at CTLR doc */
640 port
->ops
= &mpc52xx_uart_ops
;
641 port
->mapbase
= MPC52xx_PA(MPC52xx_PSCx_OFFSET(co
->index
+1));
643 /* We ioremap ourself */
644 port
->membase
= ioremap(port
->mapbase
, MPC52xx_PSC_SIZE
);
645 if (port
->membase
== NULL
)
648 /* Setup the port parameters accoding to options */
650 uart_parse_options(options
, &baud
, &parity
, &bits
, &flow
);
652 mpc52xx_console_get_options(port
, &baud
, &parity
, &bits
, &flow
);
654 return uart_set_options(port
, co
, baud
, parity
, bits
, flow
);
658 static struct uart_driver mpc52xx_uart_driver
;
660 static struct console mpc52xx_console
= {
662 .write
= mpc52xx_console_write
,
663 .device
= uart_console_device
,
664 .setup
= mpc52xx_console_setup
,
665 .flags
= CON_PRINTBUFFER
,
666 .index
= -1, /* Specified on the cmdline (e.g. console=ttyPSC0 ) */
667 .data
= &mpc52xx_uart_driver
,
672 mpc52xx_console_init(void)
674 register_console(&mpc52xx_console
);
678 console_initcall(mpc52xx_console_init
);
680 #define MPC52xx_PSC_CONSOLE &mpc52xx_console
682 #define MPC52xx_PSC_CONSOLE NULL
686 /* ======================================================================== */
688 /* ======================================================================== */
690 static struct uart_driver mpc52xx_uart_driver
= {
691 .owner
= THIS_MODULE
,
692 .driver_name
= "mpc52xx_psc_uart",
693 .dev_name
= "ttyPSC",
694 .major
= SERIAL_PSC_MAJOR
,
695 .minor
= SERIAL_PSC_MINOR
,
696 .nr
= MPC52xx_PSC_MAXNUM
,
697 .cons
= MPC52xx_PSC_CONSOLE
,
701 /* ======================================================================== */
702 /* Platform Driver */
703 /* ======================================================================== */
706 mpc52xx_uart_probe(struct platform_device
*dev
)
708 struct resource
*res
= dev
->resource
;
710 struct uart_port
*port
= NULL
;
713 /* Check validity & presence */
715 if (idx
< 0 || idx
>= MPC52xx_PSC_MAXNUM
)
718 if (!mpc52xx_match_psc_function(idx
,"uart"))
721 /* Init the port structure */
722 port
= &mpc52xx_uart_ports
[idx
];
724 memset(port
, 0x00, sizeof(struct uart_port
));
726 spin_lock_init(&port
->lock
);
727 port
->uartclk
= __res
.bi_ipbfreq
/ 2; /* Look at CTLR doc */
728 port
->fifosize
= 512;
729 port
->iotype
= UPIO_MEM
;
730 port
->flags
= UPF_BOOT_AUTOCONF
|
731 ( uart_console(port
) ? 0 : UPF_IOREMAP
);
733 port
->ops
= &mpc52xx_uart_ops
;
735 /* Search for IRQ and mapbase */
736 for (i
=0 ; i
<dev
->num_resources
; i
++, res
++) {
737 if (res
->flags
& IORESOURCE_MEM
)
738 port
->mapbase
= res
->start
;
739 else if (res
->flags
& IORESOURCE_IRQ
)
740 port
->irq
= res
->start
;
742 if (!port
->irq
|| !port
->mapbase
)
745 /* Add the port to the uart sub-system */
746 ret
= uart_add_one_port(&mpc52xx_uart_driver
, port
);
748 platform_set_drvdata(dev
, (void*)port
);
754 mpc52xx_uart_remove(struct platform_device
*dev
)
756 struct uart_port
*port
= (struct uart_port
*) platform_get_drvdata(dev
);
758 platform_set_drvdata(dev
, NULL
);
761 uart_remove_one_port(&mpc52xx_uart_driver
, port
);
768 mpc52xx_uart_suspend(struct platform_device
*dev
, pm_message_t state
)
770 struct uart_port
*port
= (struct uart_port
*) platform_get_drvdata(dev
);
773 uart_suspend_port(&mpc52xx_uart_driver
, port
);
779 mpc52xx_uart_resume(struct platform_device
*dev
)
781 struct uart_port
*port
= (struct uart_port
*) platform_get_drvdata(dev
);
784 uart_resume_port(&mpc52xx_uart_driver
, port
);
790 static struct platform_driver mpc52xx_uart_platform_driver
= {
791 .probe
= mpc52xx_uart_probe
,
792 .remove
= mpc52xx_uart_remove
,
794 .suspend
= mpc52xx_uart_suspend
,
795 .resume
= mpc52xx_uart_resume
,
798 .name
= "mpc52xx-psc",
803 /* ======================================================================== */
805 /* ======================================================================== */
808 mpc52xx_uart_init(void)
812 printk(KERN_INFO
"Serial: MPC52xx PSC driver\n");
814 ret
= uart_register_driver(&mpc52xx_uart_driver
);
816 ret
= platform_driver_register(&mpc52xx_uart_platform_driver
);
818 uart_unregister_driver(&mpc52xx_uart_driver
);
825 mpc52xx_uart_exit(void)
827 platform_driver_unregister(&mpc52xx_uart_platform_driver
);
828 uart_unregister_driver(&mpc52xx_uart_driver
);
832 module_init(mpc52xx_uart_init
);
833 module_exit(mpc52xx_uart_exit
);
835 MODULE_AUTHOR("Sylvain Munaut <tnt@246tNt.com>");
836 MODULE_DESCRIPTION("Freescale MPC52xx PSC UART");
837 MODULE_LICENSE("GPL");