2 * drivers/serial/sh-sci.c
4 * SuperH on-chip serial module support. (SCI with no FIFO / with FIFO)
6 * Copyright (C) 2002 - 2008 Paul Mundt
7 * Modified to support SH7720 SCIF. Markus Brunner, Mark Jonas (Jul 2007).
9 * based off of the old drivers/char/sh-sci.c by:
11 * Copyright (C) 1999, 2000 Niibe Yutaka
12 * Copyright (C) 2000 Sugioka Toshinobu
13 * Modified to support multiple serial ports. Stuart Menefy (May 2000).
14 * Modified to support SecureEdge. David McCullough (2002)
15 * Modified to support SH7300 SCIF. Takashi Kusuda (Jun 2003).
16 * Removed SH7300 support (Jul 2007).
18 * This file is subject to the terms and conditions of the GNU General Public
19 * License. See the file "COPYING" in the main directory of this archive
22 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
28 #include <linux/module.h>
29 #include <linux/errno.h>
30 #include <linux/timer.h>
31 #include <linux/interrupt.h>
32 #include <linux/tty.h>
33 #include <linux/tty_flip.h>
34 #include <linux/serial.h>
35 #include <linux/major.h>
36 #include <linux/string.h>
37 #include <linux/sysrq.h>
38 #include <linux/ioport.h>
40 #include <linux/init.h>
41 #include <linux/delay.h>
42 #include <linux/console.h>
43 #include <linux/platform_device.h>
44 #include <linux/serial_sci.h>
45 #include <linux/notifier.h>
46 #include <linux/cpufreq.h>
47 #include <linux/clk.h>
48 #include <linux/ctype.h>
49 #include <linux/err.h>
52 #include <asm/clock.h>
53 #include <asm/sh_bios.h>
60 struct uart_port port
;
65 /* Port IRQs: ERI, RXI, TXI, BRI (optional) */
66 unsigned int irqs
[SCIx_NR_IRQS
];
68 /* Port pin configuration */
69 void (*init_pins
)(struct uart_port
*port
,
72 /* Port enable callback */
73 void (*enable
)(struct uart_port
*port
);
75 /* Port disable callback */
76 void (*disable
)(struct uart_port
*port
);
79 struct timer_list break_timer
;
82 #ifdef CONFIG_HAVE_CLK
89 static struct sci_port
*kgdb_sci_port
;
92 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
93 static struct sci_port
*serial_console_port
;
96 /* Function prototypes */
97 static void sci_stop_tx(struct uart_port
*port
);
99 #define SCI_NPORTS CONFIG_SERIAL_SH_SCI_NR_UARTS
101 static struct sci_port sci_ports
[SCI_NPORTS
];
102 static struct uart_driver sci_uart_driver
;
104 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && \
105 defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB)
106 static inline void handle_error(struct uart_port
*port
)
108 /* Clear error flags */
109 sci_out(port
, SCxSR
, SCxSR_ERROR_CLEAR(port
));
112 static int get_char(struct uart_port
*port
)
115 unsigned short status
;
118 spin_lock_irqsave(&port
->lock
, flags
);
120 status
= sci_in(port
, SCxSR
);
121 if (status
& SCxSR_ERRORS(port
)) {
125 } while (!(status
& SCxSR_RDxF(port
)));
126 c
= sci_in(port
, SCxRDR
);
127 sci_in(port
, SCxSR
); /* Dummy read */
128 sci_out(port
, SCxSR
, SCxSR_RDxF_CLEAR(port
));
129 spin_unlock_irqrestore(&port
->lock
, flags
);
133 #endif /* CONFIG_SH_STANDARD_BIOS || CONFIG_SH_KGDB */
135 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) || defined(CONFIG_SH_KGDB)
136 static void put_char(struct uart_port
*port
, char c
)
139 unsigned short status
;
141 spin_lock_irqsave(&port
->lock
, flags
);
144 status
= sci_in(port
, SCxSR
);
145 } while (!(status
& SCxSR_TDxE(port
)));
147 sci_out(port
, SCxTDR
, c
);
148 sci_in(port
, SCxSR
); /* Dummy read */
149 sci_out(port
, SCxSR
, SCxSR_TDxE_CLEAR(port
));
151 spin_unlock_irqrestore(&port
->lock
, flags
);
155 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
156 static void put_string(struct sci_port
*sci_port
, const char *buffer
, int count
)
158 struct uart_port
*port
= &sci_port
->port
;
159 const unsigned char *p
= buffer
;
162 #if defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB)
166 #ifdef CONFIG_SH_STANDARD_BIOS
167 /* This call only does a trap the first time it is
168 * called, and so is safe to do here unconditionally
170 usegdb
|= sh_bios_in_gdb_mode();
172 #ifdef CONFIG_SH_KGDB
173 usegdb
|= (kgdb_in_gdb_mode
&& (sci_port
== kgdb_sci_port
));
177 /* $<packet info>#<checksum>. */
181 put_char(port
, 'O'); /* 'O'utput to console */
184 for (i
=0; i
<count
; i
++) { /* Don't use run length encoding */
195 put_char(port
, hex_asc_hi(checksum
));
196 put_char(port
, hex_asc_lo(checksum
));
197 } while (get_char(port
) != '+');
199 #endif /* CONFIG_SH_STANDARD_BIOS || CONFIG_SH_KGDB */
200 for (i
=0; i
<count
; i
++) {
202 put_char(port
, '\r');
203 put_char(port
, *p
++);
206 #endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
208 #ifdef CONFIG_SH_KGDB
209 static int kgdb_sci_getchar(void)
213 /* Keep trying to read a character, this could be neater */
214 while ((c
= get_char(&kgdb_sci_port
->port
)) < 0)
220 static inline void kgdb_sci_putchar(int c
)
222 put_char(&kgdb_sci_port
->port
, c
);
224 #endif /* CONFIG_SH_KGDB */
226 #if defined(__H8300S__)
227 enum { sci_disable
, sci_enable
};
229 static void h8300_sci_config(struct uart_port
* port
, unsigned int ctrl
)
231 volatile unsigned char *mstpcrl
=(volatile unsigned char *)MSTPCRL
;
232 int ch
= (port
->mapbase
- SMR0
) >> 3;
233 unsigned char mask
= 1 << (ch
+1);
235 if (ctrl
== sci_disable
) {
242 static inline void h8300_sci_enable(struct uart_port
*port
)
244 h8300_sci_config(port
, sci_enable
);
247 static inline void h8300_sci_disable(struct uart_port
*port
)
249 h8300_sci_config(port
, sci_disable
);
253 #if defined(__H8300H__) || defined(__H8300S__)
254 static void sci_init_pins_sci(struct uart_port
* port
, unsigned int cflag
)
256 int ch
= (port
->mapbase
- SMR0
) >> 3;
259 H8300_GPIO_DDR(h8300_sci_pins
[ch
].port
,
260 h8300_sci_pins
[ch
].rx
,
262 H8300_GPIO_DDR(h8300_sci_pins
[ch
].port
,
263 h8300_sci_pins
[ch
].tx
,
267 H8300_SCI_DR(ch
) |= h8300_sci_pins
[ch
].tx
;
270 #define sci_init_pins_sci NULL
273 #if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709)
274 static void sci_init_pins_irda(struct uart_port
*port
, unsigned int cflag
)
276 unsigned int fcr_val
= 0;
279 fcr_val
|= SCFCR_MCE
;
281 sci_out(port
, SCFCR
, fcr_val
);
284 #define sci_init_pins_irda NULL
287 #if defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
288 static void sci_init_pins_scif(struct uart_port
* port
, unsigned int cflag
)
290 unsigned int fcr_val
= 0;
292 set_sh771x_scif_pfc(port
);
293 if (cflag
& CRTSCTS
) {
294 fcr_val
|= SCFCR_MCE
;
296 sci_out(port
, SCFCR
, fcr_val
);
298 #elif defined(CONFIG_CPU_SUBTYPE_SH7720) || defined(CONFIG_CPU_SUBTYPE_SH7721)
299 static void sci_init_pins_scif(struct uart_port
*port
, unsigned int cflag
)
301 unsigned int fcr_val
= 0;
304 if (cflag
& CRTSCTS
) {
306 if (port
->mapbase
== 0xa4430000) { /* SCIF0 */
307 /* Clear PTCR bit 9-2; enable all scif pins but sck */
308 data
= ctrl_inw(PORT_PTCR
);
309 ctrl_outw((data
& 0xfc03), PORT_PTCR
);
310 } else if (port
->mapbase
== 0xa4438000) { /* SCIF1 */
311 /* Clear PVCR bit 9-2 */
312 data
= ctrl_inw(PORT_PVCR
);
313 ctrl_outw((data
& 0xfc03), PORT_PVCR
);
315 fcr_val
|= SCFCR_MCE
;
317 if (port
->mapbase
== 0xa4430000) { /* SCIF0 */
318 /* Clear PTCR bit 5-2; enable only tx and rx */
319 data
= ctrl_inw(PORT_PTCR
);
320 ctrl_outw((data
& 0xffc3), PORT_PTCR
);
321 } else if (port
->mapbase
== 0xa4438000) { /* SCIF1 */
322 /* Clear PVCR bit 5-2 */
323 data
= ctrl_inw(PORT_PVCR
);
324 ctrl_outw((data
& 0xffc3), PORT_PVCR
);
327 sci_out(port
, SCFCR
, fcr_val
);
329 #elif defined(CONFIG_CPU_SH3)
330 /* For SH7705, SH7706, SH7707, SH7709, SH7709A, SH7729 */
331 static void sci_init_pins_scif(struct uart_port
*port
, unsigned int cflag
)
333 unsigned int fcr_val
= 0;
336 /* We need to set SCPCR to enable RTS/CTS */
337 data
= ctrl_inw(SCPCR
);
338 /* Clear out SCP7MD1,0, SCP6MD1,0, SCP4MD1,0*/
339 ctrl_outw(data
& 0x0fcf, SCPCR
);
342 fcr_val
|= SCFCR_MCE
;
344 /* We need to set SCPCR to enable RTS/CTS */
345 data
= ctrl_inw(SCPCR
);
346 /* Clear out SCP7MD1,0, SCP4MD1,0,
347 Set SCP6MD1,0 = {01} (output) */
348 ctrl_outw((data
& 0x0fcf) | 0x1000, SCPCR
);
350 data
= ctrl_inb(SCPDR
);
351 /* Set /RTS2 (bit6) = 0 */
352 ctrl_outb(data
& 0xbf, SCPDR
);
355 sci_out(port
, SCFCR
, fcr_val
);
357 #elif defined(CONFIG_CPU_SUBTYPE_SH7722)
358 static void sci_init_pins_scif(struct uart_port
*port
, unsigned int cflag
)
360 unsigned int fcr_val
= 0;
363 if (port
->mapbase
== 0xffe00000) {
364 data
= ctrl_inw(PSCR
);
367 fcr_val
|= SCFCR_MCE
;
371 ctrl_outw(data
, PSCR
);
373 /* SCIF1 and SCIF2 should be setup by board code */
375 sci_out(port
, SCFCR
, fcr_val
);
377 #elif defined(CONFIG_CPU_SUBTYPE_SH7723)
378 static void sci_init_pins_scif(struct uart_port
*port
, unsigned int cflag
)
380 /* Nothing to do here.. */
381 sci_out(port
, SCFCR
, 0);
385 static void sci_init_pins_scif(struct uart_port
*port
, unsigned int cflag
)
387 unsigned int fcr_val
= 0;
389 if (cflag
& CRTSCTS
) {
390 fcr_val
|= SCFCR_MCE
;
392 #if defined(CONFIG_CPU_SUBTYPE_SH7343) || defined(CONFIG_CPU_SUBTYPE_SH7366)
394 #elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \
395 defined(CONFIG_CPU_SUBTYPE_SH7780) || \
396 defined(CONFIG_CPU_SUBTYPE_SH7785) || \
397 defined(CONFIG_CPU_SUBTYPE_SHX3)
398 ctrl_outw(0x0080, SCSPTR0
); /* Set RTS = 1 */
400 ctrl_outw(0x0080, SCSPTR2
); /* Set RTS = 1 */
403 sci_out(port
, SCFCR
, fcr_val
);
407 #if defined(CONFIG_CPU_SUBTYPE_SH7760) || \
408 defined(CONFIG_CPU_SUBTYPE_SH7780) || \
409 defined(CONFIG_CPU_SUBTYPE_SH7785)
410 static inline int scif_txroom(struct uart_port
*port
)
412 return SCIF_TXROOM_MAX
- (sci_in(port
, SCTFDR
) & 0xff);
415 static inline int scif_rxroom(struct uart_port
*port
)
417 return sci_in(port
, SCRFDR
) & 0xff;
419 #elif defined(CONFIG_CPU_SUBTYPE_SH7763)
420 static inline int scif_txroom(struct uart_port
*port
)
422 if((port
->mapbase
== 0xffe00000) || (port
->mapbase
== 0xffe08000)) /* SCIF0/1*/
423 return SCIF_TXROOM_MAX
- (sci_in(port
, SCTFDR
) & 0xff);
425 return SCIF2_TXROOM_MAX
- (sci_in(port
, SCFDR
) >> 8);
428 static inline int scif_rxroom(struct uart_port
*port
)
430 if((port
->mapbase
== 0xffe00000) || (port
->mapbase
== 0xffe08000)) /* SCIF0/1*/
431 return sci_in(port
, SCRFDR
) & 0xff;
433 return sci_in(port
, SCFDR
) & SCIF2_RFDC_MASK
;
436 static inline int scif_txroom(struct uart_port
*port
)
438 return SCIF_TXROOM_MAX
- (sci_in(port
, SCFDR
) >> 8);
441 static inline int scif_rxroom(struct uart_port
*port
)
443 return sci_in(port
, SCFDR
) & SCIF_RFDC_MASK
;
447 static inline int sci_txroom(struct uart_port
*port
)
449 return ((sci_in(port
, SCxSR
) & SCI_TDRE
) != 0);
452 static inline int sci_rxroom(struct uart_port
*port
)
454 return ((sci_in(port
, SCxSR
) & SCxSR_RDxF(port
)) != 0);
457 /* ********************************************************************** *
458 * the interrupt related routines *
459 * ********************************************************************** */
461 static void sci_transmit_chars(struct uart_port
*port
)
463 struct circ_buf
*xmit
= &port
->info
->xmit
;
464 unsigned int stopped
= uart_tx_stopped(port
);
465 unsigned short status
;
469 status
= sci_in(port
, SCxSR
);
470 if (!(status
& SCxSR_TDxE(port
))) {
471 ctrl
= sci_in(port
, SCSCR
);
472 if (uart_circ_empty(xmit
)) {
473 ctrl
&= ~SCI_CTRL_FLAGS_TIE
;
475 ctrl
|= SCI_CTRL_FLAGS_TIE
;
477 sci_out(port
, SCSCR
, ctrl
);
481 if (port
->type
== PORT_SCIF
)
482 count
= scif_txroom(port
);
484 count
= sci_txroom(port
);
492 } else if (!uart_circ_empty(xmit
) && !stopped
) {
493 c
= xmit
->buf
[xmit
->tail
];
494 xmit
->tail
= (xmit
->tail
+ 1) & (UART_XMIT_SIZE
- 1);
499 sci_out(port
, SCxTDR
, c
);
502 } while (--count
> 0);
504 sci_out(port
, SCxSR
, SCxSR_TDxE_CLEAR(port
));
506 if (uart_circ_chars_pending(xmit
) < WAKEUP_CHARS
)
507 uart_write_wakeup(port
);
508 if (uart_circ_empty(xmit
)) {
511 ctrl
= sci_in(port
, SCSCR
);
513 if (port
->type
== PORT_SCIF
) {
514 sci_in(port
, SCxSR
); /* Dummy read */
515 sci_out(port
, SCxSR
, SCxSR_TDxE_CLEAR(port
));
518 ctrl
|= SCI_CTRL_FLAGS_TIE
;
519 sci_out(port
, SCSCR
, ctrl
);
523 /* On SH3, SCIF may read end-of-break as a space->mark char */
524 #define STEPFN(c) ({int __c=(c); (((__c-1)|(__c)) == -1); })
526 static inline void sci_receive_chars(struct uart_port
*port
)
528 struct sci_port
*sci_port
= (struct sci_port
*)port
;
529 struct tty_struct
*tty
= port
->info
->port
.tty
;
530 int i
, count
, copied
= 0;
531 unsigned short status
;
534 status
= sci_in(port
, SCxSR
);
535 if (!(status
& SCxSR_RDxF(port
)))
539 if (port
->type
== PORT_SCIF
)
540 count
= scif_rxroom(port
);
542 count
= sci_rxroom(port
);
544 /* Don't copy more bytes than there is room for in the buffer */
545 count
= tty_buffer_request_room(tty
, count
);
547 /* If for any reason we can't copy more data, we're done! */
551 if (port
->type
== PORT_SCI
) {
552 char c
= sci_in(port
, SCxRDR
);
553 if (uart_handle_sysrq_char(port
, c
) || sci_port
->break_flag
)
556 tty_insert_flip_char(tty
, c
, TTY_NORMAL
);
559 for (i
=0; i
<count
; i
++) {
560 char c
= sci_in(port
, SCxRDR
);
561 status
= sci_in(port
, SCxSR
);
562 #if defined(CONFIG_CPU_SH3)
563 /* Skip "chars" during break */
564 if (sci_port
->break_flag
) {
566 (status
& SCxSR_FER(port
))) {
571 /* Nonzero => end-of-break */
572 pr_debug("scif: debounce<%02x>\n", c
);
573 sci_port
->break_flag
= 0;
580 #endif /* CONFIG_CPU_SH3 */
581 if (uart_handle_sysrq_char(port
, c
)) {
586 /* Store data and status */
587 if (status
&SCxSR_FER(port
)) {
589 pr_debug("sci: frame error\n");
590 } else if (status
&SCxSR_PER(port
)) {
592 pr_debug("sci: parity error\n");
595 tty_insert_flip_char(tty
, c
, flag
);
599 sci_in(port
, SCxSR
); /* dummy read */
600 sci_out(port
, SCxSR
, SCxSR_RDxF_CLEAR(port
));
603 port
->icount
.rx
+= count
;
607 /* Tell the rest of the system the news. New characters! */
608 tty_flip_buffer_push(tty
);
610 sci_in(port
, SCxSR
); /* dummy read */
611 sci_out(port
, SCxSR
, SCxSR_RDxF_CLEAR(port
));
615 #define SCI_BREAK_JIFFIES (HZ/20)
616 /* The sci generates interrupts during the break,
617 * 1 per millisecond or so during the break period, for 9600 baud.
618 * So dont bother disabling interrupts.
619 * But dont want more than 1 break event.
620 * Use a kernel timer to periodically poll the rx line until
621 * the break is finished.
623 static void sci_schedule_break_timer(struct sci_port
*port
)
625 port
->break_timer
.expires
= jiffies
+ SCI_BREAK_JIFFIES
;
626 add_timer(&port
->break_timer
);
628 /* Ensure that two consecutive samples find the break over. */
629 static void sci_break_timer(unsigned long data
)
631 struct sci_port
*port
= (struct sci_port
*)data
;
633 if (sci_rxd_in(&port
->port
) == 0) {
634 port
->break_flag
= 1;
635 sci_schedule_break_timer(port
);
636 } else if (port
->break_flag
== 1) {
638 port
->break_flag
= 2;
639 sci_schedule_break_timer(port
);
641 port
->break_flag
= 0;
644 static inline int sci_handle_errors(struct uart_port
*port
)
647 unsigned short status
= sci_in(port
, SCxSR
);
648 struct tty_struct
*tty
= port
->info
->port
.tty
;
650 if (status
& SCxSR_ORER(port
)) {
652 if (tty_insert_flip_char(tty
, 0, TTY_OVERRUN
))
654 pr_debug("sci: overrun error\n");
657 if (status
& SCxSR_FER(port
)) {
658 if (sci_rxd_in(port
) == 0) {
659 /* Notify of BREAK */
660 struct sci_port
*sci_port
= (struct sci_port
*)port
;
662 if (!sci_port
->break_flag
) {
663 sci_port
->break_flag
= 1;
664 sci_schedule_break_timer(sci_port
);
666 /* Do sysrq handling. */
667 if (uart_handle_break(port
))
669 pr_debug("sci: BREAK detected\n");
670 if (tty_insert_flip_char(tty
, 0, TTY_BREAK
))
675 if (tty_insert_flip_char(tty
, 0, TTY_FRAME
))
677 pr_debug("sci: frame error\n");
681 if (status
& SCxSR_PER(port
)) {
683 if (tty_insert_flip_char(tty
, 0, TTY_PARITY
))
685 pr_debug("sci: parity error\n");
689 tty_flip_buffer_push(tty
);
694 static inline int sci_handle_breaks(struct uart_port
*port
)
697 unsigned short status
= sci_in(port
, SCxSR
);
698 struct tty_struct
*tty
= port
->info
->port
.tty
;
699 struct sci_port
*s
= &sci_ports
[port
->line
];
701 if (uart_handle_break(port
))
704 if (!s
->break_flag
&& status
& SCxSR_BRK(port
)) {
705 #if defined(CONFIG_CPU_SH3)
709 /* Notify of BREAK */
710 if (tty_insert_flip_char(tty
, 0, TTY_BREAK
))
712 pr_debug("sci: BREAK detected\n");
715 #if defined(SCIF_ORER)
716 /* XXX: Handle SCIF overrun error */
717 if (port
->type
== PORT_SCIF
&& (sci_in(port
, SCLSR
) & SCIF_ORER
) != 0) {
718 sci_out(port
, SCLSR
, 0);
719 if (tty_insert_flip_char(tty
, 0, TTY_OVERRUN
)) {
721 pr_debug("sci: overrun error\n");
727 tty_flip_buffer_push(tty
);
732 static irqreturn_t
sci_rx_interrupt(int irq
, void *port
)
734 /* I think sci_receive_chars has to be called irrespective
735 * of whether the I_IXOFF is set, otherwise, how is the interrupt
738 sci_receive_chars(port
);
743 static irqreturn_t
sci_tx_interrupt(int irq
, void *ptr
)
745 struct uart_port
*port
= ptr
;
747 spin_lock_irq(&port
->lock
);
748 sci_transmit_chars(port
);
749 spin_unlock_irq(&port
->lock
);
754 static irqreturn_t
sci_er_interrupt(int irq
, void *ptr
)
756 struct uart_port
*port
= ptr
;
759 if (port
->type
== PORT_SCI
) {
760 if (sci_handle_errors(port
)) {
761 /* discard character in rx buffer */
763 sci_out(port
, SCxSR
, SCxSR_RDxF_CLEAR(port
));
766 #if defined(SCIF_ORER)
767 if((sci_in(port
, SCLSR
) & SCIF_ORER
) != 0) {
768 struct tty_struct
*tty
= port
->info
->port
.tty
;
770 sci_out(port
, SCLSR
, 0);
771 tty_insert_flip_char(tty
, 0, TTY_OVERRUN
);
772 tty_flip_buffer_push(tty
);
773 pr_debug("scif: overrun error\n");
776 sci_rx_interrupt(irq
, ptr
);
779 sci_out(port
, SCxSR
, SCxSR_ERROR_CLEAR(port
));
781 /* Kick the transmission */
782 sci_tx_interrupt(irq
, ptr
);
787 static irqreturn_t
sci_br_interrupt(int irq
, void *ptr
)
789 struct uart_port
*port
= ptr
;
792 sci_handle_breaks(port
);
793 sci_out(port
, SCxSR
, SCxSR_BREAK_CLEAR(port
));
798 static irqreturn_t
sci_mpxed_interrupt(int irq
, void *ptr
)
800 unsigned short ssr_status
, scr_status
;
801 struct uart_port
*port
= ptr
;
802 irqreturn_t ret
= IRQ_NONE
;
804 ssr_status
= sci_in(port
,SCxSR
);
805 scr_status
= sci_in(port
,SCSCR
);
808 if ((ssr_status
& 0x0020) && (scr_status
& SCI_CTRL_FLAGS_TIE
))
809 ret
= sci_tx_interrupt(irq
, ptr
);
811 if ((ssr_status
& 0x0002) && (scr_status
& SCI_CTRL_FLAGS_RIE
))
812 ret
= sci_rx_interrupt(irq
, ptr
);
813 /* Error Interrupt */
814 if ((ssr_status
& 0x0080) && (scr_status
& SCI_CTRL_FLAGS_REIE
))
815 ret
= sci_er_interrupt(irq
, ptr
);
816 /* Break Interrupt */
817 if ((ssr_status
& 0x0010) && (scr_status
& SCI_CTRL_FLAGS_REIE
))
818 ret
= sci_br_interrupt(irq
, ptr
);
823 #if defined(CONFIG_CPU_FREQ) && defined(CONFIG_HAVE_CLK)
825 * Here we define a transistion notifier so that we can update all of our
826 * ports' baud rate when the peripheral clock changes.
828 static int sci_notifier(struct notifier_block
*self
,
829 unsigned long phase
, void *p
)
831 struct cpufreq_freqs
*freqs
= p
;
834 if ((phase
== CPUFREQ_POSTCHANGE
) ||
835 (phase
== CPUFREQ_RESUMECHANGE
)){
836 for (i
= 0; i
< SCI_NPORTS
; i
++) {
837 struct uart_port
*port
= &sci_ports
[i
].port
;
841 * Update the uartclk per-port if frequency has
842 * changed, since it will no longer necessarily be
843 * consistent with the old frequency.
845 * Really we want to be able to do something like
846 * uart_change_speed() or something along those lines
847 * here to implicitly reset the per-port baud rate..
849 * Clean this up later..
851 clk
= clk_get(NULL
, "module_clk");
852 port
->uartclk
= clk_get_rate(clk
);
856 printk(KERN_INFO
"%s: got a postchange notification "
857 "for cpu %d (old %d, new %d)\n",
858 __func__
, freqs
->cpu
, freqs
->old
, freqs
->new);
864 static struct notifier_block sci_nb
= { &sci_notifier
, NULL
, 0 };
865 #endif /* CONFIG_CPU_FREQ && CONFIG_HAVE_CLK */
867 static int sci_request_irq(struct sci_port
*port
)
870 irqreturn_t (*handlers
[4])(int irq
, void *ptr
) = {
871 sci_er_interrupt
, sci_rx_interrupt
, sci_tx_interrupt
,
874 const char *desc
[] = { "SCI Receive Error", "SCI Receive Data Full",
875 "SCI Transmit Data Empty", "SCI Break" };
877 if (port
->irqs
[0] == port
->irqs
[1]) {
878 if (!port
->irqs
[0]) {
879 printk(KERN_ERR
"sci: Cannot allocate irq.(IRQ=0)\n");
883 if (request_irq(port
->irqs
[0], sci_mpxed_interrupt
,
884 IRQF_DISABLED
, "sci", port
)) {
885 printk(KERN_ERR
"sci: Cannot allocate irq.\n");
889 for (i
= 0; i
< ARRAY_SIZE(handlers
); i
++) {
892 if (request_irq(port
->irqs
[i
], handlers
[i
],
893 IRQF_DISABLED
, desc
[i
], port
)) {
894 printk(KERN_ERR
"sci: Cannot allocate irq.\n");
903 static void sci_free_irq(struct sci_port
*port
)
907 if (port
->irqs
[0] == port
->irqs
[1]) {
909 printk("sci: sci_free_irq error\n");
911 free_irq(port
->irqs
[0], port
);
913 for (i
= 0; i
< ARRAY_SIZE(port
->irqs
); i
++) {
917 free_irq(port
->irqs
[i
], port
);
922 static unsigned int sci_tx_empty(struct uart_port
*port
)
928 static void sci_set_mctrl(struct uart_port
*port
, unsigned int mctrl
)
930 /* This routine is used for seting signals of: DTR, DCD, CTS/RTS */
931 /* We use SCIF's hardware for CTS/RTS, so don't need any for that. */
932 /* If you have signals for DTR and DCD, please implement here. */
935 static unsigned int sci_get_mctrl(struct uart_port
*port
)
937 /* This routine is used for geting signals of: DTR, DCD, DSR, RI,
940 return TIOCM_DTR
| TIOCM_RTS
| TIOCM_DSR
;
943 static void sci_start_tx(struct uart_port
*port
)
947 /* Set TIE (Transmit Interrupt Enable) bit in SCSCR */
948 ctrl
= sci_in(port
, SCSCR
);
949 ctrl
|= SCI_CTRL_FLAGS_TIE
;
950 sci_out(port
, SCSCR
, ctrl
);
953 static void sci_stop_tx(struct uart_port
*port
)
957 /* Clear TIE (Transmit Interrupt Enable) bit in SCSCR */
958 ctrl
= sci_in(port
, SCSCR
);
959 ctrl
&= ~SCI_CTRL_FLAGS_TIE
;
960 sci_out(port
, SCSCR
, ctrl
);
963 static void sci_start_rx(struct uart_port
*port
, unsigned int tty_start
)
967 /* Set RIE (Receive Interrupt Enable) bit in SCSCR */
968 ctrl
= sci_in(port
, SCSCR
);
969 ctrl
|= SCI_CTRL_FLAGS_RIE
| SCI_CTRL_FLAGS_REIE
;
970 sci_out(port
, SCSCR
, ctrl
);
973 static void sci_stop_rx(struct uart_port
*port
)
977 /* Clear RIE (Receive Interrupt Enable) bit in SCSCR */
978 ctrl
= sci_in(port
, SCSCR
);
979 ctrl
&= ~(SCI_CTRL_FLAGS_RIE
| SCI_CTRL_FLAGS_REIE
);
980 sci_out(port
, SCSCR
, ctrl
);
983 static void sci_enable_ms(struct uart_port
*port
)
985 /* Nothing here yet .. */
988 static void sci_break_ctl(struct uart_port
*port
, int break_state
)
990 /* Nothing here yet .. */
993 static int sci_startup(struct uart_port
*port
)
995 struct sci_port
*s
= &sci_ports
[port
->line
];
1000 #ifdef CONFIG_HAVE_CLK
1001 s
->clk
= clk_get(NULL
, "module_clk");
1006 sci_start_rx(port
, 1);
1011 static void sci_shutdown(struct uart_port
*port
)
1013 struct sci_port
*s
= &sci_ports
[port
->line
];
1022 #ifdef CONFIG_HAVE_CLK
1028 static void sci_set_termios(struct uart_port
*port
, struct ktermios
*termios
,
1029 struct ktermios
*old
)
1031 struct sci_port
*s
= &sci_ports
[port
->line
];
1032 unsigned int status
, baud
, smr_val
;
1035 baud
= uart_get_baud_rate(port
, termios
, old
, 0, port
->uartclk
/16);
1037 t
= SCBRR_VALUE(baud
, port
->uartclk
);
1040 status
= sci_in(port
, SCxSR
);
1041 } while (!(status
& SCxSR_TEND(port
)));
1043 sci_out(port
, SCSCR
, 0x00); /* TE=0, RE=0, CKE1=0 */
1045 if (port
->type
== PORT_SCIF
)
1046 sci_out(port
, SCFCR
, SCFCR_RFRST
| SCFCR_TFRST
);
1048 smr_val
= sci_in(port
, SCSMR
) & 3;
1049 if ((termios
->c_cflag
& CSIZE
) == CS7
)
1051 if (termios
->c_cflag
& PARENB
)
1053 if (termios
->c_cflag
& PARODD
)
1055 if (termios
->c_cflag
& CSTOPB
)
1058 uart_update_timeout(port
, termios
->c_cflag
, baud
);
1060 sci_out(port
, SCSMR
, smr_val
);
1064 sci_out(port
, SCSMR
, (sci_in(port
, SCSMR
) & ~3) | 1);
1067 sci_out(port
, SCSMR
, sci_in(port
, SCSMR
) & ~3);
1069 sci_out(port
, SCBRR
, t
);
1070 udelay((1000000+(baud
-1)) / baud
); /* Wait one bit interval */
1073 if (likely(s
->init_pins
))
1074 s
->init_pins(port
, termios
->c_cflag
);
1076 sci_out(port
, SCSCR
, SCSCR_INIT(port
));
1078 if ((termios
->c_cflag
& CREAD
) != 0)
1079 sci_start_rx(port
,0);
1082 static const char *sci_type(struct uart_port
*port
)
1084 switch (port
->type
) {
1085 case PORT_SCI
: return "sci";
1086 case PORT_SCIF
: return "scif";
1087 case PORT_IRDA
: return "irda";
1093 static void sci_release_port(struct uart_port
*port
)
1095 /* Nothing here yet .. */
1098 static int sci_request_port(struct uart_port
*port
)
1100 /* Nothing here yet .. */
1104 static void sci_config_port(struct uart_port
*port
, int flags
)
1106 struct sci_port
*s
= &sci_ports
[port
->line
];
1108 port
->type
= s
->type
;
1110 switch (port
->type
) {
1112 s
->init_pins
= sci_init_pins_sci
;
1115 s
->init_pins
= sci_init_pins_scif
;
1118 s
->init_pins
= sci_init_pins_irda
;
1122 if (port
->flags
& UPF_IOREMAP
&& !port
->membase
) {
1123 #if defined(CONFIG_SUPERH64)
1124 port
->mapbase
= onchip_remap(SCIF_ADDR_SH5
, 1024, "SCIF");
1125 port
->membase
= (void __iomem
*)port
->mapbase
;
1127 port
->membase
= ioremap_nocache(port
->mapbase
, 0x40);
1130 printk(KERN_ERR
"sci: can't remap port#%d\n", port
->line
);
1134 static int sci_verify_port(struct uart_port
*port
, struct serial_struct
*ser
)
1136 struct sci_port
*s
= &sci_ports
[port
->line
];
1138 if (ser
->irq
!= s
->irqs
[SCIx_TXI_IRQ
] || ser
->irq
> nr_irqs
)
1140 if (ser
->baud_base
< 2400)
1141 /* No paper tape reader for Mitch.. */
1147 static struct uart_ops sci_uart_ops
= {
1148 .tx_empty
= sci_tx_empty
,
1149 .set_mctrl
= sci_set_mctrl
,
1150 .get_mctrl
= sci_get_mctrl
,
1151 .start_tx
= sci_start_tx
,
1152 .stop_tx
= sci_stop_tx
,
1153 .stop_rx
= sci_stop_rx
,
1154 .enable_ms
= sci_enable_ms
,
1155 .break_ctl
= sci_break_ctl
,
1156 .startup
= sci_startup
,
1157 .shutdown
= sci_shutdown
,
1158 .set_termios
= sci_set_termios
,
1160 .release_port
= sci_release_port
,
1161 .request_port
= sci_request_port
,
1162 .config_port
= sci_config_port
,
1163 .verify_port
= sci_verify_port
,
1166 static void __init
sci_init_ports(void)
1168 static int first
= 1;
1176 for (i
= 0; i
< SCI_NPORTS
; i
++) {
1177 sci_ports
[i
].port
.ops
= &sci_uart_ops
;
1178 sci_ports
[i
].port
.iotype
= UPIO_MEM
;
1179 sci_ports
[i
].port
.line
= i
;
1180 sci_ports
[i
].port
.fifosize
= 1;
1182 #if defined(__H8300H__) || defined(__H8300S__)
1184 sci_ports
[i
].enable
= h8300_sci_enable
;
1185 sci_ports
[i
].disable
= h8300_sci_disable
;
1187 sci_ports
[i
].port
.uartclk
= CONFIG_CPU_CLOCK
;
1188 #elif defined(CONFIG_HAVE_CLK)
1190 * XXX: We should use a proper SCI/SCIF clock
1193 struct clk
*clk
= clk_get(NULL
, "module_clk");
1194 sci_ports
[i
].port
.uartclk
= clk_get_rate(clk
);
1198 #error "Need a valid uartclk"
1201 sci_ports
[i
].break_timer
.data
= (unsigned long)&sci_ports
[i
];
1202 sci_ports
[i
].break_timer
.function
= sci_break_timer
;
1204 init_timer(&sci_ports
[i
].break_timer
);
1208 int __init
early_sci_setup(struct uart_port
*port
)
1210 if (unlikely(port
->line
> SCI_NPORTS
))
1215 sci_ports
[port
->line
].port
.membase
= port
->membase
;
1216 sci_ports
[port
->line
].port
.mapbase
= port
->mapbase
;
1217 sci_ports
[port
->line
].port
.type
= port
->type
;
1222 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
1224 * Print a string to the serial port trying not to disturb
1225 * any possible real use of the port...
1227 static void serial_console_write(struct console
*co
, const char *s
,
1230 put_string(serial_console_port
, s
, count
);
1233 static int __init
serial_console_setup(struct console
*co
, char *options
)
1235 struct uart_port
*port
;
1243 * Check whether an invalid uart number has been specified, and
1244 * if so, search for the first available port that does have
1247 if (co
->index
>= SCI_NPORTS
)
1250 serial_console_port
= &sci_ports
[co
->index
];
1251 port
= &serial_console_port
->port
;
1254 * Also need to check port->type, we don't actually have any
1255 * UPIO_PORT ports, but uart_report_port() handily misreports
1256 * it anyways if we don't have a port available by the time this is
1261 if (!port
->membase
|| !port
->mapbase
)
1264 port
->type
= serial_console_port
->type
;
1266 #ifdef CONFIG_HAVE_CLK
1267 if (!serial_console_port
->clk
)
1268 serial_console_port
->clk
= clk_get(NULL
, "module_clk");
1271 if (port
->flags
& UPF_IOREMAP
)
1272 sci_config_port(port
, 0);
1274 if (serial_console_port
->enable
)
1275 serial_console_port
->enable(port
);
1278 uart_parse_options(options
, &baud
, &parity
, &bits
, &flow
);
1280 ret
= uart_set_options(port
, co
, baud
, parity
, bits
, flow
);
1281 #if defined(__H8300H__) || defined(__H8300S__)
1282 /* disable rx interrupt */
1289 static struct console serial_console
= {
1291 .device
= uart_console_device
,
1292 .write
= serial_console_write
,
1293 .setup
= serial_console_setup
,
1294 .flags
= CON_PRINTBUFFER
,
1296 .data
= &sci_uart_driver
,
1299 static int __init
sci_console_init(void)
1302 register_console(&serial_console
);
1305 console_initcall(sci_console_init
);
1306 #endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
1308 #ifdef CONFIG_SH_KGDB_CONSOLE
1310 * FIXME: Most of this can go away.. at the moment, we rely on
1311 * arch/sh/kernel/setup.c to do the command line parsing for kgdb, though
1312 * most of that can easily be done here instead.
1314 * For the time being, just accept the values that were parsed earlier..
1316 static void __init
kgdb_console_get_options(struct uart_port
*port
, int *baud
,
1317 int *parity
, int *bits
)
1320 *parity
= tolower(kgdb_parity
);
1321 *bits
= kgdb_bits
- '0';
1325 * The naming here is somewhat misleading, since kgdb_console_setup() takes
1326 * care of the early-on initialization for kgdb, regardless of whether we
1327 * actually use kgdb as a console or not.
1329 * On the plus side, this lets us kill off the old kgdb_sci_setup() nonsense.
1331 int __init
kgdb_console_setup(struct console
*co
, char *options
)
1333 struct uart_port
*port
= &sci_ports
[kgdb_portnum
].port
;
1339 if (co
->index
!= kgdb_portnum
)
1340 co
->index
= kgdb_portnum
;
1342 kgdb_sci_port
= &sci_ports
[co
->index
];
1343 port
= &kgdb_sci_port
->port
;
1346 * Also need to check port->type, we don't actually have any
1347 * UPIO_PORT ports, but uart_report_port() handily misreports
1348 * it anyways if we don't have a port available by the time this is
1353 if (!port
->membase
|| !port
->mapbase
)
1357 uart_parse_options(options
, &baud
, &parity
, &bits
, &flow
);
1359 kgdb_console_get_options(port
, &baud
, &parity
, &bits
);
1361 kgdb_getchar
= kgdb_sci_getchar
;
1362 kgdb_putchar
= kgdb_sci_putchar
;
1364 return uart_set_options(port
, co
, baud
, parity
, bits
, flow
);
1367 static struct console kgdb_console
= {
1369 .device
= uart_console_device
,
1370 .write
= kgdb_console_write
,
1371 .setup
= kgdb_console_setup
,
1372 .flags
= CON_PRINTBUFFER
,
1374 .data
= &sci_uart_driver
,
1377 /* Register the KGDB console so we get messages (d'oh!) */
1378 static int __init
kgdb_console_init(void)
1381 register_console(&kgdb_console
);
1384 console_initcall(kgdb_console_init
);
1385 #endif /* CONFIG_SH_KGDB_CONSOLE */
1387 #if defined(CONFIG_SH_KGDB_CONSOLE)
1388 #define SCI_CONSOLE &kgdb_console
1389 #elif defined(CONFIG_SERIAL_SH_SCI_CONSOLE)
1390 #define SCI_CONSOLE &serial_console
1392 #define SCI_CONSOLE 0
1395 static char banner
[] __initdata
=
1396 KERN_INFO
"SuperH SCI(F) driver initialized\n";
1398 static struct uart_driver sci_uart_driver
= {
1399 .owner
= THIS_MODULE
,
1400 .driver_name
= "sci",
1401 .dev_name
= "ttySC",
1403 .minor
= SCI_MINOR_START
,
1405 .cons
= SCI_CONSOLE
,
1409 * Register a set of serial devices attached to a platform device. The
1410 * list is terminated with a zero flags entry, which means we expect
1411 * all entries to have at least UPF_BOOT_AUTOCONF set. Platforms that need
1412 * remapping (such as sh64) should also set UPF_IOREMAP.
1414 static int __devinit
sci_probe(struct platform_device
*dev
)
1416 struct plat_sci_port
*p
= dev
->dev
.platform_data
;
1417 int i
, ret
= -EINVAL
;
1419 for (i
= 0; p
&& p
->flags
!= 0; p
++, i
++) {
1420 struct sci_port
*sciport
= &sci_ports
[i
];
1423 if (unlikely(i
== SCI_NPORTS
)) {
1424 dev_notice(&dev
->dev
, "Attempting to register port "
1425 "%d when only %d are available.\n",
1427 dev_notice(&dev
->dev
, "Consider bumping "
1428 "CONFIG_SERIAL_SH_SCI_NR_UARTS!\n");
1432 sciport
->port
.mapbase
= p
->mapbase
;
1434 if (p
->mapbase
&& !p
->membase
) {
1435 if (p
->flags
& UPF_IOREMAP
) {
1436 p
->membase
= ioremap_nocache(p
->mapbase
, 0x40);
1437 if (IS_ERR(p
->membase
)) {
1438 ret
= PTR_ERR(p
->membase
);
1443 * For the simple (and majority of) cases
1444 * where we don't need to do any remapping,
1445 * just cast the cookie directly.
1447 p
->membase
= (void __iomem
*)p
->mapbase
;
1451 sciport
->port
.membase
= p
->membase
;
1453 sciport
->port
.irq
= p
->irqs
[SCIx_TXI_IRQ
];
1454 sciport
->port
.flags
= p
->flags
;
1455 sciport
->port
.dev
= &dev
->dev
;
1457 sciport
->type
= sciport
->port
.type
= p
->type
;
1459 memcpy(&sciport
->irqs
, &p
->irqs
, sizeof(p
->irqs
));
1461 uart_add_one_port(&sci_uart_driver
, &sciport
->port
);
1464 #if defined(CONFIG_SH_KGDB) && !defined(CONFIG_SH_KGDB_CONSOLE)
1465 kgdb_sci_port
= &sci_ports
[kgdb_portnum
];
1466 kgdb_getchar
= kgdb_sci_getchar
;
1467 kgdb_putchar
= kgdb_sci_putchar
;
1470 #if defined(CONFIG_CPU_FREQ) && defined(CONFIG_HAVE_CLK)
1471 cpufreq_register_notifier(&sci_nb
, CPUFREQ_TRANSITION_NOTIFIER
);
1472 dev_info(&dev
->dev
, "CPU frequency notifier registered\n");
1475 #ifdef CONFIG_SH_STANDARD_BIOS
1476 sh_bios_gdb_detach();
1482 for (i
= i
- 1; i
>= 0; i
--)
1483 uart_remove_one_port(&sci_uart_driver
, &sci_ports
[i
].port
);
1488 static int __devexit
sci_remove(struct platform_device
*dev
)
1492 for (i
= 0; i
< SCI_NPORTS
; i
++)
1493 uart_remove_one_port(&sci_uart_driver
, &sci_ports
[i
].port
);
1498 static int sci_suspend(struct platform_device
*dev
, pm_message_t state
)
1502 for (i
= 0; i
< SCI_NPORTS
; i
++) {
1503 struct sci_port
*p
= &sci_ports
[i
];
1505 if (p
->type
!= PORT_UNKNOWN
&& p
->port
.dev
== &dev
->dev
)
1506 uart_suspend_port(&sci_uart_driver
, &p
->port
);
1512 static int sci_resume(struct platform_device
*dev
)
1516 for (i
= 0; i
< SCI_NPORTS
; i
++) {
1517 struct sci_port
*p
= &sci_ports
[i
];
1519 if (p
->type
!= PORT_UNKNOWN
&& p
->port
.dev
== &dev
->dev
)
1520 uart_resume_port(&sci_uart_driver
, &p
->port
);
1526 static struct platform_driver sci_driver
= {
1528 .remove
= __devexit_p(sci_remove
),
1529 .suspend
= sci_suspend
,
1530 .resume
= sci_resume
,
1533 .owner
= THIS_MODULE
,
1537 static int __init
sci_init(void)
1545 ret
= uart_register_driver(&sci_uart_driver
);
1546 if (likely(ret
== 0)) {
1547 ret
= platform_driver_register(&sci_driver
);
1549 uart_unregister_driver(&sci_uart_driver
);
1555 static void __exit
sci_exit(void)
1557 platform_driver_unregister(&sci_driver
);
1558 uart_unregister_driver(&sci_uart_driver
);
1561 module_init(sci_init
);
1562 module_exit(sci_exit
);
1564 MODULE_LICENSE("GPL");
1565 MODULE_ALIAS("platform:sh-sci");