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[deliverable/linux.git] / drivers / spi / at25.c
1 /*
2 * at25.c -- support most SPI EEPROMs, such as Atmel AT25 models
3 *
4 * Copyright (C) 2006 David Brownell
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12 #include <linux/kernel.h>
13 #include <linux/init.h>
14 #include <linux/module.h>
15 #include <linux/slab.h>
16 #include <linux/delay.h>
17 #include <linux/device.h>
18 #include <linux/sched.h>
19
20 #include <linux/spi/spi.h>
21 #include <linux/spi/eeprom.h>
22
23
24 struct at25_data {
25 struct spi_device *spi;
26 struct mutex lock;
27 struct spi_eeprom chip;
28 struct bin_attribute bin;
29 unsigned addrlen;
30 };
31
32 #define AT25_WREN 0x06 /* latch the write enable */
33 #define AT25_WRDI 0x04 /* reset the write enable */
34 #define AT25_RDSR 0x05 /* read status register */
35 #define AT25_WRSR 0x01 /* write status register */
36 #define AT25_READ 0x03 /* read byte(s) */
37 #define AT25_WRITE 0x02 /* write byte(s)/sector */
38
39 #define AT25_SR_nRDY 0x01 /* nRDY = write-in-progress */
40 #define AT25_SR_WEN 0x02 /* write enable (latched) */
41 #define AT25_SR_BP0 0x04 /* BP for software writeprotect */
42 #define AT25_SR_BP1 0x08
43 #define AT25_SR_WPEN 0x80 /* writeprotect enable */
44
45
46 #define EE_MAXADDRLEN 3 /* 24 bit addresses, up to 2 MBytes */
47
48 /* Specs often allow 5 msec for a page write, sometimes 20 msec;
49 * it's important to recover from write timeouts.
50 */
51 #define EE_TIMEOUT 25
52
53 /*-------------------------------------------------------------------------*/
54
55 #define io_limit PAGE_SIZE /* bytes */
56
57 static ssize_t
58 at25_ee_read(
59 struct at25_data *at25,
60 char *buf,
61 unsigned offset,
62 size_t count
63 )
64 {
65 u8 command[EE_MAXADDRLEN + 1];
66 u8 *cp;
67 ssize_t status;
68 struct spi_transfer t[2];
69 struct spi_message m;
70
71 cp = command;
72 *cp++ = AT25_READ;
73
74 /* 8/16/24-bit address is written MSB first */
75 switch (at25->addrlen) {
76 default: /* case 3 */
77 *cp++ = offset >> 16;
78 case 2:
79 *cp++ = offset >> 8;
80 case 1:
81 case 0: /* can't happen: for better codegen */
82 *cp++ = offset >> 0;
83 }
84
85 spi_message_init(&m);
86 memset(t, 0, sizeof t);
87
88 t[0].tx_buf = command;
89 t[0].len = at25->addrlen + 1;
90 spi_message_add_tail(&t[0], &m);
91
92 t[1].rx_buf = buf;
93 t[1].len = count;
94 spi_message_add_tail(&t[1], &m);
95
96 mutex_lock(&at25->lock);
97
98 /* Read it all at once.
99 *
100 * REVISIT that's potentially a problem with large chips, if
101 * other devices on the bus need to be accessed regularly or
102 * this chip is clocked very slowly
103 */
104 status = spi_sync(at25->spi, &m);
105 dev_dbg(&at25->spi->dev,
106 "read %Zd bytes at %d --> %d\n",
107 count, offset, (int) status);
108
109 mutex_unlock(&at25->lock);
110 return status ? status : count;
111 }
112
113 static ssize_t
114 at25_bin_read(struct kobject *kobj, struct bin_attribute *bin_attr,
115 char *buf, loff_t off, size_t count)
116 {
117 struct device *dev;
118 struct at25_data *at25;
119
120 dev = container_of(kobj, struct device, kobj);
121 at25 = dev_get_drvdata(dev);
122
123 if (unlikely(off >= at25->bin.size))
124 return 0;
125 if ((off + count) > at25->bin.size)
126 count = at25->bin.size - off;
127 if (unlikely(!count))
128 return count;
129
130 return at25_ee_read(at25, buf, off, count);
131 }
132
133
134 static ssize_t
135 at25_ee_write(struct at25_data *at25, char *buf, loff_t off, size_t count)
136 {
137 ssize_t status = 0;
138 unsigned written = 0;
139 unsigned buf_size;
140 u8 *bounce;
141
142 /* Temp buffer starts with command and address */
143 buf_size = at25->chip.page_size;
144 if (buf_size > io_limit)
145 buf_size = io_limit;
146 bounce = kmalloc(buf_size + at25->addrlen + 1, GFP_KERNEL);
147 if (!bounce)
148 return -ENOMEM;
149
150 /* For write, rollover is within the page ... so we write at
151 * most one page, then manually roll over to the next page.
152 */
153 bounce[0] = AT25_WRITE;
154 mutex_lock(&at25->lock);
155 do {
156 unsigned long timeout, retries;
157 unsigned segment;
158 unsigned offset = (unsigned) off;
159 u8 *cp = bounce + 1;
160
161 *cp = AT25_WREN;
162 status = spi_write(at25->spi, cp, 1);
163 if (status < 0) {
164 dev_dbg(&at25->spi->dev, "WREN --> %d\n",
165 (int) status);
166 break;
167 }
168
169 /* 8/16/24-bit address is written MSB first */
170 switch (at25->addrlen) {
171 default: /* case 3 */
172 *cp++ = offset >> 16;
173 case 2:
174 *cp++ = offset >> 8;
175 case 1:
176 case 0: /* can't happen: for better codegen */
177 *cp++ = offset >> 0;
178 }
179
180 /* Write as much of a page as we can */
181 segment = buf_size - (offset % buf_size);
182 if (segment > count)
183 segment = count;
184 memcpy(cp, buf, segment);
185 status = spi_write(at25->spi, bounce,
186 segment + at25->addrlen + 1);
187 dev_dbg(&at25->spi->dev,
188 "write %u bytes at %u --> %d\n",
189 segment, offset, (int) status);
190 if (status < 0)
191 break;
192
193 /* REVISIT this should detect (or prevent) failed writes
194 * to readonly sections of the EEPROM...
195 */
196
197 /* Wait for non-busy status */
198 timeout = jiffies + msecs_to_jiffies(EE_TIMEOUT);
199 retries = 0;
200 do {
201 int sr;
202
203 sr = spi_w8r8(at25->spi, AT25_RDSR);
204 if (sr < 0 || (sr & AT25_SR_nRDY)) {
205 dev_dbg(&at25->spi->dev,
206 "rdsr --> %d (%02x)\n", sr, sr);
207 /* at HZ=100, this is sloooow */
208 msleep(1);
209 continue;
210 }
211 if (!(sr & AT25_SR_nRDY))
212 break;
213 } while (retries++ < 3 || time_before_eq(jiffies, timeout));
214
215 if (time_after(jiffies, timeout)) {
216 dev_err(&at25->spi->dev,
217 "write %d bytes offset %d, "
218 "timeout after %u msecs\n",
219 segment, offset,
220 jiffies_to_msecs(jiffies -
221 (timeout - EE_TIMEOUT)));
222 status = -ETIMEDOUT;
223 break;
224 }
225
226 off += segment;
227 buf += segment;
228 count -= segment;
229 written += segment;
230
231 } while (count > 0);
232
233 mutex_unlock(&at25->lock);
234
235 kfree(bounce);
236 return written ? written : status;
237 }
238
239 static ssize_t
240 at25_bin_write(struct kobject *kobj, struct bin_attribute *bin_attr,
241 char *buf, loff_t off, size_t count)
242 {
243 struct device *dev;
244 struct at25_data *at25;
245
246 dev = container_of(kobj, struct device, kobj);
247 at25 = dev_get_drvdata(dev);
248
249 if (unlikely(off >= at25->bin.size))
250 return -EFBIG;
251 if ((off + count) > at25->bin.size)
252 count = at25->bin.size - off;
253 if (unlikely(!count))
254 return count;
255
256 return at25_ee_write(at25, buf, off, count);
257 }
258
259 /*-------------------------------------------------------------------------*/
260
261 static int at25_probe(struct spi_device *spi)
262 {
263 struct at25_data *at25 = NULL;
264 const struct spi_eeprom *chip;
265 int err;
266 int sr;
267 int addrlen;
268
269 /* Chip description */
270 chip = spi->dev.platform_data;
271 if (!chip) {
272 dev_dbg(&spi->dev, "no chip description\n");
273 err = -ENODEV;
274 goto fail;
275 }
276
277 /* For now we only support 8/16/24 bit addressing */
278 if (chip->flags & EE_ADDR1)
279 addrlen = 1;
280 else if (chip->flags & EE_ADDR2)
281 addrlen = 2;
282 else if (chip->flags & EE_ADDR3)
283 addrlen = 3;
284 else {
285 dev_dbg(&spi->dev, "unsupported address type\n");
286 err = -EINVAL;
287 goto fail;
288 }
289
290 /* Ping the chip ... the status register is pretty portable,
291 * unlike probing manufacturer IDs. We do expect that system
292 * firmware didn't write it in the past few milliseconds!
293 */
294 sr = spi_w8r8(spi, AT25_RDSR);
295 if (sr < 0 || sr & AT25_SR_nRDY) {
296 dev_dbg(&spi->dev, "rdsr --> %d (%02x)\n", sr, sr);
297 err = -ENXIO;
298 goto fail;
299 }
300
301 if (!(at25 = kzalloc(sizeof *at25, GFP_KERNEL))) {
302 err = -ENOMEM;
303 goto fail;
304 }
305
306 mutex_init(&at25->lock);
307 at25->chip = *chip;
308 at25->spi = spi_dev_get(spi);
309 dev_set_drvdata(&spi->dev, at25);
310 at25->addrlen = addrlen;
311
312 /* Export the EEPROM bytes through sysfs, since that's convenient.
313 * Default to root-only access to the data; EEPROMs often hold data
314 * that's sensitive for read and/or write, like ethernet addresses,
315 * security codes, board-specific manufacturing calibrations, etc.
316 */
317 at25->bin.attr.name = "eeprom";
318 at25->bin.attr.mode = S_IRUSR;
319 at25->bin.read = at25_bin_read;
320
321 at25->bin.size = at25->chip.byte_len;
322 if (!(chip->flags & EE_READONLY)) {
323 at25->bin.write = at25_bin_write;
324 at25->bin.attr.mode |= S_IWUSR;
325 }
326
327 err = sysfs_create_bin_file(&spi->dev.kobj, &at25->bin);
328 if (err)
329 goto fail;
330
331 dev_info(&spi->dev, "%Zd %s %s eeprom%s, pagesize %u\n",
332 (at25->bin.size < 1024)
333 ? at25->bin.size
334 : (at25->bin.size / 1024),
335 (at25->bin.size < 1024) ? "Byte" : "KByte",
336 at25->chip.name,
337 (chip->flags & EE_READONLY) ? " (readonly)" : "",
338 at25->chip.page_size);
339 return 0;
340 fail:
341 dev_dbg(&spi->dev, "probe err %d\n", err);
342 kfree(at25);
343 return err;
344 }
345
346 static int __devexit at25_remove(struct spi_device *spi)
347 {
348 struct at25_data *at25;
349
350 at25 = dev_get_drvdata(&spi->dev);
351 sysfs_remove_bin_file(&spi->dev.kobj, &at25->bin);
352 kfree(at25);
353 return 0;
354 }
355
356 /*-------------------------------------------------------------------------*/
357
358 static struct spi_driver at25_driver = {
359 .driver = {
360 .name = "at25",
361 .owner = THIS_MODULE,
362 },
363 .probe = at25_probe,
364 .remove = __devexit_p(at25_remove),
365 };
366
367 static int __init at25_init(void)
368 {
369 return spi_register_driver(&at25_driver);
370 }
371 module_init(at25_init);
372
373 static void __exit at25_exit(void)
374 {
375 spi_unregister_driver(&at25_driver);
376 }
377 module_exit(at25_exit);
378
379 MODULE_DESCRIPTION("Driver for most SPI EEPROMs");
380 MODULE_AUTHOR("David Brownell");
381 MODULE_LICENSE("GPL");
382
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