2 * Sonics Silicon Backplane
3 * Broadcom EXTIF core driver
5 * Copyright 2005, Broadcom Corporation
6 * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
7 * Copyright 2006, 2007, Felix Fietkau <nbd@openwrt.org>
8 * Copyright 2007, Aurelien Jarno <aurelien@aurel32.net>
10 * Licensed under the GNU/GPL. See COPYING for details.
13 #include <linux/serial.h>
14 #include <linux/serial_core.h>
15 #include <linux/serial_reg.h>
17 #include "ssb_private.h"
20 static inline u32
extif_read32(struct ssb_extif
*extif
, u16 offset
)
22 return ssb_read32(extif
->dev
, offset
);
25 static inline void extif_write32(struct ssb_extif
*extif
, u16 offset
, u32 value
)
27 ssb_write32(extif
->dev
, offset
, value
);
30 static inline u32
extif_write32_masked(struct ssb_extif
*extif
, u16 offset
,
34 value
|= extif_read32(extif
, offset
) & ~mask
;
35 extif_write32(extif
, offset
, value
);
40 #ifdef CONFIG_SSB_SERIAL
41 static bool serial_exists(u8
*regs
)
46 save_mcr
= regs
[UART_MCR
];
47 regs
[UART_MCR
] = (UART_MCR_LOOP
| UART_MCR_OUT2
| UART_MCR_RTS
);
48 msr
= regs
[UART_MSR
] & (UART_MSR_DCD
| UART_MSR_RI
49 | UART_MSR_CTS
| UART_MSR_DSR
);
50 regs
[UART_MCR
] = save_mcr
;
52 return (msr
== (UART_MSR_DCD
| UART_MSR_CTS
));
55 int ssb_extif_serial_init(struct ssb_extif
*extif
, struct ssb_serial_port
*ports
)
59 /* Disable GPIO interrupt initially */
60 extif_write32(extif
, SSB_EXTIF_GPIO_INTPOL
, 0);
61 extif_write32(extif
, SSB_EXTIF_GPIO_INTMASK
, 0);
63 for (i
= 0; i
< 2; i
++) {
64 void __iomem
*uart_regs
;
66 uart_regs
= ioremap_nocache(SSB_EUART
, 16);
70 if (serial_exists(uart_regs
) && ports
) {
71 extif_write32(extif
, SSB_EXTIF_GPIO_INTMASK
, 2);
74 ports
[i
].regs
= uart_regs
;
76 ports
[i
].baud_base
= 13500000;
77 ports
[i
].reg_shift
= 0;
84 #endif /* CONFIG_SSB_SERIAL */
86 void ssb_extif_timing_init(struct ssb_extif
*extif
, unsigned long ns
)
90 /* Initialize extif so we can get to the LEDs and external UART */
91 extif_write32(extif
, SSB_EXTIF_PROG_CFG
, SSB_EXTCFG_EN
);
93 /* Set timing for the flash */
94 tmp
= DIV_ROUND_UP(10, ns
) << SSB_PROG_WCNT_3_SHIFT
;
95 tmp
|= DIV_ROUND_UP(40, ns
) << SSB_PROG_WCNT_1_SHIFT
;
96 tmp
|= DIV_ROUND_UP(120, ns
);
97 extif_write32(extif
, SSB_EXTIF_PROG_WAITCNT
, tmp
);
99 /* Set programmable interface timing for external uart */
100 tmp
= DIV_ROUND_UP(10, ns
) << SSB_PROG_WCNT_3_SHIFT
;
101 tmp
|= DIV_ROUND_UP(20, ns
) << SSB_PROG_WCNT_2_SHIFT
;
102 tmp
|= DIV_ROUND_UP(100, ns
) << SSB_PROG_WCNT_1_SHIFT
;
103 tmp
|= DIV_ROUND_UP(120, ns
);
104 extif_write32(extif
, SSB_EXTIF_PROG_WAITCNT
, tmp
);
107 void ssb_extif_get_clockcontrol(struct ssb_extif
*extif
,
108 u32
*pll_type
, u32
*n
, u32
*m
)
110 *pll_type
= SSB_PLLTYPE_1
;
111 *n
= extif_read32(extif
, SSB_EXTIF_CLOCK_N
);
112 *m
= extif_read32(extif
, SSB_EXTIF_CLOCK_SB
);
115 void ssb_extif_watchdog_timer_set(struct ssb_extif
*extif
,
118 extif_write32(extif
, SSB_EXTIF_WATCHDOG
, ticks
);
121 u32
ssb_extif_gpio_in(struct ssb_extif
*extif
, u32 mask
)
123 return extif_read32(extif
, SSB_EXTIF_GPIO_IN
) & mask
;
126 u32
ssb_extif_gpio_out(struct ssb_extif
*extif
, u32 mask
, u32 value
)
128 return extif_write32_masked(extif
, SSB_EXTIF_GPIO_OUT(0),
132 u32
ssb_extif_gpio_outen(struct ssb_extif
*extif
, u32 mask
, u32 value
)
134 return extif_write32_masked(extif
, SSB_EXTIF_GPIO_OUTEN(0),
138 u32
ssb_extif_gpio_polarity(struct ssb_extif
*extif
, u32 mask
, u32 value
)
140 return extif_write32_masked(extif
, SSB_EXTIF_GPIO_INTPOL
, mask
, value
);
143 u32
ssb_extif_gpio_intmask(struct ssb_extif
*extif
, u32 mask
, u32 value
)
145 return extif_write32_masked(extif
, SSB_EXTIF_GPIO_INTMASK
, mask
, value
);
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