2 * Sonics Silicon Backplane
3 * Embedded systems support code
5 * Copyright 2005-2008, Broadcom Corporation
6 * Copyright 2006-2008, Michael Buesch <mb@bu3sch.de>
8 * Licensed under the GNU/GPL. See COPYING for details.
11 #include <linux/ssb/ssb.h>
12 #include <linux/ssb/ssb_embedded.h>
13 #include <linux/ssb/ssb_driver_pci.h>
14 #include <linux/ssb/ssb_driver_gige.h>
15 #include <linux/pci.h>
17 #include "ssb_private.h"
20 int ssb_watchdog_timer_set(struct ssb_bus
*bus
, u32 ticks
)
22 if (ssb_chipco_available(&bus
->chipco
)) {
23 ssb_chipco_watchdog_timer_set(&bus
->chipco
, ticks
);
26 if (ssb_extif_available(&bus
->extif
)) {
27 ssb_extif_watchdog_timer_set(&bus
->extif
, ticks
);
32 EXPORT_SYMBOL(ssb_watchdog_timer_set
);
34 u32
ssb_gpio_in(struct ssb_bus
*bus
, u32 mask
)
39 spin_lock_irqsave(&bus
->gpio_lock
, flags
);
40 if (ssb_chipco_available(&bus
->chipco
))
41 res
= ssb_chipco_gpio_in(&bus
->chipco
, mask
);
42 else if (ssb_extif_available(&bus
->extif
))
43 res
= ssb_extif_gpio_in(&bus
->extif
, mask
);
46 spin_unlock_irqrestore(&bus
->gpio_lock
, flags
);
50 EXPORT_SYMBOL(ssb_gpio_in
);
52 u32
ssb_gpio_out(struct ssb_bus
*bus
, u32 mask
, u32 value
)
57 spin_lock_irqsave(&bus
->gpio_lock
, flags
);
58 if (ssb_chipco_available(&bus
->chipco
))
59 res
= ssb_chipco_gpio_out(&bus
->chipco
, mask
, value
);
60 else if (ssb_extif_available(&bus
->extif
))
61 res
= ssb_extif_gpio_out(&bus
->extif
, mask
, value
);
64 spin_unlock_irqrestore(&bus
->gpio_lock
, flags
);
68 EXPORT_SYMBOL(ssb_gpio_out
);
70 u32
ssb_gpio_outen(struct ssb_bus
*bus
, u32 mask
, u32 value
)
75 spin_lock_irqsave(&bus
->gpio_lock
, flags
);
76 if (ssb_chipco_available(&bus
->chipco
))
77 res
= ssb_chipco_gpio_outen(&bus
->chipco
, mask
, value
);
78 else if (ssb_extif_available(&bus
->extif
))
79 res
= ssb_extif_gpio_outen(&bus
->extif
, mask
, value
);
82 spin_unlock_irqrestore(&bus
->gpio_lock
, flags
);
86 EXPORT_SYMBOL(ssb_gpio_outen
);
88 u32
ssb_gpio_control(struct ssb_bus
*bus
, u32 mask
, u32 value
)
93 spin_lock_irqsave(&bus
->gpio_lock
, flags
);
94 if (ssb_chipco_available(&bus
->chipco
))
95 res
= ssb_chipco_gpio_control(&bus
->chipco
, mask
, value
);
96 spin_unlock_irqrestore(&bus
->gpio_lock
, flags
);
100 EXPORT_SYMBOL(ssb_gpio_control
);
102 u32
ssb_gpio_intmask(struct ssb_bus
*bus
, u32 mask
, u32 value
)
107 spin_lock_irqsave(&bus
->gpio_lock
, flags
);
108 if (ssb_chipco_available(&bus
->chipco
))
109 res
= ssb_chipco_gpio_intmask(&bus
->chipco
, mask
, value
);
110 else if (ssb_extif_available(&bus
->extif
))
111 res
= ssb_extif_gpio_intmask(&bus
->extif
, mask
, value
);
114 spin_unlock_irqrestore(&bus
->gpio_lock
, flags
);
118 EXPORT_SYMBOL(ssb_gpio_intmask
);
120 u32
ssb_gpio_polarity(struct ssb_bus
*bus
, u32 mask
, u32 value
)
125 spin_lock_irqsave(&bus
->gpio_lock
, flags
);
126 if (ssb_chipco_available(&bus
->chipco
))
127 res
= ssb_chipco_gpio_polarity(&bus
->chipco
, mask
, value
);
128 else if (ssb_extif_available(&bus
->extif
))
129 res
= ssb_extif_gpio_polarity(&bus
->extif
, mask
, value
);
132 spin_unlock_irqrestore(&bus
->gpio_lock
, flags
);
136 EXPORT_SYMBOL(ssb_gpio_polarity
);
138 #ifdef CONFIG_SSB_DRIVER_GIGE
139 static int gige_pci_init_callback(struct ssb_bus
*bus
, unsigned long data
)
141 struct pci_dev
*pdev
= (struct pci_dev
*)data
;
142 struct ssb_device
*dev
;
146 for (i
= 0; i
< bus
->nr_devices
; i
++) {
147 dev
= &(bus
->devices
[i
]);
148 if (dev
->id
.coreid
!= SSB_DEV_ETHERNET_GBIT
)
152 !device_is_registered(dev
->dev
))
154 res
= ssb_gige_pcibios_plat_dev_init(dev
, pdev
);
161 #endif /* CONFIG_SSB_DRIVER_GIGE */
163 int ssb_pcibios_plat_dev_init(struct pci_dev
*dev
)
167 err
= ssb_pcicore_plat_dev_init(dev
);
170 #ifdef CONFIG_SSB_DRIVER_GIGE
171 err
= ssb_for_each_bus_call((unsigned long)dev
, gige_pci_init_callback
);
175 /* This is not a PCI device on any SSB device. */
180 #ifdef CONFIG_SSB_DRIVER_GIGE
181 static int gige_map_irq_callback(struct ssb_bus
*bus
, unsigned long data
)
183 const struct pci_dev
*pdev
= (const struct pci_dev
*)data
;
184 struct ssb_device
*dev
;
188 for (i
= 0; i
< bus
->nr_devices
; i
++) {
189 dev
= &(bus
->devices
[i
]);
190 if (dev
->id
.coreid
!= SSB_DEV_ETHERNET_GBIT
)
194 !device_is_registered(dev
->dev
))
196 res
= ssb_gige_map_irq(dev
, pdev
);
203 #endif /* CONFIG_SSB_DRIVER_GIGE */
205 int ssb_pcibios_map_irq(const struct pci_dev
*dev
, u8 slot
, u8 pin
)
209 /* Check if this PCI device is a device on a SSB bus or device
210 * and return the IRQ number for it. */
212 res
= ssb_pcicore_pcibios_map_irq(dev
, slot
, pin
);
215 #ifdef CONFIG_SSB_DRIVER_GIGE
216 res
= ssb_for_each_bus_call((unsigned long)dev
, gige_map_irq_callback
);
220 /* This is not a PCI device on any SSB device. */
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