2 * Sonics Silicon Backplane
5 * Copyright 2005, Broadcom Corporation
6 * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
8 * Licensed under the GNU/GPL. See COPYING for details.
11 #include "ssb_private.h"
13 #include <linux/delay.h>
15 #include <linux/ssb/ssb.h>
16 #include <linux/ssb/ssb_regs.h>
17 #include <linux/ssb/ssb_driver_gige.h>
18 #include <linux/dma-mapping.h>
19 #include <linux/pci.h>
20 #include <linux/mmc/sdio_func.h>
21 #include <linux/slab.h>
23 #include <pcmcia/cs.h>
24 #include <pcmcia/cistpl.h>
25 #include <pcmcia/ds.h>
28 MODULE_DESCRIPTION("Sonics Silicon Backplane driver");
29 MODULE_LICENSE("GPL");
32 /* Temporary list of yet-to-be-attached buses */
33 static LIST_HEAD(attach_queue
);
34 /* List if running buses */
35 static LIST_HEAD(buses
);
36 /* Software ID counter */
37 static unsigned int next_busnumber
;
38 /* buses_mutes locks the two buslists and the next_busnumber.
39 * Don't lock this directly, but use ssb_buses_[un]lock() below. */
40 static DEFINE_MUTEX(buses_mutex
);
42 /* There are differences in the codeflow, if the bus is
43 * initialized from early boot, as various needed services
44 * are not available early. This is a mechanism to delay
45 * these initializations to after early boot has finished.
46 * It's also used to avoid mutex locking, as that's not
47 * available and needed early. */
48 static bool ssb_is_early_boot
= 1;
50 static void ssb_buses_lock(void);
51 static void ssb_buses_unlock(void);
54 #ifdef CONFIG_SSB_PCIHOST
55 struct ssb_bus
*ssb_pci_dev_to_bus(struct pci_dev
*pdev
)
60 list_for_each_entry(bus
, &buses
, list
) {
61 if (bus
->bustype
== SSB_BUSTYPE_PCI
&&
62 bus
->host_pci
== pdev
)
71 #endif /* CONFIG_SSB_PCIHOST */
73 #ifdef CONFIG_SSB_PCMCIAHOST
74 struct ssb_bus
*ssb_pcmcia_dev_to_bus(struct pcmcia_device
*pdev
)
79 list_for_each_entry(bus
, &buses
, list
) {
80 if (bus
->bustype
== SSB_BUSTYPE_PCMCIA
&&
81 bus
->host_pcmcia
== pdev
)
90 #endif /* CONFIG_SSB_PCMCIAHOST */
92 #ifdef CONFIG_SSB_SDIOHOST
93 struct ssb_bus
*ssb_sdio_func_to_bus(struct sdio_func
*func
)
98 list_for_each_entry(bus
, &buses
, list
) {
99 if (bus
->bustype
== SSB_BUSTYPE_SDIO
&&
100 bus
->host_sdio
== func
)
109 #endif /* CONFIG_SSB_SDIOHOST */
111 int ssb_for_each_bus_call(unsigned long data
,
112 int (*func
)(struct ssb_bus
*bus
, unsigned long data
))
118 list_for_each_entry(bus
, &buses
, list
) {
119 res
= func(bus
, data
);
130 static struct ssb_device
*ssb_device_get(struct ssb_device
*dev
)
133 get_device(dev
->dev
);
137 static void ssb_device_put(struct ssb_device
*dev
)
140 put_device(dev
->dev
);
143 static inline struct ssb_driver
*ssb_driver_get(struct ssb_driver
*drv
)
146 get_driver(&drv
->drv
);
150 static inline void ssb_driver_put(struct ssb_driver
*drv
)
153 put_driver(&drv
->drv
);
156 static int ssb_device_resume(struct device
*dev
)
158 struct ssb_device
*ssb_dev
= dev_to_ssb_dev(dev
);
159 struct ssb_driver
*ssb_drv
;
163 ssb_drv
= drv_to_ssb_drv(dev
->driver
);
164 if (ssb_drv
&& ssb_drv
->resume
)
165 err
= ssb_drv
->resume(ssb_dev
);
173 static int ssb_device_suspend(struct device
*dev
, pm_message_t state
)
175 struct ssb_device
*ssb_dev
= dev_to_ssb_dev(dev
);
176 struct ssb_driver
*ssb_drv
;
180 ssb_drv
= drv_to_ssb_drv(dev
->driver
);
181 if (ssb_drv
&& ssb_drv
->suspend
)
182 err
= ssb_drv
->suspend(ssb_dev
, state
);
190 int ssb_bus_resume(struct ssb_bus
*bus
)
194 /* Reset HW state information in memory, so that HW is
195 * completely reinitialized. */
196 bus
->mapped_device
= NULL
;
197 #ifdef CONFIG_SSB_DRIVER_PCICORE
198 bus
->pcicore
.setup_done
= 0;
201 err
= ssb_bus_powerup(bus
, 0);
204 err
= ssb_pcmcia_hardware_setup(bus
);
206 ssb_bus_may_powerdown(bus
);
209 ssb_chipco_resume(&bus
->chipco
);
210 ssb_bus_may_powerdown(bus
);
214 EXPORT_SYMBOL(ssb_bus_resume
);
216 int ssb_bus_suspend(struct ssb_bus
*bus
)
218 ssb_chipco_suspend(&bus
->chipco
);
219 ssb_pci_xtal(bus
, SSB_GPIO_XTAL
| SSB_GPIO_PLL
, 0);
223 EXPORT_SYMBOL(ssb_bus_suspend
);
225 #ifdef CONFIG_SSB_SPROM
226 /** ssb_devices_freeze - Freeze all devices on the bus.
228 * After freezing no device driver will be handling a device
229 * on this bus anymore. ssb_devices_thaw() must be called after
230 * a successful freeze to reactivate the devices.
233 * @ctx: Context structure. Pass this to ssb_devices_thaw().
235 int ssb_devices_freeze(struct ssb_bus
*bus
, struct ssb_freeze_context
*ctx
)
237 struct ssb_device
*sdev
;
238 struct ssb_driver
*sdrv
;
241 memset(ctx
, 0, sizeof(*ctx
));
243 SSB_WARN_ON(bus
->nr_devices
> ARRAY_SIZE(ctx
->device_frozen
));
245 for (i
= 0; i
< bus
->nr_devices
; i
++) {
246 sdev
= ssb_device_get(&bus
->devices
[i
]);
248 if (!sdev
->dev
|| !sdev
->dev
->driver
||
249 !device_is_registered(sdev
->dev
)) {
250 ssb_device_put(sdev
);
253 sdrv
= ssb_driver_get(drv_to_ssb_drv(sdev
->dev
->driver
));
254 if (!sdrv
|| SSB_WARN_ON(!sdrv
->remove
)) {
255 ssb_device_put(sdev
);
259 ctx
->device_frozen
[i
] = 1;
265 /** ssb_devices_thaw - Unfreeze all devices on the bus.
267 * This will re-attach the device drivers and re-init the devices.
269 * @ctx: The context structure from ssb_devices_freeze()
271 int ssb_devices_thaw(struct ssb_freeze_context
*ctx
)
273 struct ssb_bus
*bus
= ctx
->bus
;
274 struct ssb_device
*sdev
;
275 struct ssb_driver
*sdrv
;
279 for (i
= 0; i
< bus
->nr_devices
; i
++) {
280 if (!ctx
->device_frozen
[i
])
282 sdev
= &bus
->devices
[i
];
284 if (SSB_WARN_ON(!sdev
->dev
|| !sdev
->dev
->driver
))
286 sdrv
= drv_to_ssb_drv(sdev
->dev
->driver
);
287 if (SSB_WARN_ON(!sdrv
|| !sdrv
->probe
))
290 err
= sdrv
->probe(sdev
, &sdev
->id
);
292 ssb_printk(KERN_ERR PFX
"Failed to thaw device %s\n",
293 dev_name(sdev
->dev
));
296 ssb_driver_put(sdrv
);
297 ssb_device_put(sdev
);
302 #endif /* CONFIG_SSB_SPROM */
304 static void ssb_device_shutdown(struct device
*dev
)
306 struct ssb_device
*ssb_dev
= dev_to_ssb_dev(dev
);
307 struct ssb_driver
*ssb_drv
;
311 ssb_drv
= drv_to_ssb_drv(dev
->driver
);
312 if (ssb_drv
&& ssb_drv
->shutdown
)
313 ssb_drv
->shutdown(ssb_dev
);
316 static int ssb_device_remove(struct device
*dev
)
318 struct ssb_device
*ssb_dev
= dev_to_ssb_dev(dev
);
319 struct ssb_driver
*ssb_drv
= drv_to_ssb_drv(dev
->driver
);
321 if (ssb_drv
&& ssb_drv
->remove
)
322 ssb_drv
->remove(ssb_dev
);
323 ssb_device_put(ssb_dev
);
328 static int ssb_device_probe(struct device
*dev
)
330 struct ssb_device
*ssb_dev
= dev_to_ssb_dev(dev
);
331 struct ssb_driver
*ssb_drv
= drv_to_ssb_drv(dev
->driver
);
334 ssb_device_get(ssb_dev
);
335 if (ssb_drv
&& ssb_drv
->probe
)
336 err
= ssb_drv
->probe(ssb_dev
, &ssb_dev
->id
);
338 ssb_device_put(ssb_dev
);
343 static int ssb_match_devid(const struct ssb_device_id
*tabid
,
344 const struct ssb_device_id
*devid
)
346 if ((tabid
->vendor
!= devid
->vendor
) &&
347 tabid
->vendor
!= SSB_ANY_VENDOR
)
349 if ((tabid
->coreid
!= devid
->coreid
) &&
350 tabid
->coreid
!= SSB_ANY_ID
)
352 if ((tabid
->revision
!= devid
->revision
) &&
353 tabid
->revision
!= SSB_ANY_REV
)
358 static int ssb_bus_match(struct device
*dev
, struct device_driver
*drv
)
360 struct ssb_device
*ssb_dev
= dev_to_ssb_dev(dev
);
361 struct ssb_driver
*ssb_drv
= drv_to_ssb_drv(drv
);
362 const struct ssb_device_id
*id
;
364 for (id
= ssb_drv
->id_table
;
365 id
->vendor
|| id
->coreid
|| id
->revision
;
367 if (ssb_match_devid(id
, &ssb_dev
->id
))
368 return 1; /* found */
374 static int ssb_device_uevent(struct device
*dev
, struct kobj_uevent_env
*env
)
376 struct ssb_device
*ssb_dev
= dev_to_ssb_dev(dev
);
381 return add_uevent_var(env
,
382 "MODALIAS=ssb:v%04Xid%04Xrev%02X",
383 ssb_dev
->id
.vendor
, ssb_dev
->id
.coreid
,
384 ssb_dev
->id
.revision
);
387 static struct bus_type ssb_bustype
= {
389 .match
= ssb_bus_match
,
390 .probe
= ssb_device_probe
,
391 .remove
= ssb_device_remove
,
392 .shutdown
= ssb_device_shutdown
,
393 .suspend
= ssb_device_suspend
,
394 .resume
= ssb_device_resume
,
395 .uevent
= ssb_device_uevent
,
398 static void ssb_buses_lock(void)
400 /* See the comment at the ssb_is_early_boot definition */
401 if (!ssb_is_early_boot
)
402 mutex_lock(&buses_mutex
);
405 static void ssb_buses_unlock(void)
407 /* See the comment at the ssb_is_early_boot definition */
408 if (!ssb_is_early_boot
)
409 mutex_unlock(&buses_mutex
);
412 static void ssb_devices_unregister(struct ssb_bus
*bus
)
414 struct ssb_device
*sdev
;
417 for (i
= bus
->nr_devices
- 1; i
>= 0; i
--) {
418 sdev
= &(bus
->devices
[i
]);
420 device_unregister(sdev
->dev
);
424 void ssb_bus_unregister(struct ssb_bus
*bus
)
427 ssb_devices_unregister(bus
);
428 list_del(&bus
->list
);
431 ssb_pcmcia_exit(bus
);
435 EXPORT_SYMBOL(ssb_bus_unregister
);
437 static void ssb_release_dev(struct device
*dev
)
439 struct __ssb_dev_wrapper
*devwrap
;
441 devwrap
= container_of(dev
, struct __ssb_dev_wrapper
, dev
);
445 static int ssb_devices_register(struct ssb_bus
*bus
)
447 struct ssb_device
*sdev
;
449 struct __ssb_dev_wrapper
*devwrap
;
453 for (i
= 0; i
< bus
->nr_devices
; i
++) {
454 sdev
= &(bus
->devices
[i
]);
456 /* We don't register SSB-system devices to the kernel,
457 * as the drivers for them are built into SSB. */
458 switch (sdev
->id
.coreid
) {
459 case SSB_DEV_CHIPCOMMON
:
464 case SSB_DEV_MIPS_3302
:
469 devwrap
= kzalloc(sizeof(*devwrap
), GFP_KERNEL
);
471 ssb_printk(KERN_ERR PFX
472 "Could not allocate device\n");
477 devwrap
->sdev
= sdev
;
479 dev
->release
= ssb_release_dev
;
480 dev
->bus
= &ssb_bustype
;
481 dev_set_name(dev
, "ssb%u:%d", bus
->busnumber
, dev_idx
);
483 switch (bus
->bustype
) {
484 case SSB_BUSTYPE_PCI
:
485 #ifdef CONFIG_SSB_PCIHOST
486 sdev
->irq
= bus
->host_pci
->irq
;
487 dev
->parent
= &bus
->host_pci
->dev
;
488 sdev
->dma_dev
= dev
->parent
;
491 case SSB_BUSTYPE_PCMCIA
:
492 #ifdef CONFIG_SSB_PCMCIAHOST
493 sdev
->irq
= bus
->host_pcmcia
->irq
;
494 dev
->parent
= &bus
->host_pcmcia
->dev
;
497 case SSB_BUSTYPE_SDIO
:
498 #ifdef CONFIG_SSB_SDIOHOST
499 dev
->parent
= &bus
->host_sdio
->dev
;
502 case SSB_BUSTYPE_SSB
:
503 dev
->dma_mask
= &dev
->coherent_dma_mask
;
509 err
= device_register(dev
);
511 ssb_printk(KERN_ERR PFX
512 "Could not register %s\n",
514 /* Set dev to NULL to not unregister
515 * dev on error unwinding. */
525 /* Unwind the already registered devices. */
526 ssb_devices_unregister(bus
);
530 /* Needs ssb_buses_lock() */
531 static int ssb_attach_queued_buses(void)
533 struct ssb_bus
*bus
, *n
;
535 int drop_them_all
= 0;
537 list_for_each_entry_safe(bus
, n
, &attach_queue
, list
) {
539 list_del(&bus
->list
);
542 /* Can't init the PCIcore in ssb_bus_register(), as that
543 * is too early in boot for embedded systems
544 * (no udelay() available). So do it here in attach stage.
546 err
= ssb_bus_powerup(bus
, 0);
549 ssb_pcicore_init(&bus
->pcicore
);
550 ssb_bus_may_powerdown(bus
);
552 err
= ssb_devices_register(bus
);
556 list_del(&bus
->list
);
559 list_move_tail(&bus
->list
, &buses
);
565 static u8
ssb_ssb_read8(struct ssb_device
*dev
, u16 offset
)
567 struct ssb_bus
*bus
= dev
->bus
;
569 offset
+= dev
->core_index
* SSB_CORE_SIZE
;
570 return readb(bus
->mmio
+ offset
);
573 static u16
ssb_ssb_read16(struct ssb_device
*dev
, u16 offset
)
575 struct ssb_bus
*bus
= dev
->bus
;
577 offset
+= dev
->core_index
* SSB_CORE_SIZE
;
578 return readw(bus
->mmio
+ offset
);
581 static u32
ssb_ssb_read32(struct ssb_device
*dev
, u16 offset
)
583 struct ssb_bus
*bus
= dev
->bus
;
585 offset
+= dev
->core_index
* SSB_CORE_SIZE
;
586 return readl(bus
->mmio
+ offset
);
589 #ifdef CONFIG_SSB_BLOCKIO
590 static void ssb_ssb_block_read(struct ssb_device
*dev
, void *buffer
,
591 size_t count
, u16 offset
, u8 reg_width
)
593 struct ssb_bus
*bus
= dev
->bus
;
596 offset
+= dev
->core_index
* SSB_CORE_SIZE
;
597 addr
= bus
->mmio
+ offset
;
604 *buf
= __raw_readb(addr
);
611 __le16
*buf
= buffer
;
613 SSB_WARN_ON(count
& 1);
615 *buf
= (__force __le16
)__raw_readw(addr
);
622 __le32
*buf
= buffer
;
624 SSB_WARN_ON(count
& 3);
626 *buf
= (__force __le32
)__raw_readl(addr
);
636 #endif /* CONFIG_SSB_BLOCKIO */
638 static void ssb_ssb_write8(struct ssb_device
*dev
, u16 offset
, u8 value
)
640 struct ssb_bus
*bus
= dev
->bus
;
642 offset
+= dev
->core_index
* SSB_CORE_SIZE
;
643 writeb(value
, bus
->mmio
+ offset
);
646 static void ssb_ssb_write16(struct ssb_device
*dev
, u16 offset
, u16 value
)
648 struct ssb_bus
*bus
= dev
->bus
;
650 offset
+= dev
->core_index
* SSB_CORE_SIZE
;
651 writew(value
, bus
->mmio
+ offset
);
654 static void ssb_ssb_write32(struct ssb_device
*dev
, u16 offset
, u32 value
)
656 struct ssb_bus
*bus
= dev
->bus
;
658 offset
+= dev
->core_index
* SSB_CORE_SIZE
;
659 writel(value
, bus
->mmio
+ offset
);
662 #ifdef CONFIG_SSB_BLOCKIO
663 static void ssb_ssb_block_write(struct ssb_device
*dev
, const void *buffer
,
664 size_t count
, u16 offset
, u8 reg_width
)
666 struct ssb_bus
*bus
= dev
->bus
;
669 offset
+= dev
->core_index
* SSB_CORE_SIZE
;
670 addr
= bus
->mmio
+ offset
;
674 const u8
*buf
= buffer
;
677 __raw_writeb(*buf
, addr
);
684 const __le16
*buf
= buffer
;
686 SSB_WARN_ON(count
& 1);
688 __raw_writew((__force u16
)(*buf
), addr
);
695 const __le32
*buf
= buffer
;
697 SSB_WARN_ON(count
& 3);
699 __raw_writel((__force u32
)(*buf
), addr
);
709 #endif /* CONFIG_SSB_BLOCKIO */
711 /* Ops for the plain SSB bus without a host-device (no PCI or PCMCIA). */
712 static const struct ssb_bus_ops ssb_ssb_ops
= {
713 .read8
= ssb_ssb_read8
,
714 .read16
= ssb_ssb_read16
,
715 .read32
= ssb_ssb_read32
,
716 .write8
= ssb_ssb_write8
,
717 .write16
= ssb_ssb_write16
,
718 .write32
= ssb_ssb_write32
,
719 #ifdef CONFIG_SSB_BLOCKIO
720 .block_read
= ssb_ssb_block_read
,
721 .block_write
= ssb_ssb_block_write
,
725 static int ssb_fetch_invariants(struct ssb_bus
*bus
,
726 ssb_invariants_func_t get_invariants
)
728 struct ssb_init_invariants iv
;
731 memset(&iv
, 0, sizeof(iv
));
732 err
= get_invariants(bus
, &iv
);
735 memcpy(&bus
->boardinfo
, &iv
.boardinfo
, sizeof(iv
.boardinfo
));
736 memcpy(&bus
->sprom
, &iv
.sprom
, sizeof(iv
.sprom
));
737 bus
->has_cardbus_slot
= iv
.has_cardbus_slot
;
742 static int ssb_bus_register(struct ssb_bus
*bus
,
743 ssb_invariants_func_t get_invariants
,
744 unsigned long baseaddr
)
748 spin_lock_init(&bus
->bar_lock
);
749 INIT_LIST_HEAD(&bus
->list
);
750 #ifdef CONFIG_SSB_EMBEDDED
751 spin_lock_init(&bus
->gpio_lock
);
754 /* Powerup the bus */
755 err
= ssb_pci_xtal(bus
, SSB_GPIO_XTAL
| SSB_GPIO_PLL
, 1);
759 /* Init SDIO-host device (if any), before the scan */
760 err
= ssb_sdio_init(bus
);
762 goto err_disable_xtal
;
765 bus
->busnumber
= next_busnumber
;
766 /* Scan for devices (cores) */
767 err
= ssb_bus_scan(bus
, baseaddr
);
771 /* Init PCI-host device (if any) */
772 err
= ssb_pci_init(bus
);
775 /* Init PCMCIA-host device (if any) */
776 err
= ssb_pcmcia_init(bus
);
780 /* Initialize basic system devices (if available) */
781 err
= ssb_bus_powerup(bus
, 0);
783 goto err_pcmcia_exit
;
784 ssb_chipcommon_init(&bus
->chipco
);
785 ssb_mipscore_init(&bus
->mipscore
);
786 err
= ssb_fetch_invariants(bus
, get_invariants
);
788 ssb_bus_may_powerdown(bus
);
789 goto err_pcmcia_exit
;
791 ssb_bus_may_powerdown(bus
);
793 /* Queue it for attach.
794 * See the comment at the ssb_is_early_boot definition. */
795 list_add_tail(&bus
->list
, &attach_queue
);
796 if (!ssb_is_early_boot
) {
797 /* This is not early boot, so we must attach the bus now */
798 err
= ssb_attach_queued_buses();
809 list_del(&bus
->list
);
811 ssb_pcmcia_exit(bus
);
820 ssb_pci_xtal(bus
, SSB_GPIO_XTAL
| SSB_GPIO_PLL
, 0);
824 #ifdef CONFIG_SSB_PCIHOST
825 int ssb_bus_pcibus_register(struct ssb_bus
*bus
,
826 struct pci_dev
*host_pci
)
830 bus
->bustype
= SSB_BUSTYPE_PCI
;
831 bus
->host_pci
= host_pci
;
832 bus
->ops
= &ssb_pci_ops
;
834 err
= ssb_bus_register(bus
, ssb_pci_get_invariants
, 0);
836 ssb_printk(KERN_INFO PFX
"Sonics Silicon Backplane found on "
837 "PCI device %s\n", dev_name(&host_pci
->dev
));
839 ssb_printk(KERN_ERR PFX
"Failed to register PCI version"
840 " of SSB with error %d\n", err
);
845 EXPORT_SYMBOL(ssb_bus_pcibus_register
);
846 #endif /* CONFIG_SSB_PCIHOST */
848 #ifdef CONFIG_SSB_PCMCIAHOST
849 int ssb_bus_pcmciabus_register(struct ssb_bus
*bus
,
850 struct pcmcia_device
*pcmcia_dev
,
851 unsigned long baseaddr
)
855 bus
->bustype
= SSB_BUSTYPE_PCMCIA
;
856 bus
->host_pcmcia
= pcmcia_dev
;
857 bus
->ops
= &ssb_pcmcia_ops
;
859 err
= ssb_bus_register(bus
, ssb_pcmcia_get_invariants
, baseaddr
);
861 ssb_printk(KERN_INFO PFX
"Sonics Silicon Backplane found on "
862 "PCMCIA device %s\n", pcmcia_dev
->devname
);
867 EXPORT_SYMBOL(ssb_bus_pcmciabus_register
);
868 #endif /* CONFIG_SSB_PCMCIAHOST */
870 #ifdef CONFIG_SSB_SDIOHOST
871 int ssb_bus_sdiobus_register(struct ssb_bus
*bus
, struct sdio_func
*func
,
876 bus
->bustype
= SSB_BUSTYPE_SDIO
;
877 bus
->host_sdio
= func
;
878 bus
->ops
= &ssb_sdio_ops
;
879 bus
->quirks
= quirks
;
881 err
= ssb_bus_register(bus
, ssb_sdio_get_invariants
, ~0);
883 ssb_printk(KERN_INFO PFX
"Sonics Silicon Backplane found on "
884 "SDIO device %s\n", sdio_func_id(func
));
889 EXPORT_SYMBOL(ssb_bus_sdiobus_register
);
890 #endif /* CONFIG_SSB_PCMCIAHOST */
892 int ssb_bus_ssbbus_register(struct ssb_bus
*bus
,
893 unsigned long baseaddr
,
894 ssb_invariants_func_t get_invariants
)
898 bus
->bustype
= SSB_BUSTYPE_SSB
;
899 bus
->ops
= &ssb_ssb_ops
;
901 err
= ssb_bus_register(bus
, get_invariants
, baseaddr
);
903 ssb_printk(KERN_INFO PFX
"Sonics Silicon Backplane found at "
904 "address 0x%08lX\n", baseaddr
);
910 int __ssb_driver_register(struct ssb_driver
*drv
, struct module
*owner
)
912 drv
->drv
.name
= drv
->name
;
913 drv
->drv
.bus
= &ssb_bustype
;
914 drv
->drv
.owner
= owner
;
916 return driver_register(&drv
->drv
);
918 EXPORT_SYMBOL(__ssb_driver_register
);
920 void ssb_driver_unregister(struct ssb_driver
*drv
)
922 driver_unregister(&drv
->drv
);
924 EXPORT_SYMBOL(ssb_driver_unregister
);
926 void ssb_set_devtypedata(struct ssb_device
*dev
, void *data
)
928 struct ssb_bus
*bus
= dev
->bus
;
929 struct ssb_device
*ent
;
932 for (i
= 0; i
< bus
->nr_devices
; i
++) {
933 ent
= &(bus
->devices
[i
]);
934 if (ent
->id
.vendor
!= dev
->id
.vendor
)
936 if (ent
->id
.coreid
!= dev
->id
.coreid
)
939 ent
->devtypedata
= data
;
942 EXPORT_SYMBOL(ssb_set_devtypedata
);
944 static u32
clkfactor_f6_resolve(u32 v
)
946 /* map the magic values */
948 case SSB_CHIPCO_CLK_F6_2
:
950 case SSB_CHIPCO_CLK_F6_3
:
952 case SSB_CHIPCO_CLK_F6_4
:
954 case SSB_CHIPCO_CLK_F6_5
:
956 case SSB_CHIPCO_CLK_F6_6
:
958 case SSB_CHIPCO_CLK_F6_7
:
964 /* Calculate the speed the backplane would run at a given set of clockcontrol values */
965 u32
ssb_calc_clock_rate(u32 plltype
, u32 n
, u32 m
)
967 u32 n1
, n2
, clock
, m1
, m2
, m3
, mc
;
969 n1
= (n
& SSB_CHIPCO_CLK_N1
);
970 n2
= ((n
& SSB_CHIPCO_CLK_N2
) >> SSB_CHIPCO_CLK_N2_SHIFT
);
973 case SSB_PLLTYPE_6
: /* 100/200 or 120/240 only */
974 if (m
& SSB_CHIPCO_CLK_T6_MMASK
)
975 return SSB_CHIPCO_CLK_T6_M0
;
976 return SSB_CHIPCO_CLK_T6_M1
;
977 case SSB_PLLTYPE_1
: /* 48Mhz base, 3 dividers */
978 case SSB_PLLTYPE_3
: /* 25Mhz, 2 dividers */
979 case SSB_PLLTYPE_4
: /* 48Mhz, 4 dividers */
980 case SSB_PLLTYPE_7
: /* 25Mhz, 4 dividers */
981 n1
= clkfactor_f6_resolve(n1
);
982 n2
+= SSB_CHIPCO_CLK_F5_BIAS
;
984 case SSB_PLLTYPE_2
: /* 48Mhz, 4 dividers */
985 n1
+= SSB_CHIPCO_CLK_T2_BIAS
;
986 n2
+= SSB_CHIPCO_CLK_T2_BIAS
;
987 SSB_WARN_ON(!((n1
>= 2) && (n1
<= 7)));
988 SSB_WARN_ON(!((n2
>= 5) && (n2
<= 23)));
990 case SSB_PLLTYPE_5
: /* 25Mhz, 4 dividers */
997 case SSB_PLLTYPE_3
: /* 25Mhz, 2 dividers */
998 case SSB_PLLTYPE_7
: /* 25Mhz, 4 dividers */
999 clock
= SSB_CHIPCO_CLK_BASE2
* n1
* n2
;
1002 clock
= SSB_CHIPCO_CLK_BASE1
* n1
* n2
;
1007 m1
= (m
& SSB_CHIPCO_CLK_M1
);
1008 m2
= ((m
& SSB_CHIPCO_CLK_M2
) >> SSB_CHIPCO_CLK_M2_SHIFT
);
1009 m3
= ((m
& SSB_CHIPCO_CLK_M3
) >> SSB_CHIPCO_CLK_M3_SHIFT
);
1010 mc
= ((m
& SSB_CHIPCO_CLK_MC
) >> SSB_CHIPCO_CLK_MC_SHIFT
);
1013 case SSB_PLLTYPE_1
: /* 48Mhz base, 3 dividers */
1014 case SSB_PLLTYPE_3
: /* 25Mhz, 2 dividers */
1015 case SSB_PLLTYPE_4
: /* 48Mhz, 4 dividers */
1016 case SSB_PLLTYPE_7
: /* 25Mhz, 4 dividers */
1017 m1
= clkfactor_f6_resolve(m1
);
1018 if ((plltype
== SSB_PLLTYPE_1
) ||
1019 (plltype
== SSB_PLLTYPE_3
))
1020 m2
+= SSB_CHIPCO_CLK_F5_BIAS
;
1022 m2
= clkfactor_f6_resolve(m2
);
1023 m3
= clkfactor_f6_resolve(m3
);
1026 case SSB_CHIPCO_CLK_MC_BYPASS
:
1028 case SSB_CHIPCO_CLK_MC_M1
:
1029 return (clock
/ m1
);
1030 case SSB_CHIPCO_CLK_MC_M1M2
:
1031 return (clock
/ (m1
* m2
));
1032 case SSB_CHIPCO_CLK_MC_M1M2M3
:
1033 return (clock
/ (m1
* m2
* m3
));
1034 case SSB_CHIPCO_CLK_MC_M1M3
:
1035 return (clock
/ (m1
* m3
));
1039 m1
+= SSB_CHIPCO_CLK_T2_BIAS
;
1040 m2
+= SSB_CHIPCO_CLK_T2M2_BIAS
;
1041 m3
+= SSB_CHIPCO_CLK_T2_BIAS
;
1042 SSB_WARN_ON(!((m1
>= 2) && (m1
<= 7)));
1043 SSB_WARN_ON(!((m2
>= 3) && (m2
<= 10)));
1044 SSB_WARN_ON(!((m3
>= 2) && (m3
<= 7)));
1046 if (!(mc
& SSB_CHIPCO_CLK_T2MC_M1BYP
))
1048 if (!(mc
& SSB_CHIPCO_CLK_T2MC_M2BYP
))
1050 if (!(mc
& SSB_CHIPCO_CLK_T2MC_M3BYP
))
1059 /* Get the current speed the backplane is running at */
1060 u32
ssb_clockspeed(struct ssb_bus
*bus
)
1064 u32 clkctl_n
, clkctl_m
;
1066 if (ssb_extif_available(&bus
->extif
))
1067 ssb_extif_get_clockcontrol(&bus
->extif
, &plltype
,
1068 &clkctl_n
, &clkctl_m
);
1069 else if (bus
->chipco
.dev
)
1070 ssb_chipco_get_clockcontrol(&bus
->chipco
, &plltype
,
1071 &clkctl_n
, &clkctl_m
);
1075 if (bus
->chip_id
== 0x5365) {
1078 rate
= ssb_calc_clock_rate(plltype
, clkctl_n
, clkctl_m
);
1079 if (plltype
== SSB_PLLTYPE_3
) /* 25Mhz, 2 dividers */
1085 EXPORT_SYMBOL(ssb_clockspeed
);
1087 static u32
ssb_tmslow_reject_bitmask(struct ssb_device
*dev
)
1089 u32 rev
= ssb_read32(dev
, SSB_IDLOW
) & SSB_IDLOW_SSBREV
;
1091 /* The REJECT bit changed position in TMSLOW between
1092 * Backplane revisions. */
1094 case SSB_IDLOW_SSBREV_22
:
1095 return SSB_TMSLOW_REJECT_22
;
1096 case SSB_IDLOW_SSBREV_23
:
1097 return SSB_TMSLOW_REJECT_23
;
1098 case SSB_IDLOW_SSBREV_24
: /* TODO - find the proper REJECT bits */
1099 case SSB_IDLOW_SSBREV_25
: /* same here */
1100 case SSB_IDLOW_SSBREV_26
: /* same here */
1101 case SSB_IDLOW_SSBREV_27
: /* same here */
1102 return SSB_TMSLOW_REJECT_23
; /* this is a guess */
1104 printk(KERN_INFO
"ssb: Backplane Revision 0x%.8X\n", rev
);
1107 return (SSB_TMSLOW_REJECT_22
| SSB_TMSLOW_REJECT_23
);
1110 int ssb_device_is_enabled(struct ssb_device
*dev
)
1115 reject
= ssb_tmslow_reject_bitmask(dev
);
1116 val
= ssb_read32(dev
, SSB_TMSLOW
);
1117 val
&= SSB_TMSLOW_CLOCK
| SSB_TMSLOW_RESET
| reject
;
1119 return (val
== SSB_TMSLOW_CLOCK
);
1121 EXPORT_SYMBOL(ssb_device_is_enabled
);
1123 static void ssb_flush_tmslow(struct ssb_device
*dev
)
1125 /* Make _really_ sure the device has finished the TMSLOW
1126 * register write transaction, as we risk running into
1127 * a machine check exception otherwise.
1128 * Do this by reading the register back to commit the
1129 * PCI write and delay an additional usec for the device
1130 * to react to the change. */
1131 ssb_read32(dev
, SSB_TMSLOW
);
1135 void ssb_device_enable(struct ssb_device
*dev
, u32 core_specific_flags
)
1139 ssb_device_disable(dev
, core_specific_flags
);
1140 ssb_write32(dev
, SSB_TMSLOW
,
1141 SSB_TMSLOW_RESET
| SSB_TMSLOW_CLOCK
|
1142 SSB_TMSLOW_FGC
| core_specific_flags
);
1143 ssb_flush_tmslow(dev
);
1145 /* Clear SERR if set. This is a hw bug workaround. */
1146 if (ssb_read32(dev
, SSB_TMSHIGH
) & SSB_TMSHIGH_SERR
)
1147 ssb_write32(dev
, SSB_TMSHIGH
, 0);
1149 val
= ssb_read32(dev
, SSB_IMSTATE
);
1150 if (val
& (SSB_IMSTATE_IBE
| SSB_IMSTATE_TO
)) {
1151 val
&= ~(SSB_IMSTATE_IBE
| SSB_IMSTATE_TO
);
1152 ssb_write32(dev
, SSB_IMSTATE
, val
);
1155 ssb_write32(dev
, SSB_TMSLOW
,
1156 SSB_TMSLOW_CLOCK
| SSB_TMSLOW_FGC
|
1157 core_specific_flags
);
1158 ssb_flush_tmslow(dev
);
1160 ssb_write32(dev
, SSB_TMSLOW
, SSB_TMSLOW_CLOCK
|
1161 core_specific_flags
);
1162 ssb_flush_tmslow(dev
);
1164 EXPORT_SYMBOL(ssb_device_enable
);
1166 /* Wait for a bit in a register to get set or unset.
1167 * timeout is in units of ten-microseconds */
1168 static int ssb_wait_bit(struct ssb_device
*dev
, u16 reg
, u32 bitmask
,
1169 int timeout
, int set
)
1174 for (i
= 0; i
< timeout
; i
++) {
1175 val
= ssb_read32(dev
, reg
);
1180 if (!(val
& bitmask
))
1185 printk(KERN_ERR PFX
"Timeout waiting for bitmask %08X on "
1186 "register %04X to %s.\n",
1187 bitmask
, reg
, (set
? "set" : "clear"));
1192 void ssb_device_disable(struct ssb_device
*dev
, u32 core_specific_flags
)
1196 if (ssb_read32(dev
, SSB_TMSLOW
) & SSB_TMSLOW_RESET
)
1199 reject
= ssb_tmslow_reject_bitmask(dev
);
1200 ssb_write32(dev
, SSB_TMSLOW
, reject
| SSB_TMSLOW_CLOCK
);
1201 ssb_wait_bit(dev
, SSB_TMSLOW
, reject
, 1000, 1);
1202 ssb_wait_bit(dev
, SSB_TMSHIGH
, SSB_TMSHIGH_BUSY
, 1000, 0);
1203 ssb_write32(dev
, SSB_TMSLOW
,
1204 SSB_TMSLOW_FGC
| SSB_TMSLOW_CLOCK
|
1205 reject
| SSB_TMSLOW_RESET
|
1206 core_specific_flags
);
1207 ssb_flush_tmslow(dev
);
1209 ssb_write32(dev
, SSB_TMSLOW
,
1210 reject
| SSB_TMSLOW_RESET
|
1211 core_specific_flags
);
1212 ssb_flush_tmslow(dev
);
1214 EXPORT_SYMBOL(ssb_device_disable
);
1216 u32
ssb_dma_translation(struct ssb_device
*dev
)
1218 switch (dev
->bus
->bustype
) {
1219 case SSB_BUSTYPE_SSB
:
1221 case SSB_BUSTYPE_PCI
:
1224 __ssb_dma_not_implemented(dev
);
1228 EXPORT_SYMBOL(ssb_dma_translation
);
1230 int ssb_bus_may_powerdown(struct ssb_bus
*bus
)
1232 struct ssb_chipcommon
*cc
;
1235 /* On buses where more than one core may be working
1236 * at a time, we must not powerdown stuff if there are
1237 * still cores that may want to run. */
1238 if (bus
->bustype
== SSB_BUSTYPE_SSB
)
1245 if (cc
->dev
->id
.revision
< 5)
1248 ssb_chipco_set_clockmode(cc
, SSB_CLKMODE_SLOW
);
1249 err
= ssb_pci_xtal(bus
, SSB_GPIO_XTAL
| SSB_GPIO_PLL
, 0);
1253 #ifdef CONFIG_SSB_DEBUG
1254 bus
->powered_up
= 0;
1258 ssb_printk(KERN_ERR PFX
"Bus powerdown failed\n");
1261 EXPORT_SYMBOL(ssb_bus_may_powerdown
);
1263 int ssb_bus_powerup(struct ssb_bus
*bus
, bool dynamic_pctl
)
1265 struct ssb_chipcommon
*cc
;
1267 enum ssb_clkmode mode
;
1269 err
= ssb_pci_xtal(bus
, SSB_GPIO_XTAL
| SSB_GPIO_PLL
, 1);
1273 mode
= dynamic_pctl
? SSB_CLKMODE_DYNAMIC
: SSB_CLKMODE_FAST
;
1274 ssb_chipco_set_clockmode(cc
, mode
);
1276 #ifdef CONFIG_SSB_DEBUG
1277 bus
->powered_up
= 1;
1281 ssb_printk(KERN_ERR PFX
"Bus powerup failed\n");
1284 EXPORT_SYMBOL(ssb_bus_powerup
);
1286 u32
ssb_admatch_base(u32 adm
)
1290 switch (adm
& SSB_ADM_TYPE
) {
1292 base
= (adm
& SSB_ADM_BASE0
);
1295 SSB_WARN_ON(adm
& SSB_ADM_NEG
); /* unsupported */
1296 base
= (adm
& SSB_ADM_BASE1
);
1299 SSB_WARN_ON(adm
& SSB_ADM_NEG
); /* unsupported */
1300 base
= (adm
& SSB_ADM_BASE2
);
1308 EXPORT_SYMBOL(ssb_admatch_base
);
1310 u32
ssb_admatch_size(u32 adm
)
1314 switch (adm
& SSB_ADM_TYPE
) {
1316 size
= ((adm
& SSB_ADM_SZ0
) >> SSB_ADM_SZ0_SHIFT
);
1319 SSB_WARN_ON(adm
& SSB_ADM_NEG
); /* unsupported */
1320 size
= ((adm
& SSB_ADM_SZ1
) >> SSB_ADM_SZ1_SHIFT
);
1323 SSB_WARN_ON(adm
& SSB_ADM_NEG
); /* unsupported */
1324 size
= ((adm
& SSB_ADM_SZ2
) >> SSB_ADM_SZ2_SHIFT
);
1329 size
= (1 << (size
+ 1));
1333 EXPORT_SYMBOL(ssb_admatch_size
);
1335 static int __init
ssb_modinit(void)
1339 /* See the comment at the ssb_is_early_boot definition */
1340 ssb_is_early_boot
= 0;
1341 err
= bus_register(&ssb_bustype
);
1345 /* Maybe we already registered some buses at early boot.
1346 * Check for this and attach them
1349 err
= ssb_attach_queued_buses();
1352 bus_unregister(&ssb_bustype
);
1356 err
= b43_pci_ssb_bridge_init();
1358 ssb_printk(KERN_ERR
"Broadcom 43xx PCI-SSB-bridge "
1359 "initialization failed\n");
1360 /* don't fail SSB init because of this */
1363 err
= ssb_gige_init();
1365 ssb_printk(KERN_ERR
"SSB Broadcom Gigabit Ethernet "
1366 "driver initialization failed\n");
1367 /* don't fail SSB init because of this */
1373 /* ssb must be initialized after PCI but before the ssb drivers.
1374 * That means we must use some initcall between subsys_initcall
1375 * and device_initcall. */
1376 fs_initcall(ssb_modinit
);
1378 static void __exit
ssb_modexit(void)
1381 b43_pci_ssb_bridge_exit();
1382 bus_unregister(&ssb_bustype
);
1384 module_exit(ssb_modexit
)