3 comedi/drivers/aio_aio12_8.c
5 Driver for Access I/O Products PC-104 AIO12-8 Analog I/O Board
6 Copyright (C) 2006 C&C Technologies, Inc.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
22 Description: Access I/O Products PC-104 AIO12-8 Analog I/O Board
23 Author: Pablo Mejia <pablo.mejia@cctechnol.com>
24 Devices: [Access I/O] PC-104 AIO12-8 (aio_aio12_8)
25 [Access I/O] PC-104 AI12-8 (aio_ai12_8)
26 [Access I/O] PC-104 AO12-8 (aio_ao12_8)
29 Configuration Options:
30 [0] - I/O port base address
34 Only synchronous operations are supported.
38 #include <linux/module.h>
39 #include "../comedidev.h"
45 #define AIO12_8_STATUS_REG 0x00
46 #define AIO12_8_STATUS_ADC_EOC (1 << 7)
47 #define AIO12_8_STATUS_PORT_C_COS (1 << 6)
48 #define AIO12_8_STATUS_IRQ_ENA (1 << 2)
49 #define AIO12_8_INTERRUPT_REG 0x01
50 #define AIO12_8_INTERRUPT_ADC (1 << 7)
51 #define AIO12_8_INTERRUPT_COS (1 << 6)
52 #define AIO12_8_INTERRUPT_COUNTER1 (1 << 5)
53 #define AIO12_8_INTERRUPT_PORT_C3 (1 << 4)
54 #define AIO12_8_INTERRUPT_PORT_C0 (1 << 3)
55 #define AIO12_8_INTERRUPT_ENA (1 << 2)
56 #define AIO12_8_ADC_REG 0x02
57 #define AIO12_8_ADC_MODE_NORMAL (0 << 6)
58 #define AIO12_8_ADC_MODE_INT_CLK (1 << 6)
59 #define AIO12_8_ADC_MODE_STANDBY (2 << 6)
60 #define AIO12_8_ADC_MODE_POWERDOWN (3 << 6)
61 #define AIO12_8_ADC_ACQ_3USEC (0 << 5)
62 #define AIO12_8_ADC_ACQ_PROGRAM (1 << 5)
63 #define AIO12_8_ADC_RANGE(x) ((x) << 3)
64 #define AIO12_8_ADC_CHAN(x) ((x) << 0)
65 #define AIO12_8_DAC_REG(x) (0x04 + (x) * 2)
66 #define AIO12_8_8254_BASE_REG 0x0c
67 #define AIO12_8_8255_BASE_REG 0x10
68 #define AIO12_8_DIO_CONTROL_REG 0x14
69 #define AIO12_8_DIO_CONTROL_TST (1 << 0)
70 #define AIO12_8_ADC_TRIGGER_REG 0x15
71 #define AIO12_8_ADC_TRIGGER_RANGE(x) ((x) << 3)
72 #define AIO12_8_ADC_TRIGGER_CHAN(x) ((x) << 0)
73 #define AIO12_8_TRIGGER_REG 0x16
74 #define AIO12_8_TRIGGER_ADTRIG (1 << 1)
75 #define AIO12_8_TRIGGER_DACTRIG (1 << 0)
76 #define AIO12_8_COS_REG 0x17
77 #define AIO12_8_DAC_ENABLE_REG 0x18
78 #define AIO12_8_DAC_ENABLE_REF_ENA (1 << 0)
80 struct aio12_8_boardtype
{
86 static const struct aio12_8_boardtype board_types
[] = {
88 .name
= "aio_aio12_8",
100 static int aio_aio12_8_ai_eoc(struct comedi_device
*dev
,
101 struct comedi_subdevice
*s
,
102 struct comedi_insn
*insn
,
103 unsigned long context
)
107 status
= inb(dev
->iobase
+ AIO12_8_STATUS_REG
);
108 if (status
& AIO12_8_STATUS_ADC_EOC
)
113 static int aio_aio12_8_ai_read(struct comedi_device
*dev
,
114 struct comedi_subdevice
*s
,
115 struct comedi_insn
*insn
, unsigned int *data
)
117 unsigned int chan
= CR_CHAN(insn
->chanspec
);
118 unsigned int range
= CR_RANGE(insn
->chanspec
);
119 unsigned char control
;
124 * Setup the control byte for internal 2MHz clock, 3uS conversion,
125 * at the desired range of the requested channel.
127 control
= AIO12_8_ADC_MODE_NORMAL
| AIO12_8_ADC_ACQ_3USEC
|
128 AIO12_8_ADC_RANGE(range
) | AIO12_8_ADC_CHAN(chan
);
130 /* Read status to clear EOC latch */
131 inb(dev
->iobase
+ AIO12_8_STATUS_REG
);
133 for (n
= 0; n
< insn
->n
; n
++) {
134 /* Setup and start conversion */
135 outb(control
, dev
->iobase
+ AIO12_8_ADC_REG
);
137 /* Wait for conversion to complete */
138 ret
= comedi_timeout(dev
, s
, insn
, aio_aio12_8_ai_eoc
, 0);
142 data
[n
] = inw(dev
->iobase
+ AIO12_8_ADC_REG
) & s
->maxdata
;
148 static int aio_aio12_8_ao_insn_write(struct comedi_device
*dev
,
149 struct comedi_subdevice
*s
,
150 struct comedi_insn
*insn
,
153 unsigned int chan
= CR_CHAN(insn
->chanspec
);
154 unsigned int val
= s
->readback
[chan
];
158 outb(AIO12_8_DAC_ENABLE_REF_ENA
, dev
->iobase
+ AIO12_8_DAC_ENABLE_REG
);
160 for (i
= 0; i
< insn
->n
; i
++) {
162 outw(val
, dev
->iobase
+ AIO12_8_DAC_REG(chan
));
164 s
->readback
[chan
] = val
;
169 static const struct comedi_lrange range_aio_aio12_8
= {
178 static int aio_aio12_8_attach(struct comedi_device
*dev
,
179 struct comedi_devconfig
*it
)
181 const struct aio12_8_boardtype
*board
= dev
->board_ptr
;
182 struct comedi_subdevice
*s
;
185 ret
= comedi_request_region(dev
, it
->options
[0], 32);
189 ret
= comedi_alloc_subdevices(dev
, 4);
193 s
= &dev
->subdevices
[0];
194 if (board
->ai_nchan
) {
195 /* Analog input subdevice */
196 s
->type
= COMEDI_SUBD_AI
;
197 s
->subdev_flags
= SDF_READABLE
| SDF_GROUND
| SDF_DIFF
;
198 s
->n_chan
= board
->ai_nchan
;
200 s
->range_table
= &range_aio_aio12_8
;
201 s
->insn_read
= aio_aio12_8_ai_read
;
203 s
->type
= COMEDI_SUBD_UNUSED
;
206 s
= &dev
->subdevices
[1];
207 if (board
->ao_nchan
) {
208 /* Analog output subdevice */
209 s
->type
= COMEDI_SUBD_AO
;
210 s
->subdev_flags
= SDF_WRITABLE
| SDF_GROUND
| SDF_DIFF
;
213 s
->range_table
= &range_aio_aio12_8
;
214 s
->insn_write
= aio_aio12_8_ao_insn_write
;
215 s
->insn_read
= comedi_readback_insn_read
;
217 ret
= comedi_alloc_subdev_readback(s
);
221 s
->type
= COMEDI_SUBD_UNUSED
;
224 s
= &dev
->subdevices
[2];
225 /* 8255 Digital i/o subdevice */
226 ret
= subdev_8255_init(dev
, s
, NULL
, AIO12_8_8255_BASE_REG
);
230 s
= &dev
->subdevices
[3];
231 /* 8254 counter/timer subdevice */
232 s
->type
= COMEDI_SUBD_UNUSED
;
237 static struct comedi_driver aio_aio12_8_driver
= {
238 .driver_name
= "aio_aio12_8",
239 .module
= THIS_MODULE
,
240 .attach
= aio_aio12_8_attach
,
241 .detach
= comedi_legacy_detach
,
242 .board_name
= &board_types
[0].name
,
243 .num_names
= ARRAY_SIZE(board_types
),
244 .offset
= sizeof(struct aio12_8_boardtype
),
246 module_comedi_driver(aio_aio12_8_driver
);
248 MODULE_AUTHOR("Comedi http://www.comedi.org");
249 MODULE_DESCRIPTION("Comedi low-level driver");
250 MODULE_LICENSE("GPL");