2 * Freescale MXS LRADC driver
4 * Copyright (c) 2012 DENX Software Engineering, GmbH.
5 * Marek Vasut <marex@denx.de>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
18 #include <linux/bitops.h>
19 #include <linux/clk.h>
20 #include <linux/completion.h>
21 #include <linux/device.h>
22 #include <linux/err.h>
23 #include <linux/input.h>
24 #include <linux/interrupt.h>
26 #include <linux/kernel.h>
27 #include <linux/module.h>
28 #include <linux/mutex.h>
30 #include <linux/of_device.h>
31 #include <linux/platform_device.h>
32 #include <linux/slab.h>
33 #include <linux/stmp_device.h>
34 #include <linux/sysfs.h>
36 #include <linux/iio/buffer.h>
37 #include <linux/iio/iio.h>
38 #include <linux/iio/trigger.h>
39 #include <linux/iio/trigger_consumer.h>
40 #include <linux/iio/triggered_buffer.h>
41 #include <linux/iio/sysfs.h>
43 #define DRIVER_NAME "mxs-lradc"
45 #define LRADC_MAX_DELAY_CHANS 4
46 #define LRADC_MAX_MAPPED_CHANS 8
47 #define LRADC_MAX_TOTAL_CHANS 16
49 #define LRADC_DELAY_TIMER_HZ 2000
52 * Make this runtime configurable if necessary. Currently, if the buffered mode
53 * is enabled, the LRADC takes LRADC_DELAY_TIMER_LOOP samples of data before
54 * triggering IRQ. The sampling happens every (LRADC_DELAY_TIMER_PER / 2000)
55 * seconds. The result is that the samples arrive every 500mS.
57 #define LRADC_DELAY_TIMER_PER 200
58 #define LRADC_DELAY_TIMER_LOOP 5
61 * Once the pen touches the touchscreen, the touchscreen switches from
62 * IRQ-driven mode to polling mode to prevent interrupt storm. The polling
63 * is realized by worker thread, which is called every 20 or so milliseconds.
64 * This gives the touchscreen enough fluency and does not strain the system
67 #define LRADC_TS_SAMPLE_DELAY_MS 5
70 * The LRADC reads the following amount of samples from each touchscreen
71 * channel and the driver then computes average of these.
73 #define LRADC_TS_SAMPLE_AMOUNT 4
80 static const char * const mx23_lradc_irq_names
[] = {
81 "mxs-lradc-touchscreen",
92 static const char * const mx28_lradc_irq_names
[] = {
93 "mxs-lradc-touchscreen",
100 "mxs-lradc-channel4",
101 "mxs-lradc-channel5",
102 "mxs-lradc-channel6",
103 "mxs-lradc-channel7",
108 struct mxs_lradc_of_config
{
110 const char * const *irq_name
;
111 const uint32_t *vref_mv
;
114 #define VREF_MV_BASE 1850
116 static const uint32_t mx23_vref_mv
[LRADC_MAX_TOTAL_CHANS
] = {
117 VREF_MV_BASE
, /* CH0 */
118 VREF_MV_BASE
, /* CH1 */
119 VREF_MV_BASE
, /* CH2 */
120 VREF_MV_BASE
, /* CH3 */
121 VREF_MV_BASE
, /* CH4 */
122 VREF_MV_BASE
, /* CH5 */
123 VREF_MV_BASE
* 2, /* CH6 VDDIO */
124 VREF_MV_BASE
* 4, /* CH7 VBATT */
125 VREF_MV_BASE
, /* CH8 Temp sense 0 */
126 VREF_MV_BASE
, /* CH9 Temp sense 1 */
127 VREF_MV_BASE
, /* CH10 */
128 VREF_MV_BASE
, /* CH11 */
129 VREF_MV_BASE
, /* CH12 USB_DP */
130 VREF_MV_BASE
, /* CH13 USB_DN */
131 VREF_MV_BASE
, /* CH14 VBG */
132 VREF_MV_BASE
* 4, /* CH15 VDD5V */
135 static const uint32_t mx28_vref_mv
[LRADC_MAX_TOTAL_CHANS
] = {
136 VREF_MV_BASE
, /* CH0 */
137 VREF_MV_BASE
, /* CH1 */
138 VREF_MV_BASE
, /* CH2 */
139 VREF_MV_BASE
, /* CH3 */
140 VREF_MV_BASE
, /* CH4 */
141 VREF_MV_BASE
, /* CH5 */
142 VREF_MV_BASE
, /* CH6 */
143 VREF_MV_BASE
* 4, /* CH7 VBATT */
144 VREF_MV_BASE
, /* CH8 Temp sense 0 */
145 VREF_MV_BASE
, /* CH9 Temp sense 1 */
146 VREF_MV_BASE
* 2, /* CH10 VDDIO */
147 VREF_MV_BASE
, /* CH11 VTH */
148 VREF_MV_BASE
* 2, /* CH12 VDDA */
149 VREF_MV_BASE
, /* CH13 VDDD */
150 VREF_MV_BASE
, /* CH14 VBG */
151 VREF_MV_BASE
* 4, /* CH15 VDD5V */
154 static const struct mxs_lradc_of_config mxs_lradc_of_config
[] = {
156 .irq_count
= ARRAY_SIZE(mx23_lradc_irq_names
),
157 .irq_name
= mx23_lradc_irq_names
,
158 .vref_mv
= mx23_vref_mv
,
161 .irq_count
= ARRAY_SIZE(mx28_lradc_irq_names
),
162 .irq_name
= mx28_lradc_irq_names
,
163 .vref_mv
= mx28_vref_mv
,
168 MXS_LRADC_TOUCHSCREEN_NONE
= 0,
169 MXS_LRADC_TOUCHSCREEN_4WIRE
,
170 MXS_LRADC_TOUCHSCREEN_5WIRE
,
174 * Touchscreen handling
176 enum lradc_ts_plate
{
180 LRADC_SAMPLE_PRESSURE
,
184 enum mxs_lradc_divbytwo
{
185 MXS_LRADC_DIV_DISABLED
= 0,
186 MXS_LRADC_DIV_ENABLED
,
189 struct mxs_lradc_scale
{
190 unsigned int integer
;
202 struct iio_trigger
*trig
;
206 struct completion completion
;
208 const uint32_t *vref_mv
;
209 struct mxs_lradc_scale scale_avail
[LRADC_MAX_TOTAL_CHANS
][2];
210 unsigned long is_divided
;
213 * When the touchscreen is enabled, we give it two private virtual
214 * channels: #6 and #7. This means that only 6 virtual channels (instead
215 * of 8) will be available for buffered capture.
217 #define TOUCHSCREEN_VCHANNEL1 7
218 #define TOUCHSCREEN_VCHANNEL2 6
219 #define BUFFER_VCHANS_LIMITED 0x3f
220 #define BUFFER_VCHANS_ALL 0xff
224 * Furthermore, certain LRADC channels are shared between touchscreen
225 * and/or touch-buttons and generic LRADC block. Therefore when using
226 * either of these, these channels are not available for the regular
227 * sampling. The shared channels are as follows:
229 * CH0 -- Touch button #0
230 * CH1 -- Touch button #1
231 * CH2 -- Touch screen XPUL
232 * CH3 -- Touch screen YPLL
233 * CH4 -- Touch screen XNUL
234 * CH5 -- Touch screen YNLR
235 * CH6 -- Touch screen WIPER (5-wire only)
237 * The bit fields below represents which parts of the LRADC block are
238 * switched into special mode of operation. These channels can not
239 * be sampled as regular LRADC channels. The driver will refuse any
240 * attempt to sample these channels.
242 #define CHAN_MASK_TOUCHBUTTON (BIT(1) | BIT(0))
243 #define CHAN_MASK_TOUCHSCREEN_4WIRE (0xf << 2)
244 #define CHAN_MASK_TOUCHSCREEN_5WIRE (0x1f << 2)
245 enum mxs_lradc_ts use_touchscreen
;
246 bool use_touchbutton
;
248 struct input_dev
*ts_input
;
250 enum mxs_lradc_id soc
;
251 enum lradc_ts_plate cur_plate
; /* state machine */
255 unsigned ts_pressure
;
257 /* handle touchscreen's physical behaviour */
258 /* samples per coordinate */
259 unsigned over_sample_cnt
;
260 /* time clocks between samples */
261 unsigned over_sample_delay
;
262 /* time in clocks to wait after the plates where switched */
263 unsigned settling_delay
;
266 #define LRADC_CTRL0 0x00
267 # define LRADC_CTRL0_MX28_TOUCH_DETECT_ENABLE BIT(23)
268 # define LRADC_CTRL0_MX28_TOUCH_SCREEN_TYPE BIT(22)
269 # define LRADC_CTRL0_MX28_YNNSW /* YM */ BIT(21)
270 # define LRADC_CTRL0_MX28_YPNSW /* YP */ BIT(20)
271 # define LRADC_CTRL0_MX28_YPPSW /* YP */ BIT(19)
272 # define LRADC_CTRL0_MX28_XNNSW /* XM */ BIT(18)
273 # define LRADC_CTRL0_MX28_XNPSW /* XM */ BIT(17)
274 # define LRADC_CTRL0_MX28_XPPSW /* XP */ BIT(16)
276 # define LRADC_CTRL0_MX23_TOUCH_DETECT_ENABLE BIT(20)
277 # define LRADC_CTRL0_MX23_YM BIT(19)
278 # define LRADC_CTRL0_MX23_XM BIT(18)
279 # define LRADC_CTRL0_MX23_YP BIT(17)
280 # define LRADC_CTRL0_MX23_XP BIT(16)
282 # define LRADC_CTRL0_MX28_PLATE_MASK \
283 (LRADC_CTRL0_MX28_TOUCH_DETECT_ENABLE | \
284 LRADC_CTRL0_MX28_YNNSW | LRADC_CTRL0_MX28_YPNSW | \
285 LRADC_CTRL0_MX28_YPPSW | LRADC_CTRL0_MX28_XNNSW | \
286 LRADC_CTRL0_MX28_XNPSW | LRADC_CTRL0_MX28_XPPSW)
288 # define LRADC_CTRL0_MX23_PLATE_MASK \
289 (LRADC_CTRL0_MX23_TOUCH_DETECT_ENABLE | \
290 LRADC_CTRL0_MX23_YM | LRADC_CTRL0_MX23_XM | \
291 LRADC_CTRL0_MX23_YP | LRADC_CTRL0_MX23_XP)
293 #define LRADC_CTRL1 0x10
294 #define LRADC_CTRL1_TOUCH_DETECT_IRQ_EN BIT(24)
295 #define LRADC_CTRL1_LRADC_IRQ_EN(n) (1 << ((n) + 16))
296 #define LRADC_CTRL1_MX28_LRADC_IRQ_EN_MASK (0x1fff << 16)
297 #define LRADC_CTRL1_MX23_LRADC_IRQ_EN_MASK (0x01ff << 16)
298 #define LRADC_CTRL1_LRADC_IRQ_EN_OFFSET 16
299 #define LRADC_CTRL1_TOUCH_DETECT_IRQ BIT(8)
300 #define LRADC_CTRL1_LRADC_IRQ(n) (1 << (n))
301 #define LRADC_CTRL1_MX28_LRADC_IRQ_MASK 0x1fff
302 #define LRADC_CTRL1_MX23_LRADC_IRQ_MASK 0x01ff
303 #define LRADC_CTRL1_LRADC_IRQ_OFFSET 0
305 #define LRADC_CTRL2 0x20
306 #define LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET 24
307 #define LRADC_CTRL2_TEMPSENSE_PWD BIT(15)
309 #define LRADC_STATUS 0x40
310 #define LRADC_STATUS_TOUCH_DETECT_RAW BIT(0)
312 #define LRADC_CH(n) (0x50 + (0x10 * (n)))
313 #define LRADC_CH_ACCUMULATE BIT(29)
314 #define LRADC_CH_NUM_SAMPLES_MASK (0x1f << 24)
315 #define LRADC_CH_NUM_SAMPLES_OFFSET 24
316 #define LRADC_CH_NUM_SAMPLES(x) \
317 ((x) << LRADC_CH_NUM_SAMPLES_OFFSET)
318 #define LRADC_CH_VALUE_MASK 0x3ffff
319 #define LRADC_CH_VALUE_OFFSET 0
321 #define LRADC_DELAY(n) (0xd0 + (0x10 * (n)))
322 #define LRADC_DELAY_TRIGGER_LRADCS_MASK (0xff << 24)
323 #define LRADC_DELAY_TRIGGER_LRADCS_OFFSET 24
324 #define LRADC_DELAY_TRIGGER(x) \
325 (((x) << LRADC_DELAY_TRIGGER_LRADCS_OFFSET) & \
326 LRADC_DELAY_TRIGGER_LRADCS_MASK)
327 #define LRADC_DELAY_KICK (1 << 20)
328 #define LRADC_DELAY_TRIGGER_DELAYS_MASK (0xf << 16)
329 #define LRADC_DELAY_TRIGGER_DELAYS_OFFSET 16
330 #define LRADC_DELAY_TRIGGER_DELAYS(x) \
331 (((x) << LRADC_DELAY_TRIGGER_DELAYS_OFFSET) & \
332 LRADC_DELAY_TRIGGER_DELAYS_MASK)
333 #define LRADC_DELAY_LOOP_COUNT_MASK (0x1f << 11)
334 #define LRADC_DELAY_LOOP_COUNT_OFFSET 11
335 #define LRADC_DELAY_LOOP(x) \
336 (((x) << LRADC_DELAY_LOOP_COUNT_OFFSET) & \
337 LRADC_DELAY_LOOP_COUNT_MASK)
338 #define LRADC_DELAY_DELAY_MASK 0x7ff
339 #define LRADC_DELAY_DELAY_OFFSET 0
340 #define LRADC_DELAY_DELAY(x) \
341 (((x) << LRADC_DELAY_DELAY_OFFSET) & \
342 LRADC_DELAY_DELAY_MASK)
344 #define LRADC_CTRL4 0x140
345 #define LRADC_CTRL4_LRADCSELECT_MASK(n) (0xf << ((n) * 4))
346 #define LRADC_CTRL4_LRADCSELECT_OFFSET(n) ((n) * 4)
347 #define LRADC_CTRL4_LRADCSELECT(n, x) \
348 (((x) << LRADC_CTRL4_LRADCSELECT_OFFSET(n)) & \
349 LRADC_CTRL4_LRADCSELECT_MASK(n))
351 #define LRADC_RESOLUTION 12
352 #define LRADC_SINGLE_SAMPLE_MASK ((1 << LRADC_RESOLUTION) - 1)
354 static void mxs_lradc_reg_set(struct mxs_lradc
*lradc
, u32 val
, u32 reg
)
356 writel(val
, lradc
->base
+ reg
+ STMP_OFFSET_REG_SET
);
359 static void mxs_lradc_reg_clear(struct mxs_lradc
*lradc
, u32 val
, u32 reg
)
361 writel(val
, lradc
->base
+ reg
+ STMP_OFFSET_REG_CLR
);
364 static void mxs_lradc_reg_wrt(struct mxs_lradc
*lradc
, u32 val
, u32 reg
)
366 writel(val
, lradc
->base
+ reg
);
369 static u32
mxs_lradc_plate_mask(struct mxs_lradc
*lradc
)
371 if (lradc
->soc
== IMX23_LRADC
)
372 return LRADC_CTRL0_MX23_PLATE_MASK
;
373 return LRADC_CTRL0_MX28_PLATE_MASK
;
376 static u32
mxs_lradc_irq_en_mask(struct mxs_lradc
*lradc
)
378 if (lradc
->soc
== IMX23_LRADC
)
379 return LRADC_CTRL1_MX23_LRADC_IRQ_EN_MASK
;
380 return LRADC_CTRL1_MX28_LRADC_IRQ_EN_MASK
;
383 static u32
mxs_lradc_irq_mask(struct mxs_lradc
*lradc
)
385 if (lradc
->soc
== IMX23_LRADC
)
386 return LRADC_CTRL1_MX23_LRADC_IRQ_MASK
;
387 return LRADC_CTRL1_MX28_LRADC_IRQ_MASK
;
390 static u32
mxs_lradc_touch_detect_bit(struct mxs_lradc
*lradc
)
392 if (lradc
->soc
== IMX23_LRADC
)
393 return LRADC_CTRL0_MX23_TOUCH_DETECT_ENABLE
;
394 return LRADC_CTRL0_MX28_TOUCH_DETECT_ENABLE
;
397 static u32
mxs_lradc_drive_x_plate(struct mxs_lradc
*lradc
)
399 if (lradc
->soc
== IMX23_LRADC
)
400 return LRADC_CTRL0_MX23_XP
| LRADC_CTRL0_MX23_XM
;
401 return LRADC_CTRL0_MX28_XPPSW
| LRADC_CTRL0_MX28_XNNSW
;
404 static u32
mxs_lradc_drive_y_plate(struct mxs_lradc
*lradc
)
406 if (lradc
->soc
== IMX23_LRADC
)
407 return LRADC_CTRL0_MX23_YP
| LRADC_CTRL0_MX23_YM
;
408 return LRADC_CTRL0_MX28_YPPSW
| LRADC_CTRL0_MX28_YNNSW
;
411 static u32
mxs_lradc_drive_pressure(struct mxs_lradc
*lradc
)
413 if (lradc
->soc
== IMX23_LRADC
)
414 return LRADC_CTRL0_MX23_YP
| LRADC_CTRL0_MX23_XM
;
415 return LRADC_CTRL0_MX28_YPPSW
| LRADC_CTRL0_MX28_XNNSW
;
418 static bool mxs_lradc_check_touch_event(struct mxs_lradc
*lradc
)
420 return !!(readl(lradc
->base
+ LRADC_STATUS
) &
421 LRADC_STATUS_TOUCH_DETECT_RAW
);
424 static void mxs_lradc_map_channel(struct mxs_lradc
*lradc
, unsigned vch
,
427 mxs_lradc_reg_clear(lradc
, LRADC_CTRL4_LRADCSELECT_MASK(vch
),
429 mxs_lradc_reg_set(lradc
, LRADC_CTRL4_LRADCSELECT(vch
, ch
), LRADC_CTRL4
);
432 static void mxs_lradc_setup_ts_channel(struct mxs_lradc
*lradc
, unsigned ch
)
435 * prepare for oversampling conversion
437 * from the datasheet:
438 * "The ACCUMULATE bit in the appropriate channel register
439 * HW_LRADC_CHn must be set to 1 if NUM_SAMPLES is greater then 0;
440 * otherwise, the IRQs will not fire."
442 mxs_lradc_reg_wrt(lradc
, LRADC_CH_ACCUMULATE
|
443 LRADC_CH_NUM_SAMPLES(lradc
->over_sample_cnt
- 1),
446 /* from the datasheet:
447 * "Software must clear this register in preparation for a
448 * multi-cycle accumulation.
450 mxs_lradc_reg_clear(lradc
, LRADC_CH_VALUE_MASK
, LRADC_CH(ch
));
453 * prepare the delay/loop unit according to the oversampling count
455 * from the datasheet:
456 * "The DELAY fields in HW_LRADC_DELAY0, HW_LRADC_DELAY1,
457 * HW_LRADC_DELAY2, and HW_LRADC_DELAY3 must be non-zero; otherwise,
458 * the LRADC will not trigger the delay group."
460 mxs_lradc_reg_wrt(lradc
, LRADC_DELAY_TRIGGER(1 << ch
) |
461 LRADC_DELAY_TRIGGER_DELAYS(0) |
462 LRADC_DELAY_LOOP(lradc
->over_sample_cnt
- 1) |
463 LRADC_DELAY_DELAY(lradc
->over_sample_delay
- 1),
466 mxs_lradc_reg_clear(lradc
, LRADC_CTRL1_LRADC_IRQ(ch
), LRADC_CTRL1
);
469 * after changing the touchscreen plates setting
470 * the signals need some initial time to settle. Start the
471 * SoC's delay unit and start the conversion later
474 mxs_lradc_reg_wrt(lradc
,
475 LRADC_DELAY_TRIGGER(0) | /* don't trigger ADC */
476 LRADC_DELAY_TRIGGER_DELAYS(BIT(3)) | /* trigger DELAY unit#3 */
478 LRADC_DELAY_DELAY(lradc
->settling_delay
),
483 * Pressure detection is special:
484 * We want to do both required measurements for the pressure detection in
485 * one turn. Use the hardware features to chain both conversions and let the
486 * hardware report one interrupt if both conversions are done
488 static void mxs_lradc_setup_ts_pressure(struct mxs_lradc
*lradc
, unsigned ch1
,
494 * prepare for oversampling conversion
496 * from the datasheet:
497 * "The ACCUMULATE bit in the appropriate channel register
498 * HW_LRADC_CHn must be set to 1 if NUM_SAMPLES is greater then 0;
499 * otherwise, the IRQs will not fire."
501 reg
= LRADC_CH_ACCUMULATE
|
502 LRADC_CH_NUM_SAMPLES(lradc
->over_sample_cnt
- 1);
503 mxs_lradc_reg_wrt(lradc
, reg
, LRADC_CH(ch1
));
504 mxs_lradc_reg_wrt(lradc
, reg
, LRADC_CH(ch2
));
506 /* from the datasheet:
507 * "Software must clear this register in preparation for a
508 * multi-cycle accumulation.
510 mxs_lradc_reg_clear(lradc
, LRADC_CH_VALUE_MASK
, LRADC_CH(ch1
));
511 mxs_lradc_reg_clear(lradc
, LRADC_CH_VALUE_MASK
, LRADC_CH(ch2
));
513 /* prepare the delay/loop unit according to the oversampling count */
514 mxs_lradc_reg_wrt(lradc
, LRADC_DELAY_TRIGGER(1 << ch1
) |
515 LRADC_DELAY_TRIGGER(1 << ch2
) | /* start both channels */
516 LRADC_DELAY_TRIGGER_DELAYS(0) |
517 LRADC_DELAY_LOOP(lradc
->over_sample_cnt
- 1) |
518 LRADC_DELAY_DELAY(lradc
->over_sample_delay
- 1),
521 mxs_lradc_reg_clear(lradc
, LRADC_CTRL1_LRADC_IRQ(ch2
), LRADC_CTRL1
);
524 * after changing the touchscreen plates setting
525 * the signals need some initial time to settle. Start the
526 * SoC's delay unit and start the conversion later
529 mxs_lradc_reg_wrt(lradc
,
530 LRADC_DELAY_TRIGGER(0) | /* don't trigger ADC */
531 LRADC_DELAY_TRIGGER_DELAYS(BIT(3)) | /* trigger DELAY unit#3 */
533 LRADC_DELAY_DELAY(lradc
->settling_delay
), LRADC_DELAY(2));
536 static unsigned mxs_lradc_read_raw_channel(struct mxs_lradc
*lradc
,
540 unsigned num_samples
, val
;
542 reg
= readl(lradc
->base
+ LRADC_CH(channel
));
543 if (reg
& LRADC_CH_ACCUMULATE
)
544 num_samples
= lradc
->over_sample_cnt
;
548 val
= (reg
& LRADC_CH_VALUE_MASK
) >> LRADC_CH_VALUE_OFFSET
;
549 return val
/ num_samples
;
552 static unsigned mxs_lradc_read_ts_pressure(struct mxs_lradc
*lradc
,
553 unsigned ch1
, unsigned ch2
)
556 unsigned pressure
, m1
, m2
;
558 mask
= LRADC_CTRL1_LRADC_IRQ(ch1
) | LRADC_CTRL1_LRADC_IRQ(ch2
);
559 reg
= readl(lradc
->base
+ LRADC_CTRL1
) & mask
;
561 while (reg
!= mask
) {
562 reg
= readl(lradc
->base
+ LRADC_CTRL1
) & mask
;
563 dev_dbg(lradc
->dev
, "One channel is still busy: %X\n", reg
);
566 m1
= mxs_lradc_read_raw_channel(lradc
, ch1
);
567 m2
= mxs_lradc_read_raw_channel(lradc
, ch2
);
570 dev_warn(lradc
->dev
, "Cannot calculate pressure\n");
571 return 1 << (LRADC_RESOLUTION
- 1);
574 /* simply scale the value from 0 ... max ADC resolution */
576 pressure
*= (1 << LRADC_RESOLUTION
);
579 dev_dbg(lradc
->dev
, "Pressure = %u\n", pressure
);
589 * YP(open)--+-------------+
592 * YM(-)--+-------------+ |
597 * "weak+" means 200k Ohm VDDIO
600 static void mxs_lradc_setup_touch_detection(struct mxs_lradc
*lradc
)
603 * In order to detect a touch event the 'touch detect enable' bit
605 * - a weak pullup to the X+ connector
606 * - a strong ground at the Y- connector
608 mxs_lradc_reg_clear(lradc
, mxs_lradc_plate_mask(lradc
), LRADC_CTRL0
);
609 mxs_lradc_reg_set(lradc
, mxs_lradc_touch_detect_bit(lradc
),
614 * YP(meas)--+-------------+
617 * YM(open)--+-------------+ |
622 * (+) means here 1.85 V
625 static void mxs_lradc_prepare_x_pos(struct mxs_lradc
*lradc
)
627 mxs_lradc_reg_clear(lradc
, mxs_lradc_plate_mask(lradc
), LRADC_CTRL0
);
628 mxs_lradc_reg_set(lradc
, mxs_lradc_drive_x_plate(lradc
), LRADC_CTRL0
);
630 lradc
->cur_plate
= LRADC_SAMPLE_X
;
631 mxs_lradc_map_channel(lradc
, TOUCHSCREEN_VCHANNEL1
, TS_CH_YP
);
632 mxs_lradc_setup_ts_channel(lradc
, TOUCHSCREEN_VCHANNEL1
);
636 * YP(+)--+-------------+
639 * YM(-)--+-------------+ |
644 * (+) means here 1.85 V
647 static void mxs_lradc_prepare_y_pos(struct mxs_lradc
*lradc
)
649 mxs_lradc_reg_clear(lradc
, mxs_lradc_plate_mask(lradc
), LRADC_CTRL0
);
650 mxs_lradc_reg_set(lradc
, mxs_lradc_drive_y_plate(lradc
), LRADC_CTRL0
);
652 lradc
->cur_plate
= LRADC_SAMPLE_Y
;
653 mxs_lradc_map_channel(lradc
, TOUCHSCREEN_VCHANNEL1
, TS_CH_XM
);
654 mxs_lradc_setup_ts_channel(lradc
, TOUCHSCREEN_VCHANNEL1
);
658 * YP(+)--+-------------+
661 * YM(meas)--+-------------+ |
666 * (+) means here 1.85 V
669 static void mxs_lradc_prepare_pressure(struct mxs_lradc
*lradc
)
671 mxs_lradc_reg_clear(lradc
, mxs_lradc_plate_mask(lradc
), LRADC_CTRL0
);
672 mxs_lradc_reg_set(lradc
, mxs_lradc_drive_pressure(lradc
), LRADC_CTRL0
);
674 lradc
->cur_plate
= LRADC_SAMPLE_PRESSURE
;
675 mxs_lradc_map_channel(lradc
, TOUCHSCREEN_VCHANNEL1
, TS_CH_YM
);
676 mxs_lradc_map_channel(lradc
, TOUCHSCREEN_VCHANNEL2
, TS_CH_XP
);
677 mxs_lradc_setup_ts_pressure(lradc
, TOUCHSCREEN_VCHANNEL2
,
678 TOUCHSCREEN_VCHANNEL1
);
681 static void mxs_lradc_enable_touch_detection(struct mxs_lradc
*lradc
)
683 mxs_lradc_setup_touch_detection(lradc
);
685 lradc
->cur_plate
= LRADC_TOUCH
;
686 mxs_lradc_reg_clear(lradc
, LRADC_CTRL1_TOUCH_DETECT_IRQ
|
687 LRADC_CTRL1_TOUCH_DETECT_IRQ_EN
, LRADC_CTRL1
);
688 mxs_lradc_reg_set(lradc
, LRADC_CTRL1_TOUCH_DETECT_IRQ_EN
, LRADC_CTRL1
);
691 static void mxs_lradc_start_touch_event(struct mxs_lradc
*lradc
)
693 mxs_lradc_reg_clear(lradc
, LRADC_CTRL1_TOUCH_DETECT_IRQ_EN
,
695 mxs_lradc_reg_set(lradc
,
696 LRADC_CTRL1_LRADC_IRQ_EN(TOUCHSCREEN_VCHANNEL1
), LRADC_CTRL1
);
698 * start with the Y-pos, because it uses nearly the same plate
699 * settings like the touch detection
701 mxs_lradc_prepare_y_pos(lradc
);
704 static void mxs_lradc_report_ts_event(struct mxs_lradc
*lradc
)
706 input_report_abs(lradc
->ts_input
, ABS_X
, lradc
->ts_x_pos
);
707 input_report_abs(lradc
->ts_input
, ABS_Y
, lradc
->ts_y_pos
);
708 input_report_abs(lradc
->ts_input
, ABS_PRESSURE
, lradc
->ts_pressure
);
709 input_report_key(lradc
->ts_input
, BTN_TOUCH
, 1);
710 input_sync(lradc
->ts_input
);
713 static void mxs_lradc_complete_touch_event(struct mxs_lradc
*lradc
)
715 mxs_lradc_setup_touch_detection(lradc
);
716 lradc
->cur_plate
= LRADC_SAMPLE_VALID
;
718 * start a dummy conversion to burn time to settle the signals
719 * note: we are not interested in the conversion's value
721 mxs_lradc_reg_wrt(lradc
, 0, LRADC_CH(TOUCHSCREEN_VCHANNEL1
));
722 mxs_lradc_reg_clear(lradc
,
723 LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL1
) |
724 LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL2
), LRADC_CTRL1
);
725 mxs_lradc_reg_wrt(lradc
,
726 LRADC_DELAY_TRIGGER(1 << TOUCHSCREEN_VCHANNEL1
) |
727 LRADC_DELAY_KICK
| LRADC_DELAY_DELAY(10), /* waste 5 ms */
732 * in order to avoid false measurements, report only samples where
733 * the surface is still touched after the position measurement
735 static void mxs_lradc_finish_touch_event(struct mxs_lradc
*lradc
, bool valid
)
737 /* if it is still touched, report the sample */
738 if (valid
&& mxs_lradc_check_touch_event(lradc
)) {
739 lradc
->ts_valid
= true;
740 mxs_lradc_report_ts_event(lradc
);
743 /* if it is even still touched, continue with the next measurement */
744 if (mxs_lradc_check_touch_event(lradc
)) {
745 mxs_lradc_prepare_y_pos(lradc
);
749 if (lradc
->ts_valid
) {
750 /* signal the release */
751 lradc
->ts_valid
= false;
752 input_report_key(lradc
->ts_input
, BTN_TOUCH
, 0);
753 input_sync(lradc
->ts_input
);
756 /* if it is released, wait for the next touch via IRQ */
757 lradc
->cur_plate
= LRADC_TOUCH
;
758 mxs_lradc_reg_wrt(lradc
, 0, LRADC_DELAY(2));
759 mxs_lradc_reg_wrt(lradc
, 0, LRADC_DELAY(3));
760 mxs_lradc_reg_clear(lradc
, LRADC_CTRL1_TOUCH_DETECT_IRQ
|
761 LRADC_CTRL1_LRADC_IRQ_EN(TOUCHSCREEN_VCHANNEL1
) |
762 LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL1
), LRADC_CTRL1
);
763 mxs_lradc_reg_set(lradc
, LRADC_CTRL1_TOUCH_DETECT_IRQ_EN
, LRADC_CTRL1
);
766 /* touchscreen's state machine */
767 static void mxs_lradc_handle_touch(struct mxs_lradc
*lradc
)
769 switch (lradc
->cur_plate
) {
771 if (mxs_lradc_check_touch_event(lradc
))
772 mxs_lradc_start_touch_event(lradc
);
773 mxs_lradc_reg_clear(lradc
, LRADC_CTRL1_TOUCH_DETECT_IRQ
,
778 lradc
->ts_y_pos
= mxs_lradc_read_raw_channel(lradc
,
779 TOUCHSCREEN_VCHANNEL1
);
780 mxs_lradc_prepare_x_pos(lradc
);
784 lradc
->ts_x_pos
= mxs_lradc_read_raw_channel(lradc
,
785 TOUCHSCREEN_VCHANNEL1
);
786 mxs_lradc_prepare_pressure(lradc
);
789 case LRADC_SAMPLE_PRESSURE
:
790 lradc
->ts_pressure
= mxs_lradc_read_ts_pressure(lradc
,
791 TOUCHSCREEN_VCHANNEL2
,
792 TOUCHSCREEN_VCHANNEL1
);
793 mxs_lradc_complete_touch_event(lradc
);
796 case LRADC_SAMPLE_VALID
:
797 mxs_lradc_finish_touch_event(lradc
, 1);
805 static int mxs_lradc_read_single(struct iio_dev
*iio_dev
, int chan
, int *val
)
807 struct mxs_lradc
*lradc
= iio_priv(iio_dev
);
811 * See if there is no buffered operation in progress. If there is, simply
812 * bail out. This can be improved to support both buffered and raw IO at
813 * the same time, yet the code becomes horribly complicated. Therefore I
814 * applied KISS principle here.
816 ret
= mutex_trylock(&lradc
->lock
);
820 reinit_completion(&lradc
->completion
);
823 * No buffered operation in progress, map the channel and trigger it.
824 * Virtual channel 0 is always used here as the others are always not
825 * used if doing raw sampling.
827 if (lradc
->soc
== IMX28_LRADC
)
828 mxs_lradc_reg_clear(lradc
, LRADC_CTRL1_LRADC_IRQ_EN(0),
830 mxs_lradc_reg_clear(lradc
, 0x1, LRADC_CTRL0
);
832 /* Enable / disable the divider per requirement */
833 if (test_bit(chan
, &lradc
->is_divided
))
834 mxs_lradc_reg_set(lradc
, 1 << LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET
,
837 mxs_lradc_reg_clear(lradc
,
838 1 << LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET
, LRADC_CTRL2
);
840 /* Clean the slot's previous content, then set new one. */
841 mxs_lradc_reg_clear(lradc
, LRADC_CTRL4_LRADCSELECT_MASK(0),
843 mxs_lradc_reg_set(lradc
, chan
, LRADC_CTRL4
);
845 mxs_lradc_reg_wrt(lradc
, 0, LRADC_CH(0));
847 /* Enable the IRQ and start sampling the channel. */
848 mxs_lradc_reg_set(lradc
, LRADC_CTRL1_LRADC_IRQ_EN(0), LRADC_CTRL1
);
849 mxs_lradc_reg_set(lradc
, BIT(0), LRADC_CTRL0
);
851 /* Wait for completion on the channel, 1 second max. */
852 ret
= wait_for_completion_killable_timeout(&lradc
->completion
, HZ
);
859 *val
= readl(lradc
->base
+ LRADC_CH(0)) & LRADC_CH_VALUE_MASK
;
863 mxs_lradc_reg_clear(lradc
, LRADC_CTRL1_LRADC_IRQ_EN(0), LRADC_CTRL1
);
865 mutex_unlock(&lradc
->lock
);
870 static int mxs_lradc_read_temp(struct iio_dev
*iio_dev
, int *val
)
874 ret
= mxs_lradc_read_single(iio_dev
, 8, &min
);
875 if (ret
!= IIO_VAL_INT
)
878 ret
= mxs_lradc_read_single(iio_dev
, 9, &max
);
879 if (ret
!= IIO_VAL_INT
)
887 static int mxs_lradc_read_raw(struct iio_dev
*iio_dev
,
888 const struct iio_chan_spec
*chan
,
889 int *val
, int *val2
, long m
)
891 struct mxs_lradc
*lradc
= iio_priv(iio_dev
);
894 case IIO_CHAN_INFO_RAW
:
895 if (chan
->type
== IIO_TEMP
)
896 return mxs_lradc_read_temp(iio_dev
, val
);
898 return mxs_lradc_read_single(iio_dev
, chan
->channel
, val
);
900 case IIO_CHAN_INFO_SCALE
:
901 if (chan
->type
== IIO_TEMP
) {
902 /* From the datasheet, we have to multiply by 1.012 and
907 return IIO_VAL_INT_PLUS_MICRO
;
910 *val
= lradc
->vref_mv
[chan
->channel
];
911 *val2
= chan
->scan_type
.realbits
-
912 test_bit(chan
->channel
, &lradc
->is_divided
);
913 return IIO_VAL_FRACTIONAL_LOG2
;
915 case IIO_CHAN_INFO_OFFSET
:
916 if (chan
->type
== IIO_TEMP
) {
917 /* The calculated value from the ADC is in Kelvin, we
918 * want Celsius for hwmon so the offset is
924 return IIO_VAL_INT_PLUS_MICRO
;
936 static int mxs_lradc_write_raw(struct iio_dev
*iio_dev
,
937 const struct iio_chan_spec
*chan
,
938 int val
, int val2
, long m
)
940 struct mxs_lradc
*lradc
= iio_priv(iio_dev
);
941 struct mxs_lradc_scale
*scale_avail
=
942 lradc
->scale_avail
[chan
->channel
];
945 ret
= mutex_trylock(&lradc
->lock
);
950 case IIO_CHAN_INFO_SCALE
:
952 if (val
== scale_avail
[MXS_LRADC_DIV_DISABLED
].integer
&&
953 val2
== scale_avail
[MXS_LRADC_DIV_DISABLED
].nano
) {
954 /* divider by two disabled */
955 clear_bit(chan
->channel
, &lradc
->is_divided
);
957 } else if (val
== scale_avail
[MXS_LRADC_DIV_ENABLED
].integer
&&
958 val2
== scale_avail
[MXS_LRADC_DIV_ENABLED
].nano
) {
959 /* divider by two enabled */
960 set_bit(chan
->channel
, &lradc
->is_divided
);
970 mutex_unlock(&lradc
->lock
);
975 static int mxs_lradc_write_raw_get_fmt(struct iio_dev
*iio_dev
,
976 const struct iio_chan_spec
*chan
,
979 return IIO_VAL_INT_PLUS_NANO
;
982 static ssize_t
mxs_lradc_show_scale_available_ch(struct device
*dev
,
983 struct device_attribute
*attr
,
987 struct iio_dev
*iio
= dev_to_iio_dev(dev
);
988 struct mxs_lradc
*lradc
= iio_priv(iio
);
991 for (i
= 0; i
< ARRAY_SIZE(lradc
->scale_avail
[ch
]); i
++)
992 len
+= sprintf(buf
+ len
, "%u.%09u ",
993 lradc
->scale_avail
[ch
][i
].integer
,
994 lradc
->scale_avail
[ch
][i
].nano
);
996 len
+= sprintf(buf
+ len
, "\n");
1001 static ssize_t
mxs_lradc_show_scale_available(struct device
*dev
,
1002 struct device_attribute
*attr
,
1005 struct iio_dev_attr
*iio_attr
= to_iio_dev_attr(attr
);
1007 return mxs_lradc_show_scale_available_ch(dev
, attr
, buf
,
1011 #define SHOW_SCALE_AVAILABLE_ATTR(ch) \
1012 static IIO_DEVICE_ATTR(in_voltage##ch##_scale_available, S_IRUGO, \
1013 mxs_lradc_show_scale_available, NULL, ch)
1015 SHOW_SCALE_AVAILABLE_ATTR(0);
1016 SHOW_SCALE_AVAILABLE_ATTR(1);
1017 SHOW_SCALE_AVAILABLE_ATTR(2);
1018 SHOW_SCALE_AVAILABLE_ATTR(3);
1019 SHOW_SCALE_AVAILABLE_ATTR(4);
1020 SHOW_SCALE_AVAILABLE_ATTR(5);
1021 SHOW_SCALE_AVAILABLE_ATTR(6);
1022 SHOW_SCALE_AVAILABLE_ATTR(7);
1023 SHOW_SCALE_AVAILABLE_ATTR(10);
1024 SHOW_SCALE_AVAILABLE_ATTR(11);
1025 SHOW_SCALE_AVAILABLE_ATTR(12);
1026 SHOW_SCALE_AVAILABLE_ATTR(13);
1027 SHOW_SCALE_AVAILABLE_ATTR(14);
1028 SHOW_SCALE_AVAILABLE_ATTR(15);
1030 static struct attribute
*mxs_lradc_attributes
[] = {
1031 &iio_dev_attr_in_voltage0_scale_available
.dev_attr
.attr
,
1032 &iio_dev_attr_in_voltage1_scale_available
.dev_attr
.attr
,
1033 &iio_dev_attr_in_voltage2_scale_available
.dev_attr
.attr
,
1034 &iio_dev_attr_in_voltage3_scale_available
.dev_attr
.attr
,
1035 &iio_dev_attr_in_voltage4_scale_available
.dev_attr
.attr
,
1036 &iio_dev_attr_in_voltage5_scale_available
.dev_attr
.attr
,
1037 &iio_dev_attr_in_voltage6_scale_available
.dev_attr
.attr
,
1038 &iio_dev_attr_in_voltage7_scale_available
.dev_attr
.attr
,
1039 &iio_dev_attr_in_voltage10_scale_available
.dev_attr
.attr
,
1040 &iio_dev_attr_in_voltage11_scale_available
.dev_attr
.attr
,
1041 &iio_dev_attr_in_voltage12_scale_available
.dev_attr
.attr
,
1042 &iio_dev_attr_in_voltage13_scale_available
.dev_attr
.attr
,
1043 &iio_dev_attr_in_voltage14_scale_available
.dev_attr
.attr
,
1044 &iio_dev_attr_in_voltage15_scale_available
.dev_attr
.attr
,
1048 static const struct attribute_group mxs_lradc_attribute_group
= {
1049 .attrs
= mxs_lradc_attributes
,
1052 static const struct iio_info mxs_lradc_iio_info
= {
1053 .driver_module
= THIS_MODULE
,
1054 .read_raw
= mxs_lradc_read_raw
,
1055 .write_raw
= mxs_lradc_write_raw
,
1056 .write_raw_get_fmt
= mxs_lradc_write_raw_get_fmt
,
1057 .attrs
= &mxs_lradc_attribute_group
,
1060 static int mxs_lradc_ts_open(struct input_dev
*dev
)
1062 struct mxs_lradc
*lradc
= input_get_drvdata(dev
);
1064 /* Enable the touch-detect circuitry. */
1065 mxs_lradc_enable_touch_detection(lradc
);
1070 static void mxs_lradc_disable_ts(struct mxs_lradc
*lradc
)
1072 /* stop all interrupts from firing */
1073 mxs_lradc_reg_clear(lradc
, LRADC_CTRL1_TOUCH_DETECT_IRQ_EN
|
1074 LRADC_CTRL1_LRADC_IRQ_EN(TOUCHSCREEN_VCHANNEL1
) |
1075 LRADC_CTRL1_LRADC_IRQ_EN(TOUCHSCREEN_VCHANNEL2
), LRADC_CTRL1
);
1077 /* Power-down touchscreen touch-detect circuitry. */
1078 mxs_lradc_reg_clear(lradc
, mxs_lradc_plate_mask(lradc
), LRADC_CTRL0
);
1081 static void mxs_lradc_ts_close(struct input_dev
*dev
)
1083 struct mxs_lradc
*lradc
= input_get_drvdata(dev
);
1085 mxs_lradc_disable_ts(lradc
);
1088 static int mxs_lradc_ts_register(struct mxs_lradc
*lradc
)
1090 struct input_dev
*input
;
1091 struct device
*dev
= lradc
->dev
;
1094 if (!lradc
->use_touchscreen
)
1097 input
= input_allocate_device();
1101 input
->name
= DRIVER_NAME
;
1102 input
->id
.bustype
= BUS_HOST
;
1103 input
->dev
.parent
= dev
;
1104 input
->open
= mxs_lradc_ts_open
;
1105 input
->close
= mxs_lradc_ts_close
;
1107 __set_bit(EV_ABS
, input
->evbit
);
1108 __set_bit(EV_KEY
, input
->evbit
);
1109 __set_bit(BTN_TOUCH
, input
->keybit
);
1110 input_set_abs_params(input
, ABS_X
, 0, LRADC_SINGLE_SAMPLE_MASK
, 0, 0);
1111 input_set_abs_params(input
, ABS_Y
, 0, LRADC_SINGLE_SAMPLE_MASK
, 0, 0);
1112 input_set_abs_params(input
, ABS_PRESSURE
, 0, LRADC_SINGLE_SAMPLE_MASK
,
1115 lradc
->ts_input
= input
;
1116 input_set_drvdata(input
, lradc
);
1117 ret
= input_register_device(input
);
1119 input_free_device(lradc
->ts_input
);
1124 static void mxs_lradc_ts_unregister(struct mxs_lradc
*lradc
)
1126 if (!lradc
->use_touchscreen
)
1129 mxs_lradc_disable_ts(lradc
);
1130 input_unregister_device(lradc
->ts_input
);
1136 static irqreturn_t
mxs_lradc_handle_irq(int irq
, void *data
)
1138 struct iio_dev
*iio
= data
;
1139 struct mxs_lradc
*lradc
= iio_priv(iio
);
1140 unsigned long reg
= readl(lradc
->base
+ LRADC_CTRL1
);
1141 uint32_t clr_irq
= mxs_lradc_irq_mask(lradc
);
1142 const uint32_t ts_irq_mask
=
1143 LRADC_CTRL1_TOUCH_DETECT_IRQ
|
1144 LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL1
) |
1145 LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL2
);
1147 if (!(reg
& mxs_lradc_irq_mask(lradc
)))
1150 if (lradc
->use_touchscreen
&& (reg
& ts_irq_mask
)) {
1151 mxs_lradc_handle_touch(lradc
);
1153 /* Make sure we don't clear the next conversion's interrupt. */
1154 clr_irq
&= ~(LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL1
) |
1155 LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL2
));
1158 if (iio_buffer_enabled(iio
)) {
1159 if (reg
& lradc
->buffer_vchans
)
1160 iio_trigger_poll(iio
->trig
);
1161 } else if (reg
& LRADC_CTRL1_LRADC_IRQ(0)) {
1162 complete(&lradc
->completion
);
1165 mxs_lradc_reg_clear(lradc
, reg
& clr_irq
, LRADC_CTRL1
);
1173 static irqreturn_t
mxs_lradc_trigger_handler(int irq
, void *p
)
1175 struct iio_poll_func
*pf
= p
;
1176 struct iio_dev
*iio
= pf
->indio_dev
;
1177 struct mxs_lradc
*lradc
= iio_priv(iio
);
1178 const uint32_t chan_value
= LRADC_CH_ACCUMULATE
|
1179 ((LRADC_DELAY_TIMER_LOOP
- 1) << LRADC_CH_NUM_SAMPLES_OFFSET
);
1180 unsigned int i
, j
= 0;
1182 for_each_set_bit(i
, iio
->active_scan_mask
, LRADC_MAX_TOTAL_CHANS
) {
1183 lradc
->buffer
[j
] = readl(lradc
->base
+ LRADC_CH(j
));
1184 mxs_lradc_reg_wrt(lradc
, chan_value
, LRADC_CH(j
));
1185 lradc
->buffer
[j
] &= LRADC_CH_VALUE_MASK
;
1186 lradc
->buffer
[j
] /= LRADC_DELAY_TIMER_LOOP
;
1190 iio_push_to_buffers_with_timestamp(iio
, lradc
->buffer
, pf
->timestamp
);
1192 iio_trigger_notify_done(iio
->trig
);
1197 static int mxs_lradc_configure_trigger(struct iio_trigger
*trig
, bool state
)
1199 struct iio_dev
*iio
= iio_trigger_get_drvdata(trig
);
1200 struct mxs_lradc
*lradc
= iio_priv(iio
);
1201 const uint32_t st
= state
? STMP_OFFSET_REG_SET
: STMP_OFFSET_REG_CLR
;
1203 mxs_lradc_reg_wrt(lradc
, LRADC_DELAY_KICK
, LRADC_DELAY(0) + st
);
1208 static const struct iio_trigger_ops mxs_lradc_trigger_ops
= {
1209 .owner
= THIS_MODULE
,
1210 .set_trigger_state
= &mxs_lradc_configure_trigger
,
1213 static int mxs_lradc_trigger_init(struct iio_dev
*iio
)
1216 struct iio_trigger
*trig
;
1217 struct mxs_lradc
*lradc
= iio_priv(iio
);
1219 trig
= iio_trigger_alloc("%s-dev%i", iio
->name
, iio
->id
);
1223 trig
->dev
.parent
= lradc
->dev
;
1224 iio_trigger_set_drvdata(trig
, iio
);
1225 trig
->ops
= &mxs_lradc_trigger_ops
;
1227 ret
= iio_trigger_register(trig
);
1229 iio_trigger_free(trig
);
1238 static void mxs_lradc_trigger_remove(struct iio_dev
*iio
)
1240 struct mxs_lradc
*lradc
= iio_priv(iio
);
1242 iio_trigger_unregister(lradc
->trig
);
1243 iio_trigger_free(lradc
->trig
);
1246 static int mxs_lradc_buffer_preenable(struct iio_dev
*iio
)
1248 struct mxs_lradc
*lradc
= iio_priv(iio
);
1249 int ret
= 0, chan
, ofs
= 0;
1250 unsigned long enable
= 0;
1251 uint32_t ctrl4_set
= 0;
1252 uint32_t ctrl4_clr
= 0;
1253 uint32_t ctrl1_irq
= 0;
1254 const uint32_t chan_value
= LRADC_CH_ACCUMULATE
|
1255 ((LRADC_DELAY_TIMER_LOOP
- 1) << LRADC_CH_NUM_SAMPLES_OFFSET
);
1256 const int len
= bitmap_weight(iio
->active_scan_mask
,
1257 LRADC_MAX_TOTAL_CHANS
);
1263 * Lock the driver so raw access can not be done during buffered
1264 * operation. This simplifies the code a lot.
1266 ret
= mutex_trylock(&lradc
->lock
);
1270 lradc
->buffer
= kmalloc_array(len
, sizeof(*lradc
->buffer
), GFP_KERNEL
);
1271 if (!lradc
->buffer
) {
1276 if (lradc
->soc
== IMX28_LRADC
)
1277 mxs_lradc_reg_clear(lradc
,
1278 lradc
->buffer_vchans
<< LRADC_CTRL1_LRADC_IRQ_EN_OFFSET
,
1280 mxs_lradc_reg_clear(lradc
, lradc
->buffer_vchans
, LRADC_CTRL0
);
1282 for_each_set_bit(chan
, iio
->active_scan_mask
, LRADC_MAX_TOTAL_CHANS
) {
1283 ctrl4_set
|= chan
<< LRADC_CTRL4_LRADCSELECT_OFFSET(ofs
);
1284 ctrl4_clr
|= LRADC_CTRL4_LRADCSELECT_MASK(ofs
);
1285 ctrl1_irq
|= LRADC_CTRL1_LRADC_IRQ_EN(ofs
);
1286 mxs_lradc_reg_wrt(lradc
, chan_value
, LRADC_CH(ofs
));
1287 bitmap_set(&enable
, ofs
, 1);
1291 mxs_lradc_reg_clear(lradc
, LRADC_DELAY_TRIGGER_LRADCS_MASK
|
1292 LRADC_DELAY_KICK
, LRADC_DELAY(0));
1293 mxs_lradc_reg_clear(lradc
, ctrl4_clr
, LRADC_CTRL4
);
1294 mxs_lradc_reg_set(lradc
, ctrl4_set
, LRADC_CTRL4
);
1295 mxs_lradc_reg_set(lradc
, ctrl1_irq
, LRADC_CTRL1
);
1296 mxs_lradc_reg_set(lradc
, enable
<< LRADC_DELAY_TRIGGER_LRADCS_OFFSET
,
1302 mutex_unlock(&lradc
->lock
);
1306 static int mxs_lradc_buffer_postdisable(struct iio_dev
*iio
)
1308 struct mxs_lradc
*lradc
= iio_priv(iio
);
1310 mxs_lradc_reg_clear(lradc
, LRADC_DELAY_TRIGGER_LRADCS_MASK
|
1311 LRADC_DELAY_KICK
, LRADC_DELAY(0));
1313 mxs_lradc_reg_clear(lradc
, lradc
->buffer_vchans
, LRADC_CTRL0
);
1314 if (lradc
->soc
== IMX28_LRADC
)
1315 mxs_lradc_reg_clear(lradc
,
1316 lradc
->buffer_vchans
<< LRADC_CTRL1_LRADC_IRQ_EN_OFFSET
,
1319 kfree(lradc
->buffer
);
1320 mutex_unlock(&lradc
->lock
);
1325 static bool mxs_lradc_validate_scan_mask(struct iio_dev
*iio
,
1326 const unsigned long *mask
)
1328 struct mxs_lradc
*lradc
= iio_priv(iio
);
1329 const int map_chans
= bitmap_weight(mask
, LRADC_MAX_TOTAL_CHANS
);
1331 unsigned long rsvd_mask
= 0;
1333 if (lradc
->use_touchbutton
)
1334 rsvd_mask
|= CHAN_MASK_TOUCHBUTTON
;
1335 if (lradc
->use_touchscreen
== MXS_LRADC_TOUCHSCREEN_4WIRE
)
1336 rsvd_mask
|= CHAN_MASK_TOUCHSCREEN_4WIRE
;
1337 if (lradc
->use_touchscreen
== MXS_LRADC_TOUCHSCREEN_5WIRE
)
1338 rsvd_mask
|= CHAN_MASK_TOUCHSCREEN_5WIRE
;
1340 if (lradc
->use_touchbutton
)
1342 if (lradc
->use_touchscreen
)
1345 /* Test for attempts to map channels with special mode of operation. */
1346 if (bitmap_intersects(mask
, &rsvd_mask
, LRADC_MAX_TOTAL_CHANS
))
1349 /* Test for attempts to map more channels then available slots. */
1350 if (map_chans
+ rsvd_chans
> LRADC_MAX_MAPPED_CHANS
)
1356 static const struct iio_buffer_setup_ops mxs_lradc_buffer_ops
= {
1357 .preenable
= &mxs_lradc_buffer_preenable
,
1358 .postenable
= &iio_triggered_buffer_postenable
,
1359 .predisable
= &iio_triggered_buffer_predisable
,
1360 .postdisable
= &mxs_lradc_buffer_postdisable
,
1361 .validate_scan_mask
= &mxs_lradc_validate_scan_mask
,
1365 * Driver initialization
1368 #define MXS_ADC_CHAN(idx, chan_type, name) { \
1369 .type = (chan_type), \
1371 .scan_index = (idx), \
1372 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
1373 BIT(IIO_CHAN_INFO_SCALE), \
1378 .realbits = LRADC_RESOLUTION, \
1379 .storagebits = 32, \
1381 .datasheet_name = (name), \
1384 static const struct iio_chan_spec mx23_lradc_chan_spec
[] = {
1385 MXS_ADC_CHAN(0, IIO_VOLTAGE
, "LRADC0"),
1386 MXS_ADC_CHAN(1, IIO_VOLTAGE
, "LRADC1"),
1387 MXS_ADC_CHAN(2, IIO_VOLTAGE
, "LRADC2"),
1388 MXS_ADC_CHAN(3, IIO_VOLTAGE
, "LRADC3"),
1389 MXS_ADC_CHAN(4, IIO_VOLTAGE
, "LRADC4"),
1390 MXS_ADC_CHAN(5, IIO_VOLTAGE
, "LRADC5"),
1391 MXS_ADC_CHAN(6, IIO_VOLTAGE
, "VDDIO"),
1392 MXS_ADC_CHAN(7, IIO_VOLTAGE
, "VBATT"),
1393 /* Combined Temperature sensors */
1398 .info_mask_separate
= BIT(IIO_CHAN_INFO_RAW
) |
1399 BIT(IIO_CHAN_INFO_OFFSET
) |
1400 BIT(IIO_CHAN_INFO_SCALE
),
1402 .scan_type
= {.sign
= 'u', .realbits
= 18, .storagebits
= 32,},
1403 .datasheet_name
= "TEMP_DIE",
1405 /* Hidden channel to keep indexes */
1412 MXS_ADC_CHAN(10, IIO_VOLTAGE
, NULL
),
1413 MXS_ADC_CHAN(11, IIO_VOLTAGE
, NULL
),
1414 MXS_ADC_CHAN(12, IIO_VOLTAGE
, "USB_DP"),
1415 MXS_ADC_CHAN(13, IIO_VOLTAGE
, "USB_DN"),
1416 MXS_ADC_CHAN(14, IIO_VOLTAGE
, "VBG"),
1417 MXS_ADC_CHAN(15, IIO_VOLTAGE
, "VDD5V"),
1420 static const struct iio_chan_spec mx28_lradc_chan_spec
[] = {
1421 MXS_ADC_CHAN(0, IIO_VOLTAGE
, "LRADC0"),
1422 MXS_ADC_CHAN(1, IIO_VOLTAGE
, "LRADC1"),
1423 MXS_ADC_CHAN(2, IIO_VOLTAGE
, "LRADC2"),
1424 MXS_ADC_CHAN(3, IIO_VOLTAGE
, "LRADC3"),
1425 MXS_ADC_CHAN(4, IIO_VOLTAGE
, "LRADC4"),
1426 MXS_ADC_CHAN(5, IIO_VOLTAGE
, "LRADC5"),
1427 MXS_ADC_CHAN(6, IIO_VOLTAGE
, "LRADC6"),
1428 MXS_ADC_CHAN(7, IIO_VOLTAGE
, "VBATT"),
1429 /* Combined Temperature sensors */
1434 .info_mask_separate
= BIT(IIO_CHAN_INFO_RAW
) |
1435 BIT(IIO_CHAN_INFO_OFFSET
) |
1436 BIT(IIO_CHAN_INFO_SCALE
),
1438 .scan_type
= {.sign
= 'u', .realbits
= 18, .storagebits
= 32,},
1439 .datasheet_name
= "TEMP_DIE",
1441 /* Hidden channel to keep indexes */
1448 MXS_ADC_CHAN(10, IIO_VOLTAGE
, "VDDIO"),
1449 MXS_ADC_CHAN(11, IIO_VOLTAGE
, "VTH"),
1450 MXS_ADC_CHAN(12, IIO_VOLTAGE
, "VDDA"),
1451 MXS_ADC_CHAN(13, IIO_VOLTAGE
, "VDDD"),
1452 MXS_ADC_CHAN(14, IIO_VOLTAGE
, "VBG"),
1453 MXS_ADC_CHAN(15, IIO_VOLTAGE
, "VDD5V"),
1456 static int mxs_lradc_hw_init(struct mxs_lradc
*lradc
)
1458 /* The ADC always uses DELAY CHANNEL 0. */
1459 const uint32_t adc_cfg
=
1460 (1 << (LRADC_DELAY_TRIGGER_DELAYS_OFFSET
+ 0)) |
1461 (LRADC_DELAY_TIMER_PER
<< LRADC_DELAY_DELAY_OFFSET
);
1463 int ret
= stmp_reset_block(lradc
->base
);
1468 /* Configure DELAY CHANNEL 0 for generic ADC sampling. */
1469 mxs_lradc_reg_wrt(lradc
, adc_cfg
, LRADC_DELAY(0));
1471 /* Disable remaining DELAY CHANNELs */
1472 mxs_lradc_reg_wrt(lradc
, 0, LRADC_DELAY(1));
1473 mxs_lradc_reg_wrt(lradc
, 0, LRADC_DELAY(2));
1474 mxs_lradc_reg_wrt(lradc
, 0, LRADC_DELAY(3));
1476 /* Configure the touchscreen type */
1477 if (lradc
->soc
== IMX28_LRADC
) {
1478 mxs_lradc_reg_clear(lradc
, LRADC_CTRL0_MX28_TOUCH_SCREEN_TYPE
,
1481 if (lradc
->use_touchscreen
== MXS_LRADC_TOUCHSCREEN_5WIRE
)
1482 mxs_lradc_reg_set(lradc
, LRADC_CTRL0_MX28_TOUCH_SCREEN_TYPE
,
1486 /* Start internal temperature sensing. */
1487 mxs_lradc_reg_wrt(lradc
, 0, LRADC_CTRL2
);
1492 static void mxs_lradc_hw_stop(struct mxs_lradc
*lradc
)
1496 mxs_lradc_reg_clear(lradc
, mxs_lradc_irq_en_mask(lradc
), LRADC_CTRL1
);
1498 for (i
= 0; i
< LRADC_MAX_DELAY_CHANS
; i
++)
1499 mxs_lradc_reg_wrt(lradc
, 0, LRADC_DELAY(i
));
1502 static const struct of_device_id mxs_lradc_dt_ids
[] = {
1503 { .compatible
= "fsl,imx23-lradc", .data
= (void *)IMX23_LRADC
, },
1504 { .compatible
= "fsl,imx28-lradc", .data
= (void *)IMX28_LRADC
, },
1507 MODULE_DEVICE_TABLE(of
, mxs_lradc_dt_ids
);
1509 static int mxs_lradc_probe_touchscreen(struct mxs_lradc
*lradc
,
1510 struct device_node
*lradc_node
)
1513 u32 ts_wires
= 0, adapt
;
1515 ret
= of_property_read_u32(lradc_node
, "fsl,lradc-touchscreen-wires",
1518 return -ENODEV
; /* touchscreen feature disabled */
1522 lradc
->use_touchscreen
= MXS_LRADC_TOUCHSCREEN_4WIRE
;
1525 if (lradc
->soc
== IMX28_LRADC
) {
1526 lradc
->use_touchscreen
= MXS_LRADC_TOUCHSCREEN_5WIRE
;
1529 /* fall through an error message for i.MX23 */
1532 "Unsupported number of touchscreen wires (%d)\n",
1537 if (of_property_read_u32(lradc_node
, "fsl,ave-ctrl", &adapt
)) {
1538 lradc
->over_sample_cnt
= 4;
1540 if (adapt
< 1 || adapt
> 32) {
1541 dev_err(lradc
->dev
, "Invalid sample count (%u)\n",
1545 lradc
->over_sample_cnt
= adapt
;
1548 if (of_property_read_u32(lradc_node
, "fsl,ave-delay", &adapt
)) {
1549 lradc
->over_sample_delay
= 2;
1551 if (adapt
< 2 || adapt
> LRADC_DELAY_DELAY_MASK
+ 1) {
1552 dev_err(lradc
->dev
, "Invalid sample delay (%u)\n",
1556 lradc
->over_sample_delay
= adapt
;
1559 if (of_property_read_u32(lradc_node
, "fsl,settling", &adapt
)) {
1560 lradc
->settling_delay
= 10;
1562 if (adapt
< 1 || adapt
> LRADC_DELAY_DELAY_MASK
) {
1563 dev_err(lradc
->dev
, "Invalid settling delay (%u)\n",
1567 lradc
->settling_delay
= adapt
;
1573 static int mxs_lradc_probe(struct platform_device
*pdev
)
1575 const struct of_device_id
*of_id
=
1576 of_match_device(mxs_lradc_dt_ids
, &pdev
->dev
);
1577 const struct mxs_lradc_of_config
*of_cfg
=
1578 &mxs_lradc_of_config
[(enum mxs_lradc_id
)of_id
->data
];
1579 struct device
*dev
= &pdev
->dev
;
1580 struct device_node
*node
= dev
->of_node
;
1581 struct mxs_lradc
*lradc
;
1582 struct iio_dev
*iio
;
1583 struct resource
*iores
;
1584 int ret
= 0, touch_ret
;
1588 /* Allocate the IIO device. */
1589 iio
= devm_iio_device_alloc(dev
, sizeof(*lradc
));
1591 dev_err(dev
, "Failed to allocate IIO device\n");
1595 lradc
= iio_priv(iio
);
1596 lradc
->soc
= (enum mxs_lradc_id
)of_id
->data
;
1598 /* Grab the memory area */
1599 iores
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1600 lradc
->dev
= &pdev
->dev
;
1601 lradc
->base
= devm_ioremap_resource(dev
, iores
);
1602 if (IS_ERR(lradc
->base
))
1603 return PTR_ERR(lradc
->base
);
1605 lradc
->clk
= devm_clk_get(&pdev
->dev
, NULL
);
1606 if (IS_ERR(lradc
->clk
)) {
1607 dev_err(dev
, "Failed to get the delay unit clock\n");
1608 return PTR_ERR(lradc
->clk
);
1610 ret
= clk_prepare_enable(lradc
->clk
);
1612 dev_err(dev
, "Failed to enable the delay unit clock\n");
1616 touch_ret
= mxs_lradc_probe_touchscreen(lradc
, node
);
1619 lradc
->buffer_vchans
= BUFFER_VCHANS_LIMITED
;
1621 lradc
->buffer_vchans
= BUFFER_VCHANS_ALL
;
1623 /* Grab all IRQ sources */
1624 for (i
= 0; i
< of_cfg
->irq_count
; i
++) {
1625 lradc
->irq
[i
] = platform_get_irq(pdev
, i
);
1626 if (lradc
->irq
[i
] < 0) {
1627 ret
= lradc
->irq
[i
];
1631 ret
= devm_request_irq(dev
, lradc
->irq
[i
],
1632 mxs_lradc_handle_irq
, 0,
1633 of_cfg
->irq_name
[i
], iio
);
1638 lradc
->vref_mv
= of_cfg
->vref_mv
;
1640 platform_set_drvdata(pdev
, iio
);
1642 init_completion(&lradc
->completion
);
1643 mutex_init(&lradc
->lock
);
1645 iio
->name
= pdev
->name
;
1646 iio
->dev
.parent
= &pdev
->dev
;
1647 iio
->info
= &mxs_lradc_iio_info
;
1648 iio
->modes
= INDIO_DIRECT_MODE
;
1649 iio
->masklength
= LRADC_MAX_TOTAL_CHANS
;
1651 if (lradc
->soc
== IMX23_LRADC
) {
1652 iio
->channels
= mx23_lradc_chan_spec
;
1653 iio
->num_channels
= ARRAY_SIZE(mx23_lradc_chan_spec
);
1655 iio
->channels
= mx28_lradc_chan_spec
;
1656 iio
->num_channels
= ARRAY_SIZE(mx28_lradc_chan_spec
);
1659 ret
= iio_triggered_buffer_setup(iio
, &iio_pollfunc_store_time
,
1660 &mxs_lradc_trigger_handler
,
1661 &mxs_lradc_buffer_ops
);
1665 ret
= mxs_lradc_trigger_init(iio
);
1669 /* Populate available ADC input ranges */
1670 for (i
= 0; i
< LRADC_MAX_TOTAL_CHANS
; i
++) {
1671 for (s
= 0; s
< ARRAY_SIZE(lradc
->scale_avail
[i
]); s
++) {
1673 * [s=0] = optional divider by two disabled (default)
1674 * [s=1] = optional divider by two enabled
1676 * The scale is calculated by doing:
1677 * Vref >> (realbits - s)
1678 * which multiplies by two on the second component
1681 scale_uv
= ((u64
)lradc
->vref_mv
[i
] * 100000000) >>
1682 (LRADC_RESOLUTION
- s
);
1683 lradc
->scale_avail
[i
][s
].nano
=
1684 do_div(scale_uv
, 100000000) * 10;
1685 lradc
->scale_avail
[i
][s
].integer
= scale_uv
;
1689 /* Configure the hardware. */
1690 ret
= mxs_lradc_hw_init(lradc
);
1694 /* Register the touchscreen input device. */
1695 if (touch_ret
== 0) {
1696 ret
= mxs_lradc_ts_register(lradc
);
1698 goto err_ts_register
;
1701 /* Register IIO device. */
1702 ret
= iio_device_register(iio
);
1704 dev_err(dev
, "Failed to register IIO device\n");
1711 mxs_lradc_ts_unregister(lradc
);
1713 mxs_lradc_hw_stop(lradc
);
1715 mxs_lradc_trigger_remove(iio
);
1717 iio_triggered_buffer_cleanup(iio
);
1719 clk_disable_unprepare(lradc
->clk
);
1723 static int mxs_lradc_remove(struct platform_device
*pdev
)
1725 struct iio_dev
*iio
= platform_get_drvdata(pdev
);
1726 struct mxs_lradc
*lradc
= iio_priv(iio
);
1728 iio_device_unregister(iio
);
1729 mxs_lradc_ts_unregister(lradc
);
1730 mxs_lradc_hw_stop(lradc
);
1731 mxs_lradc_trigger_remove(iio
);
1732 iio_triggered_buffer_cleanup(iio
);
1734 clk_disable_unprepare(lradc
->clk
);
1738 static struct platform_driver mxs_lradc_driver
= {
1740 .name
= DRIVER_NAME
,
1741 .of_match_table
= mxs_lradc_dt_ids
,
1743 .probe
= mxs_lradc_probe
,
1744 .remove
= mxs_lradc_remove
,
1747 module_platform_driver(mxs_lradc_driver
);
1749 MODULE_AUTHOR("Marek Vasut <marex@denx.de>");
1750 MODULE_DESCRIPTION("Freescale MXS LRADC driver");
1751 MODULE_LICENSE("GPL v2");
1752 MODULE_ALIAS("platform:" DRIVER_NAME
);