staging:iio:spear_adc: Fix IRQ check
[deliverable/linux.git] / drivers / staging / iio / adc / spear_adc.c
1 /*
2 * ST SPEAr ADC driver
3 *
4 * Copyright 2012 Stefan Roese <sr@denx.de>
5 *
6 * Licensed under the GPL-2.
7 */
8
9 #include <linux/module.h>
10 #include <linux/platform_device.h>
11 #include <linux/interrupt.h>
12 #include <linux/device.h>
13 #include <linux/kernel.h>
14 #include <linux/slab.h>
15 #include <linux/io.h>
16 #include <linux/clk.h>
17 #include <linux/err.h>
18 #include <linux/completion.h>
19 #include <linux/of.h>
20 #include <linux/of_address.h>
21
22 #include <linux/iio/iio.h>
23 #include <linux/iio/sysfs.h>
24
25 /*
26 * SPEAR registers definitions
27 */
28
29 #define SCAN_RATE_LO(x) ((x) & 0xFFFF)
30 #define SCAN_RATE_HI(x) (((x) >> 0x10) & 0xFFFF)
31 #define CLK_LOW(x) (((x) & 0xf) << 0)
32 #define CLK_HIGH(x) (((x) & 0xf) << 4)
33
34 /* Bit definitions for SPEAR_ADC_STATUS */
35 #define START_CONVERSION (1 << 0)
36 #define CHANNEL_NUM(x) ((x) << 1)
37 #define ADC_ENABLE (1 << 4)
38 #define AVG_SAMPLE(x) ((x) << 5)
39 #define VREF_INTERNAL (1 << 9)
40
41 #define DATA_MASK 0x03ff
42 #define DATA_BITS 10
43
44 #define MOD_NAME "spear-adc"
45
46 #define ADC_CHANNEL_NUM 8
47
48 #define CLK_MIN 2500000
49 #define CLK_MAX 20000000
50
51 struct adc_regs_spear3xx {
52 u32 status;
53 u32 average;
54 u32 scan_rate;
55 u32 clk; /* Not avail for 1340 & 1310 */
56 u32 ch_ctrl[ADC_CHANNEL_NUM];
57 u32 ch_data[ADC_CHANNEL_NUM];
58 };
59
60 struct chan_data {
61 u32 lsb;
62 u32 msb;
63 };
64
65 struct adc_regs_spear6xx {
66 u32 status;
67 u32 pad[2];
68 u32 clk;
69 u32 ch_ctrl[ADC_CHANNEL_NUM];
70 struct chan_data ch_data[ADC_CHANNEL_NUM];
71 u32 scan_rate_lo;
72 u32 scan_rate_hi;
73 struct chan_data average;
74 };
75
76 struct spear_adc_info {
77 struct device_node *np;
78 struct adc_regs_spear3xx __iomem *adc_base_spear3xx;
79 struct adc_regs_spear6xx __iomem *adc_base_spear6xx;
80 struct clk *clk;
81 struct completion completion;
82 u32 current_clk;
83 u32 sampling_freq;
84 u32 avg_samples;
85 u32 vref_external;
86 u32 value;
87 };
88
89 /*
90 * Functions to access some SPEAr ADC register. Abstracted into
91 * static inline functions, because of different register offsets
92 * on different SoC variants (SPEAr300 vs SPEAr600 etc).
93 */
94 static void spear_adc_set_status(struct spear_adc_info *info, u32 val)
95 {
96 __raw_writel(val, &info->adc_base_spear6xx->status);
97 }
98
99 static void spear_adc_set_clk(struct spear_adc_info *info, u32 val)
100 {
101 u32 clk_high, clk_low, count;
102 u32 apb_clk = clk_get_rate(info->clk);
103
104 count = (apb_clk + val - 1) / val;
105 clk_low = count / 2;
106 clk_high = count - clk_low;
107 info->current_clk = apb_clk / count;
108
109 __raw_writel(CLK_LOW(clk_low) | CLK_HIGH(clk_high),
110 &info->adc_base_spear6xx->clk);
111 }
112
113 static void spear_adc_set_ctrl(struct spear_adc_info *info, int n,
114 u32 val)
115 {
116 __raw_writel(val, &info->adc_base_spear6xx->ch_ctrl[n]);
117 }
118
119 static u32 spear_adc_get_average(struct spear_adc_info *info)
120 {
121 if (of_device_is_compatible(info->np, "st,spear600-adc")) {
122 return __raw_readl(&info->adc_base_spear6xx->average.msb) &
123 DATA_MASK;
124 } else {
125 return __raw_readl(&info->adc_base_spear3xx->average) &
126 DATA_MASK;
127 }
128 }
129
130 static void spear_adc_set_scanrate(struct spear_adc_info *info, u32 rate)
131 {
132 if (of_device_is_compatible(info->np, "st,spear600-adc")) {
133 __raw_writel(SCAN_RATE_LO(rate),
134 &info->adc_base_spear6xx->scan_rate_lo);
135 __raw_writel(SCAN_RATE_HI(rate),
136 &info->adc_base_spear6xx->scan_rate_hi);
137 } else {
138 __raw_writel(rate, &info->adc_base_spear3xx->scan_rate);
139 }
140 }
141
142 static int spear_read_raw(struct iio_dev *indio_dev,
143 struct iio_chan_spec const *chan,
144 int *val,
145 int *val2,
146 long mask)
147 {
148 struct spear_adc_info *info = iio_priv(indio_dev);
149 u32 status;
150
151 switch (mask) {
152 case IIO_CHAN_INFO_RAW:
153 mutex_lock(&indio_dev->mlock);
154
155 status = CHANNEL_NUM(chan->channel) |
156 AVG_SAMPLE(info->avg_samples) |
157 START_CONVERSION | ADC_ENABLE;
158 if (info->vref_external == 0)
159 status |= VREF_INTERNAL;
160
161 spear_adc_set_status(info, status);
162 wait_for_completion(&info->completion); /* set by ISR */
163 *val = info->value;
164
165 mutex_unlock(&indio_dev->mlock);
166
167 return IIO_VAL_INT;
168
169 case IIO_CHAN_INFO_SCALE:
170 *val = info->vref_external;
171 *val2 = DATA_BITS;
172 return IIO_VAL_FRACTIONAL_LOG2;
173 }
174
175 return -EINVAL;
176 }
177
178 #define SPEAR_ADC_CHAN(idx) { \
179 .type = IIO_VOLTAGE, \
180 .indexed = 1, \
181 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
182 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
183 .channel = idx, \
184 .scan_type = { \
185 .sign = 'u', \
186 .storagebits = 16, \
187 }, \
188 }
189
190 static const struct iio_chan_spec spear_adc_iio_channels[] = {
191 SPEAR_ADC_CHAN(0),
192 SPEAR_ADC_CHAN(1),
193 SPEAR_ADC_CHAN(2),
194 SPEAR_ADC_CHAN(3),
195 SPEAR_ADC_CHAN(4),
196 SPEAR_ADC_CHAN(5),
197 SPEAR_ADC_CHAN(6),
198 SPEAR_ADC_CHAN(7),
199 };
200
201 static irqreturn_t spear_adc_isr(int irq, void *dev_id)
202 {
203 struct spear_adc_info *info = (struct spear_adc_info *)dev_id;
204
205 /* Read value to clear IRQ */
206 info->value = spear_adc_get_average(info);
207 complete(&info->completion);
208
209 return IRQ_HANDLED;
210 }
211
212 static int spear_adc_configure(struct spear_adc_info *info)
213 {
214 int i;
215
216 /* Reset ADC core */
217 spear_adc_set_status(info, 0);
218 __raw_writel(0, &info->adc_base_spear6xx->clk);
219 for (i = 0; i < 8; i++)
220 spear_adc_set_ctrl(info, i, 0);
221 spear_adc_set_scanrate(info, 0);
222
223 spear_adc_set_clk(info, info->sampling_freq);
224
225 return 0;
226 }
227
228 static ssize_t spear_adc_read_frequency(struct device *dev,
229 struct device_attribute *attr,
230 char *buf)
231 {
232 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
233 struct spear_adc_info *info = iio_priv(indio_dev);
234
235 return sprintf(buf, "%d\n", info->current_clk);
236 }
237
238 static ssize_t spear_adc_write_frequency(struct device *dev,
239 struct device_attribute *attr,
240 const char *buf,
241 size_t len)
242 {
243 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
244 struct spear_adc_info *info = iio_priv(indio_dev);
245 u32 clk_high, clk_low, count;
246 u32 apb_clk = clk_get_rate(info->clk);
247 unsigned long lval;
248 int ret;
249
250 ret = kstrtoul(buf, 10, &lval);
251 if (ret)
252 return ret;
253
254 mutex_lock(&indio_dev->mlock);
255
256 if ((lval < CLK_MIN) || (lval > CLK_MAX)) {
257 ret = -EINVAL;
258 goto out;
259 }
260
261 count = (apb_clk + lval - 1) / lval;
262 clk_low = count / 2;
263 clk_high = count - clk_low;
264 info->current_clk = apb_clk / count;
265 spear_adc_set_clk(info, lval);
266
267 out:
268 mutex_unlock(&indio_dev->mlock);
269
270 return ret ? ret : len;
271 }
272
273 static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
274 spear_adc_read_frequency,
275 spear_adc_write_frequency);
276
277 static struct attribute *spear_attributes[] = {
278 &iio_dev_attr_sampling_frequency.dev_attr.attr,
279 NULL
280 };
281
282 static const struct attribute_group spear_attribute_group = {
283 .attrs = spear_attributes,
284 };
285
286 static const struct iio_info spear_adc_iio_info = {
287 .read_raw = &spear_read_raw,
288 .attrs = &spear_attribute_group,
289 .driver_module = THIS_MODULE,
290 };
291
292 static int spear_adc_probe(struct platform_device *pdev)
293 {
294 struct device_node *np = pdev->dev.of_node;
295 struct device *dev = &pdev->dev;
296 struct spear_adc_info *info;
297 struct iio_dev *iodev = NULL;
298 int ret = -ENODEV;
299 int irq;
300
301 iodev = devm_iio_device_alloc(dev, sizeof(struct spear_adc_info));
302 if (!iodev) {
303 dev_err(dev, "failed allocating iio device\n");
304 return -ENOMEM;
305 }
306
307 info = iio_priv(iodev);
308 info->np = np;
309
310 /*
311 * SPEAr600 has a different register layout than other SPEAr SoC's
312 * (e.g. SPEAr3xx). Let's provide two register base addresses
313 * to support multi-arch kernels.
314 */
315 info->adc_base_spear6xx = of_iomap(np, 0);
316 if (!info->adc_base_spear6xx) {
317 dev_err(dev, "failed mapping memory\n");
318 return -ENOMEM;
319 }
320 info->adc_base_spear3xx =
321 (struct adc_regs_spear3xx __iomem *)info->adc_base_spear6xx;
322
323 info->clk = clk_get(dev, NULL);
324 if (IS_ERR(info->clk)) {
325 dev_err(dev, "failed getting clock\n");
326 goto errout1;
327 }
328
329 ret = clk_prepare_enable(info->clk);
330 if (ret) {
331 dev_err(dev, "failed enabling clock\n");
332 goto errout2;
333 }
334
335 irq = platform_get_irq(pdev, 0);
336 if (irq <= 0) {
337 dev_err(dev, "failed getting interrupt resource\n");
338 ret = -EINVAL;
339 goto errout3;
340 }
341
342 ret = devm_request_irq(dev, irq, spear_adc_isr, 0, MOD_NAME, info);
343 if (ret < 0) {
344 dev_err(dev, "failed requesting interrupt\n");
345 goto errout3;
346 }
347
348 if (of_property_read_u32(np, "sampling-frequency",
349 &info->sampling_freq)) {
350 dev_err(dev, "sampling-frequency missing in DT\n");
351 ret = -EINVAL;
352 goto errout3;
353 }
354
355 /*
356 * Optional avg_samples defaults to 0, resulting in single data
357 * conversion
358 */
359 of_property_read_u32(np, "average-samples", &info->avg_samples);
360
361 /*
362 * Optional vref_external defaults to 0, resulting in internal vref
363 * selection
364 */
365 of_property_read_u32(np, "vref-external", &info->vref_external);
366
367 spear_adc_configure(info);
368
369 platform_set_drvdata(pdev, iodev);
370
371 init_completion(&info->completion);
372
373 iodev->name = MOD_NAME;
374 iodev->dev.parent = dev;
375 iodev->info = &spear_adc_iio_info;
376 iodev->modes = INDIO_DIRECT_MODE;
377 iodev->channels = spear_adc_iio_channels;
378 iodev->num_channels = ARRAY_SIZE(spear_adc_iio_channels);
379
380 ret = iio_device_register(iodev);
381 if (ret)
382 goto errout3;
383
384 dev_info(dev, "SPEAR ADC driver loaded, IRQ %d\n", irq);
385
386 return 0;
387
388 errout3:
389 clk_disable_unprepare(info->clk);
390 errout2:
391 clk_put(info->clk);
392 errout1:
393 iounmap(info->adc_base_spear6xx);
394 return ret;
395 }
396
397 static int spear_adc_remove(struct platform_device *pdev)
398 {
399 struct iio_dev *iodev = platform_get_drvdata(pdev);
400 struct spear_adc_info *info = iio_priv(iodev);
401
402 iio_device_unregister(iodev);
403 clk_disable_unprepare(info->clk);
404 clk_put(info->clk);
405 iounmap(info->adc_base_spear6xx);
406
407 return 0;
408 }
409
410 #ifdef CONFIG_OF
411 static const struct of_device_id spear_adc_dt_ids[] = {
412 { .compatible = "st,spear600-adc", },
413 { /* sentinel */ }
414 };
415 MODULE_DEVICE_TABLE(of, spear_adc_dt_ids);
416 #endif
417
418 static struct platform_driver spear_adc_driver = {
419 .probe = spear_adc_probe,
420 .remove = spear_adc_remove,
421 .driver = {
422 .name = MOD_NAME,
423 .owner = THIS_MODULE,
424 .of_match_table = of_match_ptr(spear_adc_dt_ids),
425 },
426 };
427
428 module_platform_driver(spear_adc_driver);
429
430 MODULE_AUTHOR("Stefan Roese <sr@denx.de>");
431 MODULE_DESCRIPTION("SPEAr ADC driver");
432 MODULE_LICENSE("GPL");
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