drivers/staging/rdma/hfi1/eprom.c

   1 /*
   2  *
   3  * This file is provided under a dual BSD/GPLv2 license.  When using or
   4  * redistributing this file, you may do so under either license.
   5  *
   6  * GPL LICENSE SUMMARY
   7  *
   8  * Copyright(c) 2015 Intel Corporation.
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of version 2 of the GNU General Public License as
  12  * published by the Free Software Foundation.
  13  *
  14  * This program is distributed in the hope that it will be useful, but
  15  * WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  17  * General Public License for more details.
  18  *
  19  * BSD LICENSE
  20  *
  21  * Copyright(c) 2015 Intel Corporation.
  22  *
  23  * Redistribution and use in source and binary forms, with or without
  24  * modification, are permitted provided that the following conditions
  25  * are met:
  26  *
  27  *  - Redistributions of source code must retain the above copyright
  28  *    notice, this list of conditions and the following disclaimer.
  29  *  - Redistributions in binary form must reproduce the above copyright
  30  *    notice, this list of conditions and the following disclaimer in
  31  *    the documentation and/or other materials provided with the
  32  *    distribution.
  33  *  - Neither the name of Intel Corporation nor the names of its
  34  *    contributors may be used to endorse or promote products derived
  35  *    from this software without specific prior written permission.
  36  *
  37  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  38  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  39  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  40  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  41  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  42  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  43  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  44  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  45  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  46  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  47  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  48  *
  49  */
  50 #include <linux/delay.h>
  51 #include "hfi.h"
  52 #include "common.h"
  53 #include "eprom.h"
  54
  55 /*
  56  * The EPROM is logically divided into three partitions:
  57  *      partition 0: the first 128K, visible from PCI ROM BAR
  58  *      partition 1: 4K config file (sector size)
  59  *      partition 2: the rest
  60  */
  61 #define P0_SIZE (128 * 1024)
  62 #define P1_SIZE   (4 * 1024)
  63 #define P1_START P0_SIZE
  64 #define P2_START (P0_SIZE + P1_SIZE)
  65
  66 /* erase sizes supported by the controller */
  67 #define SIZE_4KB (4 * 1024)
  68 #define MASK_4KB (SIZE_4KB - 1)
  69
  70 #define SIZE_32KB (32 * 1024)
  71 #define MASK_32KB (SIZE_32KB - 1)
  72
  73 #define SIZE_64KB (64 * 1024)
  74 #define MASK_64KB (SIZE_64KB - 1)
  75
  76 /* controller page size, in bytes */
  77 #define EP_PAGE_SIZE 256
  78 #define EEP_PAGE_MASK (EP_PAGE_SIZE - 1)
  79
  80 /* controller commands */
  81 #define CMD_SHIFT 24
  82 #define CMD_NOP                     (0)
  83 #define CMD_PAGE_PROGRAM(addr)      ((0x02 << CMD_SHIFT) | addr)
  84 #define CMD_READ_DATA(addr)         ((0x03 << CMD_SHIFT) | addr)
  85 #define CMD_READ_SR1                ((0x05 << CMD_SHIFT))
  86 #define CMD_WRITE_ENABLE            ((0x06 << CMD_SHIFT))
  87 #define CMD_SECTOR_ERASE_4KB(addr)  ((0x20 << CMD_SHIFT) | addr)
  88 #define CMD_SECTOR_ERASE_32KB(addr) ((0x52 << CMD_SHIFT) | addr)
  89 #define CMD_CHIP_ERASE              ((0x60 << CMD_SHIFT))
  90 #define CMD_READ_MANUF_DEV_ID       ((0x90 << CMD_SHIFT))
  91 #define CMD_RELEASE_POWERDOWN_NOID  ((0xab << CMD_SHIFT))
  92 #define CMD_SECTOR_ERASE_64KB(addr) ((0xd8 << CMD_SHIFT) | addr)
  93
  94 /* controller interface speeds */
  95 #define EP_SPEED_FULL 0x2       /* full speed */
  96
  97 /* controller status register 1 bits */
  98 #define SR1_BUSY 0x1ull         /* the BUSY bit in SR1 */
  99
 100 /* sleep length while waiting for controller */
 101 #define WAIT_SLEEP_US 100       /* must be larger than 5 (see usage) */
 102 #define COUNT_DELAY_SEC(n) ((n) * (1000000/WAIT_SLEEP_US))
 103
 104 /* GPIO pins */
 105 #define EPROM_WP_N (1ull << 14) /* EPROM write line */
 106
 107 /*
 108  * Use the EP mutex to guard against other callers from within the driver.
 109  * Also covers usage of eprom_available.
 110  */
 111 static DEFINE_MUTEX(eprom_mutex);
 112 static int eprom_available;     /* default: not available */
 113
 114 /*
 115  * Turn on external enable line that allows writing on the flash.
 116  */
 117 static void write_enable(struct hfi1_devdata *dd)
 118 {
 119         /* raise signal */
 120         write_csr(dd, ASIC_GPIO_OUT,
 121                 read_csr(dd, ASIC_GPIO_OUT) | EPROM_WP_N);
 122         /* raise enable */
 123         write_csr(dd, ASIC_GPIO_OE,
 124                 read_csr(dd, ASIC_GPIO_OE) | EPROM_WP_N);
 125 }
 126
 127 /*
 128  * Turn off external enable line that allows writing on the flash.
 129  */
 130 static void write_disable(struct hfi1_devdata *dd)
 131 {
 132         /* lower signal */
 133         write_csr(dd, ASIC_GPIO_OUT,
 134                 read_csr(dd, ASIC_GPIO_OUT) & ~EPROM_WP_N);
 135         /* lower enable */
 136         write_csr(dd, ASIC_GPIO_OE,
 137                 read_csr(dd, ASIC_GPIO_OE) & ~EPROM_WP_N);
 138 }
 139
 140 /*
 141  * Wait for the device to become not busy.  Must be called after all
 142  * write or erase operations.
 143  */
 144 static int wait_for_not_busy(struct hfi1_devdata *dd)
 145 {
 146         unsigned long count = 0;
 147         u64 reg;
 148         int ret = 0;
 149
 150         /* starts page mode */
 151         write_csr(dd, ASIC_EEP_ADDR_CMD, CMD_READ_SR1);
 152         while (1) {
 153                 udelay(WAIT_SLEEP_US);
 154                 usleep_range(WAIT_SLEEP_US - 5, WAIT_SLEEP_US + 5);
 155                 count++;
 156                 reg = read_csr(dd, ASIC_EEP_DATA);
 157                 if ((reg & SR1_BUSY) == 0)
 158                         break;
 159                 /* 200s is the largest time for a 128Mb device */
 160                 if (count > COUNT_DELAY_SEC(200)) {
 161                         dd_dev_err(dd, "waited too long for SPI FLASH busy to clear - failing\n");
 162                         ret = -ETIMEDOUT;
 163                         break; /* break, not goto - must stop page mode */
 164                 }
 165         }
 166
 167         /* stop page mode with a NOP */
 168         write_csr(dd, ASIC_EEP_ADDR_CMD, CMD_NOP);
 169
 170         return ret;
 171 }
 172
 173 /*
 174  * Read the device ID from the SPI controller.
 175  */
 176 static u32 read_device_id(struct hfi1_devdata *dd)
 177 {
 178         /* read the Manufacture Device ID */
 179         write_csr(dd, ASIC_EEP_ADDR_CMD, CMD_READ_MANUF_DEV_ID);
 180         return (u32)read_csr(dd, ASIC_EEP_DATA);
 181 }
 182
 183 /*
 184  * Erase the whole flash.
 185  */
 186 static int erase_chip(struct hfi1_devdata *dd)
 187 {
 188         int ret;
 189
 190         write_enable(dd);
 191
 192         write_csr(dd, ASIC_EEP_ADDR_CMD, CMD_WRITE_ENABLE);
 193         write_csr(dd, ASIC_EEP_ADDR_CMD, CMD_CHIP_ERASE);
 194         ret = wait_for_not_busy(dd);
 195
 196         write_disable(dd);
 197
 198         return ret;
 199 }
 200
 201 /*
 202  * Erase a range.
 203  */
 204 static int erase_range(struct hfi1_devdata *dd, u32 start, u32 len)
 205 {
 206         u32 end = start + len;
 207         int ret = 0;
 208
 209         if (end < start)
 210                 return -EINVAL;
 211
 212         /* check the end points for the minimum erase */
 213         if ((start & MASK_4KB) || (end & MASK_4KB)) {
 214                 dd_dev_err(dd,
 215                         "%s: non-aligned range (0x%x,0x%x) for a 4KB erase\n",
 216                         __func__, start, end);
 217                 return -EINVAL;
 218         }
 219
 220         write_enable(dd);
 221
 222         while (start < end) {
 223                 write_csr(dd, ASIC_EEP_ADDR_CMD, CMD_WRITE_ENABLE);
 224                 /* check in order of largest to smallest */
 225                 if (((start & MASK_64KB) == 0) && (start + SIZE_64KB <= end)) {
 226                         write_csr(dd, ASIC_EEP_ADDR_CMD,
 227                                   CMD_SECTOR_ERASE_64KB(start));
 228                         start += SIZE_64KB;
 229                 } else if (((start & MASK_32KB) == 0) &&
 230                            (start + SIZE_32KB <= end)) {
 231                         write_csr(dd, ASIC_EEP_ADDR_CMD,
 232                                   CMD_SECTOR_ERASE_32KB(start));
 233                         start += SIZE_32KB;
 234                 } else {        /* 4KB will work */
 235                         write_csr(dd, ASIC_EEP_ADDR_CMD,
 236                                   CMD_SECTOR_ERASE_4KB(start));
 237                         start += SIZE_4KB;
 238                 }
 239                 ret = wait_for_not_busy(dd);
 240                 if (ret)
 241                         goto done;
 242         }
 243
 244 done:
 245         write_disable(dd);
 246
 247         return ret;
 248 }
 249
 250 /*
 251  * Read a 256 byte (64 dword) EPROM page.
 252  * All callers have verified the offset is at a page boundary.
 253  */
 254 static void read_page(struct hfi1_devdata *dd, u32 offset, u32 *result)
 255 {
 256         int i;
 257
 258         write_csr(dd, ASIC_EEP_ADDR_CMD, CMD_READ_DATA(offset));
 259         for (i = 0; i < EP_PAGE_SIZE/sizeof(u32); i++)
 260                 result[i] = (u32)read_csr(dd, ASIC_EEP_DATA);
 261         write_csr(dd, ASIC_EEP_ADDR_CMD, CMD_NOP); /* close open page */
 262 }
 263
 264 /*
 265  * Read length bytes starting at offset.  Copy to user address addr.
 266  */
 267 static int read_length(struct hfi1_devdata *dd, u32 start, u32 len, u64 addr)
 268 {
 269         u32 offset;
 270         u32 buffer[EP_PAGE_SIZE/sizeof(u32)];
 271         int ret = 0;
 272
 273         /* reject anything not on an EPROM page boundary */
 274         if ((start & EEP_PAGE_MASK) || (len & EEP_PAGE_MASK))
 275                 return -EINVAL;
 276
 277         for (offset = 0; offset < len; offset += EP_PAGE_SIZE) {
 278                 read_page(dd, start + offset, buffer);
 279                 if (copy_to_user((void __user *)(addr + offset),
 280                                                 buffer, EP_PAGE_SIZE)) {
 281                         ret = -EFAULT;
 282                         goto done;
 283                 }
 284         }
 285
 286 done:
 287         return ret;
 288 }
 289
 290 /*
 291  * Write a 256 byte (64 dword) EPROM page.
 292  * All callers have verified the offset is at a page boundary.
 293  */
 294 static int write_page(struct hfi1_devdata *dd, u32 offset, u32 *data)
 295 {
 296         int i;
 297
 298         write_csr(dd, ASIC_EEP_ADDR_CMD, CMD_WRITE_ENABLE);
 299         write_csr(dd, ASIC_EEP_DATA, data[0]);
 300         write_csr(dd, ASIC_EEP_ADDR_CMD, CMD_PAGE_PROGRAM(offset));
 301         for (i = 1; i < EP_PAGE_SIZE/sizeof(u32); i++)
 302                 write_csr(dd, ASIC_EEP_DATA, data[i]);
 303         /* will close the open page */
 304         return wait_for_not_busy(dd);
 305 }
 306
 307 /*
 308  * Write length bytes starting at offset.  Read from user address addr.
 309  */
 310 static int write_length(struct hfi1_devdata *dd, u32 start, u32 len, u64 addr)
 311 {
 312         u32 offset;
 313         u32 buffer[EP_PAGE_SIZE/sizeof(u32)];
 314         int ret = 0;
 315
 316         /* reject anything not on an EPROM page boundary */
 317         if ((start & EEP_PAGE_MASK) || (len & EEP_PAGE_MASK))
 318                 return -EINVAL;
 319
 320         write_enable(dd);
 321
 322         for (offset = 0; offset < len; offset += EP_PAGE_SIZE) {
 323                 if (copy_from_user(buffer, (void __user *)(addr + offset),
 324                                                 EP_PAGE_SIZE)) {
 325                         ret = -EFAULT;
 326                         goto done;
 327                 }
 328                 ret = write_page(dd, start + offset, buffer);
 329                 if (ret)
 330                         goto done;
 331         }
 332
 333 done:
 334         write_disable(dd);
 335         return ret;
 336 }
 337
 338 /* convert an range composite to a length, in bytes */
 339 static inline u32 extract_rlen(u32 composite)
 340 {
 341         return (composite & 0xffff) * EP_PAGE_SIZE;
 342 }
 343
 344 /* convert an range composite to a start, in bytes */
 345 static inline u32 extract_rstart(u32 composite)
 346 {
 347         return (composite >> 16) * EP_PAGE_SIZE;
 348 }
 349
 350 /*
 351  * Perform the given operation on the EPROM.  Called from user space.  The
 352  * user credentials have already been checked.
 353  *
 354  * Return 0 on success, -ERRNO on error
 355  */
 356 int handle_eprom_command(const struct hfi1_cmd *cmd)
 357 {
 358         struct hfi1_devdata *dd;
 359         u32 dev_id;
 360         u32 rlen;       /* range length */
 361         u32 rstart;     /* range start */
 362         int ret = 0;
 363
 364         /*
 365          * The EPROM is per-device, so use unit 0 as that will always
 366          * exist.
 367          */
 368         dd = hfi1_lookup(0);
 369         if (!dd) {
 370                 pr_err("%s: cannot find unit 0!\n", __func__);
 371                 return -EINVAL;
 372         }
 373
 374         /* lock against other callers touching the ASIC block */
 375         mutex_lock(&eprom_mutex);
 376
 377         /* some platforms do not have an EPROM */
 378         if (!eprom_available) {
 379                 ret = -ENOSYS;
 380                 goto done_asic;
 381         }
 382
 383         /* lock against the other HFI on another OS */
 384         ret = acquire_hw_mutex(dd);
 385         if (ret) {
 386                 dd_dev_err(dd,
 387                         "%s: unable to acquire hw mutex, no EPROM support\n",
 388                         __func__);
 389                 goto done_asic;
 390         }
 391
 392         dd_dev_info(dd, "%s: cmd: type %d, len 0x%x, addr 0x%016llx\n",
 393                 __func__, cmd->type, cmd->len, cmd->addr);
 394
 395         switch (cmd->type) {
 396         case HFI1_CMD_EP_INFO:
 397                 if (cmd->len != sizeof(u32)) {
 398                         ret = -ERANGE;
 399                         break;
 400                 }
 401                 dev_id = read_device_id(dd);
 402                 /* addr points to a u32 user buffer */
 403                 if (copy_to_user((void __user *)cmd->addr, &dev_id,
 404                                                                 sizeof(u32)))
 405                         ret = -EFAULT;
 406                 break;
 407
 408         case HFI1_CMD_EP_ERASE_CHIP:
 409                 ret = erase_chip(dd);
 410                 break;
 411
 412         case HFI1_CMD_EP_ERASE_RANGE:
 413                 rlen = extract_rlen(cmd->len);
 414                 rstart = extract_rstart(cmd->len);
 415                 ret = erase_range(dd, rstart, rlen);
 416                 break;
 417
 418         case HFI1_CMD_EP_READ_RANGE:
 419                 rlen = extract_rlen(cmd->len);
 420                 rstart = extract_rstart(cmd->len);
 421                 ret = read_length(dd, rstart, rlen, cmd->addr);
 422                 break;
 423
 424         case HFI1_CMD_EP_WRITE_RANGE:
 425                 rlen = extract_rlen(cmd->len);
 426                 rstart = extract_rstart(cmd->len);
 427                 ret = write_length(dd, rstart, rlen, cmd->addr);
 428                 break;
 429
 430         default:
 431                 dd_dev_err(dd, "%s: unexpected command %d\n",
 432                         __func__, cmd->type);
 433                 ret = -EINVAL;
 434                 break;
 435         }
 436
 437         release_hw_mutex(dd);
 438 done_asic:
 439         mutex_unlock(&eprom_mutex);
 440         return ret;
 441 }
 442
 443 /*
 444  * Initialize the EPROM handler.
 445  */
 446 int eprom_init(struct hfi1_devdata *dd)
 447 {
 448         int ret = 0;
 449
 450         /* only the discrete chip has an EPROM, nothing to do */
 451         if (dd->pcidev->device != PCI_DEVICE_ID_INTEL0)
 452                 return 0;
 453
 454         /* lock against other callers */
 455         mutex_lock(&eprom_mutex);
 456         if (eprom_available)    /* already initialized */
 457                 goto done_asic;
 458
 459         /*
 460          * Lock against the other HFI on another OS - the mutex above
 461          * would have caught anything in this driver.  It is OK if
 462          * both OSes reset the EPROM - as long as they don't do it at
 463          * the same time.
 464          */
 465         ret = acquire_hw_mutex(dd);
 466         if (ret) {
 467                 dd_dev_err(dd,
 468                         "%s: unable to acquire hw mutex, no EPROM support\n",
 469                         __func__);
 470                 goto done_asic;
 471         }
 472
 473         /* reset EPROM to be sure it is in a good state */
 474
 475         /* set reset */
 476         write_csr(dd, ASIC_EEP_CTL_STAT,
 477                                         ASIC_EEP_CTL_STAT_EP_RESET_SMASK);
 478         /* clear reset, set speed */
 479         write_csr(dd, ASIC_EEP_CTL_STAT,
 480                         EP_SPEED_FULL << ASIC_EEP_CTL_STAT_RATE_SPI_SHIFT);
 481
 482         /* wake the device with command "release powerdown NoID" */
 483         write_csr(dd, ASIC_EEP_ADDR_CMD, CMD_RELEASE_POWERDOWN_NOID);
 484
 485         eprom_available = 1;
 486         release_hw_mutex(dd);
 487 done_asic:
 488         mutex_unlock(&eprom_mutex);
 489         return ret;
 490 }