drivers/staging/rt3090/mac_pci.h

   1 /*
   2  *************************************************************************
   3  * Ralink Tech Inc.
   4  * 5F., No.36, Taiyuan St., Jhubei City,
   5  * Hsinchu County 302,
   6  * Taiwan, R.O.C.
   7  *
   8  * (c) Copyright 2002-2007, Ralink Technology, Inc.
   9  *
  10  * This program is free software; you can redistribute it and/or modify  *
  11  * it under the terms of the GNU General Public License as published by  *
  12  * the Free Software Foundation; either version 2 of the License, or     *
  13  * (at your option) any later version.                                   *
  14  *                                                                       *
  15  * This program is distributed in the hope that it will be useful,       *
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  18  * GNU General Public License for more details.                          *
  19  *                                                                       *
  20  * You should have received a copy of the GNU General Public License     *
  21  * along with this program; if not, write to the                         *
  22  * Free Software Foundation, Inc.,                                       *
  23  * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  24  *                                                                       *
  25  *************************************************************************
  26
  27     Module Name:
  28         mac_pci.h
  29
  30     Abstract:
  31
  32     Revision History:
  33     Who          When          What
  34     ---------    ----------    ----------------------------------------------
  35  */
  36
  37 #ifndef __MAC_PCI_H__
  38 #define __MAC_PCI_H__
  39
  40 #include "rtmp_type.h"
  41 #include "rtmp_mac.h"
  42 #include "rtmp_phy.h"
  43 #include "rtmp_iface.h"
  44 #include "rtmp_dot11.h"
  45
  46
  47 //
  48 // Device ID & Vendor ID related definitions,
  49 // NOTE: you should not add the new VendorID/DeviceID here unless you not sure it belongs to what chip.
  50 //
  51 #define NIC_PCI_VENDOR_ID               0x1814
  52 #define PCIBUS_INTEL_VENDOR     0x8086
  53
  54 #if !defined(PCI_CAP_ID_EXP)
  55 #define PCI_CAP_ID_EXP                      0x10
  56 #endif
  57 #if !defined(PCI_EXP_LNKCTL)
  58 #define PCI_EXP_LNKCTL                      0x10
  59 #endif
  60 #if !defined(PCI_CLASS_BRIDGE_PCI)
  61 #define PCI_CLASS_BRIDGE_PCI            0x0604
  62 #endif
  63
  64
  65
  66
  67
  68 #define TXINFO_SIZE                                             0
  69 #define RTMP_PKT_TAIL_PADDING                   0
  70 #define fRTMP_ADAPTER_NEED_STOP_TX      0
  71
  72 #define AUX_CTRL           0x10c
  73
  74 //
  75 // TX descriptor format, Tx     ring, Mgmt Ring
  76 //
  77 #ifdef RT_BIG_ENDIAN
  78 typedef struct  PACKED _TXD_STRUC {
  79         // Word 0
  80         UINT32          SDPtr0;
  81         // Word 1
  82         UINT32          DMADONE:1;
  83         UINT32          LastSec0:1;
  84         UINT32          SDLen0:14;
  85         UINT32          Burst:1;
  86         UINT32          LastSec1:1;
  87         UINT32          SDLen1:14;
  88         // Word 2
  89         UINT32          SDPtr1;
  90         // Word 3
  91         UINT32          ICO:1;
  92         UINT32          UCO:1;
  93         UINT32          TCO:1;
  94         UINT32          rsv:2;
  95         UINT32          QSEL:2; // select on-chip FIFO ID for 2nd-stage output scheduler.0:MGMT, 1:HCCA 2:EDCA
  96         UINT32          WIV:1;  // Wireless Info Valid. 1 if Driver already fill WI,  o if DMA needs to copy WI to correctposition
  97         UINT32          rsv2:24;
  98 }       TXD_STRUC, *PTXD_STRUC;
  99 #else
 100 typedef struct  PACKED _TXD_STRUC {
 101         // Word 0
 102         UINT32          SDPtr0;
 103         // Word 1
 104         UINT32          SDLen1:14;
 105         UINT32          LastSec1:1;
 106         UINT32          Burst:1;
 107         UINT32          SDLen0:14;
 108         UINT32          LastSec0:1;
 109         UINT32          DMADONE:1;
 110         //Word2
 111         UINT32          SDPtr1;
 112         //Word3
 113         UINT32          rsv2:24;
 114         UINT32          WIV:1;  // Wireless Info Valid. 1 if Driver already fill WI,  o if DMA needs to copy WI to correctposition
 115         UINT32          QSEL:2; // select on-chip FIFO ID for 2nd-stage output scheduler.0:MGMT, 1:HCCA 2:EDCA
 116         UINT32          rsv:2;
 117         UINT32          TCO:1;  //
 118         UINT32          UCO:1;  //
 119         UINT32          ICO:1;  //
 120 }       TXD_STRUC, *PTXD_STRUC;
 121 #endif
 122
 123
 124 //
 125 // Rx descriptor format, Rx Ring
 126 //
 127 #ifdef RT_BIG_ENDIAN
 128 typedef struct  PACKED _RXD_STRUC{
 129         // Word 0
 130         UINT32          SDP0;
 131         // Word 1
 132         UINT32          DDONE:1;
 133         UINT32          LS0:1;
 134         UINT32          SDL0:14;
 135         UINT32          Rsv:2;
 136         UINT32          SDL1:14;
 137         // Word 2
 138         UINT32          SDP1;
 139         // Word 3
 140         UINT32          Rsv1:13;
 141         UINT32          PlcpRssil:1;// To be moved
 142         UINT32          PlcpSignal:1;           // To be moved
 143         UINT32          Decrypted:1;    // this frame is being decrypted.
 144         UINT32          AMPDU:1;
 145         UINT32          L2PAD:1;
 146         UINT32          RSSI:1;
 147         UINT32          HTC:1;
 148         UINT32          AMSDU:1;                // rx with 802.3 header, not 802.11 header. obsolete.
 149         UINT32          CipherErr:2;        // 0: decryption okay, 1:ICV error, 2:MIC error, 3:KEY not valid
 150         UINT32          Crc:1;              // 1: CRC error
 151         UINT32          MyBss:1;        // 1: this frame belongs to the same BSSID
 152         UINT32          Bcast:1;            // 1: this is a broadcast frame
 153         UINT32          Mcast:1;            // 1: this is a multicast frame
 154         UINT32          U2M:1;              // 1: this RX frame is unicast to me
 155         UINT32          FRAG:1;
 156         UINT32          NULLDATA:1;
 157         UINT32          DATA:1;
 158         UINT32          BA:1;
 159
 160 }       RXD_STRUC, *PRXD_STRUC, RT28XX_RXD_STRUC, *PRT28XX_RXD_STRUC;
 161 #else
 162 typedef struct  PACKED _RXD_STRUC{
 163         // Word 0
 164         UINT32          SDP0;
 165         // Word 1
 166         UINT32          SDL1:14;
 167         UINT32          Rsv:2;
 168         UINT32          SDL0:14;
 169         UINT32          LS0:1;
 170         UINT32          DDONE:1;
 171         // Word 2
 172         UINT32          SDP1;
 173         // Word 3
 174         UINT32          BA:1;
 175         UINT32          DATA:1;
 176         UINT32          NULLDATA:1;
 177         UINT32          FRAG:1;
 178         UINT32          U2M:1;              // 1: this RX frame is unicast to me
 179         UINT32          Mcast:1;            // 1: this is a multicast frame
 180         UINT32          Bcast:1;            // 1: this is a broadcast frame
 181         UINT32          MyBss:1;        // 1: this frame belongs to the same BSSID
 182         UINT32          Crc:1;              // 1: CRC error
 183         UINT32          CipherErr:2;        // 0: decryption okay, 1:ICV error, 2:MIC error, 3:KEY not valid
 184         UINT32          AMSDU:1;                // rx with 802.3 header, not 802.11 header.
 185         UINT32          HTC:1;
 186         UINT32          RSSI:1;
 187         UINT32          L2PAD:1;
 188         UINT32          AMPDU:1;
 189         UINT32          Decrypted:1;    // this frame is being decrypted.
 190         UINT32          PlcpSignal:1;           // To be moved
 191         UINT32          PlcpRssil:1;// To be moved
 192         UINT32          Rsv1:13;
 193 }       RXD_STRUC, *PRXD_STRUC, RT28XX_RXD_STRUC, *PRT28XX_RXD_STRUC;
 194 #endif
 195
 196 #ifdef BIG_ENDIAN
 197 typedef union _TX_ATTENUATION_CTRL_STRUC
 198 {
 199         struct
 200         {
 201                 ULONG   Reserve1:20;
 202                 ULONG   PCIE_PHY_TX_ATTEN_EN:1;
 203                 ULONG   PCIE_PHY_TX_ATTEN_VALUE:3;
 204                 ULONG   Reserve2:7;
 205                 ULONG   RF_ISOLATION_ENABLE:1;
 206         } field;
 207
 208         ULONG   word;
 209 } TX_ATTENUATION_CTRL_STRUC, *PTX_ATTENUATION_CTRL_STRUC;
 210 #else
 211 typedef union _TX_ATTENUATION_CTRL_STRUC {
 212         struct
 213         {
 214                 ULONG   RF_ISOLATION_ENABLE:1;
 215                 ULONG   Reserve2:7;
 216                 ULONG   PCIE_PHY_TX_ATTEN_VALUE:3;
 217                 ULONG   PCIE_PHY_TX_ATTEN_EN:1;
 218                 ULONG   Reserve1:20;
 219         } field;
 220
 221         ULONG   word;
 222 } TX_ATTENUATION_CTRL_STRUC, *PTX_ATTENUATION_CTRL_STRUC;
 223 #endif
 224 /* ----------------- EEPROM Related MACRO ----------------- */
 225
 226 // 8051 firmware image for RT2860 - base address = 0x4000
 227 #define FIRMWARE_IMAGE_BASE     0x2000
 228 #define MAX_FIRMWARE_IMAGE_SIZE 0x2000    // 8kbyte
 229
 230
 231 /* ----------------- Frimware Related MACRO ----------------- */
 232 #define RTMP_WRITE_FIRMWARE(_pAd, _pFwImage, _FwLen)                    \
 233         do{                                                             \
 234                 ULONG   _i, _firm;                                      \
 235                 RTMP_IO_WRITE32(_pAd, PBF_SYS_CTRL, 0x10000);           \
 236                                                                         \
 237                 for(_i=0; _i<_FwLen; _i+=4)                             \
 238                 {                                                       \
 239                         _firm = _pFwImage[_i] +                         \
 240                            (_pFwImage[_i+3] << 24) +                    \
 241                            (_pFwImage[_i+2] << 16) +                    \
 242                            (_pFwImage[_i+1] << 8);                      \
 243                         RTMP_IO_WRITE32(_pAd, FIRMWARE_IMAGE_BASE + _i, _firm); \
 244                 }                                                       \
 245                 RTMP_IO_WRITE32(_pAd, PBF_SYS_CTRL, 0x00000);           \
 246                 RTMP_IO_WRITE32(_pAd, PBF_SYS_CTRL, 0x00001);           \
 247                                                                         \
 248                 /* initialize BBP R/W access agent */                   \
 249                 RTMP_IO_WRITE32(_pAd, H2M_BBP_AGENT, 0);                \
 250                 RTMP_IO_WRITE32(_pAd, H2M_MAILBOX_CSR, 0);              \
 251         }while(0)
 252
 253
 254 /* ----------------- TX Related MACRO ----------------- */
 255 #define RTMP_START_DEQUEUE(pAd, QueIdx, irqFlags)               do{}while(0)
 256 #define RTMP_STOP_DEQUEUE(pAd, QueIdx, irqFlags)                do{}while(0)
 257
 258
 259 #define RTMP_HAS_ENOUGH_FREE_DESC(pAd, pTxBlk, freeNum, pPacket) \
 260                 ((freeNum) >= (ULONG)(pTxBlk->TotalFragNum + RTMP_GET_PACKET_FRAGMENTS(pPacket) + 3)) /* rough estimate we will use 3 more descriptor. */
 261 #define RTMP_RELEASE_DESC_RESOURCE(pAd, QueIdx) \
 262                 do{}while(0)
 263
 264 #define NEED_QUEUE_BACK_FOR_AGG(pAd, QueIdx, freeNum, _TxFrameType) \
 265                 (((freeNum != (TX_RING_SIZE-1)) && (pAd->TxSwQueue[QueIdx].Number == 0)) || (freeNum<3))
 266                 //(((freeNum) != (TX_RING_SIZE-1)) && (pAd->TxSwQueue[QueIdx].Number == 1 /*0*/))
 267
 268
 269 #define HAL_KickOutMgmtTx(_pAd, _QueIdx, _pPacket, _pSrcBufVA, _SrcBufLen)      \
 270                         RtmpPCIMgmtKickOut(_pAd, _QueIdx, _pPacket, _pSrcBufVA, _SrcBufLen)
 271
 272 #define HAL_WriteSubTxResource(pAd, pTxBlk, bIsLast, pFreeNumber)       \
 273                 /* RtmpPCI_WriteSubTxResource(pAd, pTxBlk, bIsLast, pFreeNumber)*/
 274
 275 #define HAL_WriteTxResource(pAd, pTxBlk,bIsLast, pFreeNumber)   \
 276                         RtmpPCI_WriteSingleTxResource(pAd, pTxBlk, bIsLast, pFreeNumber)
 277
 278 #define HAL_WriteFragTxResource(pAd, pTxBlk, fragNum, pFreeNumber) \
 279                         RtmpPCI_WriteFragTxResource(pAd, pTxBlk, fragNum, pFreeNumber)
 280
 281 #define HAL_WriteMultiTxResource(pAd, pTxBlk,frameNum, pFreeNumber)     \
 282                         RtmpPCI_WriteMultiTxResource(pAd, pTxBlk, frameNum, pFreeNumber)
 283
 284 #define HAL_FinalWriteTxResource(_pAd, _pTxBlk, _TotalMPDUSize, _FirstTxIdx)    \
 285                         RtmpPCI_FinalWriteTxResource(_pAd, _pTxBlk, _TotalMPDUSize, _FirstTxIdx)
 286
 287 #define HAL_LastTxIdx(_pAd, _QueIdx,_LastTxIdx) \
 288                         /*RtmpPCIDataLastTxIdx(_pAd, _QueIdx,_LastTxIdx)*/
 289
 290 #define HAL_KickOutTx(_pAd, _pTxBlk, _QueIdx)   \
 291                         RTMP_IO_WRITE32((_pAd), TX_CTX_IDX0+((_QueIdx)*0x10), (_pAd)->TxRing[(_QueIdx)].TxCpuIdx)
 292 /*                      RtmpPCIDataKickOut(_pAd, _pTxBlk, _QueIdx)*/
 293
 294 #define HAL_KickOutNullFrameTx(_pAd, _QueIdx, _pNullFrame, _frameLen)   \
 295                         MiniportMMRequest(_pAd, _QueIdx, _pNullFrame, _frameLen)
 296
 297 #define GET_TXRING_FREENO(_pAd, _QueIdx) \
 298         (_pAd->TxRing[_QueIdx].TxSwFreeIdx > _pAd->TxRing[_QueIdx].TxCpuIdx)    ? \
 299                         (_pAd->TxRing[_QueIdx].TxSwFreeIdx - _pAd->TxRing[_QueIdx].TxCpuIdx - 1) \
 300                          :      \
 301                         (_pAd->TxRing[_QueIdx].TxSwFreeIdx + TX_RING_SIZE - _pAd->TxRing[_QueIdx].TxCpuIdx - 1);
 302
 303
 304 #define GET_MGMTRING_FREENO(_pAd) \
 305         (_pAd->MgmtRing.TxSwFreeIdx > _pAd->MgmtRing.TxCpuIdx)  ? \
 306                         (_pAd->MgmtRing.TxSwFreeIdx - _pAd->MgmtRing.TxCpuIdx - 1) \
 307                          :      \
 308                         (_pAd->MgmtRing.TxSwFreeIdx + MGMT_RING_SIZE - _pAd->MgmtRing.TxCpuIdx - 1);
 309
 310
 311 /* ----------------- RX Related MACRO ----------------- */
 312
 313
 314 /* ----------------- ASIC Related MACRO ----------------- */
 315 // reset MAC of a station entry to 0x000000000000
 316 #define RTMP_STA_ENTRY_MAC_RESET(pAd, Wcid)     \
 317         AsicDelWcidTab(pAd, Wcid);
 318
 319 // add this entry into ASIC RX WCID search table
 320 #define RTMP_STA_ENTRY_ADD(pAd, pEntry)         \
 321         AsicUpdateRxWCIDTable(pAd, pEntry->Aid, pEntry->Addr);
 322
 323 // add by johnli, fix "in_interrupt" error when call "MacTableDeleteEntry" in Rx tasklet
 324 // Set MAC register value according operation mode
 325 #define RTMP_UPDATE_PROTECT(pAd)        \
 326         AsicUpdateProtect(pAd, 0, (ALLN_SETPROTECT), TRUE, 0);
 327 // end johnli
 328
 329 // remove Pair-wise key material from ASIC
 330 #define RTMP_STA_ENTRY_KEY_DEL(pAd, BssIdx, Wcid)       \
 331         AsicRemovePairwiseKeyEntry(pAd, BssIdx, (UCHAR)Wcid);
 332
 333 // add Client security information into ASIC WCID table and IVEIV table
 334 #define RTMP_STA_SECURITY_INFO_ADD(pAd, apidx, KeyID, pEntry)           \
 335         RTMPAddWcidAttributeEntry(pAd, apidx, KeyID,                    \
 336                                                         pAd->SharedKey[apidx][KeyID].CipherAlg, pEntry);
 337
 338 #define RTMP_SECURITY_KEY_ADD(pAd, apidx, KeyID, pEntry)                \
 339         {       /* update pairwise key information to ASIC Shared Key Table */  \
 340                 AsicAddSharedKeyEntry(pAd, apidx, KeyID,                                        \
 341                                                   pAd->SharedKey[apidx][KeyID].CipherAlg,               \
 342                                                   pAd->SharedKey[apidx][KeyID].Key,                             \
 343                                                   pAd->SharedKey[apidx][KeyID].TxMic,                   \
 344                                                   pAd->SharedKey[apidx][KeyID].RxMic);                  \
 345                 /* update ASIC WCID attribute table and IVEIV table */                  \
 346                 RTMPAddWcidAttributeEntry(pAd, apidx, KeyID,                                    \
 347                                                   pAd->SharedKey[apidx][KeyID].CipherAlg,               \
 348                                                   pEntry); }
 349
 350
 351 // Insert the BA bitmap to ASIC for the Wcid entry
 352 #define RTMP_ADD_BA_SESSION_TO_ASIC(_pAd, _Aid, _TID)   \
 353                 do{                                     \
 354                         UINT32  _Value = 0, _Offset;                                    \
 355                         _Offset = MAC_WCID_BASE + (_Aid) * HW_WCID_ENTRY_SIZE + 4;      \
 356                         RTMP_IO_READ32((_pAd), _Offset, &_Value);\
 357                         _Value |= (0x10000<<(_TID));    \
 358                         RTMP_IO_WRITE32((_pAd), _Offset, _Value);\
 359                 }while(0)
 360
 361
 362 // Remove the BA bitmap from ASIC for the Wcid entry
 363 //              bitmap field starts at 0x10000 in ASIC WCID table
 364 #define RTMP_DEL_BA_SESSION_FROM_ASIC(_pAd, _Wcid, _TID)                                \
 365                 do{                                                             \
 366                         UINT32  _Value = 0, _Offset;                            \
 367                         _Offset = MAC_WCID_BASE + (_Wcid) * HW_WCID_ENTRY_SIZE + 4;     \
 368                         RTMP_IO_READ32((_pAd), _Offset, &_Value);                       \
 369                         _Value &= (~(0x10000 << (_TID)));                               \
 370                         RTMP_IO_WRITE32((_pAd), _Offset, _Value);                       \
 371                 }while(0)
 372
 373
 374 /* ----------------- Interface Related MACRO ----------------- */
 375
 376 //
 377 // Enable & Disable NIC interrupt via writing interrupt mask register
 378 // Since it use ADAPTER structure, it have to be put after structure definition.
 379 //
 380 #define RTMP_ASIC_INTERRUPT_DISABLE(_pAd)               \
 381         do{                     \
 382                 RTMP_IO_WRITE32((_pAd), INT_MASK_CSR, 0x0);     /* 0: disable */        \
 383                 RTMP_CLEAR_FLAG((_pAd), fRTMP_ADAPTER_INTERRUPT_ACTIVE);                \
 384         }while(0)
 385
 386 #define RTMP_ASIC_INTERRUPT_ENABLE(_pAd)\
 387         do{                             \
 388                 RTMP_IO_WRITE32((_pAd), INT_MASK_CSR, (_pAd)->int_enable_reg /*DELAYINTMASK*/);     /* 1:enable */      \
 389                 RTMP_SET_FLAG((_pAd), fRTMP_ADAPTER_INTERRUPT_ACTIVE);  \
 390         }while(0)
 391
 392
 393 #define RTMP_IRQ_INIT(pAd)      \
 394         {       pAd->int_enable_reg = ((DELAYINTMASK) |         \
 395                                         (RxINT|TxDataInt|TxMgmtInt)) & ~(0x03); \
 396                 pAd->int_disable_mask = 0;                                              \
 397                 pAd->int_pending = 0; }
 398
 399 #define RTMP_IRQ_ENABLE(pAd)                                    \
 400         {       /* clear garbage ints */                        \
 401                 RTMP_IO_WRITE32(pAd, INT_SOURCE_CSR, 0xffffffff);\
 402                 RTMP_ASIC_INTERRUPT_ENABLE(pAd); }
 403
 404
 405 /* ----------------- MLME Related MACRO ----------------- */
 406 #define RTMP_MLME_HANDLER(pAd)                  MlmeHandler(pAd)
 407
 408 #define RTMP_MLME_PRE_SANITY_CHECK(pAd)
 409
 410 #define RTMP_MLME_STA_QUICK_RSP_WAKE_UP(pAd)    \
 411                 RTMPSetTimer(&pAd->StaCfg.StaQuickResponeForRateUpTimer, 100);
 412
 413 #define RTMP_MLME_RESET_STATE_MACHINE(pAd)      \
 414                 MlmeRestartStateMachine(pAd)
 415
 416 #define RTMP_HANDLE_COUNTER_MEASURE(_pAd, _pEntry)\
 417                 HandleCounterMeasure(_pAd, _pEntry)
 418
 419 /* ----------------- Power Save Related MACRO ----------------- */
 420 #define RTMP_PS_POLL_ENQUEUE(pAd)                               EnqueuePsPoll(pAd)
 421
 422
 423 // For RTMPPCIePowerLinkCtrlRestore () function
 424 #define RESTORE_HALT            1
 425 #define RESTORE_WAKEUP          2
 426 #define RESTORE_CLOSE           3
 427
 428 #define PowerSafeCID            1
 429 #define PowerRadioOffCID        2
 430 #define PowerWakeCID            3
 431 #define CID0MASK                0x000000ff
 432 #define CID1MASK                0x0000ff00
 433 #define CID2MASK                0x00ff0000
 434 #define CID3MASK                0xff000000
 435
 436
 437 #ifdef CONFIG_STA_SUPPORT
 438 #define RTMP_STA_FORCE_WAKEUP(pAd, bFromTx) \
 439     RT28xxPciStaAsicForceWakeup(pAd, bFromTx);
 440
 441 #define RTMP_STA_SLEEP_THEN_AUTO_WAKEUP(pAd, TbttNumToNextWakeUp) \
 442     RT28xxPciStaAsicSleepThenAutoWakeup(pAd, TbttNumToNextWakeUp);
 443
 444 #define RTMP_SET_PSM_BIT(_pAd, _val) \
 445         MlmeSetPsmBit(_pAd, _val);
 446 #endif // CONFIG_STA_SUPPORT //
 447
 448 #define RTMP_MLME_RADIO_ON(pAd) \
 449     RT28xxPciMlmeRadioOn(pAd);
 450
 451 #define RTMP_MLME_RADIO_OFF(pAd) \
 452     RT28xxPciMlmeRadioOFF(pAd);
 453
 454 #endif //__MAC_PCI_H__ //