1 /******************************************************************************
3 * Copyright(c) 2009-2010 Realtek Corporation.
5 * Tmis program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * Tmis program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * Tme full GNU General Public License is included in this distribution in the
15 * file called LICENSE.
17 * Contact Information:
18 * wlanfae <wlanfae@realtek.com>
19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20 * Hsinchu 300, Taiwan.
22 * Larry Finger <Larry.Finger@lwfinger.net>
24 *****************************************************************************/
26 #ifndef __RTL_DEBUG_H__
27 #define __RTL_DEBUG_H__
29 /*--------------------------------------------------------------
31 --------------------------------------------------------------*/
34 *For example, Tx/Rx/IO locked up,
35 *memory access violation,
36 *resource allocation failed,
37 *unexpected HW behavior, HW BUG
43 *Abnormal, rare, or unexpeted cases.
44 *For example, Packet/IO Ctl canceled,
45 *device suprisely unremoved and so on.
50 *Normal case driver developer should
51 *open, we can see link status like
52 *assoc/AddBA/DHCP/adapter start and
53 *so on basic and useful infromations.
58 *Normal case with useful information
59 *about current SW or HW state.
60 *For example, Tx/Rx descriptor to fill,
61 *Tx/Rx descriptor completed status,
62 *SW protocol state change, dynamic
63 *mechanism state change and so on.
68 *Normal case with detail execution
73 /*--------------------------------------------------------------
74 Define the rt_trace components
75 --------------------------------------------------------------*/
76 #define COMP_ERR BIT(0)
77 #define COMP_FW BIT(1)
78 #define COMP_INIT BIT(2) /*For init/deinit */
79 #define COMP_RECV BIT(3) /*For Rx. */
80 #define COMP_SEND BIT(4) /*For Tx. */
81 #define COMP_MLME BIT(5) /*For MLME. */
82 #define COMP_SCAN BIT(6) /*For Scan. */
83 #define COMP_INTR BIT(7) /*For interrupt Related. */
84 #define COMP_LED BIT(8) /*For LED. */
85 #define COMP_SEC BIT(9) /*For sec. */
86 #define COMP_BEACON BIT(10) /*For beacon. */
87 #define COMP_RATE BIT(11) /*For rate. */
88 #define COMP_RXDESC BIT(12) /*For rx desc. */
89 #define COMP_DIG BIT(13) /*For DIG */
90 #define COMP_TXAGC BIT(14) /*For Tx power */
91 #define COMP_HIPWR BIT(15) /*For High Power Mechanism */
92 #define COMP_POWER BIT(16) /*For lps/ips/aspm. */
93 #define COMP_POWER_TRACKING BIT(17) /*For TX POWER TRACKING */
94 #define COMP_BB_POWERSAVING BIT(18)
95 #define COMP_SWAS BIT(19) /*For SW Antenna Switch */
96 #define COMP_RF BIT(20) /*For RF. */
97 #define COMP_TURBO BIT(21) /*For EDCA TURBO. */
98 #define COMP_RATR BIT(22)
99 #define COMP_CMD BIT(23)
100 #define COMP_EFUSE BIT(24)
101 #define COMP_QOS BIT(25)
102 #define COMP_MAC80211 BIT(26)
103 #define COMP_REGD BIT(27)
104 #define COMP_CHAN BIT(28)
105 #define COMP_EASY_CONCURRENT BIT(29)
106 #define COMP_BT_COEXIST BIT(30)
107 #define COMP_IQK BIT(31)
109 /*--------------------------------------------------------------
110 Define the rt_print components
111 --------------------------------------------------------------*/
112 /* Define EEPROM and EFUSE check module bit*/
113 #define EEPROM_W BIT(0)
114 #define EFUSE_PG BIT(1)
115 #define EFUSE_READ_ALL BIT(2)
117 /* Define init check for module bit*/
118 #define INIT_EEPROM BIT(0)
119 #define INIT_TxPower BIT(1)
120 #define INIT_IQK BIT(2)
121 #define INIT_RF BIT(3)
123 /* Define PHY-BB/RF/MAC check module bit */
124 #define PHY_BBR BIT(0)
125 #define PHY_BBW BIT(1)
126 #define PHY_RFR BIT(2)
127 #define PHY_RFW BIT(3)
128 #define PHY_MACR BIT(4)
129 #define PHY_MACW BIT(5)
130 #define PHY_ALLR BIT(6)
131 #define PHY_ALLW BIT(7)
132 #define PHY_TXPWR BIT(8)
133 #define PHY_PWRDIFF BIT(9)
135 /* Define Dynamic Mechanism check module bit --> FDM */
136 #define WA_IOT BIT(0)
137 #define DM_PWDB BIT(1)
138 #define DM_MONITOR BIT(2)
139 #define DM_DIG BIT(3)
140 #define DM_EDCA_TURBO BIT(4)
165 #define RT_ASSERT(_exp , fmt) \
168 pr_debug("%s:%s(): ", KBUILD_MODNAME, \
174 #define RT_TRACE(comp, level, fmt)\
176 if (unlikely(((comp) & rtlpriv->dbg.global_debugcomponents) && \
177 ((level) <= rtlpriv->dbg.global_debuglevel))) {\
178 pr_debug("%s-%d:%s():<%lx> ", \
180 rtlpriv->rtlhal.interfaceindex, __func__, \
186 #define RTPRINT(rtlpriv, dbgtype, dbgflag, fmt, ...) \
188 if (unlikely(rtlpriv->dbg.dbgp_type[dbgtype] & dbgflag)) { \
189 pr_debug(KBUILD_MODNAME ": " fmt, \
194 #define RT_PRINT_DATA(rtlpriv, _comp, _level, _titlestring, _hexdata, \
197 if (unlikely(((_comp) & rtlpriv->dbg.global_debugcomponents) &&\
198 (_level <= rtlpriv->dbg.global_debuglevel))) { \
200 u8 *ptr = (u8 *)_hexdata; \
201 pr_debug("%s: ", KBUILD_MODNAME); \
202 pr_cont("In process \"%s\" (pid %i):", \
205 pr_cont(_titlestring); \
206 for (__i = 0; __i < (int)_hexdatalen; __i++) { \
207 pr_cont("%02X%s", ptr[__i], (((__i + 1) % 4) \
209 if (((__i + 1) % 16) == 0) \
216 void rtl92e_dbgp_flag_init(struct ieee80211_hw
*hw
);
217 void rtl_proc_add_one(struct ieee80211_hw
*hw
);
218 void rtl_proc_remove_one(struct ieee80211_hw
*hw
);
219 void rtl_proc_add_topdir(void);
220 void rtl_proc_remove_topdir(void);
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