Merge tag 'scsi-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb...
[deliverable/linux.git] / drivers / staging / rtl8192ee / efuse.h
1 /******************************************************************************
2 *
3 * Copyright(c) 2009-2010 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * The full GNU General Public License is included in this distribution in the
15 * file called LICENSE.
16 *
17 * Contact Information:
18 * wlanfae <wlanfae@realtek.com>
19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20 * Hsinchu 300, Taiwan.
21 *
22 * Larry Finger <Larry.Finger@lwfinger.net>
23 *
24 *****************************************************************************/
25
26 #ifndef __RTL_EFUSE_H_
27 #define __RTL_EFUSE_H_
28
29 #define EFUSE_IC_ID_OFFSET 506
30
31 /*
32 #define EFUSE_REAL_CONTENT_LEN 512
33 #define EFUSE_MAP_LEN 128
34 #define EFUSE_MAX_SECTION 16
35 #define EFUSE_MAX_WORD_UNIT 4
36 #define EFUSE_IC_ID_OFFSET 506
37 */
38
39 #define EFUSE_MAX_WORD_UNIT 4
40
41 #define EFUSE_INIT_MAP 0
42 #define EFUSE_MODIFY_MAP 1
43
44 #define PG_STATE_HEADER 0x01
45 #define PG_STATE_WORD_0 0x02
46 #define PG_STATE_WORD_1 0x04
47 #define PG_STATE_WORD_2 0x08
48 #define PG_STATE_WORD_3 0x10
49 #define PG_STATE_DATA 0x20
50
51 #define PG_SWBYTE_H 0x01
52 #define PG_SWBYTE_L 0x02
53
54 #define _POWERON_DELAY_
55 #define _PRE_EXECUTE_READ_CMD_
56
57 #define EFUSE_REPEAT_THRESHOLD_ 3
58 #define EFUSE_ERROE_HANDLE 1
59
60 struct efuse_map {
61 u8 offset;
62 u8 word_start;
63 u8 byte_start;
64 u8 byte_cnts;
65 };
66
67 struct pgpkt_struct {
68 u8 offset;
69 u8 word_en;
70 u8 data[8];
71 };
72
73 enum efuse_data_item {
74 EFUSE_CHIP_ID = 0,
75 EFUSE_LDO_SETTING,
76 EFUSE_CLK_SETTING,
77 EFUSE_SDIO_SETTING,
78 EFUSE_CCCR,
79 EFUSE_SDIO_MODE,
80 EFUSE_OCR,
81 EFUSE_F0CIS,
82 EFUSE_F1CIS,
83 EFUSE_MAC_ADDR,
84 EFUSE_EEPROM_VER,
85 EFUSE_CHAN_PLAN,
86 EFUSE_TXPW_TAB
87 };
88
89 enum {
90 VOLTAGE_V25 = 0x03,
91 LDOE25_SHIFT = 28,
92 };
93
94 struct efuse_priv {
95 u8 id[2];
96 u8 ldo_setting[2];
97 u8 clk_setting[2];
98 u8 cccr;
99 u8 sdio_mode;
100 u8 ocr[3];
101 u8 cis0[17];
102 u8 cis1[48];
103 u8 mac_addr[6];
104 u8 eeprom_verno;
105 u8 channel_plan;
106 u8 tx_power_b[14];
107 u8 tx_power_g[14];
108 };
109
110 void read92e_efuse_byte(struct ieee80211_hw *hw, u16 _offset, u8 *pbuf);
111 void efuse92e_initialize(struct ieee80211_hw *hw);
112 u8 stg_efuse_read_1byte(struct ieee80211_hw *hw, u16 address);
113 int stg_efuse_one_byte_read(struct ieee80211_hw *hw, u16 addr, u8 *data);
114 void efuse92e_write_1byte(struct ieee80211_hw *hw, u16 address, u8 value);
115 void read92e_efuse(struct ieee80211_hw *hw, u16 _offset,
116 u16 _size_byte, u8 *pbuf);
117 void efuse92e_shadow_read(struct ieee80211_hw *hw, u8 type,
118 u16 offset, u32 *value);
119 void efuse92e_shadow_write(struct ieee80211_hw *hw, u8 type,
120 u16 offset, u32 value);
121 bool efuse92e_shadow_update(struct ieee80211_hw *hw);
122 bool efuse92e_shadow_update_chk(struct ieee80211_hw *hw);
123 void stg_rtl_efuse92e_shadow_map_update(struct ieee80211_hw *hw);
124 void efuse92e_force_write_vendor_Id(struct ieee80211_hw *hw);
125 void efuse92e_re_pg_section(struct ieee80211_hw *hw, u8 section_idx);
126
127 #endif
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