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Staging: slicoss: removes unnecessary blank lines in slicoss.c
[deliverable/linux.git] / drivers / staging / slicoss / slicoss.c
1 /**************************************************************************
2 *
3 * Copyright 2000-2006 Alacritech, Inc. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above
12 * copyright notice, this list of conditions and the following
13 * disclaimer in the documentation and/or other materials provided
14 * with the distribution.
15 *
16 * Alternatively, this software may be distributed under the terms of the
17 * GNU General Public License ("GPL") version 2 as published by the Free
18 * Software Foundation.
19 *
20 * THIS SOFTWARE IS PROVIDED BY ALACRITECH, INC. ``AS IS'' AND ANY
21 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ALACRITECH, INC. OR
24 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
27 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
28 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
30 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 * The views and conclusions contained in the software and documentation
34 * are those of the authors and should not be interpreted as representing
35 * official policies, either expressed or implied, of Alacritech, Inc.
36 *
37 **************************************************************************/
38
39 /*
40 * FILENAME: slicoss.c
41 *
42 * The SLICOSS driver for Alacritech's IS-NIC products.
43 *
44 * This driver is supposed to support:
45 *
46 * Mojave cards (single port PCI Gigabit) both copper and fiber
47 * Oasis cards (single and dual port PCI-x Gigabit) copper and fiber
48 * Kalahari cards (dual and quad port PCI-e Gigabit) copper and fiber
49 *
50 * The driver was actually tested on Oasis and Kalahari cards.
51 *
52 *
53 * NOTE: This is the standard, non-accelerated version of Alacritech's
54 * IS-NIC driver.
55 */
56
57 #define KLUDGE_FOR_4GB_BOUNDARY 1
58 #define DEBUG_MICROCODE 1
59 #define DBG 1
60 #define SLIC_INTERRUPT_PROCESS_LIMIT 1
61 #define SLIC_OFFLOAD_IP_CHECKSUM 1
62 #define STATS_TIMER_INTERVAL 2
63 #define PING_TIMER_INTERVAL 1
64 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
65
66 #include <linux/kernel.h>
67 #include <linux/string.h>
68 #include <linux/errno.h>
69 #include <linux/ioport.h>
70 #include <linux/slab.h>
71 #include <linux/interrupt.h>
72 #include <linux/timer.h>
73 #include <linux/pci.h>
74 #include <linux/spinlock.h>
75 #include <linux/init.h>
76 #include <linux/bitops.h>
77 #include <linux/io.h>
78 #include <linux/netdevice.h>
79 #include <linux/crc32.h>
80 #include <linux/etherdevice.h>
81 #include <linux/skbuff.h>
82 #include <linux/delay.h>
83 #include <linux/seq_file.h>
84 #include <linux/kthread.h>
85 #include <linux/module.h>
86
87 #include <linux/firmware.h>
88 #include <linux/types.h>
89 #include <linux/dma-mapping.h>
90 #include <linux/mii.h>
91 #include <linux/if_vlan.h>
92 #include <asm/unaligned.h>
93
94 #include <linux/ethtool.h>
95 #include <linux/uaccess.h>
96 #include "slichw.h"
97 #include "slic.h"
98
99 static uint slic_first_init = 1;
100 static char *slic_banner = "Alacritech SLIC Technology(tm) Server and Storage Accelerator (Non-Accelerated)";
101
102 static char *slic_proc_version = "2.0.351 2006/07/14 12:26:00";
103
104 static struct base_driver slic_global = { {}, 0, 0, 0, 1, NULL, NULL };
105 #define DEFAULT_INTAGG_DELAY 100
106 static unsigned int rcv_count;
107
108 #define DRV_NAME "slicoss"
109 #define DRV_VERSION "2.0.1"
110 #define DRV_AUTHOR "Alacritech, Inc. Engineering"
111 #define DRV_DESCRIPTION "Alacritech SLIC Techonology(tm) "\
112 "Non-Accelerated Driver"
113 #define DRV_COPYRIGHT "Copyright 2000-2006 Alacritech, Inc. "\
114 "All rights reserved."
115 #define PFX DRV_NAME " "
116
117 MODULE_AUTHOR(DRV_AUTHOR);
118 MODULE_DESCRIPTION(DRV_DESCRIPTION);
119 MODULE_LICENSE("Dual BSD/GPL");
120
121 static const struct pci_device_id slic_pci_tbl[] = {
122 { PCI_DEVICE(PCI_VENDOR_ID_ALACRITECH, SLIC_1GB_DEVICE_ID) },
123 { PCI_DEVICE(PCI_VENDOR_ID_ALACRITECH, SLIC_2GB_DEVICE_ID) },
124 { 0 }
125 };
126
127 static struct ethtool_ops slic_ethtool_ops;
128
129 MODULE_DEVICE_TABLE(pci, slic_pci_tbl);
130
131 static inline void slic_reg32_write(void __iomem *reg, u32 value, bool flush)
132 {
133 writel(value, reg);
134 if (flush)
135 mb();
136 }
137
138 static inline void slic_reg64_write(struct adapter *adapter, void __iomem *reg,
139 u32 value, void __iomem *regh, u32 paddrh,
140 bool flush)
141 {
142 unsigned long flags;
143
144 spin_lock_irqsave(&adapter->bit64reglock, flags);
145 writel(paddrh, regh);
146 writel(value, reg);
147 if (flush)
148 mb();
149 spin_unlock_irqrestore(&adapter->bit64reglock, flags);
150 }
151
152 static void slic_mcast_set_bit(struct adapter *adapter, char *address)
153 {
154 unsigned char crcpoly;
155
156 /* Get the CRC polynomial for the mac address */
157 /*
158 * we use bits 1-8 (lsb), bitwise reversed,
159 * msb (= lsb bit 0 before bitrev) is automatically discarded
160 */
161 crcpoly = ether_crc(ETH_ALEN, address) >> 23;
162
163 /*
164 * We only have space on the SLIC for 64 entries. Lop
165 * off the top two bits. (2^6 = 64)
166 */
167 crcpoly &= 0x3F;
168
169 /* OR in the new bit into our 64 bit mask. */
170 adapter->mcastmask |= (u64)1 << crcpoly;
171 }
172
173 static void slic_mcast_set_mask(struct adapter *adapter)
174 {
175 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
176
177 if (adapter->macopts & (MAC_ALLMCAST | MAC_PROMISC)) {
178 /*
179 * Turn on all multicast addresses. We have to do this for
180 * promiscuous mode as well as ALLMCAST mode. It saves the
181 * Microcode from having to keep state about the MAC
182 * configuration.
183 */
184 slic_reg32_write(&slic_regs->slic_mcastlow, 0xFFFFFFFF, FLUSH);
185 slic_reg32_write(&slic_regs->slic_mcasthigh, 0xFFFFFFFF,
186 FLUSH);
187 } else {
188 /*
189 * Commit our multicast mast to the SLIC by writing to the
190 * multicast address mask registers
191 */
192 slic_reg32_write(&slic_regs->slic_mcastlow,
193 (u32)(adapter->mcastmask & 0xFFFFFFFF), FLUSH);
194 slic_reg32_write(&slic_regs->slic_mcasthigh,
195 (u32)((adapter->mcastmask >> 32) & 0xFFFFFFFF), FLUSH);
196 }
197 }
198
199 static void slic_timer_ping(ulong dev)
200 {
201 struct adapter *adapter;
202 struct sliccard *card;
203
204 adapter = netdev_priv((struct net_device *)dev);
205 card = adapter->card;
206
207 adapter->pingtimer.expires = jiffies + (PING_TIMER_INTERVAL * HZ);
208 add_timer(&adapter->pingtimer);
209 }
210
211 static void slic_unmap_mmio_space(struct adapter *adapter)
212 {
213 if (adapter->slic_regs)
214 iounmap(adapter->slic_regs);
215 adapter->slic_regs = NULL;
216 }
217
218 /*
219 * slic_link_config
220 *
221 * Write phy control to configure link duplex/speed
222 *
223 */
224 static void slic_link_config(struct adapter *adapter,
225 u32 linkspeed, u32 linkduplex)
226 {
227 u32 __iomem *wphy;
228 u32 speed;
229 u32 duplex;
230 u32 phy_config;
231 u32 phy_advreg;
232 u32 phy_gctlreg;
233
234 if (adapter->state != ADAPT_UP)
235 return;
236
237 if (linkspeed > LINK_1000MB)
238 linkspeed = LINK_AUTOSPEED;
239 if (linkduplex > LINK_AUTOD)
240 linkduplex = LINK_AUTOD;
241
242 wphy = &adapter->slic_regs->slic_wphy;
243
244 if ((linkspeed == LINK_AUTOSPEED) || (linkspeed == LINK_1000MB)) {
245 if (adapter->flags & ADAPT_FLAGS_FIBERMEDIA) {
246 /*
247 * We've got a fiber gigabit interface, and register
248 * 4 is different in fiber mode than in copper mode
249 */
250
251 /* advertise FD only @1000 Mb */
252 phy_advreg = (MIICR_REG_4 | (PAR_ADV1000XFD));
253 /* enable PAUSE frames */
254 phy_advreg |= PAR_ASYMPAUSE_FIBER;
255 slic_reg32_write(wphy, phy_advreg, FLUSH);
256
257 if (linkspeed == LINK_AUTOSPEED) {
258 /* reset phy, enable auto-neg */
259 phy_config =
260 (MIICR_REG_PCR |
261 (PCR_RESET | PCR_AUTONEG |
262 PCR_AUTONEG_RST));
263 slic_reg32_write(wphy, phy_config, FLUSH);
264 } else { /* forced 1000 Mb FD*/
265 /*
266 * power down phy to break link
267 * this may not work)
268 */
269 phy_config = (MIICR_REG_PCR | PCR_POWERDOWN);
270 slic_reg32_write(wphy, phy_config, FLUSH);
271 /*
272 * wait, Marvell says 1 sec,
273 * try to get away with 10 ms
274 */
275 mdelay(10);
276
277 /*
278 * disable auto-neg, set speed/duplex,
279 * soft reset phy, powerup
280 */
281 phy_config =
282 (MIICR_REG_PCR |
283 (PCR_RESET | PCR_SPEED_1000 |
284 PCR_DUPLEX_FULL));
285 slic_reg32_write(wphy, phy_config, FLUSH);
286 }
287 } else { /* copper gigabit */
288
289 /*
290 * Auto-Negotiate or 1000 Mb must be auto negotiated
291 * We've got a copper gigabit interface, and
292 * register 4 is different in copper mode than
293 * in fiber mode
294 */
295 if (linkspeed == LINK_AUTOSPEED) {
296 /* advertise 10/100 Mb modes */
297 phy_advreg =
298 (MIICR_REG_4 |
299 (PAR_ADV100FD | PAR_ADV100HD | PAR_ADV10FD
300 | PAR_ADV10HD));
301 } else {
302 /*
303 * linkspeed == LINK_1000MB -
304 * don't advertise 10/100 Mb modes
305 */
306 phy_advreg = MIICR_REG_4;
307 }
308 /* enable PAUSE frames */
309 phy_advreg |= PAR_ASYMPAUSE;
310 /* required by the Cicada PHY */
311 phy_advreg |= PAR_802_3;
312 slic_reg32_write(wphy, phy_advreg, FLUSH);
313 /* advertise FD only @1000 Mb */
314 phy_gctlreg = (MIICR_REG_9 | (PGC_ADV1000FD));
315 slic_reg32_write(wphy, phy_gctlreg, FLUSH);
316
317 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
318 /*
319 * if a Marvell PHY
320 * enable auto crossover
321 */
322 phy_config =
323 (MIICR_REG_16 | (MRV_REG16_XOVERON));
324 slic_reg32_write(wphy, phy_config, FLUSH);
325
326 /* reset phy, enable auto-neg */
327 phy_config =
328 (MIICR_REG_PCR |
329 (PCR_RESET | PCR_AUTONEG |
330 PCR_AUTONEG_RST));
331 slic_reg32_write(wphy, phy_config, FLUSH);
332 } else { /* it's a Cicada PHY */
333 /* enable and restart auto-neg (don't reset) */
334 phy_config =
335 (MIICR_REG_PCR |
336 (PCR_AUTONEG | PCR_AUTONEG_RST));
337 slic_reg32_write(wphy, phy_config, FLUSH);
338 }
339 }
340 } else {
341 /* Forced 10/100 */
342 if (linkspeed == LINK_10MB)
343 speed = 0;
344 else
345 speed = PCR_SPEED_100;
346 if (linkduplex == LINK_HALFD)
347 duplex = 0;
348 else
349 duplex = PCR_DUPLEX_FULL;
350
351 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
352 /*
353 * if a Marvell PHY
354 * disable auto crossover
355 */
356 phy_config = (MIICR_REG_16 | (MRV_REG16_XOVEROFF));
357 slic_reg32_write(wphy, phy_config, FLUSH);
358 }
359
360 /* power down phy to break link (this may not work) */
361 phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN | speed | duplex));
362 slic_reg32_write(wphy, phy_config, FLUSH);
363
364 /* wait, Marvell says 1 sec, try to get away with 10 ms */
365 mdelay(10);
366
367 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
368 /*
369 * if a Marvell PHY
370 * disable auto-neg, set speed,
371 * soft reset phy, powerup
372 */
373 phy_config =
374 (MIICR_REG_PCR | (PCR_RESET | speed | duplex));
375 slic_reg32_write(wphy, phy_config, FLUSH);
376 } else { /* it's a Cicada PHY */
377 /* disable auto-neg, set speed, powerup */
378 phy_config = (MIICR_REG_PCR | (speed | duplex));
379 slic_reg32_write(wphy, phy_config, FLUSH);
380 }
381 }
382 }
383
384 static int slic_card_download_gbrcv(struct adapter *adapter)
385 {
386 const struct firmware *fw;
387 const char *file = "";
388 int ret;
389 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
390 u32 codeaddr;
391 u32 instruction;
392 int index = 0;
393 u32 rcvucodelen = 0;
394
395 switch (adapter->devid) {
396 case SLIC_2GB_DEVICE_ID:
397 file = "slicoss/oasisrcvucode.sys";
398 break;
399 case SLIC_1GB_DEVICE_ID:
400 file = "slicoss/gbrcvucode.sys";
401 break;
402 default:
403 return -ENOENT;
404 }
405
406 ret = request_firmware(&fw, file, &adapter->pcidev->dev);
407 if (ret) {
408 dev_err(&adapter->pcidev->dev,
409 "Failed to load firmware %s\n", file);
410 return ret;
411 }
412
413 rcvucodelen = *(u32 *)(fw->data + index);
414 index += 4;
415 switch (adapter->devid) {
416 case SLIC_2GB_DEVICE_ID:
417 if (rcvucodelen != OasisRcvUCodeLen) {
418 release_firmware(fw);
419 return -EINVAL;
420 }
421 break;
422 case SLIC_1GB_DEVICE_ID:
423 if (rcvucodelen != GBRcvUCodeLen) {
424 release_firmware(fw);
425 return -EINVAL;
426 }
427 break;
428 }
429 /* start download */
430 slic_reg32_write(&slic_regs->slic_rcv_wcs, SLIC_RCVWCS_BEGIN, FLUSH);
431 /* download the rcv sequencer ucode */
432 for (codeaddr = 0; codeaddr < rcvucodelen; codeaddr++) {
433 /* write out instruction address */
434 slic_reg32_write(&slic_regs->slic_rcv_wcs, codeaddr, FLUSH);
435
436 instruction = *(u32 *)(fw->data + index);
437 index += 4;
438 /* write out the instruction data low addr */
439 slic_reg32_write(&slic_regs->slic_rcv_wcs, instruction, FLUSH);
440
441 instruction = *(u8 *)(fw->data + index);
442 index++;
443 /* write out the instruction data high addr */
444 slic_reg32_write(&slic_regs->slic_rcv_wcs, (u8)instruction,
445 FLUSH);
446 }
447
448 /* download finished */
449 release_firmware(fw);
450 slic_reg32_write(&slic_regs->slic_rcv_wcs, SLIC_RCVWCS_FINISH, FLUSH);
451 return 0;
452 }
453
454 MODULE_FIRMWARE("slicoss/oasisrcvucode.sys");
455 MODULE_FIRMWARE("slicoss/gbrcvucode.sys");
456
457 static int slic_card_download(struct adapter *adapter)
458 {
459 const struct firmware *fw;
460 const char *file = "";
461 int ret;
462 u32 section;
463 int thissectionsize;
464 int codeaddr;
465 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
466 u32 instruction;
467 u32 baseaddress;
468 u32 i;
469 u32 numsects = 0;
470 u32 sectsize[3];
471 u32 sectstart[3];
472 int ucode_start, index = 0;
473
474 switch (adapter->devid) {
475 case SLIC_2GB_DEVICE_ID:
476 file = "slicoss/oasisdownload.sys";
477 break;
478 case SLIC_1GB_DEVICE_ID:
479 file = "slicoss/gbdownload.sys";
480 break;
481 default:
482 return -ENOENT;
483 }
484 ret = request_firmware(&fw, file, &adapter->pcidev->dev);
485 if (ret) {
486 dev_err(&adapter->pcidev->dev,
487 "Failed to load firmware %s\n", file);
488 return ret;
489 }
490 numsects = *(u32 *)(fw->data + index);
491 index += 4;
492 for (i = 0; i < numsects; i++) {
493 sectsize[i] = *(u32 *)(fw->data + index);
494 index += 4;
495 }
496 for (i = 0; i < numsects; i++) {
497 sectstart[i] = *(u32 *)(fw->data + index);
498 index += 4;
499 }
500 ucode_start = index;
501 instruction = *(u32 *)(fw->data + index);
502 index += 4;
503 for (section = 0; section < numsects; section++) {
504 baseaddress = sectstart[section];
505 thissectionsize = sectsize[section] >> 3;
506
507 for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) {
508 /* Write out instruction address */
509 slic_reg32_write(&slic_regs->slic_wcs,
510 baseaddress + codeaddr, FLUSH);
511 /* Write out instruction to low addr */
512 slic_reg32_write(&slic_regs->slic_wcs,
513 instruction, FLUSH);
514 instruction = *(u32 *)(fw->data + index);
515 index += 4;
516
517 /* Write out instruction to high addr */
518 slic_reg32_write(&slic_regs->slic_wcs,
519 instruction, FLUSH);
520 instruction = *(u32 *)(fw->data + index);
521 index += 4;
522 }
523 }
524 index = ucode_start;
525 for (section = 0; section < numsects; section++) {
526 instruction = *(u32 *)(fw->data + index);
527 baseaddress = sectstart[section];
528 if (baseaddress < 0x8000)
529 continue;
530 thissectionsize = sectsize[section] >> 3;
531
532 for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) {
533 /* Write out instruction address */
534 slic_reg32_write(&slic_regs->slic_wcs,
535 SLIC_WCS_COMPARE | (baseaddress + codeaddr),
536 FLUSH);
537 /* Write out instruction to low addr */
538 slic_reg32_write(&slic_regs->slic_wcs, instruction,
539 FLUSH);
540 instruction = *(u32 *)(fw->data + index);
541 index += 4;
542 /* Write out instruction to high addr */
543 slic_reg32_write(&slic_regs->slic_wcs, instruction,
544 FLUSH);
545 instruction = *(u32 *)(fw->data + index);
546 index += 4;
547
548 }
549 }
550 release_firmware(fw);
551 /* Everything OK, kick off the card */
552 mdelay(10);
553 slic_reg32_write(&slic_regs->slic_wcs, SLIC_WCS_START, FLUSH);
554
555 /*
556 * stall for 20 ms, long enough for ucode to init card
557 * and reach mainloop
558 */
559 mdelay(20);
560
561 return 0;
562 }
563
564 MODULE_FIRMWARE("slicoss/oasisdownload.sys");
565 MODULE_FIRMWARE("slicoss/gbdownload.sys");
566
567 static void slic_adapter_set_hwaddr(struct adapter *adapter)
568 {
569 struct sliccard *card = adapter->card;
570
571 if ((adapter->card) && (card->config_set)) {
572 memcpy(adapter->macaddr,
573 card->config.MacInfo[adapter->functionnumber].macaddrA,
574 sizeof(struct slic_config_mac));
575 if (is_zero_ether_addr(adapter->currmacaddr))
576 memcpy(adapter->currmacaddr, adapter->macaddr,
577 ETH_ALEN);
578 if (adapter->netdev)
579 memcpy(adapter->netdev->dev_addr, adapter->currmacaddr,
580 ETH_ALEN);
581 }
582 }
583
584 static void slic_intagg_set(struct adapter *adapter, u32 value)
585 {
586 slic_reg32_write(&adapter->slic_regs->slic_intagg, value, FLUSH);
587 adapter->card->loadlevel_current = value;
588 }
589
590 static void slic_soft_reset(struct adapter *adapter)
591 {
592 if (adapter->card->state == CARD_UP) {
593 slic_reg32_write(&adapter->slic_regs->slic_quiesce, 0, FLUSH);
594 mdelay(1);
595 }
596
597 slic_reg32_write(&adapter->slic_regs->slic_reset, SLIC_RESET_MAGIC,
598 FLUSH);
599 mdelay(1);
600 }
601
602 static void slic_mac_address_config(struct adapter *adapter)
603 {
604 u32 value;
605 u32 value2;
606 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
607
608 value = ntohl(*(__be32 *)&adapter->currmacaddr[2]);
609 slic_reg32_write(&slic_regs->slic_wraddral, value, FLUSH);
610 slic_reg32_write(&slic_regs->slic_wraddrbl, value, FLUSH);
611
612 value2 = (u32)((adapter->currmacaddr[0] << 8 |
613 adapter->currmacaddr[1]) & 0xFFFF);
614
615 slic_reg32_write(&slic_regs->slic_wraddrah, value2, FLUSH);
616 slic_reg32_write(&slic_regs->slic_wraddrbh, value2, FLUSH);
617
618 /*
619 * Write our multicast mask out to the card. This is done
620 * here in addition to the slic_mcast_addr_set routine
621 * because ALL_MCAST may have been enabled or disabled
622 */
623 slic_mcast_set_mask(adapter);
624 }
625
626 static void slic_mac_config(struct adapter *adapter)
627 {
628 u32 value;
629 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
630
631 /* Setup GMAC gaps */
632 if (adapter->linkspeed == LINK_1000MB) {
633 value = ((GMCR_GAPBB_1000 << GMCR_GAPBB_SHIFT) |
634 (GMCR_GAPR1_1000 << GMCR_GAPR1_SHIFT) |
635 (GMCR_GAPR2_1000 << GMCR_GAPR2_SHIFT));
636 } else {
637 value = ((GMCR_GAPBB_100 << GMCR_GAPBB_SHIFT) |
638 (GMCR_GAPR1_100 << GMCR_GAPR1_SHIFT) |
639 (GMCR_GAPR2_100 << GMCR_GAPR2_SHIFT));
640 }
641
642 /* enable GMII */
643 if (adapter->linkspeed == LINK_1000MB)
644 value |= GMCR_GBIT;
645
646 /* enable fullduplex */
647 if ((adapter->linkduplex == LINK_FULLD)
648 || (adapter->macopts & MAC_LOOPBACK)) {
649 value |= GMCR_FULLD;
650 }
651
652 /* write mac config */
653 slic_reg32_write(&slic_regs->slic_wmcfg, value, FLUSH);
654
655 /* setup mac addresses */
656 slic_mac_address_config(adapter);
657 }
658
659 static void slic_config_set(struct adapter *adapter, bool linkchange)
660 {
661 u32 value;
662 u32 RcrReset;
663 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
664
665 if (linkchange) {
666 /* Setup MAC */
667 slic_mac_config(adapter);
668 RcrReset = GRCR_RESET;
669 } else {
670 slic_mac_address_config(adapter);
671 RcrReset = 0;
672 }
673
674 if (adapter->linkduplex == LINK_FULLD) {
675 /* setup xmtcfg */
676 value = (GXCR_RESET | /* Always reset */
677 GXCR_XMTEN | /* Enable transmit */
678 GXCR_PAUSEEN); /* Enable pause */
679
680 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
681
682 /* Setup rcvcfg last */
683 value = (RcrReset | /* Reset, if linkchange */
684 GRCR_CTLEN | /* Enable CTL frames */
685 GRCR_ADDRAEN | /* Address A enable */
686 GRCR_RCVBAD | /* Rcv bad frames */
687 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
688 } else {
689 /* setup xmtcfg */
690 value = (GXCR_RESET | /* Always reset */
691 GXCR_XMTEN); /* Enable transmit */
692
693 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
694
695 /* Setup rcvcfg last */
696 value = (RcrReset | /* Reset, if linkchange */
697 GRCR_ADDRAEN | /* Address A enable */
698 GRCR_RCVBAD | /* Rcv bad frames */
699 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
700 }
701
702 if (adapter->state != ADAPT_DOWN) {
703 /* Only enable receive if we are restarting or running */
704 value |= GRCR_RCVEN;
705 }
706
707 if (adapter->macopts & MAC_PROMISC)
708 value |= GRCR_RCVALL;
709
710 slic_reg32_write(&slic_regs->slic_wrcfg, value, FLUSH);
711 }
712
713 /*
714 * Turn off RCV and XMT, power down PHY
715 */
716 static void slic_config_clear(struct adapter *adapter)
717 {
718 u32 value;
719 u32 phy_config;
720 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
721
722 /* Setup xmtcfg */
723 value = (GXCR_RESET | /* Always reset */
724 GXCR_PAUSEEN); /* Enable pause */
725
726 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
727
728 value = (GRCR_RESET | /* Always reset */
729 GRCR_CTLEN | /* Enable CTL frames */
730 GRCR_ADDRAEN | /* Address A enable */
731 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
732
733 slic_reg32_write(&slic_regs->slic_wrcfg, value, FLUSH);
734
735 /* power down phy */
736 phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN));
737 slic_reg32_write(&slic_regs->slic_wphy, phy_config, FLUSH);
738 }
739
740 static bool slic_mac_filter(struct adapter *adapter,
741 struct ether_header *ether_frame)
742 {
743 struct net_device *netdev = adapter->netdev;
744 u32 opts = adapter->macopts;
745
746 if (opts & MAC_PROMISC)
747 return true;
748
749 if (is_broadcast_ether_addr(ether_frame->ether_dhost)) {
750 if (opts & MAC_BCAST) {
751 adapter->rcv_broadcasts++;
752 return true;
753 }
754
755 return false;
756 }
757
758 if (is_multicast_ether_addr(ether_frame->ether_dhost)) {
759 if (opts & MAC_ALLMCAST) {
760 adapter->rcv_multicasts++;
761 netdev->stats.multicast++;
762 return true;
763 }
764 if (opts & MAC_MCAST) {
765 struct mcast_address *mcaddr = adapter->mcastaddrs;
766
767 while (mcaddr) {
768 if (ether_addr_equal(mcaddr->address,
769 ether_frame->ether_dhost)) {
770 adapter->rcv_multicasts++;
771 netdev->stats.multicast++;
772 return true;
773 }
774 mcaddr = mcaddr->next;
775 }
776
777 return false;
778 }
779
780 return false;
781 }
782 if (opts & MAC_DIRECTED) {
783 adapter->rcv_unicasts++;
784 return true;
785 }
786 return false;
787 }
788
789 static int slic_mac_set_address(struct net_device *dev, void *ptr)
790 {
791 struct adapter *adapter = netdev_priv(dev);
792 struct sockaddr *addr = ptr;
793
794 if (netif_running(dev))
795 return -EBUSY;
796 if (!adapter)
797 return -EBUSY;
798
799 if (!is_valid_ether_addr(addr->sa_data))
800 return -EINVAL;
801
802 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
803 memcpy(adapter->currmacaddr, addr->sa_data, dev->addr_len);
804
805 slic_config_set(adapter, true);
806 return 0;
807 }
808
809 static void slic_timer_load_check(ulong cardaddr)
810 {
811 struct sliccard *card = (struct sliccard *)cardaddr;
812 struct adapter *adapter = card->master;
813 u32 __iomem *intagg;
814 u32 load = card->events;
815 u32 level = 0;
816
817 if ((adapter) && (adapter->state == ADAPT_UP) &&
818 (card->state == CARD_UP) && (slic_global.dynamic_intagg)) {
819 intagg = &adapter->slic_regs->slic_intagg;
820 if (adapter->devid == SLIC_1GB_DEVICE_ID) {
821 if (adapter->linkspeed == LINK_1000MB)
822 level = 100;
823 else {
824 if (load > SLIC_LOAD_5)
825 level = SLIC_INTAGG_5;
826 else if (load > SLIC_LOAD_4)
827 level = SLIC_INTAGG_4;
828 else if (load > SLIC_LOAD_3)
829 level = SLIC_INTAGG_3;
830 else if (load > SLIC_LOAD_2)
831 level = SLIC_INTAGG_2;
832 else if (load > SLIC_LOAD_1)
833 level = SLIC_INTAGG_1;
834 else
835 level = SLIC_INTAGG_0;
836 }
837 if (card->loadlevel_current != level) {
838 card->loadlevel_current = level;
839 slic_reg32_write(intagg, level, FLUSH);
840 }
841 } else {
842 if (load > SLIC_LOAD_5)
843 level = SLIC_INTAGG_5;
844 else if (load > SLIC_LOAD_4)
845 level = SLIC_INTAGG_4;
846 else if (load > SLIC_LOAD_3)
847 level = SLIC_INTAGG_3;
848 else if (load > SLIC_LOAD_2)
849 level = SLIC_INTAGG_2;
850 else if (load > SLIC_LOAD_1)
851 level = SLIC_INTAGG_1;
852 else
853 level = SLIC_INTAGG_0;
854 if (card->loadlevel_current != level) {
855 card->loadlevel_current = level;
856 slic_reg32_write(intagg, level, FLUSH);
857 }
858 }
859 }
860 card->events = 0;
861 card->loadtimer.expires = jiffies + (SLIC_LOADTIMER_PERIOD * HZ);
862 add_timer(&card->loadtimer);
863 }
864
865 static int slic_upr_queue_request(struct adapter *adapter,
866 u32 upr_request,
867 u32 upr_data,
868 u32 upr_data_h,
869 u32 upr_buffer, u32 upr_buffer_h)
870 {
871 struct slic_upr *upr;
872 struct slic_upr *uprqueue;
873
874 upr = kmalloc(sizeof(*upr), GFP_ATOMIC);
875 if (!upr)
876 return -ENOMEM;
877
878 upr->adapter = adapter->port;
879 upr->upr_request = upr_request;
880 upr->upr_data = upr_data;
881 upr->upr_buffer = upr_buffer;
882 upr->upr_data_h = upr_data_h;
883 upr->upr_buffer_h = upr_buffer_h;
884 upr->next = NULL;
885 if (adapter->upr_list) {
886 uprqueue = adapter->upr_list;
887
888 while (uprqueue->next)
889 uprqueue = uprqueue->next;
890 uprqueue->next = upr;
891 } else {
892 adapter->upr_list = upr;
893 }
894 return 0;
895 }
896
897 static void slic_upr_start(struct adapter *adapter)
898 {
899 struct slic_upr *upr;
900 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
901 upr = adapter->upr_list;
902 if (!upr)
903 return;
904 if (adapter->upr_busy)
905 return;
906 adapter->upr_busy = 1;
907
908 switch (upr->upr_request) {
909 case SLIC_UPR_STATS:
910 if (upr->upr_data_h == 0) {
911 slic_reg32_write(&slic_regs->slic_stats, upr->upr_data,
912 FLUSH);
913 } else {
914 slic_reg64_write(adapter, &slic_regs->slic_stats64,
915 upr->upr_data,
916 &slic_regs->slic_addr_upper,
917 upr->upr_data_h, FLUSH);
918 }
919 break;
920
921 case SLIC_UPR_RLSR:
922 slic_reg64_write(adapter, &slic_regs->slic_rlsr, upr->upr_data,
923 &slic_regs->slic_addr_upper, upr->upr_data_h,
924 FLUSH);
925 break;
926
927 case SLIC_UPR_RCONFIG:
928 slic_reg64_write(adapter, &slic_regs->slic_rconfig,
929 upr->upr_data, &slic_regs->slic_addr_upper,
930 upr->upr_data_h, FLUSH);
931 break;
932 case SLIC_UPR_PING:
933 slic_reg32_write(&slic_regs->slic_ping, 1, FLUSH);
934 break;
935 }
936 }
937
938 static int slic_upr_request(struct adapter *adapter,
939 u32 upr_request,
940 u32 upr_data,
941 u32 upr_data_h,
942 u32 upr_buffer, u32 upr_buffer_h)
943 {
944 unsigned long flags;
945 int rc;
946
947 spin_lock_irqsave(&adapter->upr_lock, flags);
948 rc = slic_upr_queue_request(adapter,
949 upr_request,
950 upr_data,
951 upr_data_h, upr_buffer, upr_buffer_h);
952 if (rc)
953 goto err_unlock_irq;
954
955 slic_upr_start(adapter);
956 err_unlock_irq:
957 spin_unlock_irqrestore(&adapter->upr_lock, flags);
958 return rc;
959 }
960
961 static void slic_link_upr_complete(struct adapter *adapter, u32 isr)
962 {
963 u32 linkstatus = adapter->pshmem->linkstatus;
964 uint linkup;
965 unsigned char linkspeed;
966 unsigned char linkduplex;
967
968 if ((isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
969 struct slic_shmem *pshmem;
970
971 pshmem = (struct slic_shmem *)(unsigned long)
972 adapter->phys_shmem;
973 #if BITS_PER_LONG == 64
974 slic_upr_queue_request(adapter,
975 SLIC_UPR_RLSR,
976 SLIC_GET_ADDR_LOW(&pshmem->linkstatus),
977 SLIC_GET_ADDR_HIGH(&pshmem->linkstatus),
978 0, 0);
979 #else
980 slic_upr_queue_request(adapter,
981 SLIC_UPR_RLSR,
982 (u32)&pshmem->linkstatus,
983 SLIC_GET_ADDR_HIGH(pshmem), 0, 0);
984 #endif
985 return;
986 }
987 if (adapter->state != ADAPT_UP)
988 return;
989
990 linkup = linkstatus & GIG_LINKUP ? LINK_UP : LINK_DOWN;
991 if (linkstatus & GIG_SPEED_1000)
992 linkspeed = LINK_1000MB;
993 else if (linkstatus & GIG_SPEED_100)
994 linkspeed = LINK_100MB;
995 else
996 linkspeed = LINK_10MB;
997
998 if (linkstatus & GIG_FULLDUPLEX)
999 linkduplex = LINK_FULLD;
1000 else
1001 linkduplex = LINK_HALFD;
1002
1003 if ((adapter->linkstate == LINK_DOWN) && (linkup == LINK_DOWN))
1004 return;
1005
1006 /* link up event, but nothing has changed */
1007 if ((adapter->linkstate == LINK_UP) &&
1008 (linkup == LINK_UP) &&
1009 (adapter->linkspeed == linkspeed) &&
1010 (adapter->linkduplex == linkduplex))
1011 return;
1012
1013 /* link has changed at this point */
1014
1015 /* link has gone from up to down */
1016 if (linkup == LINK_DOWN) {
1017 adapter->linkstate = LINK_DOWN;
1018 return;
1019 }
1020
1021 /* link has gone from down to up */
1022 adapter->linkspeed = linkspeed;
1023 adapter->linkduplex = linkduplex;
1024
1025 if (adapter->linkstate != LINK_UP) {
1026 /* setup the mac */
1027 slic_config_set(adapter, true);
1028 adapter->linkstate = LINK_UP;
1029 netif_start_queue(adapter->netdev);
1030 }
1031 }
1032
1033 static void slic_upr_request_complete(struct adapter *adapter, u32 isr)
1034 {
1035 struct sliccard *card = adapter->card;
1036 struct slic_upr *upr;
1037 unsigned long flags;
1038
1039 spin_lock_irqsave(&adapter->upr_lock, flags);
1040 upr = adapter->upr_list;
1041 if (!upr) {
1042 spin_unlock_irqrestore(&adapter->upr_lock, flags);
1043 return;
1044 }
1045 adapter->upr_list = upr->next;
1046 upr->next = NULL;
1047 adapter->upr_busy = 0;
1048 switch (upr->upr_request) {
1049 case SLIC_UPR_STATS:
1050 {
1051 struct slic_stats *slicstats =
1052 (struct slic_stats *)&adapter->pshmem->inicstats;
1053 struct slic_stats *newstats = slicstats;
1054 struct slic_stats *old = &adapter->inicstats_prev;
1055 struct slicnet_stats *stst = &adapter->slic_stats;
1056
1057 if (isr & ISR_UPCERR) {
1058 dev_err(&adapter->netdev->dev,
1059 "SLIC_UPR_STATS command failed isr[%x]\n",
1060 isr);
1061
1062 break;
1063 }
1064 UPDATE_STATS_GB(stst->tcp.xmit_tcp_segs,
1065 newstats->xmit_tcp_segs_gb,
1066 old->xmit_tcp_segs_gb);
1067
1068 UPDATE_STATS_GB(stst->tcp.xmit_tcp_bytes,
1069 newstats->xmit_tcp_bytes_gb,
1070 old->xmit_tcp_bytes_gb);
1071
1072 UPDATE_STATS_GB(stst->tcp.rcv_tcp_segs,
1073 newstats->rcv_tcp_segs_gb,
1074 old->rcv_tcp_segs_gb);
1075
1076 UPDATE_STATS_GB(stst->tcp.rcv_tcp_bytes,
1077 newstats->rcv_tcp_bytes_gb,
1078 old->rcv_tcp_bytes_gb);
1079
1080 UPDATE_STATS_GB(stst->iface.xmt_bytes,
1081 newstats->xmit_bytes_gb,
1082 old->xmit_bytes_gb);
1083
1084 UPDATE_STATS_GB(stst->iface.xmt_ucast,
1085 newstats->xmit_unicasts_gb,
1086 old->xmit_unicasts_gb);
1087
1088 UPDATE_STATS_GB(stst->iface.rcv_bytes,
1089 newstats->rcv_bytes_gb,
1090 old->rcv_bytes_gb);
1091
1092 UPDATE_STATS_GB(stst->iface.rcv_ucast,
1093 newstats->rcv_unicasts_gb,
1094 old->rcv_unicasts_gb);
1095
1096 UPDATE_STATS_GB(stst->iface.xmt_errors,
1097 newstats->xmit_collisions_gb,
1098 old->xmit_collisions_gb);
1099
1100 UPDATE_STATS_GB(stst->iface.xmt_errors,
1101 newstats->xmit_excess_collisions_gb,
1102 old->xmit_excess_collisions_gb);
1103
1104 UPDATE_STATS_GB(stst->iface.xmt_errors,
1105 newstats->xmit_other_error_gb,
1106 old->xmit_other_error_gb);
1107
1108 UPDATE_STATS_GB(stst->iface.rcv_errors,
1109 newstats->rcv_other_error_gb,
1110 old->rcv_other_error_gb);
1111
1112 UPDATE_STATS_GB(stst->iface.rcv_discards,
1113 newstats->rcv_drops_gb,
1114 old->rcv_drops_gb);
1115
1116 if (newstats->rcv_drops_gb > old->rcv_drops_gb) {
1117 adapter->rcv_drops +=
1118 (newstats->rcv_drops_gb -
1119 old->rcv_drops_gb);
1120 }
1121 memcpy(old, newstats, sizeof(struct slic_stats));
1122 break;
1123 }
1124 case SLIC_UPR_RLSR:
1125 slic_link_upr_complete(adapter, isr);
1126 break;
1127 case SLIC_UPR_RCONFIG:
1128 break;
1129 case SLIC_UPR_PING:
1130 card->pingstatus |= (isr & ISR_PINGDSMASK);
1131 break;
1132 }
1133 kfree(upr);
1134 slic_upr_start(adapter);
1135 spin_unlock_irqrestore(&adapter->upr_lock, flags);
1136 }
1137
1138 static int slic_config_get(struct adapter *adapter, u32 config, u32 config_h)
1139 {
1140 return slic_upr_request(adapter, SLIC_UPR_RCONFIG, config, config_h,
1141 0, 0);
1142 }
1143
1144 /*
1145 * Compute a checksum of the EEPROM according to RFC 1071.
1146 */
1147 static u16 slic_eeprom_cksum(void *eeprom, unsigned len)
1148 {
1149 u16 *wp = eeprom;
1150 u32 checksum = 0;
1151
1152 while (len > 1) {
1153 checksum += *(wp++);
1154 len -= 2;
1155 }
1156
1157 if (len > 0)
1158 checksum += *(u8 *)wp;
1159
1160 while (checksum >> 16)
1161 checksum = (checksum & 0xFFFF) + ((checksum >> 16) & 0xFFFF);
1162
1163 return ~checksum;
1164 }
1165
1166 static void slic_rspqueue_free(struct adapter *adapter)
1167 {
1168 int i;
1169 struct slic_rspqueue *rspq = &adapter->rspqueue;
1170
1171 for (i = 0; i < rspq->num_pages; i++) {
1172 if (rspq->vaddr[i]) {
1173 pci_free_consistent(adapter->pcidev, PAGE_SIZE,
1174 rspq->vaddr[i], rspq->paddr[i]);
1175 }
1176 rspq->vaddr[i] = NULL;
1177 rspq->paddr[i] = 0;
1178 }
1179 rspq->offset = 0;
1180 rspq->pageindex = 0;
1181 rspq->rspbuf = NULL;
1182 }
1183
1184 static int slic_rspqueue_init(struct adapter *adapter)
1185 {
1186 int i;
1187 struct slic_rspqueue *rspq = &adapter->rspqueue;
1188 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
1189 u32 paddrh = 0;
1190
1191 memset(rspq, 0, sizeof(struct slic_rspqueue));
1192
1193 rspq->num_pages = SLIC_RSPQ_PAGES_GB;
1194
1195 for (i = 0; i < rspq->num_pages; i++) {
1196 rspq->vaddr[i] = pci_zalloc_consistent(adapter->pcidev,
1197 PAGE_SIZE,
1198 &rspq->paddr[i]);
1199 if (!rspq->vaddr[i]) {
1200 dev_err(&adapter->pcidev->dev,
1201 "pci_alloc_consistent failed\n");
1202 slic_rspqueue_free(adapter);
1203 return -ENOMEM;
1204 }
1205
1206 if (paddrh == 0) {
1207 slic_reg32_write(&slic_regs->slic_rbar,
1208 (rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE),
1209 DONT_FLUSH);
1210 } else {
1211 slic_reg64_write(adapter, &slic_regs->slic_rbar64,
1212 (rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE),
1213 &slic_regs->slic_addr_upper,
1214 paddrh, DONT_FLUSH);
1215 }
1216 }
1217 rspq->offset = 0;
1218 rspq->pageindex = 0;
1219 rspq->rspbuf = (struct slic_rspbuf *)rspq->vaddr[0];
1220 return 0;
1221 }
1222
1223 static struct slic_rspbuf *slic_rspqueue_getnext(struct adapter *adapter)
1224 {
1225 struct slic_rspqueue *rspq = &adapter->rspqueue;
1226 struct slic_rspbuf *buf;
1227
1228 if (!(rspq->rspbuf->status))
1229 return NULL;
1230
1231 buf = rspq->rspbuf;
1232 if (++rspq->offset < SLIC_RSPQ_BUFSINPAGE) {
1233 rspq->rspbuf++;
1234 } else {
1235 slic_reg64_write(adapter, &adapter->slic_regs->slic_rbar64,
1236 (rspq->paddr[rspq->pageindex] | SLIC_RSPQ_BUFSINPAGE),
1237 &adapter->slic_regs->slic_addr_upper, 0, DONT_FLUSH);
1238 rspq->pageindex = (rspq->pageindex + 1) % rspq->num_pages;
1239 rspq->offset = 0;
1240 rspq->rspbuf = (struct slic_rspbuf *)
1241 rspq->vaddr[rspq->pageindex];
1242 }
1243
1244 return buf;
1245 }
1246
1247 static void slic_cmdqmem_free(struct adapter *adapter)
1248 {
1249 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
1250 int i;
1251
1252 for (i = 0; i < SLIC_CMDQ_MAXPAGES; i++) {
1253 if (cmdqmem->pages[i]) {
1254 pci_free_consistent(adapter->pcidev,
1255 PAGE_SIZE,
1256 (void *)cmdqmem->pages[i],
1257 cmdqmem->dma_pages[i]);
1258 }
1259 }
1260 memset(cmdqmem, 0, sizeof(struct slic_cmdqmem));
1261 }
1262
1263 static u32 *slic_cmdqmem_addpage(struct adapter *adapter)
1264 {
1265 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
1266 u32 *pageaddr;
1267
1268 if (cmdqmem->pagecnt >= SLIC_CMDQ_MAXPAGES)
1269 return NULL;
1270 pageaddr = pci_alloc_consistent(adapter->pcidev,
1271 PAGE_SIZE,
1272 &cmdqmem->dma_pages[cmdqmem->pagecnt]);
1273 if (!pageaddr)
1274 return NULL;
1275
1276 cmdqmem->pages[cmdqmem->pagecnt] = pageaddr;
1277 cmdqmem->pagecnt++;
1278 return pageaddr;
1279 }
1280
1281 static void slic_cmdq_free(struct adapter *adapter)
1282 {
1283 struct slic_hostcmd *cmd;
1284
1285 cmd = adapter->cmdq_all.head;
1286 while (cmd) {
1287 if (cmd->busy) {
1288 struct sk_buff *tempskb;
1289
1290 tempskb = cmd->skb;
1291 if (tempskb) {
1292 cmd->skb = NULL;
1293 dev_kfree_skb_irq(tempskb);
1294 }
1295 }
1296 cmd = cmd->next_all;
1297 }
1298 memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue));
1299 memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue));
1300 memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue));
1301 slic_cmdqmem_free(adapter);
1302 }
1303
1304 static void slic_cmdq_addcmdpage(struct adapter *adapter, u32 *page)
1305 {
1306 struct slic_hostcmd *cmd;
1307 struct slic_hostcmd *prev;
1308 struct slic_hostcmd *tail;
1309 struct slic_cmdqueue *cmdq;
1310 int cmdcnt;
1311 void *cmdaddr;
1312 ulong phys_addr;
1313 u32 phys_addrl;
1314 u32 phys_addrh;
1315 struct slic_handle *pslic_handle;
1316 unsigned long flags;
1317
1318 cmdaddr = page;
1319 cmd = cmdaddr;
1320 cmdcnt = 0;
1321
1322 phys_addr = virt_to_bus((void *)page);
1323 phys_addrl = SLIC_GET_ADDR_LOW(phys_addr);
1324 phys_addrh = SLIC_GET_ADDR_HIGH(phys_addr);
1325
1326 prev = NULL;
1327 tail = cmd;
1328 while ((cmdcnt < SLIC_CMDQ_CMDSINPAGE) &&
1329 (adapter->slic_handle_ix < 256)) {
1330 /* Allocate and initialize a SLIC_HANDLE for this command */
1331 spin_lock_irqsave(&adapter->handle_lock, flags);
1332 pslic_handle = adapter->pfree_slic_handles;
1333 adapter->pfree_slic_handles = pslic_handle->next;
1334 spin_unlock_irqrestore(&adapter->handle_lock, flags);
1335 pslic_handle->type = SLIC_HANDLE_CMD;
1336 pslic_handle->address = (void *)cmd;
1337 pslic_handle->offset = (ushort)adapter->slic_handle_ix++;
1338 pslic_handle->other_handle = NULL;
1339 pslic_handle->next = NULL;
1340
1341 cmd->pslic_handle = pslic_handle;
1342 cmd->cmd64.hosthandle = pslic_handle->token.handle_token;
1343 cmd->busy = false;
1344 cmd->paddrl = phys_addrl;
1345 cmd->paddrh = phys_addrh;
1346 cmd->next_all = prev;
1347 cmd->next = prev;
1348 prev = cmd;
1349 phys_addrl += SLIC_HOSTCMD_SIZE;
1350 cmdaddr += SLIC_HOSTCMD_SIZE;
1351
1352 cmd = cmdaddr;
1353 cmdcnt++;
1354 }
1355
1356 cmdq = &adapter->cmdq_all;
1357 cmdq->count += cmdcnt; /* SLIC_CMDQ_CMDSINPAGE; mooktodo */
1358 tail->next_all = cmdq->head;
1359 cmdq->head = prev;
1360 cmdq = &adapter->cmdq_free;
1361 spin_lock_irqsave(&cmdq->lock, flags);
1362 cmdq->count += cmdcnt; /* SLIC_CMDQ_CMDSINPAGE; mooktodo */
1363 tail->next = cmdq->head;
1364 cmdq->head = prev;
1365 spin_unlock_irqrestore(&cmdq->lock, flags);
1366 }
1367
1368 static int slic_cmdq_init(struct adapter *adapter)
1369 {
1370 int i;
1371 u32 *pageaddr;
1372
1373 memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue));
1374 memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue));
1375 memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue));
1376 spin_lock_init(&adapter->cmdq_all.lock);
1377 spin_lock_init(&adapter->cmdq_free.lock);
1378 spin_lock_init(&adapter->cmdq_done.lock);
1379 memset(&adapter->cmdqmem, 0, sizeof(struct slic_cmdqmem));
1380 adapter->slic_handle_ix = 1;
1381 for (i = 0; i < SLIC_CMDQ_INITPAGES; i++) {
1382 pageaddr = slic_cmdqmem_addpage(adapter);
1383 if (!pageaddr) {
1384 slic_cmdq_free(adapter);
1385 return -ENOMEM;
1386 }
1387 slic_cmdq_addcmdpage(adapter, pageaddr);
1388 }
1389 adapter->slic_handle_ix = 1;
1390
1391 return 0;
1392 }
1393
1394 static void slic_cmdq_reset(struct adapter *adapter)
1395 {
1396 struct slic_hostcmd *hcmd;
1397 struct sk_buff *skb;
1398 u32 outstanding;
1399 unsigned long flags;
1400
1401 spin_lock_irqsave(&adapter->cmdq_free.lock, flags);
1402 spin_lock(&adapter->cmdq_done.lock);
1403 outstanding = adapter->cmdq_all.count - adapter->cmdq_done.count;
1404 outstanding -= adapter->cmdq_free.count;
1405 hcmd = adapter->cmdq_all.head;
1406 while (hcmd) {
1407 if (hcmd->busy) {
1408 skb = hcmd->skb;
1409 hcmd->busy = 0;
1410 hcmd->skb = NULL;
1411 dev_kfree_skb_irq(skb);
1412 }
1413 hcmd = hcmd->next_all;
1414 }
1415 adapter->cmdq_free.count = 0;
1416 adapter->cmdq_free.head = NULL;
1417 adapter->cmdq_free.tail = NULL;
1418 adapter->cmdq_done.count = 0;
1419 adapter->cmdq_done.head = NULL;
1420 adapter->cmdq_done.tail = NULL;
1421 adapter->cmdq_free.head = adapter->cmdq_all.head;
1422 hcmd = adapter->cmdq_all.head;
1423 while (hcmd) {
1424 adapter->cmdq_free.count++;
1425 hcmd->next = hcmd->next_all;
1426 hcmd = hcmd->next_all;
1427 }
1428 if (adapter->cmdq_free.count != adapter->cmdq_all.count) {
1429 dev_err(&adapter->netdev->dev,
1430 "free_count %d != all count %d\n",
1431 adapter->cmdq_free.count, adapter->cmdq_all.count);
1432 }
1433 spin_unlock(&adapter->cmdq_done.lock);
1434 spin_unlock_irqrestore(&adapter->cmdq_free.lock, flags);
1435 }
1436
1437 static void slic_cmdq_getdone(struct adapter *adapter)
1438 {
1439 struct slic_cmdqueue *done_cmdq = &adapter->cmdq_done;
1440 struct slic_cmdqueue *free_cmdq = &adapter->cmdq_free;
1441 unsigned long flags;
1442
1443 spin_lock_irqsave(&done_cmdq->lock, flags);
1444
1445 free_cmdq->head = done_cmdq->head;
1446 free_cmdq->count = done_cmdq->count;
1447 done_cmdq->head = NULL;
1448 done_cmdq->tail = NULL;
1449 done_cmdq->count = 0;
1450 spin_unlock_irqrestore(&done_cmdq->lock, flags);
1451 }
1452
1453 static struct slic_hostcmd *slic_cmdq_getfree(struct adapter *adapter)
1454 {
1455 struct slic_cmdqueue *cmdq = &adapter->cmdq_free;
1456 struct slic_hostcmd *cmd = NULL;
1457 unsigned long flags;
1458
1459 lock_and_retry:
1460 spin_lock_irqsave(&cmdq->lock, flags);
1461 retry:
1462 cmd = cmdq->head;
1463 if (cmd) {
1464 cmdq->head = cmd->next;
1465 cmdq->count--;
1466 spin_unlock_irqrestore(&cmdq->lock, flags);
1467 } else {
1468 slic_cmdq_getdone(adapter);
1469 cmd = cmdq->head;
1470 if (cmd) {
1471 goto retry;
1472 } else {
1473 u32 *pageaddr;
1474
1475 spin_unlock_irqrestore(&cmdq->lock, flags);
1476 pageaddr = slic_cmdqmem_addpage(adapter);
1477 if (pageaddr) {
1478 slic_cmdq_addcmdpage(adapter, pageaddr);
1479 goto lock_and_retry;
1480 }
1481 }
1482 }
1483 return cmd;
1484 }
1485
1486 static void slic_cmdq_putdone_irq(struct adapter *adapter,
1487 struct slic_hostcmd *cmd)
1488 {
1489 struct slic_cmdqueue *cmdq = &adapter->cmdq_done;
1490
1491 spin_lock(&cmdq->lock);
1492 cmd->busy = 0;
1493 cmd->next = cmdq->head;
1494 cmdq->head = cmd;
1495 cmdq->count++;
1496 if ((adapter->xmitq_full) && (cmdq->count > 10))
1497 netif_wake_queue(adapter->netdev);
1498 spin_unlock(&cmdq->lock);
1499 }
1500
1501 static int slic_rcvqueue_fill(struct adapter *adapter)
1502 {
1503 void *paddr;
1504 u32 paddrl;
1505 u32 paddrh;
1506 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1507 int i = 0;
1508 struct device *dev = &adapter->netdev->dev;
1509
1510 while (i < SLIC_RCVQ_FILLENTRIES) {
1511 struct slic_rcvbuf *rcvbuf;
1512 struct sk_buff *skb;
1513 #ifdef KLUDGE_FOR_4GB_BOUNDARY
1514 retry_rcvqfill:
1515 #endif
1516 skb = alloc_skb(SLIC_RCVQ_RCVBUFSIZE, GFP_ATOMIC);
1517 if (skb) {
1518 paddr = (void *)(unsigned long)
1519 pci_map_single(adapter->pcidev,
1520 skb->data,
1521 SLIC_RCVQ_RCVBUFSIZE,
1522 PCI_DMA_FROMDEVICE);
1523 paddrl = SLIC_GET_ADDR_LOW(paddr);
1524 paddrh = SLIC_GET_ADDR_HIGH(paddr);
1525
1526 skb->len = SLIC_RCVBUF_HEADSIZE;
1527 rcvbuf = (struct slic_rcvbuf *)skb->head;
1528 rcvbuf->status = 0;
1529 skb->next = NULL;
1530 #ifdef KLUDGE_FOR_4GB_BOUNDARY
1531 if (paddrl == 0) {
1532 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
1533 __func__);
1534 dev_err(dev, "skb[%p] PROBLEM\n", skb);
1535 dev_err(dev, " skbdata[%p]\n",
1536 skb->data);
1537 dev_err(dev, " skblen[%x]\n", skb->len);
1538 dev_err(dev, " paddr[%p]\n", paddr);
1539 dev_err(dev, " paddrl[%x]\n", paddrl);
1540 dev_err(dev, " paddrh[%x]\n", paddrh);
1541 dev_err(dev, " rcvq->head[%p]\n",
1542 rcvq->head);
1543 dev_err(dev, " rcvq->tail[%p]\n",
1544 rcvq->tail);
1545 dev_err(dev, " rcvq->count[%x]\n",
1546 rcvq->count);
1547 dev_err(dev, "SKIP THIS SKB!!!!!!!!\n");
1548 goto retry_rcvqfill;
1549 }
1550 #else
1551 if (paddrl == 0) {
1552 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
1553 __func__);
1554 dev_err(dev, "skb[%p] PROBLEM\n", skb);
1555 dev_err(dev, " skbdata[%p]\n",
1556 skb->data);
1557 dev_err(dev, " skblen[%x]\n", skb->len);
1558 dev_err(dev, " paddr[%p]\n", paddr);
1559 dev_err(dev, " paddrl[%x]\n", paddrl);
1560 dev_err(dev, " paddrh[%x]\n", paddrh);
1561 dev_err(dev, " rcvq->head[%p]\n",
1562 rcvq->head);
1563 dev_err(dev, " rcvq->tail[%p]\n",
1564 rcvq->tail);
1565 dev_err(dev, " rcvq->count[%x]\n",
1566 rcvq->count);
1567 dev_err(dev, "GIVE TO CARD ANYWAY\n");
1568 }
1569 #endif
1570 if (paddrh == 0) {
1571 slic_reg32_write(&adapter->slic_regs->slic_hbar,
1572 (u32)paddrl, DONT_FLUSH);
1573 } else {
1574 slic_reg64_write(adapter,
1575 &adapter->slic_regs->slic_hbar64,
1576 paddrl,
1577 &adapter->slic_regs->slic_addr_upper,
1578 paddrh, DONT_FLUSH);
1579 }
1580 if (rcvq->head)
1581 rcvq->tail->next = skb;
1582 else
1583 rcvq->head = skb;
1584 rcvq->tail = skb;
1585 rcvq->count++;
1586 i++;
1587 } else {
1588 dev_err(&adapter->netdev->dev,
1589 "slic_rcvqueue_fill could only get [%d] skbuffs\n",
1590 i);
1591 break;
1592 }
1593 }
1594 return i;
1595 }
1596
1597 static void slic_rcvqueue_free(struct adapter *adapter)
1598 {
1599 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1600 struct sk_buff *skb;
1601
1602 while (rcvq->head) {
1603 skb = rcvq->head;
1604 rcvq->head = rcvq->head->next;
1605 dev_kfree_skb(skb);
1606 }
1607 rcvq->tail = NULL;
1608 rcvq->head = NULL;
1609 rcvq->count = 0;
1610 }
1611
1612 static int slic_rcvqueue_init(struct adapter *adapter)
1613 {
1614 int i, count;
1615 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1616
1617 rcvq->tail = NULL;
1618 rcvq->head = NULL;
1619 rcvq->size = SLIC_RCVQ_ENTRIES;
1620 rcvq->errors = 0;
1621 rcvq->count = 0;
1622 i = SLIC_RCVQ_ENTRIES / SLIC_RCVQ_FILLENTRIES;
1623 count = 0;
1624 while (i) {
1625 count += slic_rcvqueue_fill(adapter);
1626 i--;
1627 }
1628 if (rcvq->count < SLIC_RCVQ_MINENTRIES) {
1629 slic_rcvqueue_free(adapter);
1630 return -ENOMEM;
1631 }
1632 return 0;
1633 }
1634
1635 static struct sk_buff *slic_rcvqueue_getnext(struct adapter *adapter)
1636 {
1637 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1638 struct sk_buff *skb;
1639 struct slic_rcvbuf *rcvbuf;
1640 int count;
1641
1642 if (rcvq->count) {
1643 skb = rcvq->head;
1644 rcvbuf = (struct slic_rcvbuf *)skb->head;
1645
1646 if (rcvbuf->status & IRHDDR_SVALID) {
1647 rcvq->head = rcvq->head->next;
1648 skb->next = NULL;
1649 rcvq->count--;
1650 } else {
1651 skb = NULL;
1652 }
1653 } else {
1654 dev_err(&adapter->netdev->dev,
1655 "RcvQ Empty!! rcvq[%p] count[%x]\n", rcvq, rcvq->count);
1656 skb = NULL;
1657 }
1658 while (rcvq->count < SLIC_RCVQ_FILLTHRESH) {
1659 count = slic_rcvqueue_fill(adapter);
1660 if (!count)
1661 break;
1662 }
1663 if (skb)
1664 rcvq->errors = 0;
1665 return skb;
1666 }
1667
1668 static u32 slic_rcvqueue_reinsert(struct adapter *adapter, struct sk_buff *skb)
1669 {
1670 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1671 void *paddr;
1672 u32 paddrl;
1673 u32 paddrh;
1674 struct slic_rcvbuf *rcvbuf = (struct slic_rcvbuf *)skb->head;
1675 struct device *dev;
1676
1677 paddr = (void *)(unsigned long)
1678 pci_map_single(adapter->pcidev, skb->head,
1679 SLIC_RCVQ_RCVBUFSIZE, PCI_DMA_FROMDEVICE);
1680 rcvbuf->status = 0;
1681 skb->next = NULL;
1682
1683 paddrl = SLIC_GET_ADDR_LOW(paddr);
1684 paddrh = SLIC_GET_ADDR_HIGH(paddr);
1685
1686 if (paddrl == 0) {
1687 dev = &adapter->netdev->dev;
1688 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
1689 __func__);
1690 dev_err(dev, "skb[%p] PROBLEM\n", skb);
1691 dev_err(dev, " skbdata[%p]\n", skb->data);
1692 dev_err(dev, " skblen[%x]\n", skb->len);
1693 dev_err(dev, " paddr[%p]\n", paddr);
1694 dev_err(dev, " paddrl[%x]\n", paddrl);
1695 dev_err(dev, " paddrh[%x]\n", paddrh);
1696 dev_err(dev, " rcvq->head[%p]\n", rcvq->head);
1697 dev_err(dev, " rcvq->tail[%p]\n", rcvq->tail);
1698 dev_err(dev, " rcvq->count[%x]\n", rcvq->count);
1699 }
1700 if (paddrh == 0) {
1701 slic_reg32_write(&adapter->slic_regs->slic_hbar, (u32)paddrl,
1702 DONT_FLUSH);
1703 } else {
1704 slic_reg64_write(adapter, &adapter->slic_regs->slic_hbar64,
1705 paddrl, &adapter->slic_regs->slic_addr_upper,
1706 paddrh, DONT_FLUSH);
1707 }
1708 if (rcvq->head)
1709 rcvq->tail->next = skb;
1710 else
1711 rcvq->head = skb;
1712 rcvq->tail = skb;
1713 rcvq->count++;
1714 return rcvq->count;
1715 }
1716
1717 /*
1718 * slic_link_event_handler -
1719 *
1720 * Initiate a link configuration sequence. The link configuration begins
1721 * by issuing a READ_LINK_STATUS command to the Utility Processor on the
1722 * SLIC. Since the command finishes asynchronously, the slic_upr_comlete
1723 * routine will follow it up witha UP configuration write command, which
1724 * will also complete asynchronously.
1725 *
1726 */
1727 static int slic_link_event_handler(struct adapter *adapter)
1728 {
1729 int status;
1730 struct slic_shmem *pshmem;
1731
1732 if (adapter->state != ADAPT_UP) {
1733 /* Adapter is not operational. Ignore. */
1734 return -ENODEV;
1735 }
1736
1737 pshmem = (struct slic_shmem *)(unsigned long)adapter->phys_shmem;
1738
1739 #if BITS_PER_LONG == 64
1740 status = slic_upr_request(adapter,
1741 SLIC_UPR_RLSR,
1742 SLIC_GET_ADDR_LOW(&pshmem->linkstatus),
1743 SLIC_GET_ADDR_HIGH(&pshmem->linkstatus),
1744 0, 0);
1745 #else
1746 status = slic_upr_request(adapter, SLIC_UPR_RLSR,
1747 (u32)&pshmem->linkstatus, /* no 4GB wrap guaranteed */
1748 0, 0, 0);
1749 #endif
1750 return status;
1751 }
1752
1753 static void slic_init_cleanup(struct adapter *adapter)
1754 {
1755 if (adapter->intrregistered) {
1756 adapter->intrregistered = 0;
1757 free_irq(adapter->netdev->irq, adapter->netdev);
1758 }
1759 if (adapter->pshmem) {
1760 pci_free_consistent(adapter->pcidev,
1761 sizeof(struct slic_shmem),
1762 adapter->pshmem, adapter->phys_shmem);
1763 adapter->pshmem = NULL;
1764 adapter->phys_shmem = (dma_addr_t)(unsigned long)NULL;
1765 }
1766
1767 if (adapter->pingtimerset) {
1768 adapter->pingtimerset = 0;
1769 del_timer(&adapter->pingtimer);
1770 }
1771
1772 slic_rspqueue_free(adapter);
1773 slic_cmdq_free(adapter);
1774 slic_rcvqueue_free(adapter);
1775 }
1776
1777 /*
1778 * Allocate a mcast_address structure to hold the multicast address.
1779 * Link it in.
1780 */
1781 static int slic_mcast_add_list(struct adapter *adapter, char *address)
1782 {
1783 struct mcast_address *mcaddr, *mlist;
1784
1785 /* Check to see if it already exists */
1786 mlist = adapter->mcastaddrs;
1787 while (mlist) {
1788 if (ether_addr_equal(mlist->address, address))
1789 return 0;
1790 mlist = mlist->next;
1791 }
1792
1793 /* Doesn't already exist. Allocate a structure to hold it */
1794 mcaddr = kmalloc(sizeof(*mcaddr), GFP_ATOMIC);
1795 if (mcaddr == NULL)
1796 return 1;
1797
1798 ether_addr_copy(mcaddr->address, address);
1799
1800 mcaddr->next = adapter->mcastaddrs;
1801 adapter->mcastaddrs = mcaddr;
1802
1803 return 0;
1804 }
1805
1806 static void slic_mcast_set_list(struct net_device *dev)
1807 {
1808 struct adapter *adapter = netdev_priv(dev);
1809 int status = 0;
1810 char *addresses;
1811 struct netdev_hw_addr *ha;
1812
1813 netdev_for_each_mc_addr(ha, dev) {
1814 addresses = (char *)&ha->addr;
1815 status = slic_mcast_add_list(adapter, addresses);
1816 if (status != 0)
1817 break;
1818 slic_mcast_set_bit(adapter, addresses);
1819 }
1820
1821 if (adapter->devflags_prev != dev->flags) {
1822 adapter->macopts = MAC_DIRECTED;
1823 if (dev->flags) {
1824 if (dev->flags & IFF_BROADCAST)
1825 adapter->macopts |= MAC_BCAST;
1826 if (dev->flags & IFF_PROMISC)
1827 adapter->macopts |= MAC_PROMISC;
1828 if (dev->flags & IFF_ALLMULTI)
1829 adapter->macopts |= MAC_ALLMCAST;
1830 if (dev->flags & IFF_MULTICAST)
1831 adapter->macopts |= MAC_MCAST;
1832 }
1833 adapter->devflags_prev = dev->flags;
1834 slic_config_set(adapter, true);
1835 } else {
1836 if (status == 0)
1837 slic_mcast_set_mask(adapter);
1838 }
1839 }
1840
1841 #define XMIT_FAIL_LINK_STATE 1
1842 #define XMIT_FAIL_ZERO_LENGTH 2
1843 #define XMIT_FAIL_HOSTCMD_FAIL 3
1844
1845 static void slic_xmit_build_request(struct adapter *adapter,
1846 struct slic_hostcmd *hcmd, struct sk_buff *skb)
1847 {
1848 struct slic_host64_cmd *ihcmd;
1849 ulong phys_addr;
1850
1851 ihcmd = &hcmd->cmd64;
1852
1853 ihcmd->flags = adapter->port << IHFLG_IFSHFT;
1854 ihcmd->command = IHCMD_XMT_REQ;
1855 ihcmd->u.slic_buffers.totlen = skb->len;
1856 phys_addr = pci_map_single(adapter->pcidev, skb->data, skb->len,
1857 PCI_DMA_TODEVICE);
1858 ihcmd->u.slic_buffers.bufs[0].paddrl = SLIC_GET_ADDR_LOW(phys_addr);
1859 ihcmd->u.slic_buffers.bufs[0].paddrh = SLIC_GET_ADDR_HIGH(phys_addr);
1860 ihcmd->u.slic_buffers.bufs[0].length = skb->len;
1861 #if BITS_PER_LONG == 64
1862 hcmd->cmdsize = (u32)((((u64)&ihcmd->u.slic_buffers.bufs[1] -
1863 (u64)hcmd) + 31) >> 5);
1864 #else
1865 hcmd->cmdsize = (((u32)&ihcmd->u.slic_buffers.bufs[1] -
1866 (u32)hcmd) + 31) >> 5;
1867 #endif
1868 }
1869
1870 static void slic_xmit_fail(struct adapter *adapter,
1871 struct sk_buff *skb,
1872 void *cmd, u32 skbtype, u32 status)
1873 {
1874 if (adapter->xmitq_full)
1875 netif_stop_queue(adapter->netdev);
1876 if ((cmd == NULL) && (status <= XMIT_FAIL_HOSTCMD_FAIL)) {
1877 switch (status) {
1878 case XMIT_FAIL_LINK_STATE:
1879 dev_err(&adapter->netdev->dev,
1880 "reject xmit skb[%p: %x] linkstate[%s] adapter[%s:%d] card[%s:%d]\n",
1881 skb, skb->pkt_type,
1882 SLIC_LINKSTATE(adapter->linkstate),
1883 SLIC_ADAPTER_STATE(adapter->state),
1884 adapter->state,
1885 SLIC_CARD_STATE(adapter->card->state),
1886 adapter->card->state);
1887 break;
1888 case XMIT_FAIL_ZERO_LENGTH:
1889 dev_err(&adapter->netdev->dev,
1890 "xmit_start skb->len == 0 skb[%p] type[%x]\n",
1891 skb, skb->pkt_type);
1892 break;
1893 case XMIT_FAIL_HOSTCMD_FAIL:
1894 dev_err(&adapter->netdev->dev,
1895 "xmit_start skb[%p] type[%x] No host commands available\n",
1896 skb, skb->pkt_type);
1897 break;
1898 }
1899 }
1900 dev_kfree_skb(skb);
1901 adapter->netdev->stats.tx_dropped++;
1902 }
1903
1904 static void slic_rcv_handle_error(struct adapter *adapter,
1905 struct slic_rcvbuf *rcvbuf)
1906 {
1907 struct slic_hddr_wds *hdr = (struct slic_hddr_wds *)rcvbuf->data;
1908 struct net_device *netdev = adapter->netdev;
1909
1910 if (adapter->devid != SLIC_1GB_DEVICE_ID) {
1911 if (hdr->frame_status14 & VRHSTAT_802OE)
1912 adapter->if_events.oflow802++;
1913 if (hdr->frame_status14 & VRHSTAT_TPOFLO)
1914 adapter->if_events.Tprtoflow++;
1915 if (hdr->frame_status_b14 & VRHSTATB_802UE)
1916 adapter->if_events.uflow802++;
1917 if (hdr->frame_status_b14 & VRHSTATB_RCVE) {
1918 adapter->if_events.rcvearly++;
1919 netdev->stats.rx_fifo_errors++;
1920 }
1921 if (hdr->frame_status_b14 & VRHSTATB_BUFF) {
1922 adapter->if_events.Bufov++;
1923 netdev->stats.rx_over_errors++;
1924 }
1925 if (hdr->frame_status_b14 & VRHSTATB_CARRE) {
1926 adapter->if_events.Carre++;
1927 netdev->stats.tx_carrier_errors++;
1928 }
1929 if (hdr->frame_status_b14 & VRHSTATB_LONGE)
1930 adapter->if_events.Longe++;
1931 if (hdr->frame_status_b14 & VRHSTATB_PREA)
1932 adapter->if_events.Invp++;
1933 if (hdr->frame_status_b14 & VRHSTATB_CRC) {
1934 adapter->if_events.Crc++;
1935 netdev->stats.rx_crc_errors++;
1936 }
1937 if (hdr->frame_status_b14 & VRHSTATB_DRBL)
1938 adapter->if_events.Drbl++;
1939 if (hdr->frame_status_b14 & VRHSTATB_CODE)
1940 adapter->if_events.Code++;
1941 if (hdr->frame_status_b14 & VRHSTATB_TPCSUM)
1942 adapter->if_events.TpCsum++;
1943 if (hdr->frame_status_b14 & VRHSTATB_TPHLEN)
1944 adapter->if_events.TpHlen++;
1945 if (hdr->frame_status_b14 & VRHSTATB_IPCSUM)
1946 adapter->if_events.IpCsum++;
1947 if (hdr->frame_status_b14 & VRHSTATB_IPLERR)
1948 adapter->if_events.IpLen++;
1949 if (hdr->frame_status_b14 & VRHSTATB_IPHERR)
1950 adapter->if_events.IpHlen++;
1951 } else {
1952 if (hdr->frame_statusGB & VGBSTAT_XPERR) {
1953 u32 xerr = hdr->frame_statusGB >> VGBSTAT_XERRSHFT;
1954
1955 if (xerr == VGBSTAT_XCSERR)
1956 adapter->if_events.TpCsum++;
1957 if (xerr == VGBSTAT_XUFLOW)
1958 adapter->if_events.Tprtoflow++;
1959 if (xerr == VGBSTAT_XHLEN)
1960 adapter->if_events.TpHlen++;
1961 }
1962 if (hdr->frame_statusGB & VGBSTAT_NETERR) {
1963 u32 nerr =
1964 (hdr->
1965 frame_statusGB >> VGBSTAT_NERRSHFT) &
1966 VGBSTAT_NERRMSK;
1967 if (nerr == VGBSTAT_NCSERR)
1968 adapter->if_events.IpCsum++;
1969 if (nerr == VGBSTAT_NUFLOW)
1970 adapter->if_events.IpLen++;
1971 if (nerr == VGBSTAT_NHLEN)
1972 adapter->if_events.IpHlen++;
1973 }
1974 if (hdr->frame_statusGB & VGBSTAT_LNKERR) {
1975 u32 lerr = hdr->frame_statusGB & VGBSTAT_LERRMSK;
1976
1977 if (lerr == VGBSTAT_LDEARLY)
1978 adapter->if_events.rcvearly++;
1979 if (lerr == VGBSTAT_LBOFLO)
1980 adapter->if_events.Bufov++;
1981 if (lerr == VGBSTAT_LCODERR)
1982 adapter->if_events.Code++;
1983 if (lerr == VGBSTAT_LDBLNBL)
1984 adapter->if_events.Drbl++;
1985 if (lerr == VGBSTAT_LCRCERR)
1986 adapter->if_events.Crc++;
1987 if (lerr == VGBSTAT_LOFLO)
1988 adapter->if_events.oflow802++;
1989 if (lerr == VGBSTAT_LUFLO)
1990 adapter->if_events.uflow802++;
1991 }
1992 }
1993 }
1994
1995 #define TCP_OFFLOAD_FRAME_PUSHFLAG 0x10000000
1996 #define M_FAST_PATH 0x0040
1997
1998 static void slic_rcv_handler(struct adapter *adapter)
1999 {
2000 struct net_device *netdev = adapter->netdev;
2001 struct sk_buff *skb;
2002 struct slic_rcvbuf *rcvbuf;
2003 u32 frames = 0;
2004
2005 while ((skb = slic_rcvqueue_getnext(adapter))) {
2006 u32 rx_bytes;
2007
2008 rcvbuf = (struct slic_rcvbuf *)skb->head;
2009 adapter->card->events++;
2010 if (rcvbuf->status & IRHDDR_ERR) {
2011 adapter->rx_errors++;
2012 slic_rcv_handle_error(adapter, rcvbuf);
2013 slic_rcvqueue_reinsert(adapter, skb);
2014 continue;
2015 }
2016
2017 if (!slic_mac_filter(adapter, (struct ether_header *)
2018 rcvbuf->data)) {
2019 slic_rcvqueue_reinsert(adapter, skb);
2020 continue;
2021 }
2022 skb_pull(skb, SLIC_RCVBUF_HEADSIZE);
2023 rx_bytes = (rcvbuf->length & IRHDDR_FLEN_MSK);
2024 skb_put(skb, rx_bytes);
2025 netdev->stats.rx_packets++;
2026 netdev->stats.rx_bytes += rx_bytes;
2027 #if SLIC_OFFLOAD_IP_CHECKSUM
2028 skb->ip_summed = CHECKSUM_UNNECESSARY;
2029 #endif
2030
2031 skb->dev = adapter->netdev;
2032 skb->protocol = eth_type_trans(skb, skb->dev);
2033 netif_rx(skb);
2034
2035 ++frames;
2036 #if SLIC_INTERRUPT_PROCESS_LIMIT
2037 if (frames >= SLIC_RCVQ_MAX_PROCESS_ISR) {
2038 adapter->rcv_interrupt_yields++;
2039 break;
2040 }
2041 #endif
2042 }
2043 adapter->max_isr_rcvs = max(adapter->max_isr_rcvs, frames);
2044 }
2045
2046 static void slic_xmit_complete(struct adapter *adapter)
2047 {
2048 struct slic_hostcmd *hcmd;
2049 struct slic_rspbuf *rspbuf;
2050 u32 frames = 0;
2051 struct slic_handle_word slic_handle_word;
2052
2053 do {
2054 rspbuf = slic_rspqueue_getnext(adapter);
2055 if (!rspbuf)
2056 break;
2057 adapter->xmit_completes++;
2058 adapter->card->events++;
2059 /*
2060 * Get the complete host command buffer
2061 */
2062 slic_handle_word.handle_token = rspbuf->hosthandle;
2063 hcmd =
2064 adapter->slic_handles[slic_handle_word.handle_index].
2065 address;
2066 /* hcmd = (struct slic_hostcmd *) rspbuf->hosthandle; */
2067 if (hcmd->type == SLIC_CMD_DUMB) {
2068 if (hcmd->skb)
2069 dev_kfree_skb_irq(hcmd->skb);
2070 slic_cmdq_putdone_irq(adapter, hcmd);
2071 }
2072 rspbuf->status = 0;
2073 rspbuf->hosthandle = 0;
2074 frames++;
2075 } while (1);
2076 adapter->max_isr_xmits = max(adapter->max_isr_xmits, frames);
2077 }
2078
2079 static void slic_interrupt_card_up(u32 isr, struct adapter *adapter,
2080 struct net_device *dev)
2081 {
2082 if (isr & ~ISR_IO) {
2083 if (isr & ISR_ERR) {
2084 adapter->error_interrupts++;
2085 if (isr & ISR_RMISS) {
2086 int count;
2087 int pre_count;
2088 int errors;
2089
2090 struct slic_rcvqueue *rcvq =
2091 &adapter->rcvqueue;
2092
2093 adapter->error_rmiss_interrupts++;
2094
2095 if (!rcvq->errors)
2096 rcv_count = rcvq->count;
2097 pre_count = rcvq->count;
2098 errors = rcvq->errors;
2099
2100 while (rcvq->count < SLIC_RCVQ_FILLTHRESH) {
2101 count = slic_rcvqueue_fill(adapter);
2102 if (!count)
2103 break;
2104 }
2105 } else if (isr & ISR_XDROP) {
2106 dev_err(&dev->dev,
2107 "isr & ISR_ERR [%x] ISR_XDROP\n",
2108 isr);
2109 } else {
2110 dev_err(&dev->dev,
2111 "isr & ISR_ERR [%x]\n",
2112 isr);
2113 }
2114 }
2115
2116 if (isr & ISR_LEVENT) {
2117 adapter->linkevent_interrupts++;
2118 if (slic_link_event_handler(adapter))
2119 adapter->linkevent_interrupts--;
2120 }
2121
2122 if ((isr & ISR_UPC) || (isr & ISR_UPCERR) ||
2123 (isr & ISR_UPCBSY)) {
2124 adapter->upr_interrupts++;
2125 slic_upr_request_complete(adapter, isr);
2126 }
2127 }
2128
2129 if (isr & ISR_RCV) {
2130 adapter->rcv_interrupts++;
2131 slic_rcv_handler(adapter);
2132 }
2133
2134 if (isr & ISR_CMD) {
2135 adapter->xmit_interrupts++;
2136 slic_xmit_complete(adapter);
2137 }
2138 }
2139
2140 static irqreturn_t slic_interrupt(int irq, void *dev_id)
2141 {
2142 struct net_device *dev = dev_id;
2143 struct adapter *adapter = netdev_priv(dev);
2144 u32 isr;
2145
2146 if ((adapter->pshmem) && (adapter->pshmem->isr)) {
2147 slic_reg32_write(&adapter->slic_regs->slic_icr,
2148 ICR_INT_MASK, FLUSH);
2149 isr = adapter->isrcopy = adapter->pshmem->isr;
2150 adapter->pshmem->isr = 0;
2151 adapter->num_isrs++;
2152 switch (adapter->card->state) {
2153 case CARD_UP:
2154 slic_interrupt_card_up(isr, adapter, dev);
2155 break;
2156
2157 case CARD_DOWN:
2158 if ((isr & ISR_UPC) ||
2159 (isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
2160 adapter->upr_interrupts++;
2161 slic_upr_request_complete(adapter, isr);
2162 }
2163 break;
2164 }
2165
2166 adapter->isrcopy = 0;
2167 adapter->all_reg_writes += 2;
2168 adapter->isr_reg_writes++;
2169 slic_reg32_write(&adapter->slic_regs->slic_isr, 0, FLUSH);
2170 } else {
2171 adapter->false_interrupts++;
2172 }
2173 return IRQ_HANDLED;
2174 }
2175
2176 #define NORMAL_ETHFRAME 0
2177
2178 static netdev_tx_t slic_xmit_start(struct sk_buff *skb, struct net_device *dev)
2179 {
2180 struct sliccard *card;
2181 struct adapter *adapter = netdev_priv(dev);
2182 struct slic_hostcmd *hcmd = NULL;
2183 u32 status = 0;
2184 void *offloadcmd = NULL;
2185
2186 card = adapter->card;
2187 if ((adapter->linkstate != LINK_UP) ||
2188 (adapter->state != ADAPT_UP) || (card->state != CARD_UP)) {
2189 status = XMIT_FAIL_LINK_STATE;
2190 goto xmit_fail;
2191
2192 } else if (skb->len == 0) {
2193 status = XMIT_FAIL_ZERO_LENGTH;
2194 goto xmit_fail;
2195 }
2196
2197 hcmd = slic_cmdq_getfree(adapter);
2198 if (!hcmd) {
2199 adapter->xmitq_full = 1;
2200 status = XMIT_FAIL_HOSTCMD_FAIL;
2201 goto xmit_fail;
2202 }
2203 hcmd->skb = skb;
2204 hcmd->busy = 1;
2205 hcmd->type = SLIC_CMD_DUMB;
2206 slic_xmit_build_request(adapter, hcmd, skb);
2207 dev->stats.tx_packets++;
2208 dev->stats.tx_bytes += skb->len;
2209
2210 #ifdef DEBUG_DUMP
2211 if (adapter->kill_card) {
2212 struct slic_host64_cmd ihcmd;
2213
2214 ihcmd = &hcmd->cmd64;
2215
2216 ihcmd->flags |= 0x40;
2217 adapter->kill_card = 0; /* only do this once */
2218 }
2219 #endif
2220 if (hcmd->paddrh == 0) {
2221 slic_reg32_write(&adapter->slic_regs->slic_cbar,
2222 (hcmd->paddrl | hcmd->cmdsize), DONT_FLUSH);
2223 } else {
2224 slic_reg64_write(adapter, &adapter->slic_regs->slic_cbar64,
2225 (hcmd->paddrl | hcmd->cmdsize),
2226 &adapter->slic_regs->slic_addr_upper,
2227 hcmd->paddrh, DONT_FLUSH);
2228 }
2229 xmit_done:
2230 return NETDEV_TX_OK;
2231 xmit_fail:
2232 slic_xmit_fail(adapter, skb, offloadcmd, NORMAL_ETHFRAME, status);
2233 goto xmit_done;
2234 }
2235
2236 static void slic_adapter_freeresources(struct adapter *adapter)
2237 {
2238 slic_init_cleanup(adapter);
2239 adapter->error_interrupts = 0;
2240 adapter->rcv_interrupts = 0;
2241 adapter->xmit_interrupts = 0;
2242 adapter->linkevent_interrupts = 0;
2243 adapter->upr_interrupts = 0;
2244 adapter->num_isrs = 0;
2245 adapter->xmit_completes = 0;
2246 adapter->rcv_broadcasts = 0;
2247 adapter->rcv_multicasts = 0;
2248 adapter->rcv_unicasts = 0;
2249 }
2250
2251 static int slic_adapter_allocresources(struct adapter *adapter,
2252 unsigned long *flags)
2253 {
2254 if (!adapter->intrregistered) {
2255 int retval;
2256
2257 spin_unlock_irqrestore(&slic_global.driver_lock, *flags);
2258
2259 retval = request_irq(adapter->netdev->irq,
2260 &slic_interrupt,
2261 IRQF_SHARED,
2262 adapter->netdev->name, adapter->netdev);
2263
2264 spin_lock_irqsave(&slic_global.driver_lock, *flags);
2265
2266 if (retval) {
2267 dev_err(&adapter->netdev->dev,
2268 "request_irq (%s) FAILED [%x]\n",
2269 adapter->netdev->name, retval);
2270 return retval;
2271 }
2272 adapter->intrregistered = 1;
2273 }
2274 return 0;
2275 }
2276
2277 /*
2278 * slic_if_init
2279 *
2280 * Perform initialization of our slic interface.
2281 *
2282 */
2283 static int slic_if_init(struct adapter *adapter, unsigned long *flags)
2284 {
2285 struct sliccard *card = adapter->card;
2286 struct net_device *dev = adapter->netdev;
2287 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2288 struct slic_shmem *pshmem;
2289 int rc;
2290
2291 /* adapter should be down at this point */
2292 if (adapter->state != ADAPT_DOWN) {
2293 dev_err(&dev->dev, "%s: adapter->state != ADAPT_DOWN\n",
2294 __func__);
2295 rc = -EIO;
2296 goto err;
2297 }
2298
2299 adapter->devflags_prev = dev->flags;
2300 adapter->macopts = MAC_DIRECTED;
2301 if (dev->flags) {
2302 if (dev->flags & IFF_BROADCAST)
2303 adapter->macopts |= MAC_BCAST;
2304 if (dev->flags & IFF_PROMISC)
2305 adapter->macopts |= MAC_PROMISC;
2306 if (dev->flags & IFF_ALLMULTI)
2307 adapter->macopts |= MAC_ALLMCAST;
2308 if (dev->flags & IFF_MULTICAST)
2309 adapter->macopts |= MAC_MCAST;
2310 }
2311 rc = slic_adapter_allocresources(adapter, flags);
2312 if (rc) {
2313 dev_err(&dev->dev, "slic_adapter_allocresources FAILED %x\n",
2314 rc);
2315 slic_adapter_freeresources(adapter);
2316 goto err;
2317 }
2318
2319 if (!adapter->queues_initialized) {
2320 rc = slic_rspqueue_init(adapter);
2321 if (rc)
2322 goto err;
2323 rc = slic_cmdq_init(adapter);
2324 if (rc)
2325 goto err;
2326 rc = slic_rcvqueue_init(adapter);
2327 if (rc)
2328 goto err;
2329 adapter->queues_initialized = 1;
2330 }
2331
2332 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
2333 mdelay(1);
2334
2335 if (!adapter->isp_initialized) {
2336 unsigned long flags;
2337
2338 pshmem = (struct slic_shmem *)(unsigned long)
2339 adapter->phys_shmem;
2340
2341 spin_lock_irqsave(&adapter->bit64reglock, flags);
2342
2343 #if BITS_PER_LONG == 64
2344 slic_reg32_write(&slic_regs->slic_addr_upper,
2345 SLIC_GET_ADDR_HIGH(&pshmem->isr), DONT_FLUSH);
2346 slic_reg32_write(&slic_regs->slic_isp,
2347 SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH);
2348 #else
2349 slic_reg32_write(&slic_regs->slic_addr_upper, 0, DONT_FLUSH);
2350 slic_reg32_write(&slic_regs->slic_isp, (u32)&pshmem->isr,
2351 FLUSH);
2352 #endif
2353 spin_unlock_irqrestore(&adapter->bit64reglock, flags);
2354 adapter->isp_initialized = 1;
2355 }
2356
2357 adapter->state = ADAPT_UP;
2358 if (!card->loadtimerset) {
2359 setup_timer(&card->loadtimer, &slic_timer_load_check,
2360 (ulong)card);
2361 card->loadtimer.expires =
2362 jiffies + (SLIC_LOADTIMER_PERIOD * HZ);
2363 add_timer(&card->loadtimer);
2364
2365 card->loadtimerset = 1;
2366 }
2367
2368 if (!adapter->pingtimerset) {
2369 setup_timer(&adapter->pingtimer, &slic_timer_ping, (ulong)dev);
2370 adapter->pingtimer.expires =
2371 jiffies + (PING_TIMER_INTERVAL * HZ);
2372 add_timer(&adapter->pingtimer);
2373 adapter->pingtimerset = 1;
2374 adapter->card->pingstatus = ISR_PINGMASK;
2375 }
2376
2377 /*
2378 * clear any pending events, then enable interrupts
2379 */
2380 adapter->isrcopy = 0;
2381 adapter->pshmem->isr = 0;
2382 slic_reg32_write(&slic_regs->slic_isr, 0, FLUSH);
2383 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_ON, FLUSH);
2384
2385 slic_link_config(adapter, LINK_AUTOSPEED, LINK_AUTOD);
2386 rc = slic_link_event_handler(adapter);
2387 if (rc) {
2388 /* disable interrupts then clear pending events */
2389 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
2390 slic_reg32_write(&slic_regs->slic_isr, 0, FLUSH);
2391 if (adapter->pingtimerset) {
2392 del_timer(&adapter->pingtimer);
2393 adapter->pingtimerset = 0;
2394 }
2395 if (card->loadtimerset) {
2396 del_timer(&card->loadtimer);
2397 card->loadtimerset = 0;
2398 }
2399 adapter->state = ADAPT_DOWN;
2400 slic_adapter_freeresources(adapter);
2401 }
2402
2403 err:
2404 return rc;
2405 }
2406
2407 static int slic_entry_open(struct net_device *dev)
2408 {
2409 struct adapter *adapter = netdev_priv(dev);
2410 struct sliccard *card = adapter->card;
2411 unsigned long flags;
2412 int status;
2413
2414 netif_stop_queue(adapter->netdev);
2415
2416 spin_lock_irqsave(&slic_global.driver_lock, flags);
2417 if (!adapter->activated) {
2418 card->adapters_activated++;
2419 slic_global.num_slic_ports_active++;
2420 adapter->activated = 1;
2421 }
2422 status = slic_if_init(adapter, &flags);
2423
2424 if (status != 0) {
2425 if (adapter->activated) {
2426 card->adapters_activated--;
2427 slic_global.num_slic_ports_active--;
2428 adapter->activated = 0;
2429 }
2430 goto spin_unlock;
2431 }
2432 if (!card->master)
2433 card->master = adapter;
2434
2435 spin_unlock:
2436 spin_unlock_irqrestore(&slic_global.driver_lock, flags);
2437 return status;
2438 }
2439
2440 static void slic_card_cleanup(struct sliccard *card)
2441 {
2442 if (card->loadtimerset) {
2443 card->loadtimerset = 0;
2444 del_timer_sync(&card->loadtimer);
2445 }
2446
2447 kfree(card);
2448 }
2449
2450 static void slic_entry_remove(struct pci_dev *pcidev)
2451 {
2452 struct net_device *dev = pci_get_drvdata(pcidev);
2453 struct adapter *adapter = netdev_priv(dev);
2454 struct sliccard *card;
2455 struct mcast_address *mcaddr, *mlist;
2456
2457 unregister_netdev(dev);
2458
2459 slic_adapter_freeresources(adapter);
2460 slic_unmap_mmio_space(adapter);
2461
2462 /* free multicast addresses */
2463 mlist = adapter->mcastaddrs;
2464 while (mlist) {
2465 mcaddr = mlist;
2466 mlist = mlist->next;
2467 kfree(mcaddr);
2468 }
2469 card = adapter->card;
2470 card->adapters_allocated--;
2471 adapter->allocated = 0;
2472 if (!card->adapters_allocated) {
2473 struct sliccard *curr_card = slic_global.slic_card;
2474
2475 if (curr_card == card) {
2476 slic_global.slic_card = card->next;
2477 } else {
2478 while (curr_card->next != card)
2479 curr_card = curr_card->next;
2480 curr_card->next = card->next;
2481 }
2482 slic_global.num_slic_cards--;
2483 slic_card_cleanup(card);
2484 }
2485 free_netdev(dev);
2486 pci_release_regions(pcidev);
2487 pci_disable_device(pcidev);
2488 }
2489
2490 static int slic_entry_halt(struct net_device *dev)
2491 {
2492 struct adapter *adapter = netdev_priv(dev);
2493 struct sliccard *card = adapter->card;
2494 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2495 unsigned long flags;
2496
2497 spin_lock_irqsave(&slic_global.driver_lock, flags);
2498 netif_stop_queue(adapter->netdev);
2499 adapter->state = ADAPT_DOWN;
2500 adapter->linkstate = LINK_DOWN;
2501 adapter->upr_list = NULL;
2502 adapter->upr_busy = 0;
2503 adapter->devflags_prev = 0;
2504 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
2505 adapter->all_reg_writes++;
2506 adapter->icr_reg_writes++;
2507 slic_config_clear(adapter);
2508 if (adapter->activated) {
2509 card->adapters_activated--;
2510 slic_global.num_slic_ports_active--;
2511 adapter->activated = 0;
2512 }
2513 #ifdef AUTOMATIC_RESET
2514 slic_reg32_write(&slic_regs->slic_reset_iface, 0, FLUSH);
2515 #endif
2516 /*
2517 * Reset the adapter's cmd queues
2518 */
2519 slic_cmdq_reset(adapter);
2520
2521 #ifdef AUTOMATIC_RESET
2522 if (!card->adapters_activated)
2523 slic_card_init(card, adapter);
2524 #endif
2525
2526 spin_unlock_irqrestore(&slic_global.driver_lock, flags);
2527 return 0;
2528 }
2529
2530 static struct net_device_stats *slic_get_stats(struct net_device *dev)
2531 {
2532 struct adapter *adapter = netdev_priv(dev);
2533
2534 dev->stats.collisions = adapter->slic_stats.iface.xmit_collisions;
2535 dev->stats.rx_errors = adapter->slic_stats.iface.rcv_errors;
2536 dev->stats.tx_errors = adapter->slic_stats.iface.xmt_errors;
2537 dev->stats.rx_missed_errors = adapter->slic_stats.iface.rcv_discards;
2538 dev->stats.tx_heartbeat_errors = 0;
2539 dev->stats.tx_aborted_errors = 0;
2540 dev->stats.tx_window_errors = 0;
2541 dev->stats.tx_fifo_errors = 0;
2542 dev->stats.rx_frame_errors = 0;
2543 dev->stats.rx_length_errors = 0;
2544
2545 return &dev->stats;
2546 }
2547
2548 static int slic_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2549 {
2550 struct adapter *adapter = netdev_priv(dev);
2551 struct ethtool_cmd edata;
2552 struct ethtool_cmd ecmd;
2553 u32 data[7];
2554 u32 intagg;
2555
2556 switch (cmd) {
2557 case SIOCSLICSETINTAGG:
2558 if (copy_from_user(data, rq->ifr_data, 28))
2559 return -EFAULT;
2560 intagg = data[0];
2561 dev_err(&dev->dev, "set interrupt aggregation to %d\n",
2562 intagg);
2563 slic_intagg_set(adapter, intagg);
2564 return 0;
2565
2566 case SIOCETHTOOL:
2567 if (copy_from_user(&ecmd, rq->ifr_data, sizeof(ecmd)))
2568 return -EFAULT;
2569
2570 if (ecmd.cmd == ETHTOOL_GSET) {
2571 memset(&edata, 0, sizeof(edata));
2572 edata.supported = (SUPPORTED_10baseT_Half |
2573 SUPPORTED_10baseT_Full |
2574 SUPPORTED_100baseT_Half |
2575 SUPPORTED_100baseT_Full |
2576 SUPPORTED_Autoneg | SUPPORTED_MII);
2577 edata.port = PORT_MII;
2578 edata.transceiver = XCVR_INTERNAL;
2579 edata.phy_address = 0;
2580 if (adapter->linkspeed == LINK_100MB)
2581 edata.speed = SPEED_100;
2582 else if (adapter->linkspeed == LINK_10MB)
2583 edata.speed = SPEED_10;
2584 else
2585 edata.speed = 0;
2586
2587 if (adapter->linkduplex == LINK_FULLD)
2588 edata.duplex = DUPLEX_FULL;
2589 else
2590 edata.duplex = DUPLEX_HALF;
2591
2592 edata.autoneg = AUTONEG_ENABLE;
2593 edata.maxtxpkt = 1;
2594 edata.maxrxpkt = 1;
2595 if (copy_to_user(rq->ifr_data, &edata, sizeof(edata)))
2596 return -EFAULT;
2597
2598 } else if (ecmd.cmd == ETHTOOL_SSET) {
2599 if (!capable(CAP_NET_ADMIN))
2600 return -EPERM;
2601
2602 if (adapter->linkspeed == LINK_100MB)
2603 edata.speed = SPEED_100;
2604 else if (adapter->linkspeed == LINK_10MB)
2605 edata.speed = SPEED_10;
2606 else
2607 edata.speed = 0;
2608
2609 if (adapter->linkduplex == LINK_FULLD)
2610 edata.duplex = DUPLEX_FULL;
2611 else
2612 edata.duplex = DUPLEX_HALF;
2613
2614 edata.autoneg = AUTONEG_ENABLE;
2615 edata.maxtxpkt = 1;
2616 edata.maxrxpkt = 1;
2617 if ((ecmd.speed != edata.speed) ||
2618 (ecmd.duplex != edata.duplex)) {
2619 u32 speed;
2620 u32 duplex;
2621
2622 if (ecmd.speed == SPEED_10)
2623 speed = 0;
2624 else
2625 speed = PCR_SPEED_100;
2626 if (ecmd.duplex == DUPLEX_FULL)
2627 duplex = PCR_DUPLEX_FULL;
2628 else
2629 duplex = 0;
2630 slic_link_config(adapter, speed, duplex);
2631 if (slic_link_event_handler(adapter))
2632 return -EFAULT;
2633 }
2634 }
2635 return 0;
2636 default:
2637 return -EOPNOTSUPP;
2638 }
2639 }
2640
2641 static void slic_config_pci(struct pci_dev *pcidev)
2642 {
2643 u16 pci_command;
2644 u16 new_command;
2645
2646 pci_read_config_word(pcidev, PCI_COMMAND, &pci_command);
2647
2648 new_command = pci_command | PCI_COMMAND_MASTER
2649 | PCI_COMMAND_MEMORY
2650 | PCI_COMMAND_INVALIDATE
2651 | PCI_COMMAND_PARITY | PCI_COMMAND_SERR | PCI_COMMAND_FAST_BACK;
2652 if (pci_command != new_command)
2653 pci_write_config_word(pcidev, PCI_COMMAND, new_command);
2654 }
2655
2656 static int slic_card_init(struct sliccard *card, struct adapter *adapter)
2657 {
2658 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2659 struct slic_eeprom *peeprom;
2660 struct oslic_eeprom *pOeeprom;
2661 dma_addr_t phys_config;
2662 u32 phys_configh;
2663 u32 phys_configl;
2664 u32 i = 0;
2665 struct slic_shmem *pshmem;
2666 int status;
2667 uint macaddrs = card->card_size;
2668 ushort eecodesize;
2669 ushort dramsize;
2670 ushort ee_chksum;
2671 ushort calc_chksum;
2672 struct slic_config_mac *pmac;
2673 unsigned char fruformat;
2674 unsigned char oemfruformat;
2675 struct atk_fru *patkfru;
2676 union oemfru *poemfru;
2677 unsigned long flags;
2678
2679 /* Reset everything except PCI configuration space */
2680 slic_soft_reset(adapter);
2681
2682 /* Download the microcode */
2683 status = slic_card_download(adapter);
2684 if (status)
2685 return status;
2686
2687 if (!card->config_set) {
2688 peeprom = pci_alloc_consistent(adapter->pcidev,
2689 sizeof(struct slic_eeprom),
2690 &phys_config);
2691
2692 phys_configl = SLIC_GET_ADDR_LOW(phys_config);
2693 phys_configh = SLIC_GET_ADDR_HIGH(phys_config);
2694
2695 if (!peeprom) {
2696 dev_err(&adapter->pcidev->dev,
2697 "Failed to allocate DMA memory for EEPROM.\n");
2698 return -ENOMEM;
2699 }
2700
2701 memset(peeprom, 0, sizeof(struct slic_eeprom));
2702
2703 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
2704 mdelay(1);
2705 pshmem = (struct slic_shmem *)(unsigned long)
2706 adapter->phys_shmem;
2707
2708 spin_lock_irqsave(&adapter->bit64reglock, flags);
2709 slic_reg32_write(&slic_regs->slic_addr_upper,
2710 SLIC_GET_ADDR_HIGH(&pshmem->isr), DONT_FLUSH);
2711 slic_reg32_write(&slic_regs->slic_isp,
2712 SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH);
2713 spin_unlock_irqrestore(&adapter->bit64reglock, flags);
2714
2715 status = slic_config_get(adapter, phys_configl, phys_configh);
2716 if (status) {
2717 dev_err(&adapter->pcidev->dev,
2718 "Failed to fetch config data from device.\n");
2719 goto card_init_err;
2720 }
2721
2722 for (;;) {
2723 if (adapter->pshmem->isr) {
2724 if (adapter->pshmem->isr & ISR_UPC) {
2725 adapter->pshmem->isr = 0;
2726 slic_reg64_write(adapter,
2727 &slic_regs->slic_isp, 0,
2728 &slic_regs->slic_addr_upper,
2729 0, FLUSH);
2730 slic_reg32_write(&slic_regs->slic_isr,
2731 0, FLUSH);
2732
2733 slic_upr_request_complete(adapter, 0);
2734 break;
2735 }
2736
2737 adapter->pshmem->isr = 0;
2738 slic_reg32_write(&slic_regs->slic_isr,
2739 0, FLUSH);
2740 } else {
2741 mdelay(1);
2742 i++;
2743 if (i > 5000) {
2744 dev_err(&adapter->pcidev->dev,
2745 "Fetch of config data timed out.\n");
2746 slic_reg64_write(adapter,
2747 &slic_regs->slic_isp, 0,
2748 &slic_regs->slic_addr_upper,
2749 0, FLUSH);
2750 status = -EINVAL;
2751 goto card_init_err;
2752 }
2753 }
2754 }
2755
2756 switch (adapter->devid) {
2757 /* Oasis card */
2758 case SLIC_2GB_DEVICE_ID:
2759 /* extract EEPROM data and pointers to EEPROM data */
2760 pOeeprom = (struct oslic_eeprom *)peeprom;
2761 eecodesize = pOeeprom->EecodeSize;
2762 dramsize = pOeeprom->DramSize;
2763 pmac = pOeeprom->MacInfo;
2764 fruformat = pOeeprom->FruFormat;
2765 patkfru = &pOeeprom->AtkFru;
2766 oemfruformat = pOeeprom->OemFruFormat;
2767 poemfru = &pOeeprom->OemFru;
2768 macaddrs = 2;
2769 /*
2770 * Minor kludge for Oasis card
2771 * get 2 MAC addresses from the
2772 * EEPROM to ensure that function 1
2773 * gets the Port 1 MAC address
2774 */
2775 break;
2776 default:
2777 /* extract EEPROM data and pointers to EEPROM data */
2778 eecodesize = peeprom->EecodeSize;
2779 dramsize = peeprom->DramSize;
2780 pmac = peeprom->u2.mac.MacInfo;
2781 fruformat = peeprom->FruFormat;
2782 patkfru = &peeprom->AtkFru;
2783 oemfruformat = peeprom->OemFruFormat;
2784 poemfru = &peeprom->OemFru;
2785 break;
2786 }
2787
2788 card->config.EepromValid = false;
2789
2790 /* see if the EEPROM is valid by checking it's checksum */
2791 if ((eecodesize <= MAX_EECODE_SIZE) &&
2792 (eecodesize >= MIN_EECODE_SIZE)) {
2793
2794 ee_chksum =
2795 *(u16 *)((char *)peeprom + (eecodesize - 2));
2796 /*
2797 * calculate the EEPROM checksum
2798 */
2799 calc_chksum = slic_eeprom_cksum(peeprom,
2800 eecodesize - 2);
2801 /*
2802 * if the ucdoe chksum flag bit worked,
2803 * we wouldn't need this
2804 */
2805 if (ee_chksum == calc_chksum)
2806 card->config.EepromValid = true;
2807 }
2808 /* copy in the DRAM size */
2809 card->config.DramSize = dramsize;
2810
2811 /* copy in the MAC address(es) */
2812 for (i = 0; i < macaddrs; i++) {
2813 memcpy(&card->config.MacInfo[i],
2814 &pmac[i], sizeof(struct slic_config_mac));
2815 }
2816
2817 /* copy the Alacritech FRU information */
2818 card->config.FruFormat = fruformat;
2819 memcpy(&card->config.AtkFru, patkfru,
2820 sizeof(struct atk_fru));
2821
2822 pci_free_consistent(adapter->pcidev,
2823 sizeof(struct slic_eeprom),
2824 peeprom, phys_config);
2825
2826 if (!card->config.EepromValid) {
2827 slic_reg64_write(adapter, &slic_regs->slic_isp, 0,
2828 &slic_regs->slic_addr_upper,
2829 0, FLUSH);
2830 dev_err(&adapter->pcidev->dev, "EEPROM invalid.\n");
2831 return -EINVAL;
2832 }
2833
2834 card->config_set = 1;
2835 }
2836
2837 status = slic_card_download_gbrcv(adapter);
2838 if (status)
2839 return status;
2840
2841 if (slic_global.dynamic_intagg)
2842 slic_intagg_set(adapter, 0);
2843 else
2844 slic_intagg_set(adapter, adapter->intagg_delay);
2845
2846 /*
2847 * Initialize ping status to "ok"
2848 */
2849 card->pingstatus = ISR_PINGMASK;
2850
2851 /*
2852 * Lastly, mark our card state as up and return success
2853 */
2854 card->state = CARD_UP;
2855 card->reset_in_progress = 0;
2856
2857 return 0;
2858
2859 card_init_err:
2860 pci_free_consistent(adapter->pcidev, sizeof(struct slic_eeprom),
2861 peeprom, phys_config);
2862 return status;
2863 }
2864
2865 static int slic_get_coalesce(struct net_device *dev,
2866 struct ethtool_coalesce *coalesce)
2867 {
2868 struct adapter *adapter = netdev_priv(dev);
2869
2870 adapter->intagg_delay = coalesce->rx_coalesce_usecs;
2871 adapter->dynamic_intagg = coalesce->use_adaptive_rx_coalesce;
2872 return 0;
2873 }
2874
2875 static int slic_set_coalesce(struct net_device *dev,
2876 struct ethtool_coalesce *coalesce)
2877 {
2878 struct adapter *adapter = netdev_priv(dev);
2879
2880 coalesce->rx_coalesce_usecs = adapter->intagg_delay;
2881 coalesce->use_adaptive_rx_coalesce = adapter->dynamic_intagg;
2882 return 0;
2883 }
2884
2885 static void slic_init_driver(void)
2886 {
2887 if (slic_first_init) {
2888 slic_first_init = 0;
2889 spin_lock_init(&slic_global.driver_lock);
2890 }
2891 }
2892
2893 static void slic_init_adapter(struct net_device *netdev,
2894 struct pci_dev *pcidev,
2895 const struct pci_device_id *pci_tbl_entry,
2896 void __iomem *memaddr, int chip_idx)
2897 {
2898 ushort index;
2899 struct slic_handle *pslic_handle;
2900 struct adapter *adapter = netdev_priv(netdev);
2901
2902 /* adapter->pcidev = pcidev;*/
2903 adapter->vendid = pci_tbl_entry->vendor;
2904 adapter->devid = pci_tbl_entry->device;
2905 adapter->subsysid = pci_tbl_entry->subdevice;
2906 adapter->busnumber = pcidev->bus->number;
2907 adapter->slotnumber = ((pcidev->devfn >> 3) & 0x1F);
2908 adapter->functionnumber = (pcidev->devfn & 0x7);
2909 adapter->slic_regs = memaddr;
2910 adapter->irq = pcidev->irq;
2911 adapter->chipid = chip_idx;
2912 adapter->port = 0;
2913 adapter->cardindex = adapter->port;
2914 spin_lock_init(&adapter->upr_lock);
2915 spin_lock_init(&adapter->bit64reglock);
2916 spin_lock_init(&adapter->adapter_lock);
2917 spin_lock_init(&adapter->reset_lock);
2918 spin_lock_init(&adapter->handle_lock);
2919
2920 adapter->card_size = 1;
2921 /*
2922 * Initialize slic_handle array
2923 */
2924 /*
2925 * Start with 1. 0 is an invalid host handle.
2926 */
2927 for (index = 1, pslic_handle = &adapter->slic_handles[1];
2928 index < SLIC_CMDQ_MAXCMDS; index++, pslic_handle++) {
2929
2930 pslic_handle->token.handle_index = index;
2931 pslic_handle->type = SLIC_HANDLE_FREE;
2932 pslic_handle->next = adapter->pfree_slic_handles;
2933 adapter->pfree_slic_handles = pslic_handle;
2934 }
2935 adapter->pshmem = (struct slic_shmem *)
2936 pci_alloc_consistent(adapter->pcidev,
2937 sizeof(struct slic_shmem),
2938 &adapter->
2939 phys_shmem);
2940 if (adapter->pshmem)
2941 memset(adapter->pshmem, 0, sizeof(struct slic_shmem));
2942 }
2943
2944 static const struct net_device_ops slic_netdev_ops = {
2945 .ndo_open = slic_entry_open,
2946 .ndo_stop = slic_entry_halt,
2947 .ndo_start_xmit = slic_xmit_start,
2948 .ndo_do_ioctl = slic_ioctl,
2949 .ndo_set_mac_address = slic_mac_set_address,
2950 .ndo_get_stats = slic_get_stats,
2951 .ndo_set_rx_mode = slic_mcast_set_list,
2952 .ndo_validate_addr = eth_validate_addr,
2953 .ndo_change_mtu = eth_change_mtu,
2954 };
2955
2956 static u32 slic_card_locate(struct adapter *adapter)
2957 {
2958 struct sliccard *card = slic_global.slic_card;
2959 struct physcard *physcard = slic_global.phys_card;
2960 ushort card_hostid;
2961 u16 __iomem *hostid_reg;
2962 uint i;
2963 uint rdhostid_offset = 0;
2964
2965 switch (adapter->devid) {
2966 case SLIC_2GB_DEVICE_ID:
2967 rdhostid_offset = SLIC_RDHOSTID_2GB;
2968 break;
2969 case SLIC_1GB_DEVICE_ID:
2970 rdhostid_offset = SLIC_RDHOSTID_1GB;
2971 break;
2972 default:
2973 return -ENODEV;
2974 }
2975
2976 hostid_reg =
2977 (u16 __iomem *)(((u8 __iomem *)(adapter->slic_regs)) +
2978 rdhostid_offset);
2979
2980 /* read the 16 bit hostid from SRAM */
2981 card_hostid = (ushort)readw(hostid_reg);
2982
2983 /* Initialize a new card structure if need be */
2984 if (card_hostid == SLIC_HOSTID_DEFAULT) {
2985 card = kzalloc(sizeof(*card), GFP_KERNEL);
2986 if (card == NULL)
2987 return -ENOMEM;
2988
2989 card->next = slic_global.slic_card;
2990 slic_global.slic_card = card;
2991 card->busnumber = adapter->busnumber;
2992 card->slotnumber = adapter->slotnumber;
2993
2994 /* Find an available cardnum */
2995 for (i = 0; i < SLIC_MAX_CARDS; i++) {
2996 if (slic_global.cardnuminuse[i] == 0) {
2997 slic_global.cardnuminuse[i] = 1;
2998 card->cardnum = i;
2999 break;
3000 }
3001 }
3002 slic_global.num_slic_cards++;
3003 } else {
3004 /* Card exists, find the card this adapter belongs to */
3005 while (card) {
3006 if (card->cardnum == card_hostid)
3007 break;
3008 card = card->next;
3009 }
3010 }
3011
3012 if (!card)
3013 return -ENXIO;
3014 /* Put the adapter in the card's adapter list */
3015 if (!card->adapter[adapter->port]) {
3016 card->adapter[adapter->port] = adapter;
3017 adapter->card = card;
3018 }
3019
3020 card->card_size = 1; /* one port per *logical* card */
3021
3022 while (physcard) {
3023 for (i = 0; i < SLIC_MAX_PORTS; i++) {
3024 if (physcard->adapter[i])
3025 break;
3026 }
3027 if (i == SLIC_MAX_PORTS)
3028 break;
3029
3030 if (physcard->adapter[i]->slotnumber == adapter->slotnumber)
3031 break;
3032 physcard = physcard->next;
3033 }
3034 if (!physcard) {
3035 /* no structure allocated for this physical card yet */
3036 physcard = kzalloc(sizeof(*physcard), GFP_ATOMIC);
3037 if (!physcard) {
3038 if (card_hostid == SLIC_HOSTID_DEFAULT)
3039 kfree(card);
3040 return -ENOMEM;
3041 }
3042
3043 physcard->next = slic_global.phys_card;
3044 slic_global.phys_card = physcard;
3045 physcard->adapters_allocd = 1;
3046 } else {
3047 physcard->adapters_allocd++;
3048 }
3049 /* Note - this is ZERO relative */
3050 adapter->physport = physcard->adapters_allocd - 1;
3051
3052 physcard->adapter[adapter->physport] = adapter;
3053 adapter->physcard = physcard;
3054
3055 return 0;
3056 }
3057
3058 static int slic_entry_probe(struct pci_dev *pcidev,
3059 const struct pci_device_id *pci_tbl_entry)
3060 {
3061 static int cards_found;
3062 static int did_version;
3063 int err = -ENODEV;
3064 struct net_device *netdev;
3065 struct adapter *adapter;
3066 void __iomem *memmapped_ioaddr = NULL;
3067 ulong mmio_start = 0;
3068 ulong mmio_len = 0;
3069 struct sliccard *card = NULL;
3070 int pci_using_dac = 0;
3071
3072 err = pci_enable_device(pcidev);
3073
3074 if (err)
3075 return err;
3076
3077 if (did_version++ == 0) {
3078 dev_info(&pcidev->dev, "%s\n", slic_banner);
3079 dev_info(&pcidev->dev, "%s\n", slic_proc_version);
3080 }
3081
3082 if (!pci_set_dma_mask(pcidev, DMA_BIT_MASK(64))) {
3083 pci_using_dac = 1;
3084 err = pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(64));
3085 if (err) {
3086 dev_err(&pcidev->dev, "unable to obtain 64-bit DMA for consistent allocations\n");
3087 goto err_out_disable_pci;
3088 }
3089 } else {
3090 err = pci_set_dma_mask(pcidev, DMA_BIT_MASK(32));
3091 if (err) {
3092 dev_err(&pcidev->dev, "no usable DMA configuration\n");
3093 goto err_out_disable_pci;
3094 }
3095 pci_using_dac = 0;
3096 pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(32));
3097 }
3098
3099 err = pci_request_regions(pcidev, DRV_NAME);
3100 if (err) {
3101 dev_err(&pcidev->dev, "can't obtain PCI resources\n");
3102 goto err_out_disable_pci;
3103 }
3104
3105 pci_set_master(pcidev);
3106
3107 netdev = alloc_etherdev(sizeof(struct adapter));
3108 if (!netdev) {
3109 err = -ENOMEM;
3110 goto err_out_exit_slic_probe;
3111 }
3112
3113 netdev->ethtool_ops = &slic_ethtool_ops;
3114 SET_NETDEV_DEV(netdev, &pcidev->dev);
3115
3116 pci_set_drvdata(pcidev, netdev);
3117 adapter = netdev_priv(netdev);
3118 adapter->netdev = netdev;
3119 adapter->pcidev = pcidev;
3120 slic_global.dynamic_intagg = adapter->dynamic_intagg;
3121 if (pci_using_dac)
3122 netdev->features |= NETIF_F_HIGHDMA;
3123
3124 mmio_start = pci_resource_start(pcidev, 0);
3125 mmio_len = pci_resource_len(pcidev, 0);
3126
3127 memmapped_ioaddr = ioremap(mmio_start, mmio_len);
3128 if (!memmapped_ioaddr) {
3129 dev_err(&pcidev->dev, "cannot remap MMIO region %lx @ %lx\n",
3130 mmio_len, mmio_start);
3131 err = -ENOMEM;
3132 goto err_out_free_netdev;
3133 }
3134
3135 slic_config_pci(pcidev);
3136
3137 slic_init_driver();
3138
3139 slic_init_adapter(netdev,
3140 pcidev, pci_tbl_entry, memmapped_ioaddr, cards_found);
3141
3142 err = slic_card_locate(adapter);
3143 if (err) {
3144 dev_err(&pcidev->dev, "cannot locate card\n");
3145 goto err_out_unmap;
3146 }
3147
3148 card = adapter->card;
3149
3150 if (!adapter->allocated) {
3151 card->adapters_allocated++;
3152 adapter->allocated = 1;
3153 }
3154
3155 err = slic_card_init(card, adapter);
3156 if (err)
3157 goto err_out_unmap;
3158
3159 slic_adapter_set_hwaddr(adapter);
3160
3161 netdev->base_addr = (unsigned long)memmapped_ioaddr;
3162 netdev->irq = adapter->irq;
3163 netdev->netdev_ops = &slic_netdev_ops;
3164
3165 strcpy(netdev->name, "eth%d");
3166 err = register_netdev(netdev);
3167 if (err) {
3168 dev_err(&pcidev->dev, "Cannot register net device, aborting.\n");
3169 goto err_out_unmap;
3170 }
3171
3172 cards_found++;
3173
3174 return 0;
3175
3176 err_out_unmap:
3177 iounmap(memmapped_ioaddr);
3178 err_out_free_netdev:
3179 free_netdev(netdev);
3180 err_out_exit_slic_probe:
3181 pci_release_regions(pcidev);
3182 err_out_disable_pci:
3183 pci_disable_device(pcidev);
3184 return err;
3185 }
3186
3187 static struct pci_driver slic_driver = {
3188 .name = DRV_NAME,
3189 .id_table = slic_pci_tbl,
3190 .probe = slic_entry_probe,
3191 .remove = slic_entry_remove,
3192 };
3193
3194 static int __init slic_module_init(void)
3195 {
3196 slic_init_driver();
3197
3198 return pci_register_driver(&slic_driver);
3199 }
3200
3201 static void __exit slic_module_cleanup(void)
3202 {
3203 pci_unregister_driver(&slic_driver);
3204 }
3205
3206 static struct ethtool_ops slic_ethtool_ops = {
3207 .get_coalesce = slic_get_coalesce,
3208 .set_coalesce = slic_set_coalesce
3209 };
3210
3211 module_init(slic_module_init);
3212 module_exit(slic_module_cleanup);
Linux kernel - Deliverables
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