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[deliverable/linux.git] / drivers / staging / wlags49_h2 / hcf.c
1 /************************************************************************************************************
2 *
3 * FILE : HCF.C
4 *
5 * DATE : $Date: 2004/08/05 11:47:10 $ $Revision: 1.10 $
6 * Original: 2004/06/02 10:22:22 Revision: 1.85 Tag: hcf7_t20040602_01
7 * Original: 2004/04/15 09:24:41 Revision: 1.63 Tag: hcf7_t7_20040415_01
8 * Original: 2004/04/13 14:22:44 Revision: 1.62 Tag: t7_20040413_01
9 * Original: 2004/04/01 15:32:55 Revision: 1.59 Tag: t7_20040401_01
10 * Original: 2004/03/10 15:39:27 Revision: 1.55 Tag: t20040310_01
11 * Original: 2004/03/04 11:03:37 Revision: 1.53 Tag: t20040304_01
12 * Original: 2004/03/02 14:51:21 Revision: 1.50 Tag: t20040302_03
13 * Original: 2004/02/24 13:00:27 Revision: 1.43 Tag: t20040224_01
14 * Original: 2004/02/19 10:57:25 Revision: 1.39 Tag: t20040219_01
15 *
16 * AUTHOR : Nico Valster
17 *
18 * SPECIFICATION: ........
19 *
20 * DESCRIPTION : HCF Routines for Hermes-II (callable via the Wireless Connection I/F or WCI)
21 * Local Support Routines for above procedures
22 *
23 * Customizable via HCFCFG.H, which is included by HCF.H
24 *
25 *************************************************************************************************************
26 *
27 *
28 * SOFTWARE LICENSE
29 *
30 * This software is provided subject to the following terms and conditions,
31 * which you should read carefully before using the software. Using this
32 * software indicates your acceptance of these terms and conditions. If you do
33 * not agree with these terms and conditions, do not use the software.
34 *
35 * COPYRIGHT © 1994 - 1995 by AT&T. All Rights Reserved
36 * COPYRIGHT © 1996 - 2000 by Lucent Technologies. All Rights Reserved
37 * COPYRIGHT © 2001 - 2004 by Agere Systems Inc. All Rights Reserved
38 * All rights reserved.
39 *
40 * Redistribution and use in source or binary forms, with or without
41 * modifications, are permitted provided that the following conditions are met:
42 *
43 * . Redistributions of source code must retain the above copyright notice, this
44 * list of conditions and the following Disclaimer as comments in the code as
45 * well as in the documentation and/or other materials provided with the
46 * distribution.
47 *
48 * . Redistributions in binary form must reproduce the above copyright notice,
49 * this list of conditions and the following Disclaimer in the documentation
50 * and/or other materials provided with the distribution.
51 *
52 * . Neither the name of Agere Systems Inc. nor the names of the contributors
53 * may be used to endorse or promote products derived from this software
54 * without specific prior written permission.
55 *
56 * Disclaimer
57 *
58 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
59 * INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
60 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
61 * USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
62 * RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY
63 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
64 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
65 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
66 * ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT
67 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
68 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
69 * DAMAGE.
70 *
71 *
72 ************************************************************************************************************/
73
74
75 /************************************************************************************************************
76 **
77 ** Implementation Notes
78 **
79 * - a leading marker of //! is used. The purpose of such a sequence is to help to understand the flow
80 * An example is: //!rc = HCF_SUCCESS;
81 * if this is superfluous because rc is already guaranteed to be 0 but it shows to the (maintenance)
82 * programmer it is an intentional omission at the place where someone could consider it most appropriate at
83 * first glance
84 * - using near pointers in a model where ss!=ds is an invitation for disaster, so be aware of how you specify
85 * your model and how you define variables which are used at interrupt time
86 * - remember that sign extension on 32 bit platforms may cause problems unless code is carefully constructed,
87 * e.g. use "(hcf_16)~foo" rather than "~foo"
88 *
89 ************************************************************************************************************/
90
91 #include "hcf.h" // HCF and MSF common include file
92 #include "hcfdef.h" // HCF specific include file
93 #include "mmd.h" // MoreModularDriver common include file
94 #include <linux/kernel.h>
95
96 #if ! defined offsetof
97 #define offsetof(s,m) ((unsigned int)&(((s *)0)->m))
98 #endif // offsetof
99
100
101 /***********************************************************************************************************/
102 /*************************************** PROTOTYPES ******************************************************/
103 /***********************************************************************************************************/
104 HCF_STATIC int cmd_exe( IFBP ifbp, hcf_16 cmd_code, hcf_16 par_0 );
105 HCF_STATIC int init( IFBP ifbp );
106 HCF_STATIC int put_info( IFBP ifbp, LTVP ltvp );
107 HCF_STATIC int put_info_mb( IFBP ifbp, CFG_MB_INFO_STRCT FAR * ltvp );
108 #if (HCF_TYPE) & HCF_TYPE_WPA
109 HCF_STATIC void calc_mic( hcf_32* p, hcf_32 M );
110 void calc_mic_rx_frag( IFBP ifbp, wci_bufp p, int len );
111 void calc_mic_tx_frag( IFBP ifbp, wci_bufp p, int len );
112 HCF_STATIC int check_mic( IFBP ifbp );
113 #endif // HCF_TYPE_WPA
114
115 HCF_STATIC void calibrate( IFBP ifbp );
116 HCF_STATIC int cmd_cmpl( IFBP ifbp );
117 HCF_STATIC hcf_16 get_fid( IFBP ifbp );
118 HCF_STATIC void isr_info( IFBP ifbp );
119 #if HCF_DMA
120 HCF_STATIC DESC_STRCT* get_frame_lst(IFBP ifbp, int tx_rx_flag);
121 #endif // HCF_DMA
122 HCF_STATIC void get_frag( IFBP ifbp, wci_bufp bufp, int len BE_PAR( int word_len ) ); //char*, byte count (usually even)
123 #if HCF_DMA
124 HCF_STATIC void put_frame_lst( IFBP ifbp, DESC_STRCT *descp, int tx_rx_flag );
125 #endif // HCF_DMA
126 HCF_STATIC void put_frag( IFBP ifbp, wci_bufp bufp, int len BE_PAR( int word_len ) );
127 HCF_STATIC void put_frag_finalize( IFBP ifbp );
128 HCF_STATIC int setup_bap( IFBP ifbp, hcf_16 fid, int offset, int type );
129 #if (HCF_ASSERT) & HCF_ASSERT_PRINTF
130 static int fw_printf(IFBP ifbp, CFG_FW_PRINTF_STRCT FAR *ltvp);
131 #endif // HCF_ASSERT_PRINTF
132
133 HCF_STATIC int download( IFBP ifbp, CFG_PROG_STRCT FAR *ltvp );
134 HCF_STATIC hcf_8 hcf_encap( wci_bufp type );
135 HCF_STATIC hcf_8 null_addr[4] = { 0, 0, 0, 0 };
136 #if ! defined IN_PORT_WORD //replace I/O Macros with logging facility
137 extern FILE *log_file;
138
139 #define IN_PORT_WORD(port) in_port_word( (hcf_io)(port) )
140
141 static hcf_16 in_port_word( hcf_io port ) {
142 hcf_16 i = (hcf_16)_inpw( port );
143 if ( log_file ) {
144 fprintf( log_file, "\nR %2.2x %4.4x", (port)&0xFF, i);
145 }
146 return i;
147 } // in_port_word
148
149 #define OUT_PORT_WORD(port, value) out_port_word( (hcf_io)(port), (hcf_16)(value) )
150
151 static void out_port_word( hcf_io port, hcf_16 value ) {
152 _outpw( port, value );
153 if ( log_file ) {
154 fprintf( log_file, "\nW %2.02x %4.04x", (port)&0xFF, value );
155 }
156 }
157
158 void IN_PORT_STRING_32( hcf_io prt, hcf_32 FAR * dst, int n) {
159 int i = 0;
160 hcf_16 FAR * p;
161 if ( log_file ) {
162 fprintf( log_file, "\nread string_32 length %04x (%04d) at port %02.2x to addr %lp",
163 (hcf_16)n, (hcf_16)n, (hcf_16)(prt)&0xFF, dst);
164 }
165 while ( n-- ) {
166 p = (hcf_16 FAR *)dst;
167 *p++ = (hcf_16)_inpw( prt );
168 *p = (hcf_16)_inpw( prt );
169 if ( log_file ) {
170 fprintf( log_file, "%s%08lx ", i++ % 0x08 ? " " : "\n", *dst);
171 }
172 dst++;
173 }
174 } // IN_PORT_STRING_32
175
176 void IN_PORT_STRING_8_16( hcf_io prt, hcf_8 FAR * dst, int n) { //also handles byte alignment problems
177 hcf_16 FAR * p = (hcf_16 FAR *)dst; //this needs more elaborate code in non-x86 platforms
178 int i = 0;
179 if ( log_file ) {
180 fprintf( log_file, "\nread string_16 length %04x (%04d) at port %02.2x to addr %lp",
181 (hcf_16)n, (hcf_16)n, (hcf_16)(prt)&0xFF, dst );
182 }
183 while ( n-- ) {
184 *p =(hcf_16)_inpw( prt);
185 if ( log_file ) {
186 if ( i++ % 0x10 ) {
187 fprintf( log_file, "%04x ", *p);
188 } else {
189 fprintf( log_file, "\n%04x ", *p);
190 }
191 }
192 p++;
193 }
194 } // IN_PORT_STRING_8_16
195
196 void OUT_PORT_STRING_32( hcf_io prt, hcf_32 FAR * src, int n) {
197 int i = 0;
198 hcf_16 FAR * p;
199 if ( log_file ) {
200 fprintf( log_file, "\nwrite string_32 length %04x (%04d) at port %02.2x",
201 (hcf_16)n, (hcf_16)n, (hcf_16)(prt)&0xFF);
202 }
203 while ( n-- ) {
204 p = (hcf_16 FAR *)src;
205 _outpw( prt, *p++ );
206 _outpw( prt, *p );
207 if ( log_file ) {
208 fprintf( log_file, "%s%08lx ", i++ % 0x08 ? " " : "\n", *src);
209 }
210 src++;
211 }
212 } // OUT_PORT_STRING_32
213
214 void OUT_PORT_STRING_8_16( hcf_io prt, hcf_8 FAR * src, int n) { //also handles byte alignment problems
215 hcf_16 FAR * p = (hcf_16 FAR *)src; //this needs more elaborate code in non-x86 platforms
216 int i = 0;
217 if ( log_file ) {
218 fprintf( log_file, "\nwrite string_16 length %04x (%04d) at port %04x", n, n, (hcf_16)prt);
219 }
220 while ( n-- ) {
221 (void)_outpw( prt, *p);
222 if ( log_file ) {
223 if ( i++ % 0x10 ) {
224 fprintf( log_file, "%04x ", *p);
225 } else {
226 fprintf( log_file, "\n%04x ", *p);
227 }
228 }
229 p++;
230 }
231 } // OUT_PORT_STRING_8_16
232
233 #endif // IN_PORT_WORD
234
235 /************************************************************************************************************
236 ******************************* D A T A D E F I N I T I O N S ********************************************
237 ************************************************************************************************************/
238
239 #if HCF_ASSERT
240 IFBP BASED assert_ifbp = NULL; //to make asserts easily work under MMD and DHF
241 #endif // HCF_ASSERT
242
243 /* SNAP header to be inserted in Ethernet-II frames */
244 HCF_STATIC hcf_8 BASED snap_header[] = { 0xAA, 0xAA, 0x03, 0x00, 0x00, //5 bytes signature +
245 0 }; //1 byte protocol identifier
246
247 #if (HCF_TYPE) & HCF_TYPE_WPA
248 HCF_STATIC hcf_8 BASED mic_pad[8] = { 0x5A, 0, 0, 0, 0, 0, 0, 0 }; //MIC padding of message
249 #endif // HCF_TYPE_WPA
250
251 #if defined MSF_COMPONENT_ID
252 CFG_IDENTITY_STRCT BASED cfg_drv_identity = {
253 sizeof(cfg_drv_identity)/sizeof(hcf_16) - 1, //length of RID
254 CFG_DRV_IDENTITY, // (0x0826)
255 MSF_COMPONENT_ID,
256 MSF_COMPONENT_VAR,
257 MSF_COMPONENT_MAJOR_VER,
258 MSF_COMPONENT_MINOR_VER
259 } ;
260
261 CFG_RANGES_STRCT BASED cfg_drv_sup_range = {
262 sizeof(cfg_drv_sup_range)/sizeof(hcf_16) - 1, //length of RID
263 CFG_DRV_SUP_RANGE, // (0x0827)
264
265 COMP_ROLE_SUPL,
266 COMP_ID_DUI,
267 {{ DUI_COMPAT_VAR,
268 DUI_COMPAT_BOT,
269 DUI_COMPAT_TOP
270 }}
271 } ;
272
273 struct CFG_RANGE3_STRCT BASED cfg_drv_act_ranges_pri = {
274 sizeof(cfg_drv_act_ranges_pri)/sizeof(hcf_16) - 1, //length of RID
275 CFG_DRV_ACT_RANGES_PRI, // (0x0828)
276
277 COMP_ROLE_ACT,
278 COMP_ID_PRI,
279 {
280 { 0, 0, 0 }, // HCF_PRI_VAR_1 not supported by HCF 7
281 { 0, 0, 0 }, // HCF_PRI_VAR_2 not supported by HCF 7
282 { 3, //var_rec[2] - Variant number
283 CFG_DRV_ACT_RANGES_PRI_3_BOTTOM, // - Bottom Compatibility
284 CFG_DRV_ACT_RANGES_PRI_3_TOP // - Top Compatibility
285 }
286 }
287 } ;
288
289
290 struct CFG_RANGE4_STRCT BASED cfg_drv_act_ranges_sta = {
291 sizeof(cfg_drv_act_ranges_sta)/sizeof(hcf_16) - 1, //length of RID
292 CFG_DRV_ACT_RANGES_STA, // (0x0829)
293
294 COMP_ROLE_ACT,
295 COMP_ID_STA,
296 {
297 #if defined HCF_STA_VAR_1
298 { 1, //var_rec[1] - Variant number
299 CFG_DRV_ACT_RANGES_STA_1_BOTTOM, // - Bottom Compatibility
300 CFG_DRV_ACT_RANGES_STA_1_TOP // - Top Compatibility
301 },
302 #else
303 { 0, 0, 0 },
304 #endif // HCF_STA_VAR_1
305 #if defined HCF_STA_VAR_2
306 { 2, //var_rec[1] - Variant number
307 CFG_DRV_ACT_RANGES_STA_2_BOTTOM, // - Bottom Compatibility
308 CFG_DRV_ACT_RANGES_STA_2_TOP // - Top Compatibility
309 },
310 #else
311 { 0, 0, 0 },
312 #endif // HCF_STA_VAR_2
313 // For Native_USB (Not used!)
314 #if defined HCF_STA_VAR_3
315 { 3, //var_rec[1] - Variant number
316 CFG_DRV_ACT_RANGES_STA_3_BOTTOM, // - Bottom Compatibility
317 CFG_DRV_ACT_RANGES_STA_3_TOP // - Top Compatibility
318 },
319 #else
320 { 0, 0, 0 },
321 #endif // HCF_STA_VAR_3
322 // Warp
323 #if defined HCF_STA_VAR_4
324 { 4, //var_rec[1] - Variant number
325 CFG_DRV_ACT_RANGES_STA_4_BOTTOM, // - Bottom Compatibility
326 CFG_DRV_ACT_RANGES_STA_4_TOP // - Top Compatibility
327 }
328 #else
329 { 0, 0, 0 }
330 #endif // HCF_STA_VAR_4
331 }
332 } ;
333
334
335 struct CFG_RANGE6_STRCT BASED cfg_drv_act_ranges_hsi = {
336 sizeof(cfg_drv_act_ranges_hsi)/sizeof(hcf_16) - 1, //length of RID
337 CFG_DRV_ACT_RANGES_HSI, // (0x082A)
338 COMP_ROLE_ACT,
339 COMP_ID_HSI,
340 {
341 #if defined HCF_HSI_VAR_0 // Controlled deployment
342 { 0, // var_rec[1] - Variant number
343 CFG_DRV_ACT_RANGES_HSI_0_BOTTOM, // - Bottom Compatibility
344 CFG_DRV_ACT_RANGES_HSI_0_TOP // - Top Compatibility
345 },
346 #else
347 { 0, 0, 0 },
348 #endif // HCF_HSI_VAR_0
349 { 0, 0, 0 }, // HCF_HSI_VAR_1 not supported by HCF 7
350 { 0, 0, 0 }, // HCF_HSI_VAR_2 not supported by HCF 7
351 { 0, 0, 0 }, // HCF_HSI_VAR_3 not supported by HCF 7
352 #if defined HCF_HSI_VAR_4 // Hermes-II all types
353 { 4, // var_rec[1] - Variant number
354 CFG_DRV_ACT_RANGES_HSI_4_BOTTOM, // - Bottom Compatibility
355 CFG_DRV_ACT_RANGES_HSI_4_TOP // - Top Compatibility
356 },
357 #else
358 { 0, 0, 0 },
359 #endif // HCF_HSI_VAR_4
360 #if defined HCF_HSI_VAR_5 // WARP Hermes-2.5
361 { 5, // var_rec[1] - Variant number
362 CFG_DRV_ACT_RANGES_HSI_5_BOTTOM, // - Bottom Compatibility
363 CFG_DRV_ACT_RANGES_HSI_5_TOP // - Top Compatibility
364 }
365 #else
366 { 0, 0, 0 }
367 #endif // HCF_HSI_VAR_5
368 }
369 } ;
370
371
372 CFG_RANGE4_STRCT BASED cfg_drv_act_ranges_apf = {
373 sizeof(cfg_drv_act_ranges_apf)/sizeof(hcf_16) - 1, //length of RID
374 CFG_DRV_ACT_RANGES_APF, // (0x082B)
375
376 COMP_ROLE_ACT,
377 COMP_ID_APF,
378 {
379 #if defined HCF_APF_VAR_1 //(Fake) Hermes-I
380 { 1, //var_rec[1] - Variant number
381 CFG_DRV_ACT_RANGES_APF_1_BOTTOM, // - Bottom Compatibility
382 CFG_DRV_ACT_RANGES_APF_1_TOP // - Top Compatibility
383 },
384 #else
385 { 0, 0, 0 },
386 #endif // HCF_APF_VAR_1
387 #if defined HCF_APF_VAR_2 //Hermes-II
388 { 2, // var_rec[1] - Variant number
389 CFG_DRV_ACT_RANGES_APF_2_BOTTOM, // - Bottom Compatibility
390 CFG_DRV_ACT_RANGES_APF_2_TOP // - Top Compatibility
391 },
392 #else
393 { 0, 0, 0 },
394 #endif // HCF_APF_VAR_2
395 #if defined HCF_APF_VAR_3 // Native_USB
396 { 3, // var_rec[1] - Variant number
397 CFG_DRV_ACT_RANGES_APF_3_BOTTOM, // - Bottom Compatibility !!!!!see note below!!!!!!!
398 CFG_DRV_ACT_RANGES_APF_3_TOP // - Top Compatibility
399 },
400 #else
401 { 0, 0, 0 },
402 #endif // HCF_APF_VAR_3
403 #if defined HCF_APF_VAR_4 // WARP Hermes 2.5
404 { 4, // var_rec[1] - Variant number
405 CFG_DRV_ACT_RANGES_APF_4_BOTTOM, // - Bottom Compatibility !!!!!see note below!!!!!!!
406 CFG_DRV_ACT_RANGES_APF_4_TOP // - Top Compatibility
407 }
408 #else
409 { 0, 0, 0 }
410 #endif // HCF_APF_VAR_4
411 }
412 } ;
413 #define HCF_VERSION TEXT( "HCF$Revision: 1.10 $" )
414
415 static struct /*CFG_HCF_OPT_STRCT*/ {
416 hcf_16 len; //length of cfg_hcf_opt struct
417 hcf_16 typ; //type 0x082C
418 hcf_16 v0; //offset HCF_VERSION
419 hcf_16 v1; // MSF_COMPONENT_ID
420 hcf_16 v2; // HCF_ALIGN
421 hcf_16 v3; // HCF_ASSERT
422 hcf_16 v4; // HCF_BIG_ENDIAN
423 hcf_16 v5; // /* HCF_DLV | HCF_DLNV */
424 hcf_16 v6; // HCF_DMA
425 hcf_16 v7; // HCF_ENCAP
426 hcf_16 v8; // HCF_EXT
427 hcf_16 v9; // HCF_INT_ON
428 hcf_16 v10; // HCF_IO
429 hcf_16 v11; // HCF_LEGACY
430 hcf_16 v12; // HCF_MAX_LTV
431 hcf_16 v13; // HCF_PROT_TIME
432 hcf_16 v14; // HCF_SLEEP
433 hcf_16 v15; // HCF_TALLIES
434 hcf_16 v16; // HCF_TYPE
435 hcf_16 v17; // HCF_NIC_TAL_CNT
436 hcf_16 v18; // HCF_HCF_TAL_CNT
437 hcf_16 v19; // offset tallies
438 char val[sizeof(HCF_VERSION)];
439 } BASED cfg_hcf_opt = {
440 sizeof(cfg_hcf_opt)/sizeof(hcf_16) -1,
441 CFG_HCF_OPT, // (0x082C)
442 ( sizeof(cfg_hcf_opt) - sizeof(HCF_VERSION) - 4 )/sizeof(hcf_16),
443 #if defined MSF_COMPONENT_ID
444 MSF_COMPONENT_ID,
445 #else
446 0,
447 #endif // MSF_COMPONENT_ID
448 HCF_ALIGN,
449 HCF_ASSERT,
450 HCF_BIG_ENDIAN,
451 0, // /* HCF_DLV | HCF_DLNV*/,
452 HCF_DMA,
453 HCF_ENCAP,
454 HCF_EXT,
455 HCF_INT_ON,
456 HCF_IO,
457 HCF_LEGACY,
458 HCF_MAX_LTV,
459 HCF_PROT_TIME,
460 HCF_SLEEP,
461 HCF_TALLIES,
462 HCF_TYPE,
463 #if (HCF_TALLIES) & ( HCF_TALLIES_NIC | HCF_TALLIES_HCF )
464 HCF_NIC_TAL_CNT,
465 HCF_HCF_TAL_CNT,
466 offsetof(IFB_STRCT, IFB_TallyLen ),
467 #else
468 0, 0, 0,
469 #endif // HCF_TALLIES_NIC / HCF_TALLIES_HCF
470 HCF_VERSION
471 }; // cfg_hcf_opt
472 #endif // MSF_COMPONENT_ID
473
474 HCF_STATIC LTV_STRCT BASED cfg_null = { 1, CFG_NULL, {0} };
475
476 HCF_STATIC hcf_16* BASED xxxx[ ] = {
477 &cfg_null.len, //CFG_NULL 0x0820
478 #if defined MSF_COMPONENT_ID
479 &cfg_drv_identity.len, //CFG_DRV_IDENTITY 0x0826
480 &cfg_drv_sup_range.len, //CFG_DRV_SUP_RANGE 0x0827
481 &cfg_drv_act_ranges_pri.len, //CFG_DRV_ACT_RANGES_PRI 0x0828
482 &cfg_drv_act_ranges_sta.len, //CFG_DRV_ACT_RANGES_STA 0x0829
483 &cfg_drv_act_ranges_hsi.len, //CFG_DRV_ACT_RANGES_HSI 0x082A
484 &cfg_drv_act_ranges_apf.len, //CFG_DRV_ACT_RANGES_APF 0x082B
485 &cfg_hcf_opt.len, //CFG_HCF_OPT 0x082C
486 NULL, //IFB_PRIIdentity placeholder 0xFD02
487 NULL, //IFB_PRISup placeholder 0xFD03
488 #endif // MSF_COMPONENT_ID
489 NULL //endsentinel
490 };
491 #define xxxx_PRI_IDENTITY_OFFSET (ARRAY_SIZE(xxxx) - 3)
492
493
494 /************************************************************************************************************
495 ************************** T O P L E V E L H C F R O U T I N E S **************************************
496 ************************************************************************************************************/
497
498 /************************************************************************************************************
499 *
500 *.MODULE int hcf_action( IFBP ifbp, hcf_16 action )
501 *.PURPOSE Changes the run-time Card behavior.
502 * Performs Miscellanuous actions.
503 *
504 *.ARGUMENTS
505 * ifbp address of the Interface Block
506 * action number identifying the type of change
507 * - HCF_ACT_INT_FORCE_ON enable interrupt generation by WaveLAN NIC
508 * - HCF_ACT_INT_OFF disable interrupt generation by WaveLAN NIC
509 * - HCF_ACT_INT_ON compensate 1 HCF_ACT_INT_OFF, enable interrupt generation if balance reached
510 * - HCF_ACT_PRS_SCAN Hermes Probe Respons Scan (F102) command
511 * - HCF_ACT_RX_ACK acknowledge non-DMA receiver to Hermes
512 * - HCF_ACT_SCAN Hermes Inquire Scan (F101) command (non-WARP only)
513 * - HCF_ACT_SLEEP DDS Sleep request
514 * - HCF_ACT_TALLIES Hermes Inquire Tallies (F100) command
515 *
516 *.RETURNS
517 * HCF_SUCCESS all (including invalid)
518 * HCF_INT_PENDING HCF_ACT_INT_OFF, interrupt pending
519 * HCF_ERR_NO_NIC HCF_ACT_INT_OFF, NIC presence check fails
520 *
521 *.CONDITIONS
522 * Except for hcf_action with HCF_ACT_INT_FORCE_ON or HCF_ACT_INT_OFF as parameter or hcf_connect with an I/O
523 * address (i.e. not HCF_DISCONNECT), all hcf-function calls MUST be preceded by a call of hcf_action with
524 * HCF_ACT_INT_OFF as parameter.
525 * Note that hcf_connect defaults to NIC interrupt disabled mode, i.e. as if hcf_action( HCF_ACT_INT_OFF )
526 * was called.
527 *
528 *.DESCRIPTION
529 * hcf_action supports the following mode changing action-code pairs that are antonyms
530 * - HCF_ACT_INT_[FORCE_]ON / HCF_ACT_INT_OFF
531 *
532 * Additionally hcf_action can start the following actions in the NIC:
533 * - HCF_ACT_PRS_SCAN
534 * - HCF_ACT_RX_ACK
535 * - HCF_ACT_SCAN
536 * - HCF_ACT_SLEEP
537 * - HCF_ACT_TALLIES
538 *
539 * o HCF_ACT_INT_OFF: Sets NIC Interrupts mode Disabled.
540 * This command, and the associated [Force] Enable NIC interrupts command, are only available if the HCF_INT_ON
541 * compile time option is not set at 0x0000.
542 *
543 * o HCF_ACT_INT_ON: Sets NIC Interrupts mode Enabled.
544 * Enable NIC Interrupts, depending on the number of preceding Disable NIC Interrupt calls.
545 *
546 * o HCF_ACT_INT_FORCE_ON: Force NIC Interrupts mode Enabled.
547 * Sets NIC Interrupts mode Enabled, regardless off the number of preceding Disable NIC Interrupt calls.
548 *
549 * The disabling and enabling of interrupts are antonyms.
550 * These actions must be balanced.
551 * For each "disable interrupts" there must be a matching "enable interrupts".
552 * The disable interrupts may be executed multiple times in a row without intervening enable interrupts, in
553 * other words, the disable interrupts may be nested.
554 * The interrupt generation mechanism is disabled at the first call with HCF_ACT_INT_OFF.
555 * The interrupt generation mechanism is re-enabled when the number of calls with HCF_ACT_INT_ON matches the
556 * number of calls with INT_OFF.
557 *
558 * It is not allowed to have more Enable NIC Interrupts calls than Disable NIC Interrupts calls.
559 * The interrupt generation mechanism is initially (i.e. after hcf_connect) disabled.
560 * An MSF based on a interrupt strategy must call hcf_action with INT_ON in its initialization logic.
561 *
562 *! The INT_OFF/INT_ON housekeeping is initialized at 0x0000 by hcf_connect, causing the interrupt generation
563 * mechanism to be disabled at first. This suits MSF implementation based on a polling strategy.
564 *
565 * o HCF_ACT_SLEEP: Initiates the Disconnected DeepSleep process
566 * This command is only available if the HCF_DDS compile time option is set. It triggers the F/W to start the
567 * sleep handshaking. Regardless whether the Host initiates a Disconnected DeepSleep (DDS) or the F/W initiates
568 * a Connected DeepSleep (CDS), the Host-F/W sleep handshaking is completed when the NIC Interrupts mode is
569 * enabled (by means of the balancing HCF_ACT_INT_ON), i.e. at that moment the F/W really goes into sleep mode.
570 * The F/W is wokenup by the HCF when the NIC Interrupts mode are disabled, i.e. at the first HCF_ACT_INT_OFF
571 * after going into sleep.
572 *
573 * The following Miscellanuous actions are defined:
574 *
575 * o HCF_ACT_RX_ACK: Receiver Acknowledgement (non-DMA, non-USB mode only)
576 * Acking the receiver, frees the NIC memory used to hold the Rx frame and allows the F/W to
577 * report the existence of the next Rx frame.
578 * If the MSF does not need access (any longer) to the current frame, e.g. because it is rejected based on the
579 * look ahead or copied to another buffer, the receiver may be acked. Acking earlier is assumed to have the
580 * potential of improving the performance.
581 * If the MSF does not explitly ack te receiver, the acking is done implicitly if:
582 * - the received frame fits in the look ahead buffer, by the hcf_service_nic call that reported the Rx frame
583 * - if not in the above step, by hcf_rcv_msg (assuming hcf_rcv_msg is called)
584 * - if neither of the above implicit acks nor an explicit ack by the MSF, by the first hcf_service_nic after
585 * the hcf_service_nic that reported the Rx frame.
586 * Note: If an Rx frame is already acked, an explicit ACK by the MSF acts as a NoOperation.
587 *
588 * o HCF_ACT_TALLIES: Inquire Tallies command
589 * This command is only operational if the F/W is enabled.
590 * The Inquire Tallies command requests the F/W to provide its current set of tallies.
591 * See also hcf_get_info with CFG_TALLIES as parameter.
592 *
593 * o HCF_ACT_PRS_SCAN: Inquire Probe Respons Scan command
594 * This command is only operational if the F/W is enabled.
595 * The Probe Respons Scan command starts a scan sequence.
596 * The HCF puts the result of this action in an MSF defined buffer (see CFG_RID_LOG_STRCT).
597 *
598 * o HCF_ACT_SCAN: Inquire Scan command
599 * This command is only supported for HII F/W (i.e. pre-WARP) and it is operational if the F/W is enabled.
600 * The Inquire Scan command starts a scan sequence.
601 * The HCF puts the result of this action in an MSF defined buffer (see CFG_RID_LOG_STRCT).
602 *
603 * Assert fails if
604 * - ifbp has a recognizable out-of-range value.
605 * - NIC interrupts are not disabled while required by parameter action.
606 * - an invalid code is specified in parameter action.
607 * - HCF_ACT_INT_ON commands outnumber the HCF_ACT_INT_OFF commands.
608 * - reentrancy, may be caused by calling hcf_functions without adequate protection against NIC interrupts or
609 * multi-threading
610 *
611 * - Since the HCF does not maintain status information relative to the F/W enabled state, it is not asserted
612 * whether HCF_ACT_SCAN, HCF_ACT_PRS_SCAN or HCF_ACT_TALLIES are only used while F/W is enabled.
613 *
614 *.DIAGRAM
615 * 0: The assert embedded in HCFLOGENTRY checks against re-entrancy. Re-entrancy could be caused by a MSF logic
616 * at task-level calling hcf_functions without shielding with HCF_ACT_ON/_OFF. However the HCF_ACT_INT_OFF
617 * action itself can per definition not be protected this way. Based on code inspection, it can be concluded,
618 * that there is no re-entrancy PROBLEM in this particular flow. It does not seem worth the trouble to
619 * explicitly check for this condition (although there was a report of an MSF which ran into this assert.
620 * 2:IFB_IntOffCnt is used to balance the INT_OFF and INT_ON calls. Disabling of the interrupts is achieved by
621 * writing a zero to the Hermes IntEn register. In a shared interrupt environment (e.g. the mini-PCI NDIS
622 * driver) it is considered more correct to return the status HCF_INT_PENDING if and only if, the current
623 * invocation of hcf_service_nic is (apparently) called in the ISR when the ISR was activated as result of a
624 * change in HREG_EV_STAT matching a bit in HREG_INT_EN, i.e. not if invoked as result of another device
625 * generating an interrupt on the shared interrupt line.
626 * Note 1: it has been observed that under certain adverse conditions on certain platforms the writing of
627 * HREG_INT_EN can apparently fail, therefor it is paramount that HREG_INT_EN is written again with 0 for
628 * each and every call to HCF_ACT_INT_OFF.
629 * Note 2: it has been observed that under certain H/W & S/W architectures this logic is called when there is
630 * no NIC at all. To cater for this, the value of HREG_INT_EN is validated. If the unused bit 0x0100 is set,
631 * it is assumed there is no NIC.
632 * Note 3: During the download process, some versions of the F/W reset HREG_SW_0, hence checking this
633 * register for HCF_MAGIC (the classical NIC presence test) when HCF_ACT_INT_OFF is called due to another
634 * card interrupting via a shared IRQ during a download, fails.
635 *4: The construction "if ( ifbp->IFB_IntOffCnt-- == 0 )" is optimal (in the sense of shortest/quickest
636 * path in error free flows) but NOT fail safe in case of too many INT_ON invocations compared to INT_OFF).
637 * Enabling of the interrupts is achieved by writing the Hermes IntEn register.
638 * - If the HCF is in Defunct mode, the interrupts stay disabled.
639 * - Under "normal" conditions, the HCF is only interested in Info Events, Rx Events and Notify Events.
640 * - When the HCF is out of Tx/Notify resources, the HCF is also interested in Alloc Events.
641 * - via HCF_EXT, the MSF programmer can also request HREG_EV_TICK and/or HREG_EV_TX_EXC interrupts.
642 * For DMA operation, the DMA hardware handles the alloc events. The DMA engine will generate a 'TxDmaDone'
643 * event as soon as it has pumped a frame from host ram into NIC-RAM (note that the frame does not have to be
644 * transmitted then), and a 'RxDmaDone' event as soon as a received frame has been pumped from NIC-RAM into
645 * host ram. Note that the 'alloc' event has been removed from the event-mask, because the DMA engine will
646 * react to and acknowledge this event.
647 *6: ack the "old" Rx-event. See "Rx Buffer free strategy" in hcf_service_nic above for more explanation.
648 * IFB_RxFID and IFB_RxLen must be cleared to bring both the internal HCF house keeping and the information
649 * supplied to the MSF in the state "no frame received".
650 *8: The HCF_ACT_SCAN, HCF_ACT_PRS_SCAN and HCF_ACT_TALLIES activity are merged by "clever" algebraic
651 * manipulations of the RID-values and action codes, so foregoing robustness against migration problems for
652 * ease of implementation. The assumptions about numerical relationships between CFG_TALLIES etc and
653 * HCF_ACT_TALLIES etc are checked by the "#if" statements just prior to the body of this routine, resulting
654 * in: err "maintenance" during compilation if the assumptions are no longer met. The writing of HREG_PARAM_1
655 * with 0x3FFF in case of an PRS scan, is a kludge to get around lack of specification, hence different
656 * implementation in F/W and Host.
657 * When there is no NIC RAM available, some versions of the Hermes F/W do report 0x7F00 as error in the
658 * Result field of the Status register and some F/W versions don't. To mask this difference to the MSF all
659 * return codes of the Hermes are ignored ("best" and "most simple" solution to these types of analomies with
660 * an acceptable loss due to ignoring all error situations as well).
661 * The "No inquire space" is reported via the Hermes tallies.
662 *30: do not HCFASSERT( rc, rc ) since rc == HCF_INT_PENDING is no error
663 *
664 *.ENDDOC END DOCUMENTATION
665 *
666 ************************************************************************************************************/
667 #if ( (HCF_TYPE) & HCF_TYPE_HII5 ) == 0
668 #if CFG_SCAN != CFG_TALLIES - HCF_ACT_TALLIES + HCF_ACT_SCAN
669 err: "maintenance" apparently inviolated the underlying assumption about the numerical values of these macros
670 #endif
671 #endif // HCF_TYPE_HII5
672 #if CFG_PRS_SCAN != CFG_TALLIES - HCF_ACT_TALLIES + HCF_ACT_PRS_SCAN
673 err: "maintenance" apparently inviolated the underlying assumption about the numerical values of these macros
674 #endif
675 int
676 hcf_action( IFBP ifbp, hcf_16 action )
677 {
678 int rc = HCF_SUCCESS;
679
680 HCFASSERT( ifbp->IFB_Magic == HCF_MAGIC, ifbp->IFB_Magic );
681 #if HCF_INT_ON
682 HCFLOGENTRY( action == HCF_ACT_INT_FORCE_ON ? HCF_TRACE_ACTION_KLUDGE : HCF_TRACE_ACTION, action ); /* 0 */
683 #if (HCF_SLEEP)
684 HCFASSERT( ifbp->IFB_IntOffCnt != 0xFFFE || action == HCF_ACT_INT_OFF,
685 MERGE_2( action, ifbp->IFB_IntOffCnt ) );
686 #else
687 HCFASSERT( ifbp->IFB_IntOffCnt != 0xFFFE, action );
688 #endif // HCF_SLEEP
689 HCFASSERT( ifbp->IFB_IntOffCnt != 0xFFFF ||
690 action == HCF_ACT_INT_OFF || action == HCF_ACT_INT_FORCE_ON, action );
691 HCFASSERT( ifbp->IFB_IntOffCnt <= 16 || ifbp->IFB_IntOffCnt >= 0xFFFE,
692 MERGE_2( action, ifbp->IFB_IntOffCnt ) ); //nesting more than 16 deep seems unreasonable
693 #endif // HCF_INT_ON
694
695 switch (action) {
696 #if HCF_INT_ON
697 hcf_16 i;
698 case HCF_ACT_INT_OFF: // Disable Interrupt generation
699 #if HCF_SLEEP
700 if ( ifbp->IFB_IntOffCnt == 0xFFFE ) { // WakeUp test ;?tie this to the "new" super-LinkStat
701 ifbp->IFB_IntOffCnt++; // restore conventional I/F
702 OPW(HREG_IO, HREG_IO_WAKEUP_ASYNC ); // set wakeup bit
703 OPW(HREG_IO, HREG_IO_WAKEUP_ASYNC ); // set wakeup bit to counteract the clearing by F/W
704 // 800 us latency before FW switches to high power
705 MSF_WAIT(800); // MSF-defined function to wait n microseconds.
706 //OOR if ( ifbp->IFB_DSLinkStat & CFG_LINK_STAT_DS_OOR ) { // OutOfRange
707 // printk( "<5>ACT_INT_OFF: Deepsleep phase terminated, enable and go to AwaitConnection\n" ); //;?remove me 1 day
708 // hcf_cntl( ifbp, HCF_CNTL_ENABLE );
709 // }
710 // ifbp->IFB_DSLinkStat &= ~( CFG_LINK_STAT_DS_IR | CFG_LINK_STAT_DS_OOR); //clear IR/OOR state
711 }
712 #endif // HCF_SLEEP
713 /*2*/ ifbp->IFB_IntOffCnt++;
714 //! rc = 0;
715 i = IPW( HREG_INT_EN );
716 OPW( HREG_INT_EN, 0 );
717 if ( i & 0x1000 ) {
718 rc = HCF_ERR_NO_NIC;
719 } else {
720 if ( i & IPW( HREG_EV_STAT ) ) {
721 rc = HCF_INT_PENDING;
722 }
723 }
724 break;
725
726 case HCF_ACT_INT_FORCE_ON: // Enforce Enable Interrupt generation
727 ifbp->IFB_IntOffCnt = 0;
728 //Fall through in HCF_ACT_INT_ON
729
730 case HCF_ACT_INT_ON: // Enable Interrupt generation
731 /*4*/ if ( ifbp->IFB_IntOffCnt-- == 0 && ifbp->IFB_CardStat == 0 ) {
732 //determine Interrupt Event mask
733 #if HCF_DMA
734 if ( ifbp->IFB_CntlOpt & USE_DMA ) {
735 i = HREG_EV_INFO | HREG_EV_RDMAD | HREG_EV_TDMAD | HREG_EV_TX_EXT; //mask when DMA active
736 } else
737 #endif // HCF_DMA
738 {
739 i = HREG_EV_INFO | HREG_EV_RX | HREG_EV_TX_EXT; //mask when DMA not active
740 if ( ifbp->IFB_RscInd == 0 ) {
741 i |= HREG_EV_ALLOC; //mask when no TxFID available
742 }
743 }
744 #if HCF_SLEEP
745 if ( ( IPW(HREG_EV_STAT) & ( i | HREG_EV_SLEEP_REQ ) ) == HREG_EV_SLEEP_REQ ) {
746 // firmware indicates it would like to go into sleep modus
747 // only acknowledge this request if no other events that can cause an interrupt are pending
748 ifbp->IFB_IntOffCnt--; //becomes 0xFFFE
749 OPW( HREG_INT_EN, i | HREG_EV_TICK );
750 OPW( HREG_EV_ACK, HREG_EV_SLEEP_REQ | HREG_EV_TICK | HREG_EV_ACK_REG_READY );
751 } else
752 #endif // HCF_SLEEP
753 {
754 OPW( HREG_INT_EN, i | HREG_EV_SLEEP_REQ );
755 }
756 }
757 break;
758 #endif // HCF_INT_ON
759
760 #if (HCF_SLEEP) & HCF_DDS
761 case HCF_ACT_SLEEP: // DDS Sleep request
762 hcf_cntl( ifbp, HCF_CNTL_DISABLE );
763 cmd_exe( ifbp, HCMD_SLEEP, 0 );
764 break;
765 // case HCF_ACT_WAKEUP: // DDS Wakeup request
766 // HCFASSERT( ifbp->IFB_IntOffCnt == 0xFFFE, ifbp->IFB_IntOffCnt );
767 // ifbp->IFB_IntOffCnt++; // restore conventional I/F
768 // OPW( HREG_IO, HREG_IO_WAKEUP_ASYNC );
769 // MSF_WAIT(800); // MSF-defined function to wait n microseconds.
770 // rc = hcf_action( ifbp, HCF_ACT_INT_OFF ); /*bogus, IFB_IntOffCnt == 0xFFFF, so if you carefully look
771 // *at the #if HCF_DDS statements, HCF_ACT_INT_OFF is empty
772 // *for DDS. "Much" better would be to merge the flows for
773 // *DDS and DEEP_SLEEP
774 // */
775 // break;
776 #endif // HCF_DDS
777
778 case HCF_ACT_RX_ACK: //Receiver ACK
779 /*6*/ if ( ifbp->IFB_RxFID ) {
780 DAWA_ACK( HREG_EV_RX );
781 }
782 ifbp->IFB_RxFID = ifbp->IFB_RxLen = 0;
783 break;
784
785 /*8*/ case HCF_ACT_PRS_SCAN: // Hermes PRS Scan (F102)
786 OPW( HREG_PARAM_1, 0x3FFF );
787 //Fall through in HCF_ACT_TALLIES
788 case HCF_ACT_TALLIES: // Hermes Inquire Tallies (F100)
789 #if ( (HCF_TYPE) & HCF_TYPE_HII5 ) == 0
790 case HCF_ACT_SCAN: // Hermes Inquire Scan (F101)
791 #endif // HCF_TYPE_HII5
792 /*!! the assumptions about numerical relationships between CFG_TALLIES etc and HCF_ACT_TALLIES etc
793 * are checked by #if statements just prior to this routine resulting in: err "maintenance" */
794 cmd_exe( ifbp, HCMD_INQUIRE, action - HCF_ACT_TALLIES + CFG_TALLIES );
795 break;
796
797 default:
798 HCFASSERT( DO_ASSERT, action );
799 break;
800 }
801 //! do not HCFASSERT( rc == HCF_SUCCESS, rc ) /* 30*/
802 HCFLOGEXIT( HCF_TRACE_ACTION );
803 return rc;
804 } // hcf_action
805
806
807 /************************************************************************************************************
808 *
809 *.MODULE int hcf_cntl( IFBP ifbp, hcf_16 cmd )
810 *.PURPOSE Connect or disconnect a specific port to a specific network.
811 *!! ;???????????????? continue needs more explanation
812 * recovers by means of "continue" when the connect process in CCX mode fails
813 * Enables or disables data transmission and reception for the NIC.
814 * Activates static NIC configuration for a specific port at connect.
815 * Activates static configuration for all ports at enable.
816 *
817 *.ARGUMENTS
818 * ifbp address of the Interface Block
819 * cmd 0x001F: Hermes command (disable, enable, connect, disconnect, continue)
820 * HCF_CNTL_ENABLE Enable
821 * HCF_CNTL_DISABLE Disable
822 * HCF_CNTL_CONTINUE Continue
823 * HCF_CNTL_CONNECT Connect
824 * HCF_CNTL_DISCONNECT Disconnect
825 * 0x0100: command qualifier (continue)
826 * HCMD_RETRY retry flag
827 * 0x0700: port number (connect/disconnect)
828 * HCF_PORT_0 MAC Port 0
829 * HCF_PORT_1 MAC Port 1
830 * HCF_PORT_2 MAC Port 2
831 * HCF_PORT_3 MAC Port 3
832 * HCF_PORT_4 MAC Port 4
833 * HCF_PORT_5 MAC Port 5
834 * HCF_PORT_6 MAC Port 6
835 *
836 *.RETURNS
837 * HCF_SUCCESS
838 *!! via cmd_exe
839 * HCF_ERR_NO_NIC
840 * HCF_ERR_DEFUNCT_...
841 * HCF_ERR_TIME_OUT
842 *
843 *.DESCRIPTION
844 * The parameter cmd contains a number of subfields.
845 * The actual value for cmd is created by logical or-ing the appropriate mnemonics for the subfields.
846 * The field 0x001F contains the command code
847 * - HCF_CNTL_ENABLE
848 * - HCF_CNTL_DISABLE
849 * - HCF_CNTL_CONNECT
850 * - HCF_CNTL_DISCONNECT
851 * - HCF_CNTL_CONTINUE
852 *
853 * For HCF_CNTL_CONTINUE, the field 0x0100 contains the retry flag HCMD_RETRY.
854 * For HCF_CNTL_CONNECT and HCF_CNTL_DISCONNECT, the field 0x0700 contains the port number as HCF_PORT_#.
855 * For Station as well as AccessPoint F/W, MAC Port 0 is the "normal" communication channel.
856 * For AccessPoint F/W, MAC Port 1 through 6 control the WDS links.
857 *
858 * Note that despite the names HCF_CNTL_DISABLE and HCF_CNTL_ENABLE, hcf_cntl does not influence the NIC
859 * Interrupts mode.
860 *
861 * The Connect is used by the MSF to bring a particular port in an inactive state as far as data transmission
862 * and reception are concerned.
863 * When a particular port is disconnected:
864 * - the F/W disables the receiver for that port.
865 * - the F/W ignores send commands for that port.
866 * - all frames (Receive as well as pending Transmit) for that port on the NIC are discarded.
867 *
868 * When the NIC is disabled, above list applies to all ports, i.e. the result is like all ports are
869 * disconnected.
870 *
871 * When a particular port is connected:
872 * - the F/W effectuates the static configuration for that port.
873 * - enables the receiver for that port.
874 * - accepts send commands for that port.
875 *
876 * Enabling has the following effects:
877 * - the F/W effectuates the static configuration for all ports.
878 * The F/W only updates its static configuration at a transition from disabled to enabled or from
879 * disconnected to connected.
880 * In order to enforce the static configuration, the MSF must assure that such a transition takes place.
881 * Due to such a disable/enable or disconnect/connect sequence, Rx/Tx frames may be lost, in other words,
882 * configuration may impact communication.
883 * - The DMA Engine (if applicable) is enabled.
884 * Note that the Enable Function by itself only enables data transmission and reception, it
885 * does not enable the Interrupt Generation mechanism. This is done by hcf_action.
886 *
887 * Disabling has the following effects:
888 *!! ;?????is the following statement really true
889 * - it acts as a disconnect on all ports.
890 * - The DMA Engine (if applicable) is disabled.
891 *
892 * For impact of the disable command on the behavior of hcf_dma_tx/rx_get see the appropriate sections.
893 *
894 * Although the Enable/Disable and Connect/Disconnect are antonyms, there is no restriction on their sequencing,
895 * in other words, they may be called multiple times in arbitrary sequence without being paired or balanced.
896 * Each time one of these functions is called, the effects of the preceding calls cease.
897 *
898 * Assert fails if
899 * - ifbp has a recognizable out-of-range value.
900 * - NIC interrupts are not disabled.
901 * - A command other than Continue, Enable, Disable, Connect or Disconnect is given.
902 * - An invalid combination of the subfields is given or a bit outside the subfields is given.
903 * - any return code besides HCF_SUCCESS.
904 * - reentrancy, may be caused by calling a hcf_function without adequate protection against NIC interrupts or
905 * multi-threading
906 *
907 *.DIAGRAM
908 * hcf_cntl takes successively the following actions:
909 *2: If the HCF is in Defunct mode or incompatible with the Primary or Station Supplier in the Hermes,
910 * hcf_cntl() returns immediately with HCF_ERR_NO_NIC;? as status.
911 *8: when the port is disabled, the DMA engine needs to be de-activated, so the host can safely reclaim tx
912 * packets from the tx descriptor chain.
913 *
914 *.ENDDOC END DOCUMENTATION
915 *
916 ************************************************************************************************************/
917 int
918 hcf_cntl( IFBP ifbp, hcf_16 cmd )
919 {
920 int rc = HCF_ERR_INCOMP_FW;
921 #if HCF_ASSERT
922 { int x = cmd & HCMD_CMD_CODE;
923 if ( x == HCF_CNTL_CONTINUE ) x &= ~HCMD_RETRY;
924 else if ( (x == HCMD_DISABLE || x == HCMD_ENABLE) && ifbp->IFB_FWIdentity.comp_id == COMP_ID_FW_AP ) {
925 x &= ~HFS_TX_CNTL_PORT;
926 }
927 HCFASSERT( x==HCF_CNTL_ENABLE || x==HCF_CNTL_DISABLE || HCF_CNTL_CONTINUE ||
928 x==HCF_CNTL_CONNECT || x==HCF_CNTL_DISCONNECT, cmd );
929 }
930 #endif // HCF_ASSERT
931 // #if (HCF_SLEEP) & HCF_DDS
932 // HCFASSERT( ifbp->IFB_IntOffCnt != 0xFFFE, cmd );
933 // #endif // HCF_DDS
934 HCFLOGENTRY( HCF_TRACE_CNTL, cmd );
935 if ( ifbp->IFB_CardStat == 0 ) { /*2*/
936 /*6*/ rc = cmd_exe( ifbp, cmd, 0 );
937 #if (HCF_SLEEP) & HCF_DDS
938 ifbp->IFB_TickCnt = 0; //start 2 second period (with 1 tick uncertanty)
939 #endif // HCF_DDS
940 }
941 #if HCF_DMA
942 //!rlav : note that this piece of code is always executed, regardless of the DEFUNCT bit in IFB_CardStat.
943 // The reason behind this is that the MSF should be able to get all its DMA resources back from the HCF,
944 // even if the hardware is disfunctional. Practical example under Windows : surprise removal.
945 if ( ifbp->IFB_CntlOpt & USE_DMA ) {
946 hcf_io io_port = ifbp->IFB_IOBase;
947 DESC_STRCT *p;
948 if ( cmd == HCF_CNTL_DISABLE || cmd == HCF_CNTL_ENABLE ) {
949 OUT_PORT_DWORD( (io_port + HREG_DMA_CTRL), DMA_CTRLSTAT_RESET); /*8*/
950 ifbp->IFB_CntlOpt &= ~DMA_ENABLED;
951 }
952 if ( cmd == HCF_CNTL_ENABLE ) {
953 OUT_PORT_DWORD( (io_port + HREG_DMA_CTRL), DMA_CTRLSTAT_GO);
954 /* ;? by rewriting hcf_dma_rx_put you can probably just call hcf_dma_rx_put( ifbp->IFB_FirstDesc[DMA_RX] )
955 * as additional beneficiary side effect, the SOP and EOP bits will also be cleared
956 */
957 ifbp->IFB_CntlOpt |= DMA_ENABLED;
958 HCFASSERT( NT_ASSERT, NEVER_TESTED );
959 // make the entire rx descriptor chain DMA-owned, so the DMA engine can (re-)use it.
960 p = ifbp->IFB_FirstDesc[DMA_RX];
961 if (p != NULL) { //;? Think this over again in the light of the new chaining strategy
962 if ( 1 ) { //begin alternative
963 HCFASSERT( NT_ASSERT, NEVER_TESTED );
964 put_frame_lst( ifbp, ifbp->IFB_FirstDesc[DMA_RX], DMA_RX );
965 if ( ifbp->IFB_FirstDesc[DMA_RX] ) {
966 put_frame_lst( ifbp, ifbp->IFB_FirstDesc[DMA_RX]->next_desc_addr, DMA_RX );
967 }
968 } else {
969 while ( p ) {
970 //p->buf_cntl.cntl_stat |= DESC_DMA_OWNED;
971 p->BUF_CNT |= DESC_DMA_OWNED;
972 p = p->next_desc_addr;
973 }
974 // a rx chain is available so hand it over to the DMA engine
975 p = ifbp->IFB_FirstDesc[DMA_RX];
976 OUT_PORT_DWORD( (io_port + HREG_RXDMA_PTR32), p->desc_phys_addr);
977 } //end alternative
978 }
979 }
980 }
981 #endif // HCF_DMA
982 HCFASSERT( rc == HCF_SUCCESS, rc );
983 HCFLOGEXIT( HCF_TRACE_CNTL );
984 return rc;
985 } // hcf_cntl
986
987
988 /************************************************************************************************************
989 *
990 *.MODULE int hcf_connect( IFBP ifbp, hcf_io io_base )
991 *.PURPOSE Grants access right for the HCF to the IFB.
992 * Initializes Card and HCF housekeeping.
993 *
994 *.ARGUMENTS
995 * ifbp (near) address of the Interface Block
996 * io_base non-USB: I/O Base address of the NIC (connect)
997 * non-USB: HCF_DISCONNECT
998 * USB: HCF_CONNECT, HCF_DISCONNECT
999 *
1000 *.RETURNS
1001 * HCF_SUCCESS
1002 * HCF_ERR_INCOMP_PRI
1003 * HCF_ERR_INCOMP_FW
1004 * HCF_ERR_DEFUNCT_CMD_SEQ
1005 *!! HCF_ERR_NO_NIC really returned ;?
1006 * HCF_ERR_NO_NIC
1007 * HCF_ERR_TIME_OUT
1008 *
1009 * MSF-accessible fields of Result Block:
1010 * IFB_IOBase entry parameter io_base
1011 * IFB_IORange HREG_IO_RANGE (0x40/0x80)
1012 * IFB_Version version of the IFB layout
1013 * IFB_FWIdentity CFG_FW_IDENTITY_STRCT, specifies the identity of the
1014 * "running" F/W, i.e. tertiary F/W under normal conditions
1015 * IFB_FWSup CFG_SUP_RANGE_STRCT, specifies the supplier range of
1016 * the "running" F/W, i.e. tertiary F/W under normal conditions
1017 * IFB_HSISup CFG_SUP_RANGE_STRCT, specifies the HW/SW I/F range of the NIC
1018 * IFB_PRIIdentity CFG_PRI_IDENTITY_STRCT, specifies the Identity of the Primary F/W
1019 * IFB_PRISup CFG_SUP_RANGE_STRCT, specifies the supplier range of the Primary F/W
1020 * all other all MSF accessible fields, which are not specified above, are zero-filled
1021 *
1022 *.CONDITIONS
1023 * It is the responsibility of the MSF to assure the correctness of the I/O Base address.
1024 *
1025 * Note: hcf_connect defaults to NIC interrupt disabled mode, i.e. as if hcf_action( HCF_ACT_INT_OFF )
1026 * was called.
1027 *
1028 *.DESCRIPTION
1029 * hcf_connect passes the MSF-defined location of the IFB to the HCF and grants or revokes access right for the
1030 * HCF to the IFB. Revoking is done by specifying HCF_DISCONNECT rather than an I/O address for the parameter
1031 * io_base. Every call of hcf_connect in "connect" mode, must eventually be followed by a call of hcf_connect
1032 * in "disconnect" mode. Clalling hcf_connect in "connect"/"disconnect" mode can not be nested.
1033 * The IFB address must be used as a handle with all subsequent HCF-function calls and the HCF uses the IFB
1034 * address as a handle when it performs a call(back) of an MSF-function (i.e. msf_assert).
1035 *
1036 * Note that not only the MSF accessible fields are cleared, but also all internal housekeeping
1037 * information is re-initialized.
1038 * This implies that all settings which are done via hcf_action and hcf_put_info (e.g. CFG_MB_ASSERT, CFG_REG_MB,
1039 * CFG_REG_INFO_LOG) must be done again. The only field which is not cleared, is IFB_MSFSup.
1040 *
1041 * If HCF_INT_ON is selected as compile option, NIC interrupts are disabled.
1042 *
1043 * Assert fails if
1044 * - ifbp is not properly aligned ( ref chapter HCF_ALIGN in 4.1.1)
1045 * - I/O Base Address is not a multiple of 0x40 (note: 0x0000 is explicitly allowed).
1046 *
1047 *.DIAGRAM
1048 *
1049 *0: Throughout hcf_connect you need to distinguish the connect from the disconnect case, which requires
1050 * some attention about what to use as "I/O" address when for which purpose.
1051 *2:
1052 *2a: Reset H-II by toggling reset bit in IO-register on and off.
1053 * The HCF_TYPE_PRELOADED caters for the DOS environment where H-II is loaded by a separate program to
1054 * overcome the 64k size limit posed on DOS drivers.
1055 * The macro OPW is not yet useable because the IFB_IOBase field is not set.
1056 * Note 1: hopefully the clearing and initializing of the IFB (see below) acts as a delay which meets the
1057 * specification for S/W reset
1058 * Note 2: it turns out that on some H/W constellations, the clock to access the EEProm is not lowered
1059 * to an appropriate frequency by HREG_IO_SRESET. By giving an HCMD_INI first, this problem is worked around.
1060 *2b: Experimentally it is determined over a wide range of F/W versions that waiting for the for Cmd bit in
1061 * Ev register gives a workable strategy. The available documentation does not give much clues.
1062 *4: clear and initialize the IFB
1063 * The HCF house keeping info is designed such that zero is the appropriate initial value for as much as
1064 * feasible IFB-items.
1065 * The readable fields mentioned in the description section and some HCF specific fields are given their
1066 * actual value.
1067 * IFB_TickIni is initialized at best guess before calibration
1068 * Hcf_connect defaults to "no interrupt generation" (implicitly achieved by the zero-filling).
1069 *6: Register compile-time linked MSF Routine and set default filter level
1070 * cast needed to get around the "near" problem in DOS COM model
1071 * er C2446: no conversion from void (__near __cdecl *)(unsigned char __far *,unsigned int,unsigned short,int)
1072 * to void (__far __cdecl *)(unsigned char __far *,unsigned int,unsigned short,int)
1073 *8: If a command is apparently still active (as indicated by the Busy bit in Cmd register) this may indicate a
1074 * blocked cmd pipe line. To unblock the following actions are done:
1075 * - Ack everything
1076 * - Wait for Busy bit drop in Cmd register
1077 * - Wait for Cmd bit raise in Ev register
1078 * The two waits are combined in a single HCF_WAIT_WHILE to optimize memory size. If either of these waits
1079 * fail (prot_cnt becomes 0), then something is serious wrong. Rather than PANICK, the assumption is that the
1080 * next cmd_exe will fail, causing the HCF to go into DEFUNCT mode
1081 *10: Ack everything to unblock a (possibly blocked) cmd pipe line
1082 * Note 1: it is very likely that an Alloc event is pending and very well possible that a (Send) Cmd event is
1083 * pending on non-initial calls
1084 * Note 2: it is assumed that this strategy takes away the need to ack every conceivable event after an
1085 * Hermes Initialize
1086 *12: Only H-II NEEDS the Hermes Initialize command. Due to the different semantics for H-I and H-II
1087 * Initialize command, init() does not (and can not, since it is called e.g. after a download) execute the
1088 * Hermes Initialize command. Executing the Hermes Initialize command for H-I would not harm but not do
1089 * anything useful either, so it is skipped.
1090 * The return status of cmd_exe is ignored. It is assumed that if cmd_exe fails, init fails too
1091 *14: use io_base as a flag to merge hcf_connect and hcf_disconnect into 1 routine
1092 * the call to init and its subsequent call of cmd_exe will return HCF_ERR_NO_NIC if appropriate. This status
1093 * is (badly) needed by some legacy combination of NT4 and card services which do not yield an I/O address in
1094 * time.
1095 *
1096 *.NOTICE
1097 * On platforms where the NULL-pointer is not a bit-pattern of all zeros, the zero-filling of the IFB results
1098 * in an incorrect initialization of pointers.
1099 * The implementation of the MailBox manipulation in put_mb_info protects against the absence of a MailBox
1100 * based on IFB_MBSize, IFB_MBWp and ifbp->IFB_MBRp. This has ramifications on the initialization of the
1101 * MailBox via hcf_put_info with the CFG_REG_MB type, but it prevents dependency on the "NULL-"ness of
1102 * IFB_MBp.
1103 *
1104 *.NOTICE
1105 * There are a number of problems when asserting and logging hcf_connect, e.g.
1106 * - Asserting on re-entrancy of hcf_connect by means of
1107 * "HCFASSERT( (ifbp->IFB_AssertTrace & HCF_ASSERT_CONNECT) == 0, 0 )" is not useful because IFB contents
1108 * are undefined
1109 * - Asserting before the IFB is cleared will cause mdd_assert() to interpret the garbage in IFB_AssertRtn
1110 * as a routine address
1111 * Therefore HCFTRACE nor HCFLOGENTRY is called by hcf_connect.
1112 *.ENDDOC END DOCUMENTATION
1113 *
1114 ************************************************************************************************************/
1115 int
1116 hcf_connect( IFBP ifbp, hcf_io io_base )
1117 {
1118 int rc = HCF_SUCCESS;
1119 hcf_io io_addr;
1120 hcf_32 prot_cnt;
1121 hcf_8 *q;
1122 LTV_STRCT x;
1123 #if HCF_ASSERT
1124 hcf_16 xa = ifbp->IFB_FWIdentity.typ;
1125 /* is assumed to cause an assert later on if hcf_connect is called without intervening hcf_disconnect.
1126 * xa == CFG_FW_IDENTITY in subsequent calls without preceding hcf_disconnect,
1127 * xa == 0 in subsequent calls with preceding hcf_disconnect,
1128 * xa == "garbage" (any value except CFG_FW_IDENTITY is acceptable) in the initial call
1129 */
1130 #endif // HCF_ASSERT
1131
1132 if ( io_base == HCF_DISCONNECT ) { //disconnect
1133 io_addr = ifbp->IFB_IOBase;
1134 OPW( HREG_INT_EN, 0 ); //;?workaround against dying F/W on subsequent hcf_connect calls
1135 } else { //connect /* 0 */
1136 io_addr = io_base;
1137 }
1138
1139 #if 0 //;? if a subsequent hcf_connect is preceded by an hcf_disconnect the wakeup is not needed !!
1140 #if HCF_SLEEP
1141 OUT_PORT_WORD( .....+HREG_IO, HREG_IO_WAKEUP_ASYNC ); //OPW not yet useable
1142 MSF_WAIT(800); // MSF-defined function to wait n microseconds.
1143 note that MSF_WAIT uses not yet defined!!!! IFB_IOBase and IFB_TickIni (via PROT_CNT_INI)
1144 so be careful if this code is restored
1145 #endif // HCF_SLEEP
1146 #endif // 0
1147
1148 #if ( (HCF_TYPE) & HCF_TYPE_PRELOADED ) == 0 //switch clock back for SEEPROM access !!!
1149 OUT_PORT_WORD( io_addr + HREG_CMD, HCMD_INI ); //OPW not yet useable
1150 prot_cnt = INI_TICK_INI;
1151 HCF_WAIT_WHILE( (IN_PORT_WORD( io_addr + HREG_EV_STAT) & HREG_EV_CMD) == 0 );
1152 OUT_PORT_WORD( (io_addr + HREG_IO), HREG_IO_SRESET ); //OPW not yet useable /* 2a*/
1153 #endif // HCF_TYPE_PRELOADED
1154 for ( q = (hcf_8*)(&ifbp->IFB_Magic); q > (hcf_8*)ifbp; *--q = 0 ) /*NOP*/; /* 4 */
1155 ifbp->IFB_Magic = HCF_MAGIC;
1156 ifbp->IFB_Version = IFB_VERSION;
1157 #if defined MSF_COMPONENT_ID //a new IFB demonstrates how dirty the solution is
1158 xxxx[xxxx_PRI_IDENTITY_OFFSET] = NULL; //IFB_PRIIdentity placeholder 0xFD02
1159 xxxx[xxxx_PRI_IDENTITY_OFFSET+1] = NULL; //IFB_PRISup placeholder 0xFD03
1160 #endif // MSF_COMPONENT_ID
1161 #if (HCF_TALLIES) & ( HCF_TALLIES_NIC | HCF_TALLIES_HCF )
1162 ifbp->IFB_TallyLen = 1 + 2 * (HCF_NIC_TAL_CNT + HCF_HCF_TAL_CNT); //convert # of Tallies to L value for LTV
1163 ifbp->IFB_TallyTyp = CFG_TALLIES; //IFB_TallyTyp: set T value
1164 #endif // HCF_TALLIES_NIC / HCF_TALLIES_HCF
1165 ifbp->IFB_IOBase = io_addr; //set IO_Base asap, so asserts via HREG_SW_2 don't harm
1166 ifbp->IFB_IORange = HREG_IO_RANGE;
1167 ifbp->IFB_CntlOpt = USE_16BIT;
1168 #if HCF_ASSERT
1169 assert_ifbp = ifbp;
1170 ifbp->IFB_AssertLvl = 1;
1171 #if (HCF_ASSERT) & HCF_ASSERT_LNK_MSF_RTN
1172 if ( io_base != HCF_DISCONNECT ) {
1173 ifbp->IFB_AssertRtn = (MSF_ASSERT_RTNP)msf_assert; /* 6 */
1174 }
1175 #endif // HCF_ASSERT_LNK_MSF_RTN
1176 #if (HCF_ASSERT) & HCF_ASSERT_MB //build the structure to pass the assert info to hcf_put_info
1177 ifbp->IFB_AssertStrct.len = sizeof(ifbp->IFB_AssertStrct)/sizeof(hcf_16) - 1;
1178 ifbp->IFB_AssertStrct.typ = CFG_MB_INFO;
1179 ifbp->IFB_AssertStrct.base_typ = CFG_MB_ASSERT;
1180 ifbp->IFB_AssertStrct.frag_cnt = 1;
1181 ifbp->IFB_AssertStrct.frag_buf[0].frag_len =
1182 ( offsetof(IFB_STRCT, IFB_AssertLvl) - offsetof(IFB_STRCT, IFB_AssertLine) ) / sizeof(hcf_16);
1183 ifbp->IFB_AssertStrct.frag_buf[0].frag_addr = &ifbp->IFB_AssertLine;
1184 #endif // HCF_ASSERT_MB
1185 #endif // HCF_ASSERT
1186 IF_PROT_TIME( prot_cnt = ifbp->IFB_TickIni = INI_TICK_INI );
1187 #if ( (HCF_TYPE) & HCF_TYPE_PRELOADED ) == 0
1188 //!! No asserts before Reset-bit in HREG_IO is cleared
1189 OPW( HREG_IO, 0x0000 ); //OPW useable /* 2b*/
1190 HCF_WAIT_WHILE( (IPW( HREG_EV_STAT) & HREG_EV_CMD) == 0 );
1191 IF_PROT_TIME( HCFASSERT( prot_cnt, IPW( HREG_EV_STAT) ) );
1192 IF_PROT_TIME( if ( prot_cnt ) prot_cnt = ifbp->IFB_TickIni );
1193 #endif // HCF_TYPE_PRELOADED
1194 //!! No asserts before Reset-bit in HREG_IO is cleared
1195 HCFASSERT( DO_ASSERT, MERGE_2( HCF_ASSERT, 0xCAF0 ) ); //just to proof that the complete assert machinery is working
1196 HCFASSERT( xa != CFG_FW_IDENTITY, 0 ); // assert if hcf_connect is called without intervening hcf_disconnect.
1197 HCFASSERT( ((hcf_32)(void*)ifbp & (HCF_ALIGN-1) ) == 0, (hcf_32)(void*)ifbp );
1198 HCFASSERT( (io_addr & 0x003F) == 0, io_addr );
1199 //if Busy bit in Cmd register
1200 if (IPW( HREG_CMD ) & HCMD_BUSY ) { /* 8 */
1201 //. Ack all to unblock a (possibly) blocked cmd pipe line
1202 OPW( HREG_EV_ACK, ~HREG_EV_SLEEP_REQ );
1203 //. Wait for Busy bit drop in Cmd register
1204 //. Wait for Cmd bit raise in Ev register
1205 HCF_WAIT_WHILE( ( IPW( HREG_CMD ) & HCMD_BUSY ) && (IPW( HREG_EV_STAT) & HREG_EV_CMD) == 0 );
1206 IF_PROT_TIME( HCFASSERT( prot_cnt, IPW( HREG_EV_STAT) ) ); /* if prot_cnt == 0, cmd_exe will fail, causing DEFUNCT */
1207 }
1208 OPW( HREG_EV_ACK, ~HREG_EV_SLEEP_REQ );
1209 #if ( (HCF_TYPE) & HCF_TYPE_PRELOADED ) == 0 /*12*/
1210 (void)cmd_exe( ifbp, HCMD_INI, 0 );
1211 #endif // HCF_TYPE_PRELOADED
1212 if ( io_base != HCF_DISCONNECT ) {
1213 rc = init( ifbp ); /*14*/
1214 if ( rc == HCF_SUCCESS ) {
1215 x.len = 2;
1216 x.typ = CFG_NIC_BUS_TYPE;
1217 (void)hcf_get_info( ifbp, &x );
1218 ifbp->IFB_BusType = x.val[0];
1219 //CFG_NIC_BUS_TYPE not supported -> default 32 bits/DMA, MSF has to overrule via CFG_CNTL_OPT
1220 if ( x.len == 0 || x.val[0] == 0x0002 || x.val[0] == 0x0003 ) {
1221 #if (HCF_IO) & HCF_IO_32BITS
1222 ifbp->IFB_CntlOpt &= ~USE_16BIT; //reset USE_16BIT
1223 #endif // HCF_IO_32BITS
1224 #if HCF_DMA
1225 ifbp->IFB_CntlOpt |= USE_DMA; //SET DMA
1226 #else
1227 ifbp->IFB_IORange = 0x40 /*i.s.o. HREG_IO_RANGE*/;
1228 #endif // HCF_DMA
1229 }
1230 }
1231 } else HCFASSERT( ( ifbp->IFB_Magic ^= HCF_MAGIC ) == 0, ifbp->IFB_Magic ) /*NOP*/;
1232 /* of above HCFASSERT only the side effect is needed, NOP in case HCFASSERT is dummy */
1233 ifbp->IFB_IOBase = io_base; /* 0*/
1234 return rc;
1235 } // hcf_connect
1236
1237 #if HCF_DMA
1238 /************************************************************************************************************
1239 * Function get_frame_lst
1240 * - resolve the "last host-owned descriptor" problems when a descriptor list is reclaimed by the MSF.
1241 *
1242 * The FrameList to be reclaimed as well as the DescriptorList always start in IFB_FirstDesc[tx_rx_flag]
1243 * and this is always the "current" DELWA Descriptor.
1244 *
1245 * If a FrameList is available, the last descriptor of the FrameList to turned into a new DELWA Descriptor:
1246 * - a copy is made from the information in the last descriptor of the FrameList into the current
1247 * DELWA Descriptor
1248 * - the remainder of the DescriptorList is detached from the copy by setting the next_desc_addr at NULL
1249 * - the DMA control bits of the copy are cleared to do not confuse the MSF
1250 * - the copy of the last descriptor (i.e. the "old" DELWA Descriptor) is chained to the prev Descriptor
1251 * of the FrameList, thus replacing the original last Descriptor of the FrameList.
1252 * - IFB_FirstDesc is changed to the address of that replaced (original) last descriptor of the FrameList,
1253 * i.e. the "new" DELWA Descriptor.
1254 *
1255 * This function makes a copy of that last host-owned descriptor, so the MSF will get a copy of the descriptor.
1256 * On top of that, it adjusts DMA related fields in the IFB structure.
1257 // perform a copying-scheme to circumvent the 'last host owned descriptor cannot be reclaimed' limitation imposed by H2.5's DMA hardware design
1258 // a 'reclaim descriptor' should be available in the HCF:
1259 *
1260 * Returns: address of the first descriptor of the FrameList
1261 *
1262 8: Be careful once you start re-ordering the steps in the copy process, that it still works for cases
1263 * of FrameLists of 1, 2 and more than 2 descriptors
1264 *
1265 * Input parameters:
1266 * tx_rx_flag : specifies 'transmit' or 'receive' descriptor.
1267 *
1268 ************************************************************************************************************/
1269 HCF_STATIC DESC_STRCT*
1270 get_frame_lst( IFBP ifbp, int tx_rx_flag )
1271 {
1272
1273 DESC_STRCT *head = ifbp->IFB_FirstDesc[tx_rx_flag];
1274 DESC_STRCT *copy, *p, *prev;
1275
1276 HCFASSERT( tx_rx_flag == DMA_RX || tx_rx_flag == DMA_TX, tx_rx_flag );
1277 //if FrameList
1278 if ( head ) {
1279 //. search for last descriptor of first FrameList
1280 p = prev = head;
1281 while ( ( p->BUF_SIZE & DESC_EOP ) == 0 && p->next_desc_addr ) {
1282 if ( ( ifbp->IFB_CntlOpt & DMA_ENABLED ) == 0 ) { //clear control bits when disabled
1283 p->BUF_CNT &= DESC_CNT_MASK;
1284 }
1285 prev = p;
1286 p = p->next_desc_addr;
1287 }
1288 //. if DMA enabled
1289 if ( ifbp->IFB_CntlOpt & DMA_ENABLED ) {
1290 //. . if last descriptor of FrameList is DMA owned
1291 //. . or if FrameList is single (DELWA) Descriptor
1292 if ( p->BUF_CNT & DESC_DMA_OWNED || head->next_desc_addr == NULL ) {
1293 //. . . refuse to return FrameList to caller
1294 head = NULL;
1295 }
1296 }
1297 }
1298 //if returnable FrameList found
1299 if ( head ) {
1300 //. if FrameList is single (DELWA) Descriptor (implies DMA disabled)
1301 if ( head->next_desc_addr == NULL ) {
1302 //. . clear DescriptorList
1303 /*;?ifbp->IFB_LastDesc[tx_rx_flag] =*/ ifbp->IFB_FirstDesc[tx_rx_flag] = NULL;
1304 //. else
1305 } else {
1306 //. . strip hardware-related bits from last descriptor
1307 //. . remove DELWA Descriptor from head of DescriptorList
1308 copy = head;
1309 head = head->next_desc_addr;
1310 //. . exchange first (Confined) and last (possibly imprisoned) Descriptor
1311 copy->buf_phys_addr = p->buf_phys_addr;
1312 copy->buf_addr = p->buf_addr;
1313 copy->BUF_SIZE = p->BUF_SIZE &= DESC_CNT_MASK; //get rid of DESC_EOP and possibly DESC_SOP
1314 copy->BUF_CNT = p->BUF_CNT &= DESC_CNT_MASK; //get rid of DESC_DMA_OWNED
1315 #if (HCF_EXT) & HCF_DESC_STRCT_EXT
1316 copy->DESC_MSFSup = p->DESC_MSFSup;
1317 #endif // HCF_DESC_STRCT_EXT
1318 //. . turn into a DELWA Descriptor
1319 p->buf_addr = NULL;
1320 //. . chain copy to prev /* 8*/
1321 prev->next_desc_addr = copy;
1322 //. . detach remainder of the DescriptorList from FrameList
1323 copy->next_desc_addr = NULL;
1324 copy->next_desc_phys_addr = 0xDEAD0000; //! just to be nice, not really needed
1325 //. . save the new start (i.e. DELWA Descriptor) in IFB_FirstDesc
1326 ifbp->IFB_FirstDesc[tx_rx_flag] = p;
1327 }
1328 //. strip DESC_SOP from first descriptor
1329 head->BUF_SIZE &= DESC_CNT_MASK;
1330 //head->BUF_CNT &= DESC_CNT_MASK; get rid of DESC_DMA_OWNED
1331 head->next_desc_phys_addr = 0xDEAD0000; //! just to be nice, not really needed
1332 }
1333 //return the just detached FrameList (if any)
1334 return head;
1335 } // get_frame_lst
1336
1337
1338 /************************************************************************************************************
1339 * Function put_frame_lst
1340 *
1341 * This function
1342 *
1343 * Returns: address of the first descriptor of the FrameList
1344 *
1345 * Input parameters:
1346 * tx_rx_flag : specifies 'transmit' or 'receive' descriptor.
1347 *
1348 * The following list should be kept in sync with hcf_dma_tx/rx_put, in order to get them in the WCI-spec !!!!
1349 * Assert fails if
1350 * - DMA is not enabled
1351 * - descriptor list is NULL
1352 * - a descriptor in the descriptor list is not double word aligned
1353 * - a count of size field of a descriptor contains control bits, i.e. bits in the high order nibble.
1354 * - the DELWA descriptor is not a "singleton" DescriptorList.
1355 * - the DELWA descriptor is not the first Descriptor supplied
1356 * - a non_DMA descriptor is supplied before the DELWA Descriptor is supplied
1357 * - Possibly more checks could be added !!!!!!!!!!!!!
1358
1359 *.NOTICE
1360 * The asserts marked with *sc* are really sanity checks for the HCF, they can (supposedly) not be influenced
1361 * by incorrect MSF behavior
1362
1363 // The MSF is required to supply the HCF with a single descriptor for MSF tx reclaim purposes.
1364 // This 'reclaim descriptor' can be recognized by the fact that its buf_addr field is zero.
1365 *********************************************************************************************
1366 * Although not required from a hardware perspective:
1367 * - make each descriptor in this rx-chain DMA-owned.
1368 * - Also set the count to zero. EOP and SOP bits are also cleared.
1369 *********************************************************************************************/
1370 HCF_STATIC void
1371 put_frame_lst( IFBP ifbp, DESC_STRCT *descp, int tx_rx_flag )
1372 {
1373 DESC_STRCT *p = descp;
1374 hcf_16 port;
1375
1376 HCFASSERT( ifbp->IFB_CntlOpt & USE_DMA, ifbp->IFB_CntlOpt); //only hcf_dma_tx_put must also be DMA_ENABLED
1377 HCFASSERT( tx_rx_flag == DMA_RX || tx_rx_flag == DMA_TX, tx_rx_flag );
1378 HCFASSERT( p , 0 );
1379
1380 while ( p ) {
1381 HCFASSERT( ((hcf_32)p & 3 ) == 0, (hcf_32)p );
1382 HCFASSERT( (p->BUF_CNT & ~DESC_CNT_MASK) == 0, p->BUF_CNT );
1383 HCFASSERT( (p->BUF_SIZE & ~DESC_CNT_MASK) == 0, p->BUF_SIZE );
1384 p->BUF_SIZE &= DESC_CNT_MASK; //!!this SHOULD be superfluous in case of correct MSF
1385 p->BUF_CNT &= tx_rx_flag == DMA_RX ? 0 : DESC_CNT_MASK; //!!this SHOULD be superfluous in case of correct MSF
1386 p->BUF_CNT |= DESC_DMA_OWNED;
1387 if ( p->next_desc_addr ) {
1388 // HCFASSERT( p->buf_addr && p->buf_phys_addr && p->BUF_SIZE && +/- p->BUF_SIZE, ... );
1389 HCFASSERT( p->next_desc_addr->desc_phys_addr, (hcf_32)p->next_desc_addr );
1390 p->next_desc_phys_addr = p->next_desc_addr->desc_phys_addr;
1391 } else { //
1392 p->next_desc_phys_addr = 0;
1393 if ( p->buf_addr == NULL ) { // DELWA Descriptor
1394 HCFASSERT( descp == p, (hcf_32)descp ); //singleton DescriptorList
1395 HCFASSERT( ifbp->IFB_FirstDesc[tx_rx_flag] == NULL, (hcf_32)ifbp->IFB_FirstDesc[tx_rx_flag]);
1396 HCFASSERT( ifbp->IFB_LastDesc[tx_rx_flag] == NULL, (hcf_32)ifbp->IFB_LastDesc[tx_rx_flag]);
1397 descp->BUF_CNT = 0; //&= ~DESC_DMA_OWNED;
1398 ifbp->IFB_FirstDesc[tx_rx_flag] = descp;
1399 // part of alternative ifbp->IFB_LastDesc[tx_rx_flag] = ifbp->IFB_FirstDesc[tx_rx_flag] = descp;
1400 // if "recycling" a FrameList
1401 // (e.g. called from hcf_cntl( HCF_CNTL_ENABLE )
1402 // . prepare for activation DMA controller
1403 // part of alternative descp = descp->next_desc_addr;
1404 } else { //a "real" FrameList, hand it over to the DMA engine
1405 HCFASSERT( ifbp->IFB_FirstDesc[tx_rx_flag], (hcf_32)descp );
1406 HCFASSERT( ifbp->IFB_LastDesc[tx_rx_flag], (hcf_32)descp );
1407 HCFASSERT( ifbp->IFB_LastDesc[tx_rx_flag]->next_desc_addr == NULL,
1408 (hcf_32)ifbp->IFB_LastDesc[tx_rx_flag]->next_desc_addr);
1409 // p->buf_cntl.cntl_stat |= DESC_DMA_OWNED;
1410 ifbp->IFB_LastDesc[tx_rx_flag]->next_desc_addr = descp;
1411 ifbp->IFB_LastDesc[tx_rx_flag]->next_desc_phys_addr = descp->desc_phys_addr;
1412 port = HREG_RXDMA_PTR32;
1413 if ( tx_rx_flag ) {
1414 p->BUF_SIZE |= DESC_EOP; // p points at the last descriptor in the caller-supplied descriptor chain
1415 descp->BUF_SIZE |= DESC_SOP;
1416 port = HREG_TXDMA_PTR32;
1417 }
1418 OUT_PORT_DWORD( (ifbp->IFB_IOBase + port), descp->desc_phys_addr );
1419 }
1420 ifbp->IFB_LastDesc[tx_rx_flag] = p;
1421 }
1422 p = p->next_desc_addr;
1423 }
1424 } // put_frame_lst
1425
1426
1427 /************************************************************************************************************
1428 *
1429 *.MODULE DESC_STRCT* hcf_dma_rx_get( IFBP ifbp )
1430 *.PURPOSE decapsulate a message and provides that message to the MSF.
1431 * reclaim all descriptors in the rx descriptor chain.
1432 *
1433 *.ARGUMENTS
1434 * ifbp address of the Interface Block
1435 *
1436 *.RETURNS
1437 * pointer to a FrameList
1438 *
1439 *.DESCRIPTION
1440 * hcf_dma_rx_get is intended to return a received frame when such a frame is deposited in Host memory by the
1441 * DMA engine. In addition hcf_dma_rx_get can be used to reclaim all descriptors in the rx descriptor chain
1442 * when the DMA Engine is disabled, e.g. as part of a driver unloading strategy.
1443 * hcf_dma_rx_get must be called repeatedly by the MSF when hcf_service_nic signals availability of a rx frame
1444 * through the HREG_EV_RDMAD flag of IFB_DmaPackets. The calling must stop when a NULL pointer is returned, at
1445 * which time the HREG_EV_RDMAD flag is also cleared by the HCF to arm the mechanism for the next frame
1446 * reception.
1447 * Regardless whether the DMA Engine is currently enabled (as controlled via hcf_cntl), if the DMA controller
1448 * deposited an Rx-frame in the Rx-DescriptorList, this frame is detached from the Rx-DescriptorList,
1449 * transformed into a FrameList (i.e. updating the housekeeping fields in the descriptors) and returned to the
1450 * caller.
1451 * If no such Rx-frame is available in the Rx-DescriptorList, the behavior of hcf_dma_rx_get depends on the
1452 * status of the DMA Engine.
1453 * If the DMA Engine is enabled, a NULL pointer is returned.
1454 * If the DMA Engine is disabled, the following strategy is used:
1455 * - the complete Rx-DescriptorList is returned. The DELWA Descriptor is not part of the Rx-DescriptorList.
1456 * - If there is no Rx-DescriptorList, the DELWA Descriptor is returned.
1457 * - If there is no DELWA Descriptor, a NULL pointer is returned.
1458 *
1459 * If the MSF performs an disable/enable sequence without exhausting the Rx-DescriptorList as described above,
1460 * the enable command will reset all house keeping information, i.e. already received but not yet by the MSF
1461 * retrieved frames are lost and the next frame will be received starting with the oldest descriptor.
1462 *
1463 * The HCF can be used in 2 fashions: with and without decapsulation for data transfer.
1464 * This is controlled at compile time by the HCF_ENC bit of the HCF_ENCAP system constant.
1465 * If appropriate, decapsulation is done by moving some data inside the buffers and updating the descriptors
1466 * accordingly.
1467 *!! ;?????where did I describe why a simple manipulation with the count values does not suffice?
1468 *
1469 *.DIAGRAM
1470 *
1471 *.ENDDOC END DOCUMENTATION
1472 *
1473 ************************************************************************************************************/
1474
1475 DESC_STRCT*
1476 hcf_dma_rx_get (IFBP ifbp)
1477 {
1478 DESC_STRCT *descp; // pointer to start of FrameList
1479
1480 descp = get_frame_lst( ifbp, DMA_RX );
1481 if ( descp && descp->buf_addr ) {
1482
1483 //skip decapsulation at confined descriptor
1484 #if (HCF_ENCAP) == HCF_ENC
1485 int i;
1486 DESC_STRCT *p = descp->next_desc_addr; //pointer to 2nd descriptor of frame
1487 HCFASSERT(p, 0);
1488 // The 2nd descriptor contains (maybe) a SNAP header plus part or whole of the payload.
1489 //determine decapsulation sub-flag in RxFS
1490 i = *(wci_recordp)&descp->buf_addr[HFS_STAT] & ( HFS_STAT_MSG_TYPE | HFS_STAT_ERR );
1491 if ( i == HFS_STAT_TUNNEL ||
1492 ( i == HFS_STAT_1042 && hcf_encap( (wci_bufp)&p->buf_addr[HCF_DASA_SIZE] ) != ENC_TUNNEL )) {
1493 // The 2nd descriptor contains a SNAP header plus part or whole of the payload.
1494 HCFASSERT( p->BUF_CNT == (p->buf_addr[5] + (p->buf_addr[4]<<8) + 2*6 + 2 - 8), p->BUF_CNT );
1495 // perform decapsulation
1496 HCFASSERT(p->BUF_SIZE >=8, p->BUF_SIZE);
1497 // move SA[2:5] in the second buffer to replace part of the SNAP header
1498 for ( i=3; i >= 0; i--) p->buf_addr[i+8] = p->buf_addr[i];
1499 // copy DA[0:5], SA[0:1] from first buffer to second buffer
1500 for ( i=0; i<8; i++) p->buf_addr[i] = descp->buf_addr[HFS_ADDR_DEST + i];
1501 // make first buffer shorter in count
1502 descp->BUF_CNT = HFS_ADDR_DEST;
1503 }
1504 }
1505 #endif // HCF_ENC
1506 if ( descp == NULL ) ifbp->IFB_DmaPackets &= (hcf_16)~HREG_EV_RDMAD; //;?could be integrated into get_frame_lst
1507 HCFLOGEXIT( HCF_TRACE_DMA_RX_GET );
1508 return descp;
1509 } // hcf_dma_rx_get
1510
1511
1512 /************************************************************************************************************
1513 *
1514 *.MODULE void hcf_dma_rx_put( IFBP ifbp, DESC_STRCT *descp )
1515 *.PURPOSE supply buffers for receive purposes.
1516 * supply the Rx-DELWA descriptor.
1517 *
1518 *.ARGUMENTS
1519 * ifbp address of the Interface Block
1520 * descp address of a DescriptorList
1521 *
1522 *.RETURNS N.A.
1523 *
1524 *.DESCRIPTION
1525 * This function is called by the MSF to supply the HCF with new/more buffers for receive purposes.
1526 * The HCF can be used in 2 fashions: with and without encapsulation for data transfer.
1527 * This is controlled at compile time by the HCF_ENC bit of the HCF_ENCAP system constant.
1528 * As a consequence, some additional constraints apply to the number of descriptor and the buffers associated
1529 * with the first 2 descriptors. Independent of the encapsulation feature, the COUNT fields are ignored.
1530 * A special case is the supplying of the DELWA descriptor, which must be supplied as the first descriptor.
1531 *
1532 * Assert fails if
1533 * - ifbp has a recognizable out-of-range value.
1534 * - NIC interrupts are not disabled while required by parameter action.
1535 * - in case decapsulation by the HCF is selected:
1536 * - The first databuffer does not have the exact size corresponding with the RxFS up to the 802.3 DestAddr
1537 * field (== 29 words).
1538 * - The FrameList does not consists of at least 2 Descriptors.
1539 * - The second databuffer does not have the minimum size of 8 bytes.
1540 *!! The 2nd part of the list of asserts should be kept in sync with put_frame_lst, in order to get
1541 *!! them in the WCI-spec !!!!
1542 * - DMA is not enabled
1543 * - descriptor list is NULL
1544 * - a descriptor in the descriptor list is not double word aligned
1545 * - a count of size field of a descriptor contains control bits, i.e. bits in the high order nibble.
1546 * - the DELWA descriptor is not a "singleton" DescriptorList.
1547 * - the DELWA descriptor is not the first Descriptor supplied
1548 * - a non_DMA descriptor is supplied before the DELWA Descriptor is supplied
1549 *!! - Possibly more checks could be added !!!!!!!!!!!!!
1550 *
1551 *.DIAGRAM
1552 *
1553 *
1554 *.ENDDOC END DOCUMENTATION
1555 *
1556 ************************************************************************************************************/
1557 void
1558 hcf_dma_rx_put( IFBP ifbp, DESC_STRCT *descp )
1559 {
1560
1561 HCFLOGENTRY( HCF_TRACE_DMA_RX_PUT, 0xDA01 );
1562 HCFASSERT( ifbp->IFB_Magic == HCF_MAGIC, ifbp->IFB_Magic );
1563 HCFASSERT_INT;
1564
1565 put_frame_lst( ifbp, descp, DMA_RX );
1566 #if HCF_ASSERT && (HCF_ENCAP) == HCF_ENC
1567 if ( descp->buf_addr ) {
1568 HCFASSERT( descp->BUF_SIZE == HCF_DMA_RX_BUF1_SIZE, descp->BUF_SIZE );
1569 HCFASSERT( descp->next_desc_addr, 0 ); // first descriptor should be followed by another descriptor
1570 // The second DB is for SNAP and payload purposes. It should be a minimum of 12 bytes in size.
1571 HCFASSERT( descp->next_desc_addr->BUF_SIZE >= 12, descp->next_desc_addr->BUF_SIZE );
1572 }
1573 #endif // HCFASSERT / HCF_ENC
1574 HCFLOGEXIT( HCF_TRACE_DMA_RX_PUT );
1575 } // hcf_dma_rx_put
1576
1577
1578 /************************************************************************************************************
1579 *
1580 *.MODULE DESC_STRCT* hcf_dma_tx_get( IFBP ifbp )
1581 *.PURPOSE DMA mode: reclaims and decapsulates packets in the tx descriptor chain if:
1582 * - A Tx packet has been copied from host-RAM into NIC-RAM by the DMA engine
1583 * - The Hermes/DMAengine have been disabled
1584 *
1585 *.ARGUMENTS
1586 * ifbp address of the Interface Block
1587 *
1588 *.RETURNS
1589 * pointer to a reclaimed Tx packet.
1590 *
1591 *.DESCRIPTION
1592 * impact of the disable command:
1593 * When a non-empty pool of Tx descriptors exists (created by means of hcf_dma_put_tx), the MSF
1594 * is supposed to empty that pool by means of hcf_dma_tx_get calls after the disable in an
1595 * disable/enable sequence.
1596 *
1597 *.DIAGRAM
1598 *
1599 *.NOTICE
1600 *
1601 *.ENDDOC END DOCUMENTATION
1602 *
1603 ************************************************************************************************************/
1604 DESC_STRCT*
1605 hcf_dma_tx_get( IFBP ifbp )
1606 {
1607 DESC_STRCT *descp; // pointer to start of FrameList
1608
1609 descp = get_frame_lst( ifbp, DMA_TX );
1610 if ( descp && descp->buf_addr ) {
1611 //skip decapsulation at confined descriptor
1612 #if (HCF_ENCAP) == HCF_ENC
1613 if ( ( descp->BUF_CNT == HFS_TYPE )) {
1614 // perform decapsulation if needed
1615 descp->next_desc_addr->buf_phys_addr -= HCF_DASA_SIZE;
1616 descp->next_desc_addr->BUF_CNT += HCF_DASA_SIZE;
1617 }
1618 #endif // HCF_ENC
1619 }
1620 if ( descp == NULL ) { //;?could be integrated into get_frame_lst
1621 ifbp->IFB_DmaPackets &= (hcf_16)~HREG_EV_TDMAD;
1622 }
1623 HCFLOGEXIT( HCF_TRACE_DMA_TX_GET );
1624 return descp;
1625 } // hcf_dma_tx_get
1626
1627
1628 /************************************************************************************************************
1629 *
1630 *.MODULE void hcf_dma_tx_put( IFBP ifbp, DESC_STRCT *descp, hcf_16 tx_cntl )
1631 *.PURPOSE puts a packet in the Tx DMA queue in host ram and kicks off the TxDma engine.
1632 * supply the Tx-DELWA descriptor.
1633 *
1634 *.ARGUMENTS
1635 * ifbp address of the Interface Block
1636 * descp address of Tx Descriptor Chain (i.e. a single Tx frame)
1637 * tx_cntl indicates MAC-port and (Hermes) options
1638 *
1639 *.RETURNS N.A.
1640 *
1641 *.DESCRIPTION
1642 * The HCF can be used in 2 fashions: with and without encapsulation for data transfer.
1643 * This is controlled at compile time by the HCF_ENC bit of the HCF_ENCAP system constant.
1644 *
1645 * Regardless of the HCF_ENCAP system constant, the descriptor list created to describe the frame to be
1646 * transmitted, must supply space to contain the 802.11 header, preceding the actual frame to be transmitted.
1647 * Basically, this only supplies working storage to the HCF which passes this on to the DMA engine.
1648 * As a consequence the contents of this space do not matter.
1649 * Nevertheless BUF_CNT must take in account this storage.
1650 * This working space to contain the 802.11 header may not be fragmented, the first buffer must be
1651 * sufficiently large to contain at least the 802.11 header, i.e. HFS_ADDR_DEST (29 words or 0x3A bytes).
1652 * This way, the HCF can simply, regardless whether or not the HCF encapsulates the frame, write the parameter
1653 * tx_cntl at offset 0x36 (HFS_TX_CNTL) in the first buffer.
1654 * Note that it is allowed to have part or all of the actual frame represented by the first descriptor as long
1655 * as the requirement for storage for the 802.11 header is met, i.e. the 802.3 frame starts at offset
1656 * HFS_ADDR_DEST.
1657 * Except for the Assert on the 1st buffer in case of Encapsualtion, the SIZE fields are ignored.
1658 *
1659 * In case the encapsulation feature is compiled in, there are the following additional requirements.
1660 * o The BUF_CNT of the first buffer changes from a minimum of 0x3A bytes to exactly 0x3A, i.e. the workspace
1661 * to store the 802.11 header
1662 * o The BUF_SIZE of the first buffer is at least the space needed to store the
1663 * - 802.11 header (29 words)
1664 * - 802.3 header, i.e. 12 bytes addressing information and 2 bytes length field
1665 * - 6 bytes SNAP-header
1666 * This results in 39 words or 0x4E bytes or HFS_TYPE.
1667 * Note that if the BUF_SIZE is larger than 0x4E, this surplus is not used.
1668 * o The actual frame begins in the 2nd descriptor (which is already implied by the BUF_CNT == 0x3A requirement) and the associated buffer contains at least the 802.3 header, i.e. the 14 bytes representing addressing information and length/type field
1669 *
1670 * When the HCF does not encapsulates (i.e. length/type field <= 1500), no changes are made to descriptors
1671 * or buffers.
1672 *
1673 * When the HCF actually encapsulates (i.e. length/type field > 1500), it successively writes, starting at
1674 * offset HFS_ADDR_DEST (0x3A) in the first buffer:
1675 * - the 802.3 addressing information, copied from the begin of the second buffer
1676 * - the frame length, derived from the total length of the individual fragments, corrected for the SNAP
1677 * header length and Type field and ignoring the Destination Address, Source Address and Length field
1678 * - the appropriate snap header (Tunnel or 1042, depending on the value of the type field).
1679 *
1680 * The information in the first two descriptors is adjusted accordingly:
1681 * - the first descriptor count is changed from 0x3A to 0x4E (HFS_TYPE), which matches 0x3A + 12 + 2 + 6
1682 * - the second descriptor count is decreased by 12, being the moved addressing information
1683 * - the second descriptor (physical) buffer address is increased by 12.
1684 *
1685 * When the descriptors are returned by hcf_dma_tx_get, the transformation of the first two descriptors is
1686 * undone.
1687 *
1688 * Under any of the above scenarios, the assert BUF_CNT <= BUF_SIZE must be true for all descriptors
1689 * In case of encapsulation, BUF_SIZE of the 1st descriptor is asserted to be at least HFS_TYPE (0x4E), so it is NOT tested.
1690 *
1691 * Assert fails if
1692 * - ifbp has a recognizable out-of-range value.
1693 * - tx_cntl has a recognizable out-of-range value.
1694 * - NIC interrupts are not disabled while required by parameter action.
1695 * - in case encapsulation by the HCF is selected:
1696 * - The FrameList does not consists of at least 2 Descriptors.
1697 * - The first databuffer does not contain exactly the (space for) the 802.11 header (== 28 words)
1698 * - The first databuffer does not have a size to additionally accommodate the 802.3 header and the
1699 * SNAP header of the frame after encapsulation (== 39 words).
1700 * - The second databuffer does not contain at least DA, SA and 'type/length' (==14 bytes or 7 words)
1701 *!! The 2nd part of the list of asserts should be kept in sync with put_frame_lst, in order to get
1702 *!! them in the WCI-spec !!!!
1703 * - DMA is not enabled
1704 * - descriptor list is NULL
1705 * - a descriptor in the descriptor list is not double word aligned
1706 * - a count of size field of a descriptor contains control bits, i.e. bits in the high order nibble.
1707 * - the DELWA descriptor is not a "singleton" DescriptorList.
1708 * - the DELWA descriptor is not the first Descriptor supplied
1709 * - a non_DMA descriptor is supplied before the DELWA Descriptor is supplied
1710 *!! - Possibly more checks could be added !!!!!!!!!!!!!
1711 *.DIAGRAM
1712 *
1713 *.NOTICE
1714 *
1715 *.ENDDOC END DOCUMENTATION
1716 *
1717 *
1718 *1: Write tx_cntl parameter to HFS_TX_CNTL field into the Hermes-specific header in buffer 1
1719 *4: determine whether encapsulation is needed and write the type (tunnel or 1042) already at the appropriate
1720 * offset in the 1st buffer
1721 *6: Build the encapsualtion enveloppe in the free space at the end of the 1st buffer
1722 * - Copy DA/SA fields from the 2nd buffer
1723 * - Calculate total length of the message (snap-header + type-field + the length of all buffer fragments
1724 * associated with the 802.3 frame (i.e all descriptors except the first), but not the DestinationAddress,
1725 * SourceAddress and length-field)
1726 * Assert the message length
1727 * Write length. Note that the message is in BE format, hence on LE platforms the length must be converted
1728 * ;? THIS IS NOT WHAT CURRENTLY IS IMPLEMENTED
1729 * - Write snap header. Note that the last byte of the snap header is NOT copied, that byte is already in
1730 * place as result of the call to hcf_encap.
1731 * Note that there are many ways to skin a cat. To express the offsets in the 1st buffer while writing
1732 * the snap header, HFS_TYPE is chosen as a reference point to make it easier to grasp that the snap header
1733 * and encapsualtion type are at least relative in the right.
1734 *8: modify 1st descriptor to reflect moved part of the 802.3 header + Snap-header
1735 * modify 2nd descriptor to skip the moved part of the 802.3 header (DA/SA
1736 *10: set each descriptor to 'DMA owned', clear all other control bits.
1737 * Set SOP bit on first descriptor. Set EOP bit on last descriptor.
1738 *12: Either append the current frame to an existing descriptor list or
1739 *14: create a list beginning with the current frame
1740 *16: remember the new end of the list
1741 *20: hand the frame over to the DMA engine
1742 ************************************************************************************************************/
1743 void
1744 hcf_dma_tx_put( IFBP ifbp, DESC_STRCT *descp, hcf_16 tx_cntl )
1745 {
1746 DESC_STRCT *p = descp->next_desc_addr;
1747 int i;
1748
1749 #if HCF_ASSERT
1750 int x = ifbp->IFB_FWIdentity.comp_id == COMP_ID_FW_AP ? tx_cntl & ~HFS_TX_CNTL_PORT : tx_cntl;
1751 HCFASSERT( (x & ~HCF_TX_CNTL_MASK ) == 0, tx_cntl );
1752 #endif // HCF_ASSERT
1753 HCFLOGENTRY( HCF_TRACE_DMA_TX_PUT, 0xDA03 );
1754 HCFASSERT( ifbp->IFB_Magic == HCF_MAGIC, ifbp->IFB_Magic );
1755 HCFASSERT_INT;
1756 HCFASSERT( ( ifbp->IFB_CntlOpt & (USE_DMA|DMA_ENABLED) ) == (USE_DMA|DMA_ENABLED), ifbp->IFB_CntlOpt);
1757
1758 if ( descp->buf_addr ) {
1759 *(hcf_16*)(descp->buf_addr + HFS_TX_CNTL) = tx_cntl; /*1*/
1760 #if (HCF_ENCAP) == HCF_ENC
1761 HCFASSERT( descp->next_desc_addr, 0 ); //at least 2 descripors
1762 HCFASSERT( descp->BUF_CNT == HFS_ADDR_DEST, descp->BUF_CNT ); //exact length required for 1st buffer
1763 HCFASSERT( descp->BUF_SIZE >= HCF_DMA_TX_BUF1_SIZE, descp->BUF_SIZE ); //minimal storage for encapsulation
1764 HCFASSERT( p->BUF_CNT >= 14, p->BUF_CNT ); //at least DA, SA and 'type' in 2nd buffer
1765
1766 descp->buf_addr[HFS_TYPE-1] = hcf_encap(&descp->next_desc_addr->buf_addr[HCF_DASA_SIZE]); /*4*/
1767 if ( descp->buf_addr[HFS_TYPE-1] != ENC_NONE ) {
1768 for ( i=0; i < HCF_DASA_SIZE; i++ ) { /*6*/
1769 descp->buf_addr[i + HFS_ADDR_DEST] = descp->next_desc_addr->buf_addr[i];
1770 }
1771 i = sizeof(snap_header) + 2 - ( 2*6 + 2 );
1772 do { i += p->BUF_CNT; } while ( ( p = p->next_desc_addr ) != NULL );
1773 *(hcf_16*)(&descp->buf_addr[HFS_LEN]) = CNV_END_SHORT(i); //!! this converts on ALL platforms, how does that relate to the CCX code
1774 for ( i=0; i < sizeof(snap_header) - 1; i++) {
1775 descp->buf_addr[HFS_TYPE - sizeof(snap_header) + i] = snap_header[i];
1776 }
1777 descp->BUF_CNT = HFS_TYPE; /*8*/
1778 descp->next_desc_addr->buf_phys_addr += HCF_DASA_SIZE;
1779 descp->next_desc_addr->BUF_CNT -= HCF_DASA_SIZE;
1780 }
1781 #endif // HCF_ENC
1782 }
1783 put_frame_lst( ifbp, descp, DMA_TX );
1784 HCFLOGEXIT( HCF_TRACE_DMA_TX_PUT );
1785 } // hcf_dma_tx_put
1786
1787 #endif // HCF_DMA
1788
1789 /************************************************************************************************************
1790 *
1791 *.MODULE hcf_8 hcf_encap( wci_bufp type )
1792 *.PURPOSE test whether RFC1042 or Bridge-Tunnel encapsulation is needed.
1793 *
1794 *.ARGUMENTS
1795 * type (Far) pointer to the (Big Endian) Type/Length field in the message
1796 *
1797 *.RETURNS
1798 * ENC_NONE len/type is "len" ( (BIG_ENDIAN)type <= 1500 )
1799 * ENC_TUNNEL len/type is "type" and 0x80F3 or 0x8137
1800 * ENC_1042 len/type is "type" but not 0x80F3 or 0x8137
1801 *
1802 *.CONDITIONS
1803 * NIC Interrupts d.c
1804 *
1805 *.DESCRIPTION
1806 * Type must point to the Len/Type field of the message, this is the 2-byte field immediately after the 6 byte
1807 * Destination Address and 6 byte Source Address. The 2 successive bytes addressed by type are interpreted as
1808 * a Big Endian value. If that value is less than or equal to 1500, the message is assumed to be in 802.3
1809 * format. Otherwise the message is assumed to be in Ethernet-II format. Depending on the value of Len/Typ,
1810 * Bridge Tunnel or RFC1042 encapsulation is needed.
1811 *
1812 *.DIAGRAM
1813 *
1814 * 1: presume 802.3, hence preset return value at ENC_NONE
1815 * 2: convert type from "network" Endian format to native Endian
1816 * 4: the litmus test to distinguish type and len.
1817 * The hard code "magic" value of 1500 is intentional and should NOT be replaced by a mnemonic because it is
1818 * not related at all to the maximum frame size supported by the Hermes.
1819 * 6: check type against:
1820 * 0x80F3 //AppleTalk Address Resolution Protocol (AARP)
1821 * 0x8137 //IPX
1822 * to determine the type of encapsulation
1823 *
1824 *.ENDDOC END DOCUMENTATION
1825 *
1826 ************************************************************************************************************/
1827 HCF_STATIC hcf_8
1828 hcf_encap( wci_bufp type )
1829 {
1830
1831 hcf_8 rc = ENC_NONE; /* 1 */
1832 hcf_16 t = (hcf_16)(*type<<8) + *(type+1); /* 2 */
1833
1834 if ( t > 1500 ) { /* 4 */
1835 if ( t == 0x8137 || t == 0x80F3 ) {
1836 rc = ENC_TUNNEL; /* 6 */
1837 } else {
1838 rc = ENC_1042;
1839 }
1840 }
1841 return rc;
1842 } // hcf_encap
1843
1844
1845 /************************************************************************************************************
1846 *
1847 *.MODULE int hcf_get_info( IFBP ifbp, LTVP ltvp )
1848 *.PURPOSE Obtains transient and persistent configuration information from the Card and from the HCF.
1849 *
1850 *.ARGUMENTS
1851 * ifbp address of the Interface Block
1852 * ltvp address of LengthTypeValue structure specifying the "what" and the "how much" of the
1853 * information to be collected from the HCF or from the Hermes
1854 *
1855 *.RETURNS
1856 * HCF_ERR_LEN The provided buffer was too small
1857 * HCF_SUCCESS Success
1858 *!! via cmd_exe ( type >= CFG_RID_FW_MIN )
1859 * HCF_ERR_NO_NIC NIC removed during retrieval
1860 * HCF_ERR_TIME_OUT Expected Hermes event did not occur in expected time
1861 *!! via cmd_exe and setup_bap (type >= CFG_RID_FW_MIN )
1862 * HCF_ERR_DEFUNCT_... HCF is in defunct mode (bits 0x7F reflect cause)
1863 *
1864 *.DESCRIPTION
1865 * The T-field of the LTV-record (provided by the MSF in parameter ltvp) specifies the RID wanted. The RID
1866 * information identified by the T-field is copied into the V-field.
1867 * On entry, the L-field specifies the size of the buffer, also called the "Initial DataLength". The L-value
1868 * includes the size of the T-field, but not the size of the L-field itself.
1869 * On return, the L-field indicates the number of words actually contained by the Type and Value fields.
1870 * As the size of the Type field in the LTV-record is included in the "Initial DataLength" of the record, the
1871 * V-field can contain at most "Initial DataLength" - 1 words of data.
1872 * Copying stops if either the complete Information is copied or if the number of words indicated by the
1873 * "Initial DataLength" were copied. The "Initial DataLength" acts as a safe guard against Configuration
1874 * Information blocks that have different sizes for different F/W versions, e.g. when later versions support
1875 * more tallies than earlier versions.
1876 * If the size of Value field of the RID exceeds the size of the "Initial DataLength" -1, as much data
1877 * as fits is copied, and an error status of HCF_ERR_LEN is returned.
1878 *
1879 * It is the responsibility of the MSF to detect card removal and re-insertion and not call the HCF when the
1880 * NIC is absent. The MSF cannot, however, timely detect a Card removal if the Card is removed while
1881 * hcf_get_info is in progress. Therefore, the HCF performs its own check on Card presence after the read
1882 * operation of the NIC data. If the Card is not present or removed during the execution of hcf_get_info,
1883 * HCF_ERR_NO_NIC is returned and the content of the Data Buffer is unpredictable. This check is not performed
1884 * in case of the "HCF embedded" pseudo RIDs like CFG_TALLIES.
1885 *
1886 * Assert fails if
1887 * - ifbp has a recognizable out-of-range value.
1888 * - reentrancy, may be caused by calling hcf_functions without adequate protection
1889 * against NIC interrupts or multi-threading.
1890 * - ltvp is a NULL pointer.
1891 * - length field of the LTV-record at entry is 0 or 1 or has an excessive value (i.e. exceeds HCF_MAX_LTV).
1892 * - type field of the LTV-record is invalid.
1893 *
1894 *.DIAGRAM
1895 * Hcf_get_mb_info copies the contents of the oldest MailBox Info block in the MailBox to PC RAM. If len is
1896 * less than the size of the MailBox Info block, only as much as fits in the PC RAM buffer is copied. After
1897 * the copying the MailBox Read pointer is updated to point to the next MailBox Info block, hence the
1898 * remainder of an "oversized" MailBox Info block is lost. The truncation of the MailBox Info block is NOT
1899 * reflected in the return status. Note that hcf_get_info guarantees the length of the PC RAM buffer meets
1900 * the minimum requirements of at least 2, so no PC RAM buffer overrun.
1901 *
1902 * Calling hcf_get_mb_info when their is no MailBox Info block available or when there is no MailBox at all,
1903 * results in a "NULL" MailBox Info block.
1904 *
1905 *12: see NOTICE
1906 *17: The return status of cmd_wait and the first hcfio_in_string can be ignored, because when one fails, the
1907 * other fails via the IFB_DefunctStat mechanism
1908 *20: "HCFASSERT( rc == HCF_SUCCESS, rc )" is not suitable because this will always trigger as side effect of
1909 * the HCFASSERT in hcf_put_info which calls hcf_get_info to figure out whether the RID exists at all.
1910
1911 *.NOTICE
1912 *
1913 * "HCF embedded" pseudo RIDs:
1914 * CFG_MB_INFO, CFG_TALLIES, CFG_DRV_IDENTITY, CFG_DRV_SUP_RANGE, CFG_DRV_ACT_RANGES_PRI,
1915 * CFG_DRV_ACT_RANGES_STA, CFG_DRV_ACT_RANGES_HSI
1916 * Note the HCF_ERR_LEN is NOT adequately set, when L >= 2 but less than needed
1917 *
1918 * Remarks: Transfers operation information and transient and persistent configuration information from the
1919 * Card and from the HCF to the MSF.
1920 * The exact layout of the provided data structure depends on the action code. Copying stops if either the
1921 * complete Configuration Information is copied or if the number of bytes indicated by len is copied. Len
1922 * acts as a safe guard against Configuration Information blocks which have different sizes for different
1923 * Hermes versions, e.g. when later versions support more tallies than earlier versions. It is a conscious
1924 * decision that unused parts of the PC RAM buffer are not cleared.
1925 *
1926 * Remarks: The only error against which is protected is the "Read error" as result of Card removal. Only the
1927 * last hcf_io_string need to be protected because if the first fails the second will fail as well. Checking
1928 * for cmd_exe errors is supposed superfluous because problems in cmd_exe are already caught or will be
1929 * caught by hcf_enable.
1930 *
1931 * CFG_MB_INFO: copy the oldest MailBox Info Block or the "null" block if none available.
1932 *
1933 * The mechanism to HCF_ASSERT on invalid typ-codes in the LTV record is based on the following strategy:
1934 * - during the pseudo-asynchronous Hermes commands (diagnose, download) only CFG_MB_INFO is acceptable
1935 * - some codes (e.g. CFG_TALLIES) are explicitly handled by the HCF which implies that these codes
1936 * are valid
1937 * - all other codes in the range 0xFC00 through 0xFFFF are passed to the Hermes. The Hermes returns an
1938 * LTV record with a zero value in the L-field for all Typ-codes it does not recognize. This is
1939 * defined and intended behavior, so HCF_ASSERT does not catch on this phenomena.
1940 * - all remaining codes are invalid and cause an ASSERT.
1941 *
1942 *.CONDITIONS
1943 * In case of USB, HCF_MAX_MSG ;?USED;? to limit the amount of data that can be retrieved via hcf_get_info.
1944 *
1945 *
1946 *.ENDDOC END DOCUMENTATION
1947 *
1948 ************************************************************************************************************/
1949 int
1950 hcf_get_info( IFBP ifbp, LTVP ltvp )
1951 {
1952
1953 int rc = HCF_SUCCESS;
1954 hcf_16 len = ltvp->len;
1955 hcf_16 type = ltvp->typ;
1956 wci_recordp p = &ltvp->len; //destination word pointer (in LTV record)
1957 hcf_16 *q = NULL; /* source word pointer Note!! DOS COM can't cope with FAR
1958 * as a consequence MailBox must be near which is usually true anyway
1959 */
1960 int i;
1961
1962 HCFLOGENTRY( HCF_TRACE_GET_INFO, ltvp->typ );
1963 HCFASSERT( ifbp->IFB_Magic == HCF_MAGIC, ifbp->IFB_Magic );
1964 HCFASSERT_INT;
1965 HCFASSERT( ltvp, 0 );
1966 HCFASSERT( 1 < ltvp->len && ltvp->len <= HCF_MAX_LTV + 1, MERGE_2( ltvp->typ, ltvp->len ) );
1967
1968 ltvp->len = 0; //default to: No Info Available
1969 //filter out all specials
1970 for ( i = 0; ( q = xxxx[i] ) != NULL && q[1] != type; i++ ) /*NOP*/;
1971
1972 #if HCF_TALLIES
1973 if ( type == CFG_TALLIES ) { /*3*/
1974 (void)hcf_action( ifbp, HCF_ACT_TALLIES );
1975 q = (hcf_16*)&ifbp->IFB_TallyLen;
1976 }
1977 #endif // HCF_TALLIES
1978
1979 if ( type == CFG_MB_INFO ) {
1980 if ( ifbp->IFB_MBInfoLen ) {
1981 if ( ifbp->IFB_MBp[ifbp->IFB_MBRp] == 0xFFFF ) {
1982 ifbp->IFB_MBRp = 0; //;?Probably superfluous
1983 }
1984 q = &ifbp->IFB_MBp[ifbp->IFB_MBRp];
1985 ifbp->IFB_MBRp += *q + 1; //update read pointer
1986 if ( ifbp->IFB_MBp[ifbp->IFB_MBRp] == 0xFFFF ) {
1987 ifbp->IFB_MBRp = 0;
1988 }
1989 ifbp->IFB_MBInfoLen = ifbp->IFB_MBp[ifbp->IFB_MBRp];
1990 }
1991 }
1992
1993 if ( q != NULL ) { //a special or CFG_TALLIES or CFG_MB_INFO
1994 i = min( len, *q ) + 1; //total size of destination (including T-field)
1995 while ( i-- ) {
1996 *p++ = *q;
1997 #if (HCF_TALLIES) & HCF_TALLIES_RESET
1998 if ( q > &ifbp->IFB_TallyTyp && type == CFG_TALLIES ) {
1999 *q = 0;
2000 }
2001 #endif // HCF_TALLIES_RESET
2002 q++;
2003 }
2004 } else { // not a special nor CFG_TALLIES nor CFG_MB_INFO
2005 if ( type == CFG_CNTL_OPT ) { //read back effective options
2006 ltvp->len = 2;
2007 ltvp->val[0] = ifbp->IFB_CntlOpt;
2008 #if (HCF_EXT) & HCF_EXT_NIC_ACCESS
2009 } else if ( type == CFG_PROD_DATA ) { //only needed for some test tool on top of H-II NDIS driver
2010 hcf_io io_port;
2011 wci_bufp pt; //pointer with the "right" type, just to help ease writing macros with embedded assembly
2012 OPW( HREG_AUX_PAGE, (hcf_16)(PLUG_DATA_OFFSET >> 7) );
2013 OPW( HREG_AUX_OFFSET, (hcf_16)(PLUG_DATA_OFFSET & 0x7E) );
2014 io_port = ifbp->IFB_IOBase + HREG_AUX_DATA; //to prevent side effects of the MSF-defined macro
2015 p = ltvp->val; //destination char pointer (in LTV record)
2016 i = len - 1;
2017 if (i > 0 ) {
2018 pt = (wci_bufp)p; //just to help ease writing macros with embedded assembly
2019 IN_PORT_STRING_8_16( io_port, pt, i ); //space used by T: -1
2020 }
2021 } else if ( type == CFG_CMD_HCF ) {
2022 #define P ((CFG_CMD_HCF_STRCT FAR *)ltvp)
2023 HCFASSERT( P->cmd == CFG_CMD_HCF_REG_ACCESS, P->cmd ); //only Hermes register access supported
2024 if ( P->cmd == CFG_CMD_HCF_REG_ACCESS ) {
2025 HCFASSERT( P->mode < ifbp->IFB_IOBase, P->mode ); //Check Register space
2026 ltvp->len = min( len, 4 ); //RESTORE ltv length
2027 P->add_info = IPW( P->mode );
2028 }
2029 #undef P
2030 #endif // HCF_EXT_NIC_ACCESS
2031 #if (HCF_ASSERT) & HCF_ASSERT_PRINTF
2032 } else if (type == CFG_FW_PRINTF) {
2033 rc = fw_printf(ifbp, (CFG_FW_PRINTF_STRCT*)ltvp);
2034 #endif // HCF_ASSERT_PRINTF
2035 } else if ( type >= CFG_RID_FW_MIN ) {
2036 //;? by using HCMD_BUSY option when calling cmd_exe, using a get_frag with length 0 just to set up the
2037 //;? BAP and calling cmd_cmpl, you could merge the 2 Busy waits. Whether this really helps (and what
2038 //;? would be the optimal sequence in cmd_exe and get_frag) would have to be MEASURED
2039 /*17*/ if ( ( rc = cmd_exe( ifbp, HCMD_ACCESS, type ) ) == HCF_SUCCESS &&
2040 ( rc = setup_bap( ifbp, type, 0, IO_IN ) ) == HCF_SUCCESS ) {
2041 get_frag( ifbp, (wci_bufp)&ltvp->len, 2*len+2 BE_PAR(2) );
2042 if ( IPW( HREG_STAT ) == 0xFFFF ) { //NIC removal test
2043 ltvp->len = 0;
2044 HCFASSERT( DO_ASSERT, type );
2045 }
2046 }
2047 /*12*/ } else HCFASSERT( DO_ASSERT, type ) /*NOP*/; //NOP in case HCFASSERT is dummy
2048 }
2049 if ( len < ltvp->len ) {
2050 ltvp->len = len;
2051 if ( rc == HCF_SUCCESS ) {
2052 rc = HCF_ERR_LEN;
2053 }
2054 }
2055 HCFASSERT( rc == HCF_SUCCESS || ( rc == HCF_ERR_LEN && ifbp->IFB_AssertTrace & 1<<HCF_TRACE_PUT_INFO ),
2056 MERGE_2( type, rc ) ); /*20*/
2057 HCFLOGEXIT( HCF_TRACE_GET_INFO );
2058 return rc;
2059 } // hcf_get_info
2060
2061
2062 /************************************************************************************************************
2063 *
2064 *.MODULE int hcf_put_info( IFBP ifbp, LTVP ltvp )
2065 *.PURPOSE Transfers operation and configuration information to the Card and to the HCF.
2066 *
2067 *.ARGUMENTS
2068 * ifbp address of the Interface Block
2069 * ltvp specifies the RID (as defined by Hermes I/F) or pseudo-RID (as defined by WCI)
2070 *
2071 *.RETURNS
2072 * HCF_SUCCESS
2073 *!! via cmd_exe
2074 * HCF_ERR_NO_NIC NIC removed during data retrieval
2075 * HCF_ERR_TIME_OUT Expected F/W event did not occur in time
2076 * HCF_ERR_DEFUNCT_...
2077 *!! via download CFG_DLNV_START <= type <= CFG_DL_STOP
2078 *!! via put_info CFG_RID_CFG_MIN <= type <= CFG_RID_CFG_MAX
2079 *!! via put_frag
2080 *
2081 *.DESCRIPTION
2082 * The L-field of the LTV-record (provided by the MSF in parameter ltvp) specifies the size of the buffer.
2083 * The L-value includes the size of the T-field, but not the size of the L-field.
2084 * The T- field specifies the RID placed in the V-field by the MSF.
2085 *
2086 * Not all CFG-codes can be used for hcf_put_info. The following CFG-codes are valid for hcf_put_info:
2087 * o One of the CFG-codes in the group "Network Parameters, Static Configuration Entities"
2088 * Changes made by hcf_put_info to CFG_codes in this group will not affect the F/W
2089 * and HCF behavior until hcf_cntl_port( HCF_PORT_ENABLE) is called.
2090 * o One of the CFG-codes in the group "Network Parameters, Dynamic Configuration Entities"
2091 * Changes made by hcf_put_info to CFG_codes will affect the F/W and HCF behavior immediately.
2092 * o CFG_PROG.
2093 * This code is used to initiate and terminate the process to download data either to
2094 * volatile or to non-volatile RAM on the NIC as well as for the actual download.
2095 * o CFG-codes related to the HCF behavior.
2096 * The related CFG-codes are:
2097 * - CFG_REG_MB
2098 * - CFG_REG_ASSERT_RTNP
2099 * - CFG_REG_INFO_LOG
2100 * - CFG_CMD_NIC
2101 * - CFG_CMD_DONGLE
2102 * - CFG_CMD_HCF
2103 * - CFG_NOTIFY
2104 *
2105 * All LTV-records "unknown" to the HCF are forwarded to the F/W.
2106 *
2107 * Assert fails if
2108 * - ifbp has a recognizable out-of-range value.
2109 * - ltvp is a NULL pointer.
2110 * - hcf_put_info was called without prior call to hcf_connect
2111 * - type field of the LTV-record is invalid, i.e. neither HCF nor F/W can handle the value.
2112 * - length field of the LTV-record at entry is less than 1 or exceeds MAX_LTV_SIZE.
2113 * - registering a MailBox with size less than 60 or a non-aligned buffer address is used.
2114 * - reentrancy, may be caused by calling hcf_functions without adequate protection against
2115 * NIC interrupts or multi-threading.
2116 *
2117 *.DIAGRAM
2118 *
2119 *.NOTICE
2120 * Remarks: In case of Hermes Configuration LTVs, the codes for the type are "cleverly" chosen to be
2121 * identical to the RID. Hermes Configuration information is copied from the provided data structure into the
2122 * Card.
2123 * In case of HCF Configuration LTVs, the type values are chosen in a range which does not overlap the
2124 * RID-range.
2125 *
2126 *20:
2127 *
2128 *.ENDDOC END DOCUMENTATION
2129 *
2130 ************************************************************************************************************/
2131
2132 int
2133 hcf_put_info( IFBP ifbp, LTVP ltvp )
2134 {
2135 int rc = HCF_SUCCESS;
2136
2137 HCFLOGENTRY( HCF_TRACE_PUT_INFO, ltvp->typ );
2138 HCFASSERT( ifbp->IFB_Magic == HCF_MAGIC, ifbp->IFB_Magic );
2139 HCFASSERT_INT;
2140 HCFASSERT( ltvp, 0 );
2141 HCFASSERT( 1 < ltvp->len && ltvp->len <= HCF_MAX_LTV + 1, ltvp->len );
2142
2143 //all codes between 0xFA00 and 0xFCFF are passed to Hermes
2144 #if (HCF_TYPE) & HCF_TYPE_WPA
2145 {
2146 hcf_16 i;
2147 hcf_32 FAR * key_p;
2148
2149 if ( ltvp->typ == CFG_ADD_TKIP_DEFAULT_KEY || ltvp->typ == CFG_ADD_TKIP_MAPPED_KEY ) {
2150 key_p = (hcf_32*)((CFG_ADD_TKIP_MAPPED_KEY_STRCT FAR *)ltvp)->tx_mic_key;
2151 i = TX_KEY; //i.e. TxKeyIndicator == 1, KeyID == 0
2152 if ( ltvp->typ == CFG_ADD_TKIP_DEFAULT_KEY ) {
2153 key_p = (hcf_32*)((CFG_ADD_TKIP_DEFAULT_KEY_STRCT FAR *)ltvp)->tx_mic_key;
2154 i = CNV_LITTLE_TO_SHORT(((CFG_ADD_TKIP_DEFAULT_KEY_STRCT FAR *)ltvp)->tkip_key_id_info);
2155 }
2156 if ( i & TX_KEY ) { /* TxKeyIndicator == 1
2157 (either really set by MSF in case of DEFAULT or faked by HCF in case of MAPPED ) */
2158 ifbp->IFB_MICTxCntl = (hcf_16)( HFS_TX_CNTL_MIC | (i & KEY_ID )<<8 );
2159 ifbp->IFB_MICTxKey[0] = CNV_LONGP_TO_LITTLE( key_p );
2160 ifbp->IFB_MICTxKey[1] = CNV_LONGP_TO_LITTLE( (key_p+1) );
2161 }
2162 i = ( i & KEY_ID ) * 2;
2163 ifbp->IFB_MICRxKey[i] = CNV_LONGP_TO_LITTLE( (key_p+2) );
2164 ifbp->IFB_MICRxKey[i+1] = CNV_LONGP_TO_LITTLE( (key_p+3) );
2165 }
2166 #define P ((CFG_REMOVE_TKIP_DEFAULT_KEY_STRCT FAR *)ltvp)
2167 if ( ( ltvp->typ == CFG_REMOVE_TKIP_MAPPED_KEY ) ||
2168 ( ltvp->typ == CFG_REMOVE_TKIP_DEFAULT_KEY &&
2169 ( (ifbp->IFB_MICTxCntl >> 8) & KEY_ID ) == CNV_SHORT_TO_LITTLE(P->tkip_key_id )
2170 )
2171 ) { ifbp->IFB_MICTxCntl = 0; } //disable MIC-engine
2172 #undef P
2173 }
2174 #endif // HCF_TYPE_WPA
2175
2176 if ( ltvp->typ == CFG_PROG ) {
2177 rc = download( ifbp, (CFG_PROG_STRCT FAR *)ltvp );
2178 } else switch (ltvp->typ) {
2179 #if (HCF_ASSERT) & HCF_ASSERT_RT_MSF_RTN
2180 case CFG_REG_ASSERT_RTNP: //Register MSF Routines
2181 #define P ((CFG_REG_ASSERT_RTNP_STRCT FAR *)ltvp)
2182 ifbp->IFB_AssertRtn = P->rtnp;
2183 // ifbp->IFB_AssertLvl = P->lvl; //TODO not yet supported so default is set in hcf_connect
2184 HCFASSERT( DO_ASSERT, MERGE_2( HCF_ASSERT, 0xCAF1 ) ); //just to proof that the complete assert machinery is working
2185 #undef P
2186 break;
2187 #endif // HCF_ASSERT_RT_MSF_RTN
2188 #if (HCF_EXT) & HCF_EXT_INFO_LOG
2189 case CFG_REG_INFO_LOG: //Register Log filter
2190 ifbp->IFB_RIDLogp = ((CFG_RID_LOG_STRCT FAR*)ltvp)->recordp;
2191 break;
2192 #endif // HCF_EXT_INFO_LOG
2193 case CFG_CNTL_OPT: //overrule option
2194 HCFASSERT( ( ltvp->val[0] & ~(USE_DMA | USE_16BIT) ) == 0, ltvp->val[0] );
2195 if ( ( ltvp->val[0] & USE_DMA ) == 0 ) ifbp->IFB_CntlOpt &= ~USE_DMA;
2196 ifbp->IFB_CntlOpt |= ltvp->val[0] & USE_16BIT;
2197 break;
2198
2199 case CFG_REG_MB: //Register MailBox
2200 #define P ((CFG_REG_MB_STRCT FAR *)ltvp)
2201 HCFASSERT( ( (hcf_32)P->mb_addr & 0x0001 ) == 0, (hcf_32)P->mb_addr );
2202 HCFASSERT( (P)->mb_size >= 60, (P)->mb_size );
2203 ifbp->IFB_MBp = P->mb_addr;
2204 /* if no MB present, size must be 0 for ;?the old;? put_info_mb to work correctly */
2205 ifbp->IFB_MBSize = ifbp->IFB_MBp == NULL ? 0 : P->mb_size;
2206 ifbp->IFB_MBWp = ifbp->IFB_MBRp = 0;
2207 ifbp->IFB_MBp[0] = 0; //flag the MailBox as empty
2208 ifbp->IFB_MBInfoLen = 0;
2209 HCFASSERT( ifbp->IFB_MBSize >= 60 || ifbp->IFB_MBp == NULL, ifbp->IFB_MBSize );
2210 #undef P
2211 break;
2212 case CFG_MB_INFO: //store MailBoxInfoBlock
2213 rc = put_info_mb( ifbp, (CFG_MB_INFO_STRCT FAR *)ltvp );
2214 break;
2215
2216 #if (HCF_EXT) & HCF_EXT_NIC_ACCESS
2217 case CFG_CMD_NIC:
2218 #define P ((CFG_CMD_NIC_STRCT FAR *)ltvp)
2219 OPW( HREG_PARAM_2, P->parm2 );
2220 OPW( HREG_PARAM_1, P->parm1 );
2221 rc = cmd_exe( ifbp, P->cmd, P->parm0 );
2222 P->hcf_stat = (hcf_16)rc;
2223 P->stat = IPW( HREG_STAT );
2224 P->resp0 = IPW( HREG_RESP_0 );
2225 P->resp1 = IPW( HREG_RESP_1 );
2226 P->resp2 = IPW( HREG_RESP_2 );
2227 P->ifb_err_cmd = ifbp->IFB_ErrCmd;
2228 P->ifb_err_qualifier = ifbp->IFB_ErrQualifier;
2229 #undef P
2230 break;
2231 case CFG_CMD_HCF:
2232 #define P ((CFG_CMD_HCF_STRCT FAR *)ltvp)
2233 HCFASSERT( P->cmd == CFG_CMD_HCF_REG_ACCESS, P->cmd ); //only Hermes register access supported
2234 if ( P->cmd == CFG_CMD_HCF_REG_ACCESS ) {
2235 HCFASSERT( P->mode < ifbp->IFB_IOBase, P->mode ); //Check Register space
2236 OPW( P->mode, P->add_info);
2237 }
2238 #undef P
2239 break;
2240 #endif // HCF_EXT_NIC_ACCESS
2241
2242 #if (HCF_ASSERT) & HCF_ASSERT_PRINTF
2243 case CFG_FW_PRINTF_BUFFER_LOCATION:
2244 ifbp->IFB_FwPfBuff = *(CFG_FW_PRINTF_BUFFER_LOCATION_STRCT*)ltvp;
2245 break;
2246 #endif // HCF_ASSERT_PRINTF
2247
2248 default: //pass everything unknown above the "FID" range to the Hermes or Dongle
2249 rc = put_info( ifbp, ltvp );
2250 }
2251 //DO NOT !!! HCFASSERT( rc == HCF_SUCCESS, rc ) /* 20 */
2252 HCFLOGEXIT( HCF_TRACE_PUT_INFO );
2253 return rc;
2254 } // hcf_put_info
2255
2256
2257 /************************************************************************************************************
2258 *
2259 *.MODULE int hcf_rcv_msg( IFBP ifbp, DESC_STRCT *descp, unsigned int offset )
2260 *.PURPOSE All: decapsulate a message.
2261 * pre-HermesII.5: verify MIC.
2262 * non-USB, non-DMA mode: Transfer a message from the NIC to the Host and acknowledge reception.
2263 * USB: Transform a message from proprietary USB format to 802.3 format
2264 *
2265 *.ARGUMENTS
2266 * ifbp address of the Interface Block
2267 * descp Pointer to the Descriptor List location.
2268 * offset USB: not used
2269 * non-USB: specifies the beginning of the data to be obtained (0 corresponds with DestAddr field
2270 * of frame).
2271 *
2272 *.RETURNS
2273 * HCF_SUCCESS No WPA error ( or HCF_ERR_MIC already reported by hcf_service_nic)
2274 * HCF_ERR_MIC message contains an erroneous MIC ( HCF_SUCCESS is reported if HCF_ERR_MIC is already
2275 * reported by hcf_service_nic)
2276 * HCF_ERR_NO_NIC NIC removed during data retrieval
2277 * HCF_ERR_DEFUNCT...
2278 *
2279 *.DESCRIPTION
2280 * The Receive Message Function can be executed by the MSF to obtain the Data Info fields of the message that
2281 * is reported to be available by the Service NIC Function.
2282 *
2283 * The Receive Message Function copies the message data available in the Card memory into a buffer structure
2284 * provided by the MSF.
2285 * Only data of the message indicated by the Service NIC Function can be obtained.
2286 * Execution of the Service NIC function may result in the availability of a new message, but it definitely
2287 * makes the message reported by the preceding Service NIC function, unavailable.
2288 *
2289 * in non-USB/non-DMA mode, hcf_rcv_msg starts the copy process at the (non-negative) offset requested by the
2290 * parameter offset, relative to HFS_ADDR_DEST, e.g offset 0 starts copying from the Destination Address, the
2291 * very begin of the 802.3 frame message. Offset must either lay within the part of the 802.3 frame as stored
2292 * by hcf_service_nic in the lookahead buffer or be just behind it, i.e. the first byte not yet read.
2293 * When offset is within lookahead, data is copied from lookahead.
2294 * When offset is beyond lookahead, data is read directly from RxFS in NIC with disregard of the actual value
2295 * of offset
2296 *
2297 *.NOTICE:
2298 * o at entry: look ahead buffer as passed with hcf_service_nic is still accessible and unchanged
2299 * o at exit: Receive Frame in NIC memory is released
2300 *
2301 * Description:
2302 * Starting at the byte indicated by the Offset value, the bytes are copied from the Data Info
2303 * Part of the current Receive Frame Structure to the Host memory data buffer structure
2304 * identified by descp.
2305 * The maximum value for Offset is the number of characters of the 802.3 frame read into the
2306 * look ahead buffer by hcf_service_nic (i.e. the look ahead buffer size minus
2307 * Control and 802.11 fields)
2308 * If Offset is less than the maximum value, copying starts from the look ahead buffer till the
2309 * end of that buffer is reached
2310 * Then (or if the maximum value is specified for Offset), the
2311 * message is directly copied from NIC memory to Host memory.
2312 * If an invalid (i.e. too large) offset is specified, an assert catches but the buffer contents are
2313 * undefined.
2314 * Copying stops if either:
2315 * o the end of the 802.3 frame is reached
2316 * o the Descriptor with a NULL pointer in the next_desc_addr field is reached
2317 *
2318 * When the copying stops, the receiver is ack'ed, thus freeing the NIC memory where the frame is stored
2319 * As a consequence, hcf_rcv_msg can only be called once for any particular Rx frame.
2320 *
2321 * For the time being (PCI Bus mastering not yet supported), only the following fields of each
2322 * of the descriptors in the descriptor list must be set by the MSF:
2323 * o buf_cntl.buf_dim[1]
2324 * o *next_desc_addr
2325 * o *buf_addr
2326 * At return from hcf_rcv_msg, the field buf_cntl.buf_dim[0] of the used Descriptors reflects
2327 * the number of bytes in the buffer corresponding with the Descriptor.
2328 * On the last used Descriptor, buf_cntl.buf_dim[0] is less or equal to buf_cntl.buf_dim[1].
2329 * On all preceding Descriptors buf_cntl.buf_dim[0] is equal to buf_cntl.buf_dim[1].
2330 * On all succeeding (unused) Descriptors, buf_cntl.buf_dim[0] is zero.
2331 * Note: this I/F is based on the assumptions how the I/F needed for PCI Bus mastering will
2332 * be, so it may change.
2333 *
2334 * The most likely handling of HCF_ERR_NO_NIC by the MSF is to drop the already copied
2335 * data as elegantly as possible under the constraints and requirements posed by the (N)OS.
2336 * If no received Frame Structure is pending, "Success" rather than "Read error" is returned.
2337 * This error constitutes a logic flaw in the MSF
2338 * The HCF can only catch a minority of this
2339 * type of errors
2340 * Based on consistency ideas, the HCF catches none of these errors.
2341 *
2342 * Assert fails if
2343 * - ifbp has a recognizable out-of-range value
2344 * - there is no unacknowledged Rx-message available
2345 * - offset is out of range (outside look ahead buffer)
2346 * - descp is a NULL pointer
2347 * - any of the descriptors is not double word aligned
2348 * - reentrancy, may be caused by calling hcf_functions without adequate protection
2349 * against NIC interrupts or multi-threading.
2350 * - Interrupts are enabled.
2351 *
2352 *.DIAGRAM
2353 *
2354 *.NOTICE
2355 * - by using unsigned int as type for offset, no need to worry about negative offsets
2356 * - Asserting on being enabled/present is superfluous, since a non-zero IFB_lal implies that hcf_service_nic
2357 * was called and detected a Rx-message. A zero IFB_lal will set the BUF_CNT field of at least the first
2358 * descriptor to zero.
2359 *
2360 *.ENDDOC END DOCUMENTATION
2361 *
2362 ************************************************************************************************************/
2363 int
2364 hcf_rcv_msg( IFBP ifbp, DESC_STRCT *descp, unsigned int offset )
2365 {
2366 int rc = HCF_SUCCESS;
2367 wci_bufp cp; //char oriented working pointer
2368 hcf_16 i;
2369 int tot_len = ifbp->IFB_RxLen - offset; //total length
2370 wci_bufp lap = ifbp->IFB_lap + offset; //start address in LookAhead Buffer
2371 hcf_16 lal = ifbp->IFB_lal - offset; //available data within LookAhead Buffer
2372 hcf_16 j;
2373
2374 HCFLOGENTRY( HCF_TRACE_RCV_MSG, offset );
2375 HCFASSERT( ifbp->IFB_Magic == HCF_MAGIC, ifbp->IFB_Magic );
2376 HCFASSERT_INT;
2377 HCFASSERT( descp, HCF_TRACE_RCV_MSG );
2378 HCFASSERT( ifbp->IFB_RxLen, HCF_TRACE_RCV_MSG );
2379 HCFASSERT( ifbp->IFB_RxLen >= offset, MERGE_2( offset, ifbp->IFB_RxLen ) );
2380 HCFASSERT( ifbp->IFB_lal >= offset, offset );
2381 HCFASSERT( (ifbp->IFB_CntlOpt & USE_DMA) == 0, 0xDADA );
2382
2383 if ( tot_len < 0 ) {
2384 lal = 0; tot_len = 0; //suppress all copying activity in the do--while loop
2385 }
2386 do { //loop over all available fragments
2387 // obnoxious hcf.c(1480) : warning C4769: conversion of near pointer to long integer
2388 HCFASSERT( ((hcf_32)descp & 3 ) == 0, (hcf_32)descp );
2389 cp = descp->buf_addr;
2390 j = min( (hcf_16)tot_len, descp->BUF_SIZE ); //minimum of "what's` available" and fragment size
2391 descp->BUF_CNT = j;
2392 tot_len -= j; //adjust length still to go
2393 if ( lal ) { //if lookahead Buffer not yet completely copied
2394 i = min( lal, j ); //minimum of "what's available" in LookAhead and fragment size
2395 lal -= i; //adjust length still available in LookAhead
2396 j -= i; //adjust length still available in current fragment
2397 /*;? while loop could be improved by moving words but that is complicated on platforms with
2398 * alignment requirements*/
2399 while ( i-- ) *cp++ = *lap++;
2400 }
2401 if ( j ) { //if LookAhead Buffer exhausted but still space in fragment, copy directly from NIC RAM
2402 get_frag( ifbp, cp, j BE_PAR(0) );
2403 CALC_RX_MIC( cp, j );
2404 }
2405 } while ( ( descp = descp->next_desc_addr ) != NULL );
2406 #if (HCF_TYPE) & HCF_TYPE_WPA
2407 if ( ifbp->IFB_RxFID ) {
2408 rc = check_mic( ifbp ); //prevents MIC error report if hcf_service_nic already consumed all
2409 }
2410 #endif // HCF_TYPE_WPA
2411 (void)hcf_action( ifbp, HCF_ACT_RX_ACK ); //only 1 shot to get the data, so free the resources in the NIC
2412 HCFASSERT( rc == HCF_SUCCESS, rc );
2413 HCFLOGEXIT( HCF_TRACE_RCV_MSG );
2414 return rc;
2415 } // hcf_rcv_msg
2416
2417
2418 /************************************************************************************************************
2419 *
2420 *.MODULE int hcf_send_msg( IFBP ifbp, DESC_STRCT *descp, hcf_16 tx_cntl )
2421 *.PURPOSE Encapsulate a message and append padding and MIC.
2422 * non-USB: Transfers the resulting message from Host to NIC and initiates transmission.
2423 * USB: Transfer resulting message into a flat buffer.
2424 *
2425 *.ARGUMENTS
2426 * ifbp address of the Interface Block
2427 * descp pointer to the DescriptorList or NULL
2428 * tx_cntl indicates MAC-port and (Hermes) options
2429 * HFS_TX_CNTL_SPECTRALINK
2430 * HFS_TX_CNTL_PRIO
2431 * HFS_TX_CNTL_TX_OK
2432 * HFS_TX_CNTL_TX_EX
2433 * HFS_TX_CNTL_TX_DELAY
2434 * HFS_TX_CNTL_TX_CONT
2435 * HCF_PORT_0 MAC Port 0 (default)
2436 * HCF_PORT_1 (AP only) MAC Port 1
2437 * HCF_PORT_2 (AP only) MAC Port 2
2438 * HCF_PORT_3 (AP only) MAC Port 3
2439 * HCF_PORT_4 (AP only) MAC Port 4
2440 * HCF_PORT_5 (AP only) MAC Port 5
2441 * HCF_PORT_6 (AP only) MAC Port 6
2442 *
2443 *.RETURNS
2444 * HCF_SUCCESS
2445 * HCF_ERR_DEFUNCT_..
2446 * HCF_ERR_TIME_OUT
2447 *
2448 *.DESCRIPTION:
2449 * The Send Message Function embodies 2 functions:
2450 * o transfers a message (including MAC header) from the provided buffer structure in Host memory to the Transmit
2451 * Frame Structure (TxFS) in NIC memory.
2452 * o Issue a send command to the F/W to actually transmit the contents of the TxFS.
2453 *
2454 * Control is based on the Resource Indicator IFB_RscInd.
2455 * The Resource Indicator is maintained by the HCF and should only be interpreted but not changed by the MSF.
2456 * The MSF must check IFB_RscInd to be non-zero before executing the call to the Send Message Function.
2457 * When no resources are available, the MSF must handle the queuing of the Transmit frame and check the
2458 * Resource Indicator periodically after calling hcf_service_nic.
2459 *
2460 * The Send Message Functions transfers a message to NIC memory when it is called with a non-NULL descp.
2461 * Before the Send Message Function is invoked this way, the Resource Indicator (IFB_RscInd) must be checked.
2462 * If the Resource is not available, Send Message Function execution must be postponed until after processing of
2463 * a next hcf_service_nic it appears that the Resource has become available.
2464 * The message is copied from the buffer structure identified by descp to the NIC.
2465 * Copying stops if a NULL pointer in the next_desc_addr field is reached.
2466 * Hcf_send_msg does not check for transmit buffer overflow, because the F/W does this protection.
2467 * In case of a transmit buffer overflow, the surplus which does not fit in the buffer is simply dropped.
2468 *
2469 * The Send Message Function activates the F/W to actually send the message to the medium when the
2470 * HFS_TX_CNTL_TX_DELAY bit of the tx_cntl parameter is not set.
2471 * If the descp parameter of the current call is non-NULL, the message as represented by descp is send.
2472 * If the descp parameter of the current call is NULL, and if the preceding call of the Send Message Function had
2473 * a non-NULL descp and the preceding call had the HFS_TX_CNTL_TX_DELAY bit of tx_cntl set, then the message as
2474 * represented by the descp of the preceding call is send.
2475 *
2476 * Hcf_send_msg supports encapsulation (see HCF_ENCAP) of Ethernet-II frames.
2477 * An Ethernet-II frame is transferred to the Transmit Frame structure as an 802.3 frame.
2478 * Hcf_send_msg distinguishes between an 802.3 and an Ethernet-II frame by looking at the data length/type field
2479 * of the frame. If this field contains a value larger than 1514, the frame is considered to be an Ethernet-II
2480 * frame, otherwise it is treated as an 802.3 frame.
2481 * To ease implementation of the HCF, this type/type field must be located in the first descriptor structure,
2482 * i.e. the 1st fragment must have a size of at least 14 (to contain DestAddr, SrcAddr and Len/Type field).
2483 * An Ethernet-II frame is encapsulated by inserting a SNAP header between the addressing information and the
2484 * type field. This insertion is transparent for the MSF.
2485 * The HCF contains a fixed table that stores a number of types. If the value specified by the type/type field
2486 * occurs in this table, Bridge Tunnel Encapsulation is used, otherwise RFC1042 encapsulation is used.
2487 * Bridge Tunnel uses AA AA 03 00 00 F8 as SNAP header,
2488 * RFC1042 uses AA AA 03 00 00 00 as SNAP header.
2489 * The table currently contains:
2490 * 0 0x80F3 AppleTalk Address Resolution Protocol (AARP)
2491 * 0 0x8137 IPX
2492 *
2493 * The algorithm to distinguish between 802.3 and Ethernet-II frames limits the maximum length for frames of
2494 * 802.3 frames to 1514 bytes.
2495 * Encapsulation can be suppressed by means of the system constant HCF_ENCAP, e.g. to support proprietary
2496 * protocols with 802.3 like frames with a size larger than 1514 bytes.
2497 *
2498 * In case the HCF encapsulates the frame, the number of bytes that is actually transmitted is determined by the
2499 * cumulative value of the buf_cntl.buf_dim[0] fields.
2500 * In case the HCF does not encapsulate the frame, the number of bytes that is actually transmitted is not
2501 * determined by the cumulative value of the buf_cntl.buf_dim[DESC_CNTL_CNT] fields of the desc_strct's but by
2502 * the Length field of the 802.3 frame.
2503 * If there is a conflict between the cumulative value of the buf_cntl.buf_dim[0] fields and the
2504 * 802.3 Length field the 802.3 Length field determines the number of bytes actually transmitted by the NIC while
2505 * the cumulative value of the buf_cntl.buf_dim[0] fields determines the position of the MIC, hence a mismatch
2506 * will result in MIC errors on the Receiving side.
2507 * Currently this problem is flagged on the Transmit side by an Assert.
2508 * The following fields of each of the descriptors in the descriptor list must be set by the MSF:
2509 * o buf_cntl.buf_dim[0]
2510 * o *next_desc_addr
2511 * o *buf_addr
2512 *
2513 * All bits of the tx_cntl parameter except HFS_TX_CNTL_TX_DELAY and the HCF_PORT# bits are passed to the F/W via
2514 * the HFS_TX_CNTL field of the TxFS.
2515 *
2516 * Note that hcf_send_msg does not detect NIC absence. The MSF is supposed to have its own -platform dependent-
2517 * way to recognize card removal/insertion.
2518 * The total system must be robust against card removal and there is no principal difference between card removal
2519 * just after hcf_send_msg returns but before the actual transmission took place or sometime earlier.
2520 *
2521 * Assert fails if
2522 * - ifbp has a recognizable out-of-range value
2523 * - descp is a NULL pointer
2524 * - no resources for PIF available.
2525 * - Interrupts are enabled.
2526 * - reentrancy, may be caused by calling hcf_functions without adequate protection
2527 * against NIC interrupts or multi-threading.
2528 *
2529 *.DIAGRAM
2530 *4: for the normal case (i.e. no HFS_TX_CNTL_TX_DELAY option active), a fid is acquired via the
2531 * routine get_fid. If no FID is acquired, the remainder is skipped without an error notification. After
2532 * all, the MSF is not supposed to call hcf_send_msg when no Resource is available.
2533 *7: The ControlField of the TxFS is written. Since put_frag can only return the fatal Defunct or "No NIC", the
2534 * return status can be ignored because when it fails, cmd_wait will fail as well. (see also the note on the
2535 * need for a return code below).
2536 * Note that HFS_TX_CNTL has different values for H-I, H-I/WPA and H-II and HFS_ADDR_DEST has different
2537 * values for H-I (regardless of WPA) and H-II.
2538 * By writing 17, 1 or 2 ( implying 16, 0 or 1 garbage word after HFS_TX_CNTL) the BAP just gets to
2539 * HFS_ADDR_DEST for H-I, H-I/WPA and H-II respectively.
2540 *10: if neither encapsulation nor MIC calculation is needed, splitting the first fragment in two does not
2541 * really help but it makes the flow easier to follow to do not optimize on this difference
2542 *
2543 * hcf_send_msg checks whether the frame is an Ethernet-II rather than an "official" 802.3 frame.
2544 * The E-II check is based on the length/type field in the MAC header. If this field has a value larger than
2545 * 1500, E-II is assumed. The implementation of this test fails if the length/type field is not in the first
2546 * descriptor. If E-II is recognized, a SNAP header is inserted. This SNAP header represents either RFC1042
2547 * or Bridge-Tunnel encapsulation, depending on the return status of the support routine hcf_encap.
2548 *
2549 *.NOTICE
2550 * hcf_send_msg leaves the responsibility to only send messages on enabled ports at the MSF level.
2551 * This is considered the strategy which is sufficiently adequate for all "robust" MSFs, have the least
2552 * processor utilization and being still acceptable robust at the WCI !!!!!
2553 *
2554 * hcf_send_msg does not NEED a return value to report NIC absence or removal during the execution of
2555 * hcf_send_msg(), because the MSF and higher layers must be able to cope anyway with the NIC being removed
2556 * after a successful completion of hcf_send_msg() but before the actual transmission took place.
2557 * To accommodate user expectations the current implementation does report NIC absence.
2558 * Defunct blocks all NIC access and will (also) be reported on a number of other calls.
2559 *
2560 * hcf_send_msg does not check for transmit buffer overflow because the Hermes does this protection.
2561 * In case of a transmit buffer overflow, the surplus which does not fit in the buffer is simply dropped.
2562 * Note that this possibly results in the transmission of incomplete frames.
2563 *
2564 * After some deliberation with F/W team, it is decided that - being in the twilight zone of not knowing
2565 * whether the problem at hand is an MSF bug, HCF buf, F/W bug, H/W malfunction or even something else - there
2566 * is no "best thing to do" in case of a failing send, hence the HCF considers the TxFID ownership to be taken
2567 * over by the F/W and hopes for an Allocate event in due time
2568 *
2569 *.ENDDOC END DOCUMENTATION
2570 *
2571 ************************************************************************************************************/
2572 int
2573 hcf_send_msg( IFBP ifbp, DESC_STRCT *descp, hcf_16 tx_cntl )
2574 {
2575 int rc = HCF_SUCCESS;
2576 DESC_STRCT *p /* = descp*/; //working pointer
2577 hcf_16 len; // total byte count
2578 hcf_16 i;
2579
2580 hcf_16 fid = 0;
2581
2582 HCFASSERT( ifbp->IFB_RscInd || descp == NULL, ifbp->IFB_RscInd );
2583 HCFASSERT( (ifbp->IFB_CntlOpt & USE_DMA) == 0, 0xDADB );
2584
2585 HCFLOGENTRY( HCF_TRACE_SEND_MSG, tx_cntl );
2586 HCFASSERT( ifbp->IFB_Magic == HCF_MAGIC, ifbp->IFB_Magic );
2587 HCFASSERT_INT;
2588 /* obnoxious c:/hcf/hcf.c(1480) : warning C4769: conversion of near pointer to long integer,
2589 * so skip */
2590 HCFASSERT( ((hcf_32)descp & 3 ) == 0, (hcf_32)descp );
2591 #if HCF_ASSERT
2592 { int x = ifbp->IFB_FWIdentity.comp_id == COMP_ID_FW_AP ? tx_cntl & ~HFS_TX_CNTL_PORT : tx_cntl;
2593 HCFASSERT( (x & ~HCF_TX_CNTL_MASK ) == 0, tx_cntl );
2594 }
2595 #endif // HCF_ASSERT
2596
2597 if ( descp ) ifbp->IFB_TxFID = 0; //cancel a pre-put message
2598
2599 /* the following initialization code is redundant for a pre-put message
2600 * but moving it inside the "if fid" logic makes the merging with the
2601 * USB flow awkward
2602 */
2603 #if (HCF_TYPE) & HCF_TYPE_WPA
2604 tx_cntl |= ifbp->IFB_MICTxCntl;
2605 #endif // HCF_TYPE_WPA
2606 fid = ifbp->IFB_TxFID;
2607 if (fid == 0 && ( fid = get_fid( ifbp ) ) != 0 ) /* 4 */
2608 /* skip the next compound statement if:
2609 - pre-put message or
2610 - no fid available (which should never occur if the MSF adheres to the WCI)
2611 */
2612 { // to match the closing curly bracket of above "if" in case of HCF_TYPE_USB
2613 //calculate total length ;? superfluous unless CCX or Encapsulation
2614 len = 0;
2615 p = descp;
2616 do len += p->BUF_CNT; while ( ( p = p->next_desc_addr ) != NULL );
2617 p = descp;
2618 //;? HCFASSERT( len <= HCF_MAX_MSG, len );
2619 /*7*/ (void)setup_bap( ifbp, fid, HFS_TX_CNTL, IO_OUT );
2620 #if (HCF_TYPE) & HCF_TYPE_TX_DELAY
2621 HCFASSERT( ( descp != NULL ) ^ ( tx_cntl & HFS_TX_CNTL_TX_DELAY ), tx_cntl );
2622 if ( tx_cntl & HFS_TX_CNTL_TX_DELAY ) {
2623 tx_cntl &= ~HFS_TX_CNTL_TX_DELAY; //!!HFS_TX_CNTL_TX_DELAY no longer available
2624 ifbp->IFB_TxFID = fid;
2625 fid = 0; //!!fid no longer available, be careful when modifying code
2626 }
2627 #endif // HCF_TYPE_TX_DELAY
2628 OPW( HREG_DATA_1, tx_cntl ) ;
2629 OPW( HREG_DATA_1, 0 );
2630
2631 HCFASSERT( p->BUF_CNT >= 14, p->BUF_CNT );
2632 /* assume DestAddr/SrcAddr/Len/Type ALWAYS contained in 1st fragment
2633 * otherwise life gets too cumbersome for MIC and Encapsulation !!!!!!!!
2634 if ( p->BUF_CNT >= 14 ) { alternatively: add a safety escape !!!!!!!!!!!! } */
2635
2636 CALC_TX_MIC( NULL, -1 ); //initialize MIC
2637 /*10*/ put_frag( ifbp, p->buf_addr, HCF_DASA_SIZE BE_PAR(0) ); //write DA, SA with MIC calculation
2638 CALC_TX_MIC( p->buf_addr, HCF_DASA_SIZE ); //MIC over DA, SA
2639 CALC_TX_MIC( null_addr, 4 ); //MIC over (virtual) priority field
2640
2641 //if encapsulation needed
2642 #if (HCF_ENCAP) == HCF_ENC
2643 //write length (with SNAP-header,Type, without //DA,SA,Length ) no MIC calc.
2644 if ( ( snap_header[sizeof(snap_header)-1] = hcf_encap( &p->buf_addr[HCF_DASA_SIZE] ) ) != ENC_NONE ) {
2645 OPW( HREG_DATA_1, CNV_END_SHORT( len + (sizeof(snap_header) + 2) - ( 2*6 + 2 ) ) );
2646 //write splice with MIC calculation
2647 put_frag( ifbp, snap_header, sizeof(snap_header) BE_PAR(0) );
2648 CALC_TX_MIC( snap_header, sizeof(snap_header) ); //MIC over 6 byte SNAP
2649 i = HCF_DASA_SIZE;
2650 } else
2651 #endif // HCF_ENC
2652 {
2653 OPW( HREG_DATA_1, *(wci_recordp)&p->buf_addr[HCF_DASA_SIZE] );
2654 i = 14;
2655 }
2656 //complete 1st fragment starting with Type with MIC calculation
2657 put_frag( ifbp, &p->buf_addr[i], p->BUF_CNT - i BE_PAR(0) );
2658 CALC_TX_MIC( &p->buf_addr[i], p->BUF_CNT - i );
2659
2660 //do the remaining fragments with MIC calculation
2661 while ( ( p = p->next_desc_addr ) != NULL ) {
2662 /* obnoxious c:/hcf/hcf.c(1480) : warning C4769: conversion of near pointer to long integer,
2663 * so skip */
2664 HCFASSERT( ((hcf_32)p & 3 ) == 0, (hcf_32)p );
2665 put_frag( ifbp, p->buf_addr, p->BUF_CNT BE_PAR(0) );
2666 CALC_TX_MIC( p->buf_addr, p->BUF_CNT );
2667 }
2668 //pad message, finalize MIC calculation and write MIC to NIC
2669 put_frag_finalize( ifbp );
2670 }
2671 if ( fid ) {
2672 /*16*/ rc = cmd_exe( ifbp, HCMD_BUSY | HCMD_TX | HCMD_RECL, fid );
2673 ifbp->IFB_TxFID = 0;
2674 /* probably this (i.e. no RscInd AND "HREG_EV_ALLOC") at this point in time occurs so infrequent,
2675 * that it might just as well be acceptable to skip this
2676 * "optimization" code and handle that additional interrupt once in a while
2677 */
2678 // 180 degree error in logic ;? #if ALLOC_15
2679 /*20*/ if ( ifbp->IFB_RscInd == 0 ) {
2680 ifbp->IFB_RscInd = get_fid( ifbp );
2681 }
2682 // #endif // ALLOC_15
2683 }
2684 // HCFASSERT( level::ifbp->IFB_RscInd, ifbp->IFB_RscInd );
2685 HCFLOGEXIT( HCF_TRACE_SEND_MSG );
2686 return rc;
2687 } // hcf_send_msg
2688
2689
2690 /************************************************************************************************************
2691 *
2692 *.MODULE int hcf_service_nic( IFBP ifbp, wci_bufp bufp, unsigned int len )
2693 *.PURPOSE Services (most) NIC events.
2694 * Provides received message
2695 * Provides status information.
2696 *
2697 *.ARGUMENTS
2698 * ifbp address of the Interface Block
2699 * In non-DMA mode:
2700 * bufp address of char buffer, sufficiently large to hold the first part of the RxFS up through HFS_TYPE
2701 * len length in bytes of buffer specified by bufp
2702 * value between HFS_TYPE + 2 and HFS_ADDR_DEST + HCF_MAX_MSG
2703 *
2704 *.RETURNS
2705 * HCF_SUCCESS
2706 * HCF_ERR_MIC message contains an erroneous MIC (only if frame fits completely in bufp)
2707 *
2708 *.DESCRIPTION
2709 *
2710 * MSF-accessible fields of Result Block
2711 * - IFB_RxLen 0 or Frame size.
2712 * - IFB_MBInfoLen 0 or the L-field of the oldest MBIB.
2713 * - IFB_RscInd
2714 * - IFB_HCF_Tallies updated if a corresponding event occurred.
2715 * - IFB_NIC_Tallies updated if a Tally Info frame received from the NIC.
2716 * - IFB_DmaPackets
2717 * - IFB_TxFsStat
2718 * - IFB_TxFsSwSup
2719 * - IFB_LinkStat reflects new link status or 0x0000 if no change relative to previous hcf_service_nic call.
2720 or
2721 * - IFB_LinkStat link status, 0x8000 reflects change relative to previous hcf_service_nic call.
2722 *
2723 * When IFB_MBInfoLen is non-zero, at least one MBIB is available.
2724 *
2725 * IFB_RxLen reflects the number of received bytes in 802.3 view (Including DestAddr, SrcAddr and Length,
2726 * excluding MIC-padding, MIC and sum check) of active Rx Frame Structure. If no Rx Data s available, IFB_RxLen
2727 * equals 0x0000.
2728 * Repeated execution causes the Service NIC Function to provide information about subsequently received
2729 * messages, irrespective whether a hcf_rcv_msg or hcf_action(HCF_ACT_RX) is performed in between.
2730 *
2731 * When IFB_RxLen is non-zero, a Received Frame Structure is available to be routed to the protocol stack.
2732 * When Monitor Mode is not active, this is guaranteed to be an error-free non-WMP frame.
2733 * In case of Monitor Mode, it may also be a frame with an error or a WMP frame.
2734 * Erroneous frames have a non-zero error-sub field in the HFS_STAT field in the look ahead buffer.
2735 *
2736 * If a Receive message is available in NIC RAM, the Receive Frame Structure is (partly) copied from the NIC to
2737 * the buffer identified by bufp.
2738 * Copying stops either after len bytes or when the complete 802.3 frame is copied.
2739 * During the copying the message is decapsulated (if appropriate).
2740 * If the frame is read completely by hcf_service_nic (i.e. the frame fits completely in the lookahead buffer),
2741 * the frame is automatically ACK'ed to the F/W and still available via the look ahead buffer and hcf_rcv_msg.
2742 * Only if the frame is read completely by hcf_service_nic, hcf_service_nic checks the MIC and sets the return
2743 * status accordingly. In this case, hcf_rcv_msg does not check the MIC.
2744 *
2745 * The MIC calculation algorithm works more efficient if the length of the look ahead buffer is
2746 * such that it fits exactly 4 n bytes of the 802.3 frame, i.e. len == HFS_ADDR_DEST + 4*n.
2747 *
2748 * The Service NIC Function supports the NIC event service handling process.
2749 * It performs the appropriate actions to service the NIC, such that the event cause is eliminated and related
2750 * information is saved.
2751 * The Service NIC Function is executed by the MSF ISR or polling routine as first step to determine the event
2752 * cause(s). It is the responsibility of the MSF to perform all not directly NIC related interrupt service
2753 * actions, e.g. in a PC environment this includes servicing the PIC, and managing the Processor Interrupt
2754 * Enabling/Disabling.
2755 * In case of a polled based system, the Service NIC Function must be executed "frequently".
2756 * The Service NIC Function may have side effects related to the Mailbox and Resource Indicator (IFB_RscInd).
2757 *
2758 * hcf_service_nic returns:
2759 * - The length of the data in the available MBIB (IFB_MBInfoLen)
2760 * - Changes in the link status (IFB_LinkStat)
2761 * - The length of the data in the available Receive Frame Structure (IFB_RxLen)
2762 * - updated IFB_RscInd
2763 * - Updated Tallies
2764 *
2765 * hcf_service_nic is presumed to neither interrupt other HCF-tasks nor to be interrupted by other HCF-tasks.
2766 * A way to achieve this is to precede hcf_service_nic as well as all other HCF-tasks with a call to
2767 * hcf_action to disable the card interrupts and, after all work is completed, with a call to hcf_action to
2768 * restore (which is not necessarily the same as enabling) the card interrupts.
2769 * In case of a polled environment, it is assumed that the MSF programmer is sufficiently familiar with the
2770 * specific requirements of that environment to translate the interrupt strategy to a polled strategy.
2771 *
2772 * hcf_service_nic services the following Hermes events:
2773 * - HREG_EV_INFO Asynchronous Information Frame
2774 * - HREG_EV_INFO_DROP WMAC did not have sufficient RAM to build Unsolicited Information Frame
2775 * - HREG_EV_TX_EXC (if applicable, i.e. selected via HCF_EXT_INT_TX_EX bit of HCF_EXT)
2776 * - HREG_EV_SLEEP_REQ (if applicable, i.e. selected via HCF_DDS/HCF_CDS bit of HCF_SLEEP)
2777 * ** in non_DMA mode
2778 * - HREG_EV_ALLOC Asynchronous part of Allocation/Reclaim completed while out of resources at
2779 * completion of hcf_send_msg/notify
2780 * - HREG_EV_RX the detection of the availability of received messages
2781 * including WaveLAN Management Protocol (WMP) message processing
2782 * ** in DMA mode
2783 * - HREG_EV_RDMAD
2784 * - HREG_EV_TDMAD
2785 *!! hcf_service_nic does not service the following Hermes events:
2786 *!! HREG_EV_TX (the "OK" Tx Event) is no longer supported by the WCI, if it occurs it is unclear
2787 *!! what the cause is, so no meaningful strategy is available. Not acking the bit is
2788 *!! probably the best help that can be given to the debugger.
2789 *!! HREG_EV_CMD handled in cmd_wait.
2790 *!! HREG_EV_FW_DMA (i.e. HREG_EV_RXDMA, HREG_EV_TXDMA and_EV_LPESC) are either not used or used
2791 *!! between the F/W and the DMA engine.
2792 *!! HREG_EV_ACK_REG_READY is only applicable for H-II (i.e. not HII.5 and up, see DAWA)
2793 *
2794 * If, in non-DMA mode, a Rx message is available, its length is reflected by the IFB_RxLen field of the IFB.
2795 * This length reflects the data itself and the Destination Address, Source Address and DataLength/Type field
2796 * but not the SNAP-header in case of decapsulation by the HCF. If no message is available, IFB_RxLen is
2797 * zero. Former versions of the HCF handled WMP messages and supported a "monitor" mode in hcf_service_nic,
2798 * which deposited certain or all Rx messages in the MailBox. The responsibility to handle these frames is
2799 * moved to the MSF. The HCF offers as supports hcf_put_info with CFG_MB_INFO as parameter to emulate the old
2800 * implementation under control of the MSF.
2801 *
2802 * **Rx Buffer free strategy
2803 * When hcf_service_nic reports the availability of a non-DMA message, the MSF can access that message by
2804 * means of hcf_rcv_msg. It must be prevented that the LAN Controller writes new data in the NIC buffer
2805 * before the MSF is finished with the current message. The NIC buffer is returned to the LAN Controller
2806 * when:
2807 * - the complete frame fits in the lookahead buffer or
2808 * - hcf_rcv_msg is called or
2809 * - hcf_action with HCF_ACT_RX is called or
2810 * - hcf_service_nic is called again
2811 * It can be reasoned that hcf_action( INT_ON ) should not be given before the MSF has completely processed
2812 * a reported Rx-frame. The reason is that the INT_ON action is guaranteed to cause a (Rx-)interrupt (the
2813 * MSF is processing a Rx-frame, hence the Rx-event bit in the Hermes register must be active). This
2814 * interrupt will cause hcf_service_nic to be called, which will cause the ack-ing of the "last" Rx-event
2815 * to the Hermes, causing the Hermes to discard the associated NIC RAM buffer.
2816 * Assert fails if
2817 * - ifbp is zero or other recognizable out-of-range value.
2818 * - hcf_service_nic is called without a prior call to hcf_connect.
2819 * - interrupts are enabled.
2820 * - reentrancy, may be caused by calling hcf_functions without adequate protection
2821 * against NIC interrupts or multi-threading.
2822 *
2823 *
2824 *.DIAGRAM
2825 *1: IFB_LinkStat is cleared, if a LinkStatus frame is received, IFB_LinkStat will be updated accordingly
2826 * by isr_info.
2827 or
2828 *1: IFB_LinkStat change indication is cleared. If a LinkStatus frame is received, IFB_LinkStat will be updated
2829 * accordingly by isr_info.
2830 *2: IFB_RxLen must be cleared before the NIC presence check otherwise:
2831 * - this value may stay non-zero if the NIC is pulled out at an inconvenient moment.
2832 * - the RxAck on a zero-FID needs a zero-value for IFB_RxLen to work
2833 * Note that as side-effect of the hcf_action call, the remainder of Rx related info is re-initialized as
2834 * well.
2835 *4: In case of Defunct mode, the information supplied by Hermes is unreliable, so the body of
2836 * hcf_service_nic is skipped. Since hcf_cntl turns into a NOP if Primary or Station F/W is incompatible,
2837 * hcf_service_nic is also skipped in those cases.
2838 * To prevent that hcf_service_nic reports bogus information to the MSF with all - possibly difficult to
2839 * debug - undesirable side effects, it is paramount to check the NIC presence. In former days the presence
2840 * test was based on the Hermes register HREG_SW_0. Since in HCF_ACT_INT_OFF is chosen for strategy based on
2841 * HREG_EV_STAT, this is now also used in hcf_service_nic. The motivation to change strategy is partly
2842 * due to inconsistent F/W implementations with respect to HREG_SW_0 manipulation around reset and download.
2843 * Note that in polled environments Card Removal is not detected by INT_OFF which makes the check in
2844 * hcf_service_nic even more important.
2845 *8: The event status register of the Hermes is sampled
2846 * The assert checks for unexpected events ;?????????????????????????????????????.
2847 * - HREG_EV_INFO_DROP is explicitly excluded from the acceptable HREG_EV_STAT bits because it indicates
2848 * a too heavily loaded system.
2849 * - HREG_EV_ACK_REG_READY is 0x0000 for H-I (and hopefully H-II.5)
2850 *
2851 *
2852 * HREG_EV_TX_EXC is accepted (via HREG_EV_TX_EXT) if and only if HCF_EXT_INT_TX_EX set in the HCF_EXT
2853 * definition at compile time.
2854 * The following activities are handled:
2855 * - Alloc events are handled by hcf_send_msg (and notify). Only if there is no "spare" resource, the
2856 * alloc event is superficially serviced by hcf_service_nic to create a pseudo-resource with value
2857 * 0x001. This value is recognized by get_fid (called by hcf_send_msg and notify) where the real
2858 * TxFid is retrieved and the Hermes is acked and - hopefully - the "normal" case with a spare TxFid
2859 * in IFB_RscInd is restored.
2860 * - Info drop events are handled by incrementing a tally
2861 * - LinkEvent (including solicited and unsolicited tallies) are handled by procedure isr_info.
2862 * - TxEx (if selected at compile time) is handled by copying the significant part of the TxFS
2863 * into the IFB for further processing by the MSF.
2864 * Note the complication of the zero-FID protection sub-scheme in DAWA.
2865 * Note, the Ack of all of above events is handled at the end of hcf_service_nic
2866 *16: In case of non-DMA ( either not compiled in or due to a run-time choice):
2867 * If an Rx-frame is available, first the FID of that frame is read, including the complication of the
2868 * zero-FID protection sub-scheme in DAWA. Note that such a zero-FID is acknowledged at the end of
2869 * hcf_service_nic and that this depends on the IFB_RxLen initialization in the begin of hcf_service_nic.
2870 * The Assert validates the HCF assumption about Hermes implementation upon which the range of
2871 * Pseudo-RIDs is based.
2872 * Then the control fields up to the start of the 802.3 frame are read from the NIC into the lookahead buffer.
2873 * The status field is converted to native Endianess.
2874 * The length is, after implicit Endianess conversion if needed, and adjustment for the 14 bytes of the
2875 * 802.3 MAC header, stored in IFB_RxLen.
2876 * In MAC Monitor mode, 802.11 control frames with a TOTAL length of 14 are received, so without this
2877 * length adjustment, IFB_RxLen could not be used to distinguish these frames from "no frame".
2878 * No MIC calculation processes are associated with the reading of these Control fields.
2879 *26: This length test feels like superfluous robustness against malformed frames, but it turned out to be
2880 * needed in the real (hostile) world.
2881 * The decapsulation check needs sufficient data to represent DA, SA, L, SNAP and Type which amounts to
2882 * 22 bytes. In MAC Monitor mode, 802.11 control frames with a smaller length are received. To prevent
2883 * that the implementation goes haywire, a check on the length is needed.
2884 * The actual decapsulation takes place on the fly in the copying process by overwriting the SNAP header.
2885 * Note that in case of decapsulation the SNAP header is not passed to the MSF, hence IFB_RxLen must be
2886 * compensated for the SNAP header length.
2887 * The 22 bytes needed for decapsulation are (more than) sufficient for the exceptional handling of the
2888 * MIC algorithm of the L-field (replacing the 2 byte L-field with 4 0x00 bytes).
2889 *30: The 12 in the no-WPA branch corresponds with the get_frag, the 2 with the IPW of the WPA branch
2890 *32: If Hermes reported MIC-presence, than the MIC engine is initialized with the non-dummy MIC calculation
2891 * routine address and appropriate key.
2892 *34: The 8 bytes after the DA, SA, L are read and it is checked whether decapsulation is needed i.e.:
2893 * - the Hermes reported Tunnel encapsulation or
2894 * - the Hermes reported 1042 Encapsulation and hcf_encap reports that the HCF would not have used
2895 * 1042 as the encapsulation mechanism
2896 * Note that the first field of the RxFS in bufp has Native Endianess due to the conversion done by the
2897 * BE_PAR in get_frag.
2898 *36: The Type field is the only word kept (after moving) of the just read 8 bytes, it is moved to the
2899 * L-field. The original L-field and 6 byte SNAP header are discarded, so IFB_RxLen and buf_addr must
2900 * be adjusted by 8.
2901 *40: Determine how much of the frame (starting with DA) fits in the Lookahead buffer, then read the not-yet
2902 * read data into the lookahead buffer.
2903 * If the lookahead buffer contains the complete message, check the MIC. The majority considered this
2904 * I/F more appropriate then have the MSF call hcf_get_data only to check the MIC.
2905 *44: Since the complete message is copied from NIC RAM to PC RAM, the Rx can be acknowledged to the Hermes
2906 * to optimize the flow ( a better chance to get new Rx data in the next pass through hcf_service_nic ).
2907 * This acknowledgement can not be done via hcf_action( HCF_ACT_RX_ACK ) because this also clears
2908 * IFB_RxLEN thus corrupting the I/F to the MSF.
2909 *;?: In case of DMA (compiled in and activated):
2910
2911
2912 *54: Limiting the number of places where the F/W is acked (e.g. the merging of the Rx-ACK with the other
2913 * ACKs), is supposed to diminish the potential of race conditions in the F/W.
2914 * Note 1: The CMD event is acknowledged in cmd_cmpl
2915 * Note 2: HREG_EV_ACK_REG_READY is 0x0000 for H-I (and hopefully H-II.5)
2916 * Note 3: The ALLOC event is acknowledged in get_fid (except for the initialization flow)
2917 *
2918 *.NOTICE
2919 * The Non-DMA HREG_EV_RX is handled different compared with the other F/W events.
2920 * The HREG_EV_RX event is acknowledged by the first hcf_service_nic call after the
2921 * hcf_service_nic call that reported the occurrence of this event.
2922 * This acknowledgment
2923 * makes the next Receive Frame Structure (if any) available.
2924 * An updated IFB_RxLen
2925 * field reflects this availability.
2926 *
2927 *.NOTICE
2928 * The minimum size for Len must supply space for:
2929 * - an F/W dependent number of bytes of Control Info field including the 802.11 Header field
2930 * - Destination Address
2931 * - Source Address
2932 * - Length field
2933 * - [ SNAP Header]
2934 * - [ Ethernet-II Type]
2935 * This results in 68 for Hermes-I and 80 for Hermes-II
2936 * This way the minimum amount of information is available needed by the HCF to determine whether the frame
2937 * must be decapsulated.
2938 *.ENDDOC END DOCUMENTATION
2939 *
2940 ************************************************************************************************************/
2941 int
2942 hcf_service_nic( IFBP ifbp, wci_bufp bufp, unsigned int len )
2943 {
2944
2945 int rc = HCF_SUCCESS;
2946 hcf_16 stat;
2947 wci_bufp buf_addr;
2948 hcf_16 i;
2949
2950 HCFLOGENTRY( HCF_TRACE_SERVICE_NIC, ifbp->IFB_IntOffCnt );
2951 HCFASSERT( ifbp->IFB_Magic == HCF_MAGIC, ifbp->IFB_Magic );
2952 HCFASSERT_INT;
2953
2954 ifbp->IFB_LinkStat = 0; // ;? to be obsoleted ASAP /* 1*/
2955 ifbp->IFB_DSLinkStat &= ~CFG_LINK_STAT_CHANGE; /* 1*/
2956 (void)hcf_action( ifbp, HCF_ACT_RX_ACK ); /* 2*/
2957 if ( ifbp->IFB_CardStat == 0 && ( stat = IPW( HREG_EV_STAT ) ) != 0xFFFF ) { /* 4*/
2958 /* IF_NOT_DMA( HCFASSERT( !( stat & ~HREG_EV_BASIC_MASK, stat ) )
2959 * IF_NOT_USE_DMA( HCFASSERT( !( stat & ~HREG_EV_BASIC_MASK, stat ) )
2960 * IF_USE_DMA( HCFASSERT( !( stat & ~( HREG_EV_BASIC_MASK ^ ( HREG_EV_...DMA.... ), stat ) )
2961 */
2962 /* 8*/
2963 if ( ifbp->IFB_RscInd == 0 && stat & HREG_EV_ALLOC ) { //Note: IFB_RscInd is ALWAYS 1 for DMA
2964 ifbp->IFB_RscInd = 1;
2965 }
2966 IF_TALLY( if ( stat & HREG_EV_INFO_DROP ) { ifbp->IFB_HCF_Tallies.NoBufInfo++; } );
2967 #if (HCF_EXT) & HCF_EXT_INT_TICK
2968 if ( stat & HREG_EV_TICK ) {
2969 ifbp->IFB_TickCnt++;
2970 }
2971 #if 0 // (HCF_SLEEP) & HCF_DDS
2972 if ( ifbp->IFB_TickCnt == 3 && ( ifbp->IFB_DSLinkStat & CFG_LINK_STAT_CONNECTED ) == 0 ) {
2973 CFG_DDS_TICK_TIME_STRCT ltv;
2974 // 2 second period (with 1 tick uncertanty) in not-connected mode -->go into DS_OOR
2975 hcf_action( ifbp, HCF_ACT_SLEEP );
2976 ifbp->IFB_DSLinkStat |= CFG_LINK_STAT_DS_OOR; //set OutOfRange
2977 ltv.len = 2;
2978 ltv.typ = CFG_DDS_TICK_TIME;
2979 ltv.tick_time = ( ( ifbp->IFB_DSLinkStat & CFG_LINK_STAT_TIMER ) + 0x10 ) *64; //78 is more right
2980 hcf_put_info( ifbp, (LTVP)&ltv );
2981 printk( "<5>Preparing for sleep, link_status: %04X, timer : %d\n",
2982 ifbp->IFB_DSLinkStat, ltv.tick_time );//;?remove me 1 day
2983 ifbp->IFB_TickCnt++; //;?just to make sure we do not keep on printing above message
2984 if ( ltv.tick_time < 300 * 125 ) ifbp->IFB_DSLinkStat += 0x0010;
2985
2986 }
2987 #endif // HCF_DDS
2988 #endif // HCF_EXT_INT_TICK
2989 if ( stat & HREG_EV_INFO ) {
2990 isr_info( ifbp );
2991 }
2992 #if (HCF_EXT) & HCF_EXT_INT_TX_EX
2993 if ( stat & HREG_EV_TX_EXT && ( i = IPW( HREG_TX_COMPL_FID ) ) != 0 /*DAWA*/ ) {
2994 DAWA_ZERO_FID( HREG_TX_COMPL_FID );
2995 (void)setup_bap( ifbp, i, 0, IO_IN );
2996 get_frag( ifbp, &ifbp->IFB_TxFsStat, HFS_SWSUP BE_PAR(1) );
2997 }
2998 #endif // HCF_EXT_INT_TX_EX
2999 //!rlav DMA engine will handle the rx event, not the driver
3000 #if HCF_DMA
3001 if ( !( ifbp->IFB_CntlOpt & USE_DMA ) ) //!! be aware of the logical indentations
3002 #endif // HCF_DMA
3003 /*16*/ if ( stat & HREG_EV_RX && ( ifbp->IFB_RxFID = IPW( HREG_RX_FID ) ) != 0 ) { //if 0 then DAWA_ACK
3004 HCFASSERT( bufp, len );
3005 HCFASSERT( len >= HFS_DAT + 2, len );
3006 DAWA_ZERO_FID( HREG_RX_FID );
3007 HCFASSERT( ifbp->IFB_RxFID < CFG_PROD_DATA, ifbp->IFB_RxFID);
3008 (void)setup_bap( ifbp, ifbp->IFB_RxFID, 0, IO_IN );
3009 get_frag( ifbp, bufp, HFS_ADDR_DEST BE_PAR(1) );
3010 ifbp->IFB_lap = buf_addr = bufp + HFS_ADDR_DEST;
3011 ifbp->IFB_RxLen = (hcf_16)(bufp[HFS_DAT_LEN] + (bufp[HFS_DAT_LEN+1]<<8) + 2*6 + 2);
3012 /*26*/ if ( ifbp->IFB_RxLen >= 22 ) { // convenient for MIC calculation (5 DWs + 1 "skipped" W)
3013 //. get DA,SA,Len/Type and (SNAP,Type or 8 data bytes)
3014 /*30*/ get_frag( ifbp, buf_addr, 22 BE_PAR(0) );
3015 /*32*/ CALC_RX_MIC( bufp, -1 ); //. initialize MIC
3016 CALC_RX_MIC( buf_addr, HCF_DASA_SIZE ); //. MIC over DA, SA
3017 CALC_RX_MIC( null_addr, 4 ); //. MIC over (virtual) priority field
3018 CALC_RX_MIC( buf_addr+14, 8 ); //. skip Len, MIC over SNAP,Type or 8 data bytes)
3019 buf_addr += 22;
3020 #if (HCF_ENCAP) == HCF_ENC
3021 HCFASSERT( len >= HFS_DAT + 2 + sizeof(snap_header), len );
3022 /*34*/ i = *(wci_recordp)&bufp[HFS_STAT] & ( HFS_STAT_MSG_TYPE | HFS_STAT_ERR );
3023 if ( i == HFS_STAT_TUNNEL ||
3024 ( i == HFS_STAT_1042 && hcf_encap( (wci_bufp)&bufp[HFS_TYPE] ) != ENC_TUNNEL ) ) {
3025 //. copy E-II Type to 802.3 LEN field
3026 /*36*/ bufp[HFS_LEN ] = bufp[HFS_TYPE ];
3027 bufp[HFS_LEN+1] = bufp[HFS_TYPE+1];
3028 //. discard Snap by overwriting with data
3029 ifbp->IFB_RxLen -= (HFS_TYPE - HFS_LEN);
3030 buf_addr -= ( HFS_TYPE - HFS_LEN ); // this happens to bring us at a DW boundary of 36
3031 }
3032 #endif // HCF_ENC
3033 }
3034 /*40*/ ifbp->IFB_lal = min( (hcf_16)(len - HFS_ADDR_DEST), ifbp->IFB_RxLen );
3035 i = ifbp->IFB_lal - ( buf_addr - ( bufp + HFS_ADDR_DEST ) );
3036 get_frag( ifbp, buf_addr, i BE_PAR(0) );
3037 CALC_RX_MIC( buf_addr, i );
3038 #if (HCF_TYPE) & HCF_TYPE_WPA
3039 if ( ifbp->IFB_lal == ifbp->IFB_RxLen ) {
3040 rc = check_mic( ifbp );
3041 }
3042 #endif // HCF_TYPE_WPA
3043 /*44*/ if ( len - HFS_ADDR_DEST >= ifbp->IFB_RxLen ) {
3044 ifbp->IFB_RxFID = 0;
3045 } else { /* IFB_RxFID is cleared, so you do not get another Rx_Ack at next entry of hcf_service_nic */
3046 stat &= (hcf_16)~HREG_EV_RX; //don't ack Rx if processing not yet completed
3047 }
3048 }
3049 // in case of DMA: signal availability of rx and/or tx packets to MSF
3050 IF_USE_DMA( ifbp->IFB_DmaPackets |= stat & ( HREG_EV_RDMAD | HREG_EV_TDMAD ) );
3051 // rlav : pending HREG_EV_RDMAD or HREG_EV_TDMAD events get acknowledged here.
3052 /*54*/ stat &= (hcf_16)~( HREG_EV_SLEEP_REQ | HREG_EV_CMD | HREG_EV_ACK_REG_READY | HREG_EV_ALLOC | HREG_EV_FW_DMA );
3053 //a positive mask would be easier to understand /*54*/ stat &= (hcf_16)~( HREG_EV_SLEEP_REQ | HREG_EV_CMD | HREG_EV_ACK_REG_READY | HREG_EV_ALLOC | HREG_EV_FW_DMA );
3054 IF_USE_DMA( stat &= (hcf_16)~HREG_EV_RX );
3055 if ( stat ) {
3056 DAWA_ACK( stat ); /*DAWA*/
3057 }
3058 }
3059 HCFLOGEXIT( HCF_TRACE_SERVICE_NIC );
3060 return rc;
3061 } // hcf_service_nic
3062
3063
3064 /************************************************************************************************************
3065 ************************** H C F S U P P O R T R O U T I N E S ******************************************
3066 ************************************************************************************************************/
3067
3068
3069 /************************************************************************************************************
3070 *
3071 *.SUBMODULE void calc_mic( hcf_32* p, hcf_32 m )
3072 *.PURPOSE calculate MIC on a quad byte.
3073 *
3074 *.ARGUMENTS
3075 * p address of the MIC
3076 * m 32 bit value to be processed by the MIC calculation engine
3077 *
3078 *.RETURNS N.A.
3079 *
3080 *.DESCRIPTION
3081 * calc_mic is the implementation of the MIC algorithm. It is a monkey-see monkey-do copy of
3082 * Michael::appendByte()
3083 * of Appendix C of ..........
3084 *
3085 *
3086 *.DIAGRAM
3087 *
3088 *.NOTICE
3089 *.ENDDOC END DOCUMENTATION
3090 *
3091 ************************************************************************************************************/
3092
3093 #if (HCF_TYPE) & HCF_TYPE_WPA
3094
3095 #define ROL32( A, n ) ( ((A) << (n)) | ( ((A)>>(32-(n))) & ( (1UL << (n)) - 1 ) ) )
3096 #define ROR32( A, n ) ROL32( (A), 32-(n) )
3097
3098 #define L *p
3099 #define R *(p+1)
3100
3101 void
3102 calc_mic( hcf_32* p, hcf_32 m )
3103 {
3104 #if HCF_BIG_ENDIAN
3105 m = (m >> 16) | (m << 16);
3106 #endif // HCF_BIG_ENDIAN
3107 L ^= m;
3108 R ^= ROL32( L, 17 );
3109 L += R;
3110 R ^= ((L & 0xff00ff00) >> 8) | ((L & 0x00ff00ff) << 8);
3111 L += R;
3112 R ^= ROL32( L, 3 );
3113 L += R;
3114 R ^= ROR32( L, 2 );
3115 L += R;
3116 } // calc_mic
3117 #undef R
3118 #undef L
3119 #endif // HCF_TYPE_WPA
3120
3121
3122
3123 #if (HCF_TYPE) & HCF_TYPE_WPA
3124 /************************************************************************************************************
3125 *
3126 *.SUBMODULE void calc_mic_rx_frag( IFBP ifbp, wci_bufp p, int len )
3127 *.PURPOSE calculate MIC on a single fragment.
3128 *
3129 *.ARGUMENTS
3130 * ifbp address of the Interface Block
3131 * bufp (byte) address of buffer
3132 * len length in bytes of buffer specified by bufp
3133 *
3134 *.RETURNS N.A.
3135 *
3136 *.DESCRIPTION
3137 * calc_mic_rx_frag ........
3138 *
3139 * The MIC is located in the IFB.
3140 * The MIC is separate for Tx and Rx, thus allowing hcf_send_msg to occur between hcf_service_nic and
3141 * hcf_rcv_msg.
3142 *
3143 *
3144 *.DIAGRAM
3145 *
3146 *.NOTICE
3147 *.ENDDOC END DOCUMENTATION
3148 *
3149 ************************************************************************************************************/
3150 void
3151 calc_mic_rx_frag( IFBP ifbp, wci_bufp p, int len )
3152 {
3153 static union { hcf_32 x32; hcf_16 x16[2]; hcf_8 x8[4]; } x; //* area to accumulate 4 bytes input for MIC engine
3154 int i;
3155
3156 if ( len == -1 ) { //initialize MIC housekeeping
3157 i = *(wci_recordp)&p[HFS_STAT];
3158 /* i = CNV_SHORTP_TO_LITTLE(&p[HFS_STAT]); should not be neede to prevent alignment poroblems
3159 * since len == -1 if and only if p is lookahaead buffer which MUST be word aligned
3160 * to be re-investigated by NvR
3161 */
3162
3163 if ( ( i & HFS_STAT_MIC ) == 0 ) {
3164 ifbp->IFB_MICRxCarry = 0xFFFF; //suppress MIC calculation
3165 } else {
3166 ifbp->IFB_MICRxCarry = 0;
3167 //* Note that "coincidentally" the bit positions used in HFS_STAT
3168 //* correspond with the offset of the key in IFB_MICKey
3169 i = ( i & HFS_STAT_MIC_KEY_ID ) >> 10; /* coincidentally no shift needed for i itself */
3170 ifbp->IFB_MICRx[0] = CNV_LONG_TO_LITTLE(ifbp->IFB_MICRxKey[i ]);
3171 ifbp->IFB_MICRx[1] = CNV_LONG_TO_LITTLE(ifbp->IFB_MICRxKey[i+1]);
3172 }
3173 } else {
3174 if ( ifbp->IFB_MICRxCarry == 0 ) {
3175 x.x32 = CNV_LONGP_TO_LITTLE(p);
3176 p += 4;
3177 if ( len < 4 ) {
3178 ifbp->IFB_MICRxCarry = (hcf_16)len;
3179 } else {
3180 ifbp->IFB_MICRxCarry = 4;
3181 len -= 4;
3182 }
3183 } else while ( ifbp->IFB_MICRxCarry < 4 && len ) { //note for hcf_16 applies: 0xFFFF > 4
3184 x.x8[ifbp->IFB_MICRxCarry++] = *p++;
3185 len--;
3186 }
3187 while ( ifbp->IFB_MICRxCarry == 4 ) { //contrived so we have only 1 call to calc_mic so we could bring it in-line
3188 calc_mic( ifbp->IFB_MICRx, x.x32 );
3189 x.x32 = CNV_LONGP_TO_LITTLE(p);
3190 p += 4;
3191 if ( len < 4 ) {
3192 ifbp->IFB_MICRxCarry = (hcf_16)len;
3193 }
3194 len -= 4;
3195 }
3196 }
3197 } // calc_mic_rx_frag
3198 #endif // HCF_TYPE_WPA
3199
3200
3201 #if (HCF_TYPE) & HCF_TYPE_WPA
3202 /************************************************************************************************************
3203 *
3204 *.SUBMODULE void calc_mic_tx_frag( IFBP ifbp, wci_bufp p, int len )
3205 *.PURPOSE calculate MIC on a single fragment.
3206 *
3207 *.ARGUMENTS
3208 * ifbp address of the Interface Block
3209 * bufp (byte) address of buffer
3210 * len length in bytes of buffer specified by bufp
3211 *
3212 *.RETURNS N.A.
3213 *
3214 *.DESCRIPTION
3215 * calc_mic_tx_frag ........
3216 *
3217 * The MIC is located in the IFB.
3218 * The MIC is separate for Tx and Rx, thus allowing hcf_send_msg to occur between hcf_service_nic and
3219 * hcf_rcv_msg.
3220 *
3221 *
3222 *.DIAGRAM
3223 *
3224 *.NOTICE
3225 *.ENDDOC END DOCUMENTATION
3226 *
3227 ************************************************************************************************************/
3228 void
3229 calc_mic_tx_frag( IFBP ifbp, wci_bufp p, int len )
3230 {
3231 static union { hcf_32 x32; hcf_16 x16[2]; hcf_8 x8[4]; } x; //* area to accumulate 4 bytes input for MIC engine
3232
3233 //if initialization request
3234 if ( len == -1 ) {
3235 //. presume MIC calculation disabled
3236 ifbp->IFB_MICTxCarry = 0xFFFF;
3237 //. if MIC calculation enabled
3238 if ( ifbp->IFB_MICTxCntl ) {
3239 //. . clear MIC carry
3240 ifbp->IFB_MICTxCarry = 0;
3241 //. . initialize MIC-engine
3242 ifbp->IFB_MICTx[0] = CNV_LONG_TO_LITTLE(ifbp->IFB_MICTxKey[0]); /*Tx always uses Key 0 */
3243 ifbp->IFB_MICTx[1] = CNV_LONG_TO_LITTLE(ifbp->IFB_MICTxKey[1]);
3244 }
3245 //else
3246 } else {
3247 //. if MIC enabled (Tx) / if MIC present (Rx)
3248 //. and no carry from previous calc_mic_frag
3249 if ( ifbp->IFB_MICTxCarry == 0 ) {
3250 //. . preset accu with 4 bytes from buffer
3251 x.x32 = CNV_LONGP_TO_LITTLE(p);
3252 //. . adjust pointer accordingly
3253 p += 4;
3254 //. . if buffer contained less then 4 bytes
3255 if ( len < 4 ) {
3256 //. . . promote valid bytes in accu to carry
3257 //. . . flag accu to contain incomplete double word
3258 ifbp->IFB_MICTxCarry = (hcf_16)len;
3259 //. . else
3260 } else {
3261 //. . . flag accu to contain complete double word
3262 ifbp->IFB_MICTxCarry = 4;
3263 //. . adjust remaining buffer length
3264 len -= 4;
3265 }
3266 //. else if MIC enabled
3267 //. and if carry bytes from previous calc_mic_tx_frag
3268 //. . move (1-3) bytes from carry into accu
3269 } else while ( ifbp->IFB_MICTxCarry < 4 && len ) { /* note for hcf_16 applies: 0xFFFF > 4 */
3270 x.x8[ifbp->IFB_MICTxCarry++] = *p++;
3271 len--;
3272 }
3273 //. while accu contains complete double word
3274 //. and MIC enabled
3275 while ( ifbp->IFB_MICTxCarry == 4 ) {
3276 //. . pass accu to MIC engine
3277 calc_mic( ifbp->IFB_MICTx, x.x32 );
3278 //. . copy next 4 bytes from buffer to accu
3279 x.x32 = CNV_LONGP_TO_LITTLE(p);
3280 //. . adjust buffer pointer
3281 p += 4;
3282 //. . if buffer contained less then 4 bytes
3283 //. . . promote valid bytes in accu to carry
3284 //. . . flag accu to contain incomplete double word
3285 if ( len < 4 ) {
3286 ifbp->IFB_MICTxCarry = (hcf_16)len;
3287 }
3288 //. . adjust remaining buffer length
3289 len -= 4;
3290 }
3291 }
3292 } // calc_mic_tx_frag
3293 #endif // HCF_TYPE_WPA
3294
3295
3296 #if HCF_PROT_TIME
3297 /************************************************************************************************************
3298 *
3299 *.SUBMODULE void calibrate( IFBP ifbp )
3300 *.PURPOSE calibrates the S/W protection counter against the Hermes Timer tick.
3301 *
3302 *.ARGUMENTS
3303 * ifbp address of the Interface Block
3304 *
3305 *.RETURNS N.A.
3306 *
3307 *.DESCRIPTION
3308 * calibrates the S/W protection counter against the Hermes Timer tick
3309 * IFB_TickIni is the value used to initialize the S/W protection counter such that the expiration period
3310 * more or less independent of the processor speed. If IFB_TickIni is not yet calibrated, it is done now.
3311 * This calibration is "reasonably" accurate because the Hermes is in a quiet state as a result of the
3312 * Initialize command.
3313 *
3314 *
3315 *.DIAGRAM
3316 *
3317 *1: IFB_TickIni is initialized at INI_TICK_INI by hcf_connect. If calibrate succeeds, IFB_TickIni is
3318 * guaranteed to be changed. As a consequence there will be only 1 shot at calibration (regardless of the
3319 * number of init calls) under normal circumstances.
3320 *2: Calibration is done HCF_PROT_TIME_CNT times. This diminish the effects of jitter and interference,
3321 * especially in a pre-emptive environment. HCF_PROT_TIME_CNT is in the range of 16 through 32 and derived
3322 * from the HCF_PROT_TIME specified by the MSF programmer. The divisor needed to scale HCF_PROT_TIME into the
3323 * 16-32 range, is used as a multiplicator after the calibration, to scale the found value back to the
3324 * requested range. This way a compromise is achieved between accuracy and duration of the calibration
3325 * process.
3326 *3: Acknowledge the Timer Tick Event.
3327 * Each cycle is limited to at most INI_TICK_INI samples of the TimerTick status of the Hermes.
3328 * Since the start of calibrate is unrelated to the Hermes Internal Timer, the first interval may last from 0
3329 * to the normal interval, all subsequent intervals should be the full length of the Hermes Tick interval.
3330 * The Hermes Timer Tick is not reprogrammed by the HCF, hence it is running at the default of 10 k
3331 * microseconds.
3332 *4: If the Timer Tick Event is continuously up (prot_cnt still has the value INI_TICK_INI) or no Timer Tick
3333 * Event occurred before the protection counter expired, reset IFB_TickIni to INI_TICK_INI,
3334 * set the defunct bit of IFB_CardStat (thus rendering the Hermes inoperable) and exit the calibrate routine.
3335 *8: ifbp->IFB_TickIni is multiplied to scale the found value back to the requested range as explained under 2.
3336 *
3337 *.NOTICE
3338 * o Although there are a number of viewpoints possible, calibrate() uses as error strategy that a single
3339 * failure of the Hermes TimerTick is considered fatal.
3340 * o There is no hard and concrete time-out value defined for Hermes activities. The default 1 seconds is
3341 * believed to be sufficiently "relaxed" for real life and to be sufficiently short to be still useful in an
3342 * environment with humans.
3343 * o Note that via IFB_DefunctStat time outs in cmd_wait and in hcfio_string block all Hermes access till the
3344 * next init so functions which call a mix of cmd_wait and hcfio_string only need to check the return status
3345 * of the last call
3346 * o The return code is preset at Time out.
3347 * The additional complication that no calibrated value for the protection count can be assumed since
3348 * calibrate() does not yet have determined a calibrated value (a catch 22), is handled by setting the
3349 * initial value at INI_TICK_INI (by hcf_connect). This approach is considered safe, because:
3350 * - the HCF does not use the pipeline mechanism of Hermes commands.
3351 * - the likelihood of failure (the only time when protection count is relevant) is small.
3352 * - the time will be sufficiently large on a fast machine (busy bit drops on good NIC before counter
3353 * expires)
3354 * - the time will be sufficiently small on a slow machine (counter expires on bad NIC before the end user
3355 * switches the power off in despair
3356 * The time needed to wrap a 32 bit counter around is longer than many humans want to wait, hence the more or
3357 * less arbitrary value of 0x40000L is chosen, assuming it does not take too long on an XT and is not too
3358 * short on a scream-machine.
3359 *
3360 *.ENDDOC END DOCUMENTATION
3361 *
3362 ************************************************************************************************************/
3363 HCF_STATIC void
3364 calibrate( IFBP ifbp )
3365 {
3366 int cnt = HCF_PROT_TIME_CNT;
3367 hcf_32 prot_cnt;
3368
3369 HCFTRACE( ifbp, HCF_TRACE_CALIBRATE );
3370 if ( ifbp->IFB_TickIni == INI_TICK_INI ) { /*1*/
3371 ifbp->IFB_TickIni = 0; /*2*/
3372 while ( cnt-- ) {
3373 prot_cnt = INI_TICK_INI;
3374 OPW( HREG_EV_ACK, HREG_EV_TICK ); /*3*/
3375 while ( (IPW( HREG_EV_STAT ) & HREG_EV_TICK) == 0 && --prot_cnt ) {
3376 ifbp->IFB_TickIni++;
3377 }
3378 if ( prot_cnt == 0 || prot_cnt == INI_TICK_INI ) { /*4*/
3379 ifbp->IFB_TickIni = INI_TICK_INI;
3380 ifbp->IFB_DefunctStat = HCF_ERR_DEFUNCT_TIMER;
3381 ifbp->IFB_CardStat |= CARD_STAT_DEFUNCT;
3382 HCFASSERT( DO_ASSERT, prot_cnt );
3383 }
3384 }
3385 ifbp->IFB_TickIni <<= HCF_PROT_TIME_SHFT; /*8*/
3386 }
3387 HCFTRACE( ifbp, HCF_TRACE_CALIBRATE | HCF_TRACE_EXIT );
3388 } // calibrate
3389 #endif // HCF_PROT_TIME
3390
3391
3392 #if (HCF_TYPE) & HCF_TYPE_WPA
3393 /************************************************************************************************************
3394 *
3395 *.SUBMODULE int check_mic( IFBP ifbp )
3396 *.PURPOSE verifies the MIC of a received non-USB frame.
3397 *
3398 *.ARGUMENTS
3399 * ifbp address of the Interface Block
3400 *
3401 *.RETURNS
3402 * HCF_SUCCESS
3403 * HCF_ERR_MIC
3404 *
3405 *.DESCRIPTION
3406 *
3407 *
3408 *.DIAGRAM
3409 *
3410 *4: test whether or not a MIC is reported by the Hermes
3411 *14: the calculated MIC and the received MIC are compared, the return status is set when there is a mismatch
3412 *
3413 *.NOTICE
3414 *.ENDDOC END DOCUMENTATION
3415 *
3416 ************************************************************************************************************/
3417 int
3418 check_mic( IFBP ifbp )
3419 {
3420 int rc = HCF_SUCCESS;
3421 hcf_32 x32[2]; //* area to save rcvd 8 bytes MIC
3422
3423 //if MIC present in RxFS
3424 if ( *(wci_recordp)&ifbp->IFB_lap[-HFS_ADDR_DEST] & HFS_STAT_MIC ) {
3425 //or if ( ifbp->IFB_MICRxCarry != 0xFFFF )
3426 CALC_RX_MIC( mic_pad, 8 ); //. process up to 3 remaining bytes of data and append 5 to 8 bytes of padding to MIC calculation
3427 get_frag( ifbp, (wci_bufp)x32, 8 BE_PAR(0));//. get 8 byte MIC from NIC
3428 //. if calculated and received MIC do not match
3429 //. . set status at HCF_ERR_MIC
3430 /*14*/ if ( x32[0] != CNV_LITTLE_TO_LONG(ifbp->IFB_MICRx[0]) ||
3431 x32[1] != CNV_LITTLE_TO_LONG(ifbp->IFB_MICRx[1]) ) {
3432 rc = HCF_ERR_MIC;
3433 }
3434 }
3435 //return status
3436 return rc;
3437 } // check_mic
3438 #endif // HCF_TYPE_WPA
3439
3440
3441 /************************************************************************************************************
3442 *
3443 *.SUBMODULE int cmd_cmpl( IFBP ifbp )
3444 *.PURPOSE waits for Hermes Command Completion.
3445 *
3446 *.ARGUMENTS
3447 * ifbp address of the Interface Block
3448 *
3449 *.RETURNS
3450 * IFB_DefunctStat
3451 * HCF_ERR_TIME_OUT
3452 * HCF_ERR_DEFUNCT_CMD_SEQ
3453 * HCF_SUCCESS
3454 *
3455 *.DESCRIPTION
3456 *
3457 *
3458 *.DIAGRAM
3459 *
3460 *2: Once cmd_cmpl is called, the Busy option bit in IFB_Cmd must be cleared
3461 *4: If Status register and command code don't match either:
3462 * - the Hermes and Host are out of sync ( a fatal error)
3463 * - error bits are reported via the Status Register.
3464 * Out of sync is considered fatal and brings the HCF in Defunct mode
3465 * Errors reported via the Status Register should be caused by sequence violations in Hermes command
3466 * sequences and hence these bugs should have been found during engineering testing. Since there is no
3467 * strategy to cope with this problem, it might as well be ignored at run time. Note that for any particular
3468 * situation where a strategy is formulated to handle the consequences of a particular bug causing a
3469 * particular Error situation reported via the Status Register, the bug should be removed rather than adding
3470 * logic to cope with the consequences of the bug.
3471 * There have been HCF versions where an error report via the Status Register even brought the HCF in defunct
3472 * mode (although it was not yet named like that at that time). This is particular undesirable behavior for a
3473 * general library.
3474 * Simply reporting the error (as "interesting") is debatable. There also have been HCF versions with this
3475 * strategy using the "vague" HCF_FAILURE code.
3476 * The error is reported via:
3477 * - MiscErr tally of the HCF Tally set
3478 * - the (informative) fields IFB_ErrCmd and IFB_ErrQualifier
3479 * - the assert mechanism
3480 *8: Here the Defunct case and the Status error are separately treated
3481 *
3482 *
3483 *.ENDDOC END DOCUMENTATION
3484 *
3485 ************************************************************************************************************/
3486 HCF_STATIC int
3487 cmd_cmpl( IFBP ifbp )
3488 {
3489
3490 PROT_CNT_INI;
3491 int rc = HCF_SUCCESS;
3492 hcf_16 stat;
3493
3494 HCFLOGENTRY( HCF_TRACE_CMD_CPL, ifbp->IFB_Cmd );
3495 ifbp->IFB_Cmd &= ~HCMD_BUSY; /* 2 */
3496 HCF_WAIT_WHILE( (IPW( HREG_EV_STAT) & HREG_EV_CMD) == 0 ); /* 4 */
3497 stat = IPW( HREG_STAT );
3498 #if HCF_PROT_TIME
3499 if ( prot_cnt == 0 ) {
3500 IF_TALLY( ifbp->IFB_HCF_Tallies.MiscErr++ );
3501 rc = HCF_ERR_TIME_OUT;
3502 HCFASSERT( DO_ASSERT, ifbp->IFB_Cmd );
3503 } else
3504 #endif // HCF_PROT_TIME
3505 {
3506 DAWA_ACK( HREG_EV_CMD );
3507 /*4*/ if ( stat != (ifbp->IFB_Cmd & HCMD_CMD_CODE) ) {
3508 /*8*/ if ( ( (stat ^ ifbp->IFB_Cmd ) & HCMD_CMD_CODE) != 0 ) {
3509 rc = ifbp->IFB_DefunctStat = HCF_ERR_DEFUNCT_CMD_SEQ;
3510 ifbp->IFB_CardStat |= CARD_STAT_DEFUNCT;
3511 }
3512 IF_TALLY( ifbp->IFB_HCF_Tallies.MiscErr++ );
3513 ifbp->IFB_ErrCmd = stat;
3514 ifbp->IFB_ErrQualifier = IPW( HREG_RESP_0 );
3515 HCFASSERT( DO_ASSERT, MERGE_2( IPW( HREG_PARAM_0 ), ifbp->IFB_Cmd ) );
3516 HCFASSERT( DO_ASSERT, MERGE_2( ifbp->IFB_ErrQualifier, ifbp->IFB_ErrCmd ) );
3517 }
3518 }
3519 HCFASSERT( rc == HCF_SUCCESS, rc);
3520 HCFLOGEXIT( HCF_TRACE_CMD_CPL );
3521 return rc;
3522 } // cmd_cmpl
3523
3524
3525 /************************************************************************************************************
3526 *
3527 *.SUBMODULE int cmd_exe( IFBP ifbp, int cmd_code, int par_0 )
3528 *.PURPOSE Executes synchronous part of Hermes Command and - optionally - waits for Command Completion.
3529 *
3530 *.ARGUMENTS
3531 * ifbp address of the Interface Block
3532 * cmd_code
3533 * par_0
3534 *
3535 *.RETURNS
3536 * IFB_DefunctStat
3537 * HCF_ERR_DEFUNCT_CMD_SEQ
3538 * HCF_SUCCESS
3539 * HCF_ERR_TO_BE_ADDED <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
3540 *
3541 *.DESCRIPTION
3542 * Executes synchronous Hermes Command and waits for Command Completion
3543 *
3544 * The general HCF strategy is to wait for command completion. As a consequence:
3545 * - the read of the busy bit before writing the command register is superfluous
3546 * - the Hermes requirement that no Inquiry command may be executed if there is still an unacknowledged
3547 * Inquiry command outstanding, is automatically met.
3548 * The Tx command uses the "Busy" bit in the cmd_code parameter to deviate from this general HCF strategy.
3549 * The idea is that by not busy-waiting on completion of this frequently used command the processor
3550 * utilization is diminished while using the busy-wait on all other seldom used commands the flow is kept
3551 * simple.
3552 *
3553 *
3554 *
3555 *.DIAGRAM
3556 *
3557 *1: skip the body of cmd_exe when in defunct mode or when - based on the S/W Support register write and
3558 * read back test - there is apparently no NIC.
3559 * Note: we gave up on the "old" strategy to write the S/W Support register at magic only when needed. Due to
3560 * the intricateness of Hermes F/W varieties ( which behave differently as far as corruption of the S/W
3561 * Support register is involved), the increasing number of Hermes commands which do an implicit initialize
3562 * (thus modifying the S/W Support register) and the workarounds of some OS/Support S/W induced aspects (e.g.
3563 * the System Soft library at WinNT which postpones the actual mapping of I/O space up to 30 seconds after
3564 * giving the go-ahead), the "magic" strategy is now reduced to a simple write and read back. This means that
3565 * problems like a bug tramping over the memory mapped Hermes registers will no longer be noticed as side
3566 * effect of the S/W Support register check.
3567 *2: check whether the preceding command skipped the busy wait and if so, check for command completion
3568 *
3569 *.NOTICE
3570 *.ENDDOC END DOCUMENTATION
3571 *
3572 ************************************************************************************************************/
3573
3574 HCF_STATIC int
3575 cmd_exe( IFBP ifbp, hcf_16 cmd_code, hcf_16 par_0 ) //if HCMD_BUSY of cmd_code set, then do NOT wait for completion
3576 {
3577 int rc;
3578
3579 HCFLOGENTRY( HCF_TRACE_CMD_EXE, cmd_code );
3580 HCFASSERT( (cmd_code & HCMD_CMD_CODE) != HCMD_TX || cmd_code & HCMD_BUSY, cmd_code ); //Tx must have Busy bit set
3581 OPW( HREG_SW_0, HCF_MAGIC );
3582 if ( IPW( HREG_SW_0 ) == HCF_MAGIC ) { /* 1 */
3583 rc = ifbp->IFB_DefunctStat;
3584 }
3585 else rc = HCF_ERR_NO_NIC;
3586 if ( rc == HCF_SUCCESS ) {
3587 //;?is this a hot idea, better MEASURE performance impact
3588 /*2*/ if ( ifbp->IFB_Cmd & HCMD_BUSY ) {
3589 rc = cmd_cmpl( ifbp );
3590 }
3591 OPW( HREG_PARAM_0, par_0 );
3592 OPW( HREG_CMD, cmd_code &~HCMD_BUSY );
3593 ifbp->IFB_Cmd = cmd_code;
3594 if ( (cmd_code & HCMD_BUSY) == 0 ) { //;?is this a hot idea, better MEASURE performance impact
3595 rc = cmd_cmpl( ifbp );
3596 }
3597 }
3598 HCFASSERT( rc == HCF_SUCCESS, MERGE_2( rc, cmd_code ) );
3599 HCFLOGEXIT( HCF_TRACE_CMD_EXE );
3600 return rc;
3601 } // cmd_exe
3602
3603
3604 /************************************************************************************************************
3605 *
3606 *.SUBMODULE int download( IFBP ifbp, CFG_PROG_STRCT FAR *ltvp )
3607 *.PURPOSE downloads F/W image into NIC and initiates execution of the downloaded F/W.
3608 *
3609 *.ARGUMENTS
3610 * ifbp address of the Interface Block
3611 * ltvp specifies the pseudo-RID (as defined by WCI)
3612 *
3613 *.RETURNS
3614 *
3615 *.DESCRIPTION
3616 *
3617 *
3618 *.DIAGRAM
3619 *1: First, Ack everything to unblock a (possibly) blocked cmd pipe line
3620 * Note 1: it is very likely that an Alloc event is pending and very well possible that a (Send) Cmd event is
3621 * pending
3622 * Note 2: it is assumed that this strategy takes away the need to ack every conceivable event after an
3623 * Hermes Initialize
3624 *
3625 *
3626 *.ENDDOC END DOCUMENTATION
3627 *
3628 ************************************************************************************************************/
3629 HCF_STATIC int
3630 download( IFBP ifbp, CFG_PROG_STRCT FAR *ltvp ) //Hermes-II download (volatile only)
3631 {
3632 hcf_16 i;
3633 int rc = HCF_SUCCESS;
3634 wci_bufp cp;
3635 hcf_io io_port = ifbp->IFB_IOBase + HREG_AUX_DATA;
3636
3637 HCFLOGENTRY( HCF_TRACE_DL, ltvp->typ );
3638 #if (HCF_TYPE) & HCF_TYPE_PRELOADED
3639 HCFASSERT( DO_ASSERT, ltvp->mode );
3640 #else
3641 //if initial "program" LTV
3642 if ( ifbp->IFB_DLMode == CFG_PROG_STOP && ltvp->mode == CFG_PROG_VOLATILE) {
3643 //. switch Hermes to initial mode
3644 /*1*/ OPW( HREG_EV_ACK, ~HREG_EV_SLEEP_REQ );
3645 rc = cmd_exe( ifbp, HCMD_INI, 0 ); /* HCMD_INI can not be part of init() because that is called on
3646 * other occasions as well */
3647 rc = init( ifbp );
3648 }
3649 //if final "program" LTV
3650 if ( ltvp->mode == CFG_PROG_STOP && ifbp->IFB_DLMode == CFG_PROG_VOLATILE) {
3651 //. start tertiary (or secondary)
3652 OPW( HREG_PARAM_1, (hcf_16)(ltvp->nic_addr >> 16) );
3653 rc = cmd_exe( ifbp, HCMD_EXECUTE, (hcf_16) ltvp->nic_addr );
3654 if (rc == HCF_SUCCESS) {
3655 rc = init( ifbp ); /*;? do we really want to skip init if cmd_exe failed, i.e.
3656 * IFB_FW_Comp_Id is than possibly incorrect */
3657 }
3658 //else (non-final)
3659 } else {
3660 //. if mode == Readback SEEPROM
3661 #if 0 //;? as long as the next if contains a hard coded 0, might as well leave it out even more obvious
3662 if ( 0 /*len is definitely not want we want;?*/ && ltvp->mode == CFG_PROG_SEEPROM_READBACK ) {
3663 OPW( HREG_PARAM_1, (hcf_16)(ltvp->nic_addr >> 16) );
3664 OPW( HREG_PARAM_2, (hcf_16)((ltvp->len - 4) << 1) );
3665 //. . perform Hermes prog cmd with appropriate mode bits
3666 rc = cmd_exe( ifbp, HCMD_PROGRAM | ltvp->mode, (hcf_16)ltvp->nic_addr );
3667 //. . set up NIC RAM addressability according Resp0-1
3668 OPW( HREG_AUX_PAGE, IPW( HREG_RESP_1) );
3669 OPW( HREG_AUX_OFFSET, IPW( HREG_RESP_0) );
3670 //. . set up L-field of LTV according Resp2
3671 i = ( IPW( HREG_RESP_2 ) + 1 ) / 2; // i contains max buffer size in words, a probably not very useful piece of information ;?
3672 /*Nico's code based on i is the "real amount of data available"
3673 if ( ltvp->len - 4 < i ) rc = HCF_ERR_LEN;
3674 else ltvp->len = i + 4;
3675 */
3676 /* Rolands code based on the idea that a MSF should not ask for more than is available
3677 // check if number of bytes requested exceeds max buffer size
3678 if ( ltvp->len - 4 > i ) {
3679 rc = HCF_ERR_LEN;
3680 ltvp->len = i + 4;
3681 }
3682 */
3683 //. . copy data from NIC via AUX port to LTV
3684 cp = (wci_bufp)ltvp->host_addr; /*IN_PORT_STRING_8_16 macro may modify its parameters*/
3685 i = ltvp->len - 4;
3686 IN_PORT_STRING_8_16( io_port, cp, i ); //!!!WORD length, cp MUST be a char pointer // $$ char
3687 //. else (non-final programming)
3688 } else
3689 #endif //;? as long as the above if contains a hard coded 0, might as well leave it out even more obvious
3690 { //. . get number of words to program
3691 HCFASSERT( ltvp->segment_size, *ltvp->host_addr );
3692 i = ltvp->segment_size/2;
3693 //. . copy data (words) from LTV via AUX port to NIC
3694 cp = (wci_bufp)ltvp->host_addr; //OUT_PORT_STRING_8_16 macro may modify its parameters
3695 //. . if mode == volatile programming
3696 if ( ltvp->mode == CFG_PROG_VOLATILE ) {
3697 //. . . set up NIC RAM addressability via AUX port
3698 OPW( HREG_AUX_PAGE, (hcf_16)(ltvp->nic_addr >> 16 << 9 | (ltvp->nic_addr & 0xFFFF) >> 7 ) );
3699 OPW( HREG_AUX_OFFSET, (hcf_16)(ltvp->nic_addr & 0x007E) );
3700 OUT_PORT_STRING_8_16( io_port, cp, i ); //!!!WORD length, cp MUST be a char pointer
3701 }
3702 }
3703 }
3704 ifbp->IFB_DLMode = ltvp->mode; //save state in IFB_DLMode
3705 #endif // HCF_TYPE_PRELOADED
3706 HCFASSERT( rc == HCF_SUCCESS, rc );
3707 HCFLOGEXIT( HCF_TRACE_DL );
3708 return rc;
3709 } // download
3710
3711
3712 #if (HCF_ASSERT) & HCF_ASSERT_PRINTF
3713 /**************************************************
3714 * Certain Hermes-II firmware versions can generate
3715 * debug information. This debug information is
3716 * contained in a buffer in nic-RAM, and can be read
3717 * via the aux port.
3718 **************************************************/
3719 HCF_STATIC int
3720 fw_printf(IFBP ifbp, CFG_FW_PRINTF_STRCT FAR *ltvp)
3721 {
3722 int rc = HCF_SUCCESS;
3723 hcf_16 fw_cnt;
3724 // hcf_32 DbMsgBuffer = 0x29D2, DbMsgCount= 0x000029D0;
3725 // hcf_16 DbMsgSize=0x00000080;
3726 hcf_32 DbMsgBuffer;
3727 CFG_FW_PRINTF_BUFFER_LOCATION_STRCT *p = &ifbp->IFB_FwPfBuff;
3728 ltvp->len = 1;
3729 if ( p->DbMsgSize != 0 ) {
3730 // first, check the counter in nic-RAM and compare it to the latest counter value of the HCF
3731 OPW( HREG_AUX_PAGE, (hcf_16)(p->DbMsgCount >> 7) );
3732 OPW( HREG_AUX_OFFSET, (hcf_16)(p->DbMsgCount & 0x7E) );
3733 fw_cnt = ((IPW( HREG_AUX_DATA) >>1 ) & ((hcf_16)p->DbMsgSize - 1));
3734 if ( fw_cnt != ifbp->IFB_DbgPrintF_Cnt ) {
3735 // DbgPrint("fw_cnt=%d IFB_DbgPrintF_Cnt=%d\n", fw_cnt, ifbp->IFB_DbgPrintF_Cnt);
3736 DbMsgBuffer = p->DbMsgBuffer + ifbp->IFB_DbgPrintF_Cnt * 6; // each entry is 3 words
3737 OPW( HREG_AUX_PAGE, (hcf_16)(DbMsgBuffer >> 7) );
3738 OPW( HREG_AUX_OFFSET, (hcf_16)(DbMsgBuffer & 0x7E) );
3739 ltvp->msg_id = IPW(HREG_AUX_DATA);
3740 ltvp->msg_par = IPW(HREG_AUX_DATA);
3741 ltvp->msg_tstamp = IPW(HREG_AUX_DATA);
3742 ltvp->len = 4;
3743 ifbp->IFB_DbgPrintF_Cnt++;
3744 ifbp->IFB_DbgPrintF_Cnt &= (p->DbMsgSize - 1);
3745 }
3746 }
3747 return rc;
3748 };
3749 #endif // HCF_ASSERT_PRINTF
3750
3751
3752 /************************************************************************************************************
3753 *
3754 *.SUBMODULE hcf_16 get_fid( IFBP ifbp )
3755 *.PURPOSE get allocated FID for either transmit or notify.
3756 *
3757 *.ARGUMENTS
3758 * ifbp address of the Interface Block
3759 *
3760 *.RETURNS
3761 * 0 no FID available
3762 * <>0 FID number
3763 *
3764 *.DESCRIPTION
3765 *
3766 *
3767 *.DIAGRAM
3768 * The preference is to use a "pending" alloc. If no alloc is pending, then - if available - the "spare" FID
3769 * is used.
3770 * If the spare FID is used, IFB_RscInd (representing the spare FID) must be cleared
3771 * If the pending alloc is used, the alloc event must be acknowledged to the Hermes.
3772 * In case the spare FID was depleted and the IFB_RscInd has been "faked" as pseudo resource with a 0x0001
3773 * value by hcf_service_nic, IFB_RscInd has to be "corrected" again to its 0x0000 value.
3774 *
3775 * Note that due to the Hermes-II H/W problems which are intended to be worked around by DAWA, the Alloc bit
3776 * in the Event register is no longer a reliable indication of the presence/absence of a FID. The "Clear FID"
3777 * part of the DAWA logic, together with the choice of the definition of the return information from get_fid,
3778 * handle this automatically, i.e. without additional code in get_fid.
3779 *.ENDDOC END DOCUMENTATION
3780 *
3781 ************************************************************************************************************/
3782 HCF_STATIC hcf_16
3783 get_fid( IFBP ifbp )
3784 {
3785
3786 hcf_16 fid = 0;
3787 #if ( (HCF_TYPE) & HCF_TYPE_HII5 ) == 0
3788 PROT_CNT_INI;
3789 #endif // HCF_TYPE_HII5
3790
3791 IF_DMA( HCFASSERT(!(ifbp->IFB_CntlOpt & USE_DMA), ifbp->IFB_CntlOpt) );
3792
3793 if ( IPW( HREG_EV_STAT) & HREG_EV_ALLOC) {
3794 fid = IPW( HREG_ALLOC_FID );
3795 HCFASSERT( fid, ifbp->IFB_RscInd );
3796 DAWA_ZERO_FID( HREG_ALLOC_FID );
3797 #if ( (HCF_TYPE) & HCF_TYPE_HII5 ) == 0
3798 HCF_WAIT_WHILE( ( IPW( HREG_EV_STAT ) & HREG_EV_ACK_REG_READY ) == 0 );
3799 HCFASSERT( prot_cnt, IPW( HREG_EV_STAT ) );
3800 #endif // HCF_TYPE_HII5
3801 DAWA_ACK( HREG_EV_ALLOC ); //!!note that HREG_EV_ALLOC is written only once
3802 // 180 degree error in logic ;? #if ALLOC_15
3803 if ( ifbp->IFB_RscInd == 1 ) {
3804 ifbp->IFB_RscInd = 0;
3805 }
3806 //#endif // ALLOC_15
3807 } else {
3808 // 180 degree error in logic ;? #if ALLOC_15
3809 fid = ifbp->IFB_RscInd;
3810 //#endif // ALLOC_15
3811 ifbp->IFB_RscInd = 0;
3812 }
3813 return fid;
3814 } // get_fid
3815
3816
3817 /************************************************************************************************************
3818 *
3819 *.SUBMODULE void get_frag( IFBP ifbp, wci_bufp bufp, int len BE_PAR( int word_len ) )
3820 *.PURPOSE reads with 16/32 bit I/O via BAP1 port from NIC RAM to Host memory.
3821 *
3822 *.ARGUMENTS
3823 * ifbp address of the Interface Block
3824 * bufp (byte) address of buffer
3825 * len length in bytes of buffer specified by bufp
3826 * word_len Big Endian only: number of leading bytes to swap in pairs
3827 *
3828 *.RETURNS N.A.
3829 *
3830 *.DESCRIPTION
3831 * process the single byte (if applicable) read by the previous get_frag and copy len (or len-1) bytes from
3832 * NIC to bufp.
3833 * On a Big Endian platform, the parameter word_len controls the number of leading bytes whose endianess is
3834 * converted (i.e. byte swapped)
3835 *
3836 *
3837 *.DIAGRAM
3838 *10: The PCMCIA card can be removed in the middle of the transfer. By depositing a "magic number" in the
3839 * HREG_SW_0 register of the Hermes at initialization time and by verifying this register, it can be
3840 * determined whether the card is still present. The return status is set accordingly.
3841 * Clearing the buffer is a (relative) cheap way to prevent that failing I/O results in run-away behavior
3842 * because the garbage in the buffer is interpreted by the caller irrespective of the return status (e.g.
3843 * hcf_service_nic has this behavior).
3844 *
3845 *.NOTICE
3846 * It turns out DOS ODI uses zero length fragments. The HCF code can cope with it, but as a consequence, no
3847 * Assert on len is possible
3848 *
3849 *.ENDDOC END DOCUMENTATION
3850 *
3851 ************************************************************************************************************/
3852 HCF_STATIC void
3853 get_frag( IFBP ifbp, wci_bufp bufp, int len BE_PAR( int word_len ) )
3854 {
3855 hcf_io io_port = ifbp->IFB_IOBase + HREG_DATA_1; //BAP data register
3856 wci_bufp p = bufp; //working pointer
3857 int i; //prevent side effects from macro
3858 int j;
3859
3860 HCFASSERT( ((hcf_32)bufp & (HCF_ALIGN-1) ) == 0, (hcf_32)bufp );
3861
3862 /*1: here recovery logic for intervening BAP access between hcf_service_nic and hcf_rcv_msg COULD be added
3863 * if current access is RxInitial
3864 * . persistent_offset += len
3865 */
3866
3867 i = len;
3868 //if buffer length > 0 and carry from previous get_frag
3869 if ( i && ifbp->IFB_CarryIn ) {
3870 //. move carry to buffer
3871 //. adjust buffer length and pointer accordingly
3872 *p++ = (hcf_8)(ifbp->IFB_CarryIn>>8);
3873 i--;
3874 //. clear carry flag
3875 ifbp->IFB_CarryIn = 0;
3876 }
3877 #if (HCF_IO) & HCF_IO_32BITS
3878 //skip zero-length I/O, single byte I/O and I/O not worthwhile (i.e. less than 6 bytes)for DW logic
3879 //if buffer length >= 6 and 32 bits I/O support
3880 if ( !(ifbp->IFB_CntlOpt & USE_16BIT) && i >= 6 ) {
3881 hcf_32 FAR *p4; //prevent side effects from macro
3882 if ( ( (hcf_32)p & 0x1 ) == 0 ) { //. if buffer at least word aligned
3883 if ( (hcf_32)p & 0x2 ) { //. . if buffer not double word aligned
3884 //. . . read single word to get double word aligned
3885 *(wci_recordp)p = IN_PORT_WORD( io_port );
3886 //. . . adjust buffer length and pointer accordingly
3887 p += 2;
3888 i -= 2;
3889 }
3890 //. . read as many double word as possible
3891 p4 = (hcf_32 FAR *)p;
3892 j = i/4;
3893 IN_PORT_STRING_32( io_port, p4, j );
3894 //. . adjust buffer length and pointer accordingly
3895 p += i & ~0x0003;
3896 i &= 0x0003;
3897 }
3898 }
3899 #endif // HCF_IO_32BITS
3900 //if no 32-bit support OR byte aligned OR 1-3 bytes left
3901 if ( i ) {
3902 //. read as many word as possible in "alignment safe" way
3903 j = i/2;
3904 IN_PORT_STRING_8_16( io_port, p, j );
3905 //. if 1 byte left
3906 if ( i & 0x0001 ) {
3907 //. . read 1 word
3908 ifbp->IFB_CarryIn = IN_PORT_WORD( io_port );
3909 //. . store LSB in last char of buffer
3910 bufp[len-1] = (hcf_8)ifbp->IFB_CarryIn;
3911 //. . save MSB in carry, set carry flag
3912 ifbp->IFB_CarryIn |= 0x1;
3913 }
3914 }
3915 #if HCF_BIG_ENDIAN
3916 HCFASSERT( word_len == 0 || word_len == 2 || word_len == 4, word_len );
3917 HCFASSERT( word_len == 0 || ((hcf_32)bufp & 1 ) == 0, (hcf_32)bufp );
3918 HCFASSERT( word_len <= len, MERGE2( word_len, len ) );
3919 //see put_frag for an alternative implementation, but be careful about what are int's and what are
3920 //hcf_16's
3921 if ( word_len ) { //. if there is anything to convert
3922 hcf_8 c;
3923 c = bufp[1]; //. . convert the 1st hcf_16
3924 bufp[1] = bufp[0];
3925 bufp[0] = c;
3926 if ( word_len > 1 ) { //. . if there is to convert more than 1 word ( i.e 2 )
3927 c = bufp[3]; //. . . convert the 2nd hcf_16
3928 bufp[3] = bufp[2];
3929 bufp[2] = c;
3930 }
3931 }
3932 #endif // HCF_BIG_ENDIAN
3933 } // get_frag
3934
3935 /************************************************************************************************************
3936 *
3937 *.SUBMODULE int init( IFBP ifbp )
3938 *.PURPOSE Handles common initialization aspects (H-I init, calibration, config.mngmt, allocation).
3939 *
3940 *.ARGUMENTS
3941 * ifbp address of the Interface Block
3942 *
3943 *.RETURNS
3944 * HCF_ERR_INCOMP_PRI
3945 * HCF_ERR_INCOMP_FW
3946 * HCF_ERR_TIME_OUT
3947 * >>hcf_get_info
3948 * HCF_ERR_NO_NIC
3949 * HCF_ERR_LEN
3950 *
3951 *.DESCRIPTION
3952 * init will successively:
3953 * - in case of a (non-preloaded) H-I, initialize the NIC
3954 * - calibrate the S/W protection timer against the Hermes Timer
3955 * - collect HSI, "active" F/W Configuration Management Information
3956 * - in case active F/W is Primary F/W: collect Primary F/W Configuration Management Information
3957 * - check HSI and Primary F/W compatibility with the HCF
3958 * - in case active F/W is Station or AP F/W: check Station or AP F/W compatibility with the HCF
3959 * - in case active F/W is not Primary F/W: allocate FIDs to be used in transmit/notify process
3960 *
3961 *
3962 *.DIAGRAM
3963 *2: drop all error status bits in IFB_CardStat since they are expected to be re-evaluated.
3964 *4: Ack everything except HREG_EV_SLEEP_REQ. It is very likely that an Alloc event is pending and
3965 * very well possible that a Send Cmd event is pending. Acking HREG_EV_SLEEP_REQ is handled by hcf_action(
3966 * HCF_ACT_INT_ON ) !!!
3967 *10: Calibrate the S/W time-out protection mechanism by calling calibrate(). Note that possible errors
3968 * in the calibration process are nor reported by init but will show up via the defunct mechanism in
3969 * subsequent hcf-calls.
3970 *14: usb_check_comp() is called to have the minimal visual clutter for the legacy H-I USB dongle
3971 * compatibility check.
3972 *16: The following configuration management related information is retrieved from the NIC:
3973 * - HSI supplier
3974 * - F/W Identity
3975 * - F/W supplier
3976 * if appropriate:
3977 * - PRI Identity
3978 * - PRI supplier
3979 * appropriate means on H-I: always
3980 * and on H-II if F/W supplier reflects a primary (i.e. only after an Hermes Reset or Init
3981 * command).
3982 * QUESTION ;? !!!!!! should, For each of the above RIDs the Endianess is converted to native Endianess.
3983 * Only the return code of the first hcf_get_info is used. All hcf_get_info calls are made, regardless of
3984 * the success or failure of the 1st hcf_get_info. The assumptions are:
3985 * - if any call fails, they all fail, so remembering the result of the 1st call is adequate
3986 * - a failing call will overwrite the L-field with a 0x0000 value, which services both as an
3987 * error indication for the values cached in the IFB as making mmd_check_comp fail.
3988 * In case of H-I, when getting the F/W identity fails, the F/W is assumed to be H-I AP F/W pre-dating
3989 * version 9.0 and the F/W Identity and Supplier are faked accordingly.
3990 * In case of H-II, the Primary, Station and AP Identity are merged into a single F/W Identity.
3991 * The same applies to the Supplier information. As a consequence the PRI information can no longer be
3992 * retrieved when a Tertiary runs. To accommodate MSFs and Utilities who depend on PRI information being
3993 * available at any time, this information is cached in the IFB. In this cache the generic "F/W" value of
3994 * the typ-fields is overwritten with the specific (legacy) "PRI" values. To actually re-route the (legacy)
3995 * PRI request via hcf_get_info, the xxxx-table must be set. In case of H-I, this caching, modifying and
3996 * re-routing is not needed because PRI information is always available directly from the NIC. For
3997 * consistency the caching fields in the IFB are filled with the PRI information anyway.
3998 *18: mdd_check_comp() is called to check the Supplier Variant and Range of the Host-S/W I/F (HSI) and the
3999 * Primary Firmware Variant and Range against the Top and Bottom level supported by this HCF. If either of
4000 * these tests fails, the CARD_STAT_INCOMP_PRI bit of IFB_CardStat is set
4001 * Note: There should always be a primary except during production, so this makes the HCF in its current form
4002 * unsuitable for manufacturing test systems like the FTS. This can be remedied by an adding a test like
4003 * ifbp->IFB_PRISup.id == COMP_ID_PRI
4004 *20: In case there is Tertiary F/W and this F/W is Station F/W, the Supplier Variant and Range of the Station
4005 * Firmware function as retrieved from the Hermes is checked against the Top and Bottom level supported by
4006 * this HCF.
4007 * Note: ;? the tertiary F/W compatibility checks could be moved to the DHF, which already has checked the
4008 * CFI and MFI compatibility of the image with the NIC before the image was downloaded.
4009 *28: In case of non-Primary F/W: allocates and acknowledge a (TX or Notify) FID and allocates without
4010 * acknowledge another (TX or Notify) FID (the so-called 1.5 alloc scheme) with the following steps:
4011 * - execute the allocate command by calling cmd_exe
4012 * - wait till either the alloc event or a time-out occurs
4013 * - regardless whether the alloc event occurs, call get_fid to
4014 * - read the FID and save it in IFB_RscInd to be used as "spare FID"
4015 * - acknowledge the alloc event
4016 * - do another "half" allocate to complete the "1.5 Alloc scheme"
4017 * Note that above 3 steps do not harm and thus give the "cheapest" acceptable strategy.
4018 * If a time-out occurred, then report time out status (after all)
4019 *
4020 *.ENDDOC END DOCUMENTATION
4021 *
4022 ************************************************************************************************************/
4023 HCF_STATIC int
4024 init( IFBP ifbp )
4025 {
4026
4027 int rc = HCF_SUCCESS;
4028
4029 HCFLOGENTRY( HCF_TRACE_INIT, 0 );
4030
4031 ifbp->IFB_CardStat = 0; /* 2*/
4032 OPW( HREG_EV_ACK, ~HREG_EV_SLEEP_REQ ); /* 4*/
4033 IF_PROT_TIME( calibrate( ifbp ) ); /*10*/
4034 #if 0 // OOR
4035 ifbp->IFB_FWIdentity.len = 2; //misuse the IFB space for a put
4036 ifbp->IFB_FWIdentity.typ = CFG_TICK_TIME;
4037 ifbp->IFB_FWIdentity.comp_id = (1000*1000)/1024 + 1; //roughly 1 second
4038 hcf_put_info( ifbp, (LTVP)&ifbp->IFB_FWIdentity.len );
4039 #endif // OOR
4040 ifbp->IFB_FWIdentity.len = sizeof(CFG_FW_IDENTITY_STRCT)/sizeof(hcf_16) - 1;
4041 ifbp->IFB_FWIdentity.typ = CFG_FW_IDENTITY;
4042 rc = hcf_get_info( ifbp, (LTVP)&ifbp->IFB_FWIdentity.len );
4043 /* ;? conversion should not be needed for mmd_check_comp */
4044 #if HCF_BIG_ENDIAN
4045 ifbp->IFB_FWIdentity.comp_id = CNV_LITTLE_TO_SHORT( ifbp->IFB_FWIdentity.comp_id );
4046 ifbp->IFB_FWIdentity.variant = CNV_LITTLE_TO_SHORT( ifbp->IFB_FWIdentity.variant );
4047 ifbp->IFB_FWIdentity.version_major = CNV_LITTLE_TO_SHORT( ifbp->IFB_FWIdentity.version_major );
4048 ifbp->IFB_FWIdentity.version_minor = CNV_LITTLE_TO_SHORT( ifbp->IFB_FWIdentity.version_minor );
4049 #endif // HCF_BIG_ENDIAN
4050 #if defined MSF_COMPONENT_ID /*14*/
4051 if ( rc == HCF_SUCCESS ) { /*16*/
4052 ifbp->IFB_HSISup.len = sizeof(CFG_SUP_RANGE_STRCT)/sizeof(hcf_16) - 1;
4053 ifbp->IFB_HSISup.typ = CFG_NIC_HSI_SUP_RANGE;
4054 rc = hcf_get_info( ifbp, (LTVP)&ifbp->IFB_HSISup.len );
4055 /* ;? conversion should not be needed for mmd_check_comp , BUT according to a report of a BE-user it is
4056 * should be resolved in the WARP release
4057 * since some compilers make ugly but unnecessary code of these instructions even for LE,
4058 * it is conditionally compiled */
4059 #if HCF_BIG_ENDIAN
4060 ifbp->IFB_HSISup.role = CNV_LITTLE_TO_SHORT( ifbp->IFB_HSISup.role );
4061 ifbp->IFB_HSISup.id = CNV_LITTLE_TO_SHORT( ifbp->IFB_HSISup.id );
4062 ifbp->IFB_HSISup.variant = CNV_LITTLE_TO_SHORT( ifbp->IFB_HSISup.variant );
4063 ifbp->IFB_HSISup.bottom = CNV_LITTLE_TO_SHORT( ifbp->IFB_HSISup.bottom );
4064 ifbp->IFB_HSISup.top = CNV_LITTLE_TO_SHORT( ifbp->IFB_HSISup.top );
4065 #endif // HCF_BIG_ENDIAN
4066 ifbp->IFB_FWSup.len = sizeof(CFG_SUP_RANGE_STRCT)/sizeof(hcf_16) - 1;
4067 ifbp->IFB_FWSup.typ = CFG_FW_SUP_RANGE;
4068 (void)hcf_get_info( ifbp, (LTVP)&ifbp->IFB_FWSup.len );
4069 /* ;? conversion should not be needed for mmd_check_comp */
4070 #if HCF_BIG_ENDIAN
4071 ifbp->IFB_FWSup.role = CNV_LITTLE_TO_SHORT( ifbp->IFB_FWSup.role );
4072 ifbp->IFB_FWSup.id = CNV_LITTLE_TO_SHORT( ifbp->IFB_FWSup.id );
4073 ifbp->IFB_FWSup.variant = CNV_LITTLE_TO_SHORT( ifbp->IFB_FWSup.variant );
4074 ifbp->IFB_FWSup.bottom = CNV_LITTLE_TO_SHORT( ifbp->IFB_FWSup.bottom );
4075 ifbp->IFB_FWSup.top = CNV_LITTLE_TO_SHORT( ifbp->IFB_FWSup.top );
4076 #endif // HCF_BIG_ENDIAN
4077
4078 if ( ifbp->IFB_FWSup.id == COMP_ID_PRI ) { /* 20*/
4079 int i = sizeof( CFG_FW_IDENTITY_STRCT) + sizeof(CFG_SUP_RANGE_STRCT );
4080 while ( i-- ) ((hcf_8*)(&ifbp->IFB_PRIIdentity))[i] = ((hcf_8*)(&ifbp->IFB_FWIdentity))[i];
4081 ifbp->IFB_PRIIdentity.typ = CFG_PRI_IDENTITY;
4082 ifbp->IFB_PRISup.typ = CFG_PRI_SUP_RANGE;
4083 xxxx[xxxx_PRI_IDENTITY_OFFSET] = &ifbp->IFB_PRIIdentity.len;
4084 xxxx[xxxx_PRI_IDENTITY_OFFSET+1] = &ifbp->IFB_PRISup.len;
4085 }
4086 if ( !mmd_check_comp( (void*)&cfg_drv_act_ranges_hsi, &ifbp->IFB_HSISup) /* 22*/
4087 #if ( (HCF_TYPE) & HCF_TYPE_PRELOADED ) == 0
4088 //;? the PRI compatibility check is only relevant for DHF
4089 || !mmd_check_comp( (void*)&cfg_drv_act_ranges_pri, &ifbp->IFB_PRISup)
4090 #endif // HCF_TYPE_PRELOADED
4091 ) {
4092 ifbp->IFB_CardStat = CARD_STAT_INCOMP_PRI;
4093 rc = HCF_ERR_INCOMP_PRI;
4094 }
4095 if ( ( ifbp->IFB_FWSup.id == COMP_ID_STA && !mmd_check_comp( (void*)&cfg_drv_act_ranges_sta, &ifbp->IFB_FWSup) ) ||
4096 ( ifbp->IFB_FWSup.id == COMP_ID_APF && !mmd_check_comp( (void*)&cfg_drv_act_ranges_apf, &ifbp->IFB_FWSup) )
4097 ) { /* 24 */
4098 ifbp->IFB_CardStat |= CARD_STAT_INCOMP_FW;
4099 rc = HCF_ERR_INCOMP_FW;
4100 }
4101 }
4102 #endif // MSF_COMPONENT_ID
4103
4104 if ( rc == HCF_SUCCESS && ifbp->IFB_FWIdentity.comp_id >= COMP_ID_FW_STA ) {
4105 PROT_CNT_INI;
4106 /**************************************************************************************
4107 * rlav: the DMA engine needs the host to cause a 'hanging alloc event' for it to consume.
4108 * not sure if this is the right spot in the HCF, thinking about hcf_enable...
4109 **************************************************************************************/
4110 rc = cmd_exe( ifbp, HCMD_ALLOC, 0 );
4111 // 180 degree error in logic ;? #if ALLOC_15
4112 // ifbp->IFB_RscInd = 1; //let's hope that by the time hcf_send_msg isa called, there will be a FID
4113 //#else
4114 if ( rc == HCF_SUCCESS ) {
4115 HCF_WAIT_WHILE( (IPW( HREG_EV_STAT ) & HREG_EV_ALLOC) == 0 );
4116 IF_PROT_TIME( HCFASSERT(prot_cnt, IPW( HREG_EV_STAT )) );
4117 #if HCF_DMA
4118 if ( ! ( ifbp->IFB_CntlOpt & USE_DMA ) )
4119 #endif // HCF_DMA
4120 {
4121 ifbp->IFB_RscInd = get_fid( ifbp );
4122 HCFASSERT( ifbp->IFB_RscInd, 0 );
4123 cmd_exe( ifbp, HCMD_ALLOC, 0 );
4124 IF_PROT_TIME( if ( prot_cnt == 0 ) rc = HCF_ERR_TIME_OUT );
4125 }
4126 }
4127 //#endif // ALLOC_15
4128 }
4129
4130 HCFASSERT( rc == HCF_SUCCESS, rc );
4131 HCFLOGEXIT( HCF_TRACE_INIT );
4132 return rc;
4133 } // init
4134
4135 /************************************************************************************************************
4136 *
4137 *.SUBMODULE void isr_info( IFBP ifbp )
4138 *.PURPOSE handles link events.
4139 *
4140 *.ARGUMENTS
4141 * ifbp address of the Interface Block
4142 *
4143 *.RETURNS N.A.
4144 *
4145 *.DESCRIPTION
4146 *
4147 *
4148 *.DIAGRAM
4149 *1: First the FID number corresponding with the InfoEvent is determined.
4150 * Note the complication of the zero-FID protection sub-scheme in DAWA.
4151 * Next the L-field and the T-field are fetched into scratch buffer info.
4152 *2: In case of tallies, the 16 bits Hermes values are accumulated in the IFB into 32 bits values. Info[0]
4153 * is (expected to be) HCF_NIC_TAL_CNT + 1. The contraption "while ( info[0]-- >1 )" rather than
4154 * "while ( --info[0] )" is used because it is dangerous to determine the length of the Value field by
4155 * decrementing info[0]. As a result of a bug in some version of the F/W, info[0] may be 0, resulting
4156 * in a very long loop in the pre-decrement logic.
4157 *4: In case of a link status frame, the information is copied to the IFB field IFB_linkStat
4158 *6: All other than Tallies (including "unknown" ones) are checked against the selection set by the MSF
4159 * via CFG_RID_LOG. If a match is found or the selection set has the wild-card type (i.e non-NULL buffer
4160 * pointer at the terminating zero-type), the frame is copied to the (type-specific) log buffer.
4161 * Note that to accumulate tallies into IFB AND to log them or to log a frame when a specific match occures
4162 * AND based on the wild-card selection, you have to call setup_bap again after the 1st copy.
4163 *
4164 *.ENDDOC END DOCUMENTATION
4165 *
4166 ************************************************************************************************************/
4167 HCF_STATIC void
4168 isr_info( IFBP ifbp )
4169 {
4170 hcf_16 info[2], fid;
4171 #if (HCF_EXT) & HCF_EXT_INFO_LOG
4172 RID_LOGP ridp = ifbp->IFB_RIDLogp; //NULL or pointer to array of RID_LOG structures (terminated by zero typ)
4173 #endif // HCF_EXT_INFO_LOG
4174
4175 HCFTRACE( ifbp, HCF_TRACE_ISR_INFO ); /* 1 */
4176 fid = IPW( HREG_INFO_FID );
4177 DAWA_ZERO_FID( HREG_INFO_FID );
4178 if ( fid ) {
4179 (void)setup_bap( ifbp, fid, 0, IO_IN );
4180 get_frag( ifbp, (wci_bufp)info, 4 BE_PAR(2) );
4181 HCFASSERT( info[0] <= HCF_MAX_LTV + 1, MERGE_2( info[1], info[0] ) ); //;? a smaller value makes more sense
4182 #if (HCF_TALLIES) & HCF_TALLIES_NIC //Hermes tally support
4183 if ( info[1] == CFG_TALLIES ) {
4184 hcf_32 *p;
4185 /*2*/ if ( info[0] > HCF_NIC_TAL_CNT ) {
4186 info[0] = HCF_NIC_TAL_CNT + 1;
4187 }
4188 p = (hcf_32*)&ifbp->IFB_NIC_Tallies;
4189 while ( info[0]-- >1 ) *p++ += IPW( HREG_DATA_1 ); //request may return zero length
4190 }
4191 else
4192 #endif // HCF_TALLIES_NIC
4193 {
4194 /*4*/ if ( info[1] == CFG_LINK_STAT ) {
4195 ifbp->IFB_LinkStat = IPW( HREG_DATA_1 );
4196 }
4197 #if (HCF_EXT) & HCF_EXT_INFO_LOG
4198 /*6*/ while ( 1 ) {
4199 if ( ridp->typ == 0 || ridp->typ == info[1] ) {
4200 if ( ridp->bufp ) {
4201 HCFASSERT( ridp->len >= 2, ridp->typ );
4202 ridp->bufp[0] = min((hcf_16)(ridp->len - 1), info[0] ); //save L
4203 ridp->bufp[1] = info[1]; //save T
4204 get_frag( ifbp, (wci_bufp)&ridp->bufp[2], (ridp->bufp[0] - 1)*2 BE_PAR(0) );
4205 }
4206 break;
4207 }
4208 ridp++;
4209 }
4210 #endif // HCF_EXT_INFO_LOG
4211 }
4212 HCFTRACE( ifbp, HCF_TRACE_ISR_INFO | HCF_TRACE_EXIT );
4213 }
4214 return;
4215 } // isr_info
4216
4217 //
4218 //
4219 // #endif // HCF_TALLIES_NIC
4220 // /*4*/ if ( info[1] == CFG_LINK_STAT ) {
4221 // ifbp->IFB_DSLinkStat = IPW( HREG_DATA_1 ) | CFG_LINK_STAT_CHANGE; //corrupts BAP !! ;?
4222 // ifbp->IFB_LinkStat = ifbp->IFB_DSLinkStat & CFG_LINK_STAT_FW; //;? to be obsoleted
4223 // printk( "<4>linkstatus: %04x\n", ifbp->IFB_DSLinkStat ); //;?remove me 1 day
4224 // #if (HCF_SLEEP) & HCF_DDS
4225 // if ( ( ifbp->IFB_DSLinkStat & CFG_LINK_STAT_CONNECTED ) == 0 ) { //even values are disconnected etc.
4226 // ifbp->IFB_TickCnt = 0; //start 2 second period (with 1 tick uncertanty)
4227 // printk( "<5>isr_info: AwaitConnection phase started, IFB_TickCnt = 0\n" ); //;?remove me 1 day
4228 // }
4229 // #endif // HCF_DDS
4230 // }
4231 // #if (HCF_EXT) & HCF_EXT_INFO_LOG
4232 // /*6*/ while ( 1 ) {
4233 // if ( ridp->typ == 0 || ridp->typ == info[1] ) {
4234 // if ( ridp->bufp ) {
4235 // HCFASSERT( ridp->len >= 2, ridp->typ );
4236 // (void)setup_bap( ifbp, fid, 2, IO_IN ); //restore BAP for tallies, linkstat and specific type followed by wild card
4237 // ridp->bufp[0] = min( ridp->len - 1, info[0] ); //save L
4238 // get_frag( ifbp, (wci_bufp)&ridp->bufp[1], ridp->bufp[0]*2 BE_PAR(0) );
4239 // }
4240 // break; //;?this break is no longer needed due to setup_bap but lets concentrate on DDS first
4241 // }
4242 // ridp++;
4243 // }
4244 // #endif // HCF_EXT_INFO_LOG
4245 // }
4246 // HCFTRACE( ifbp, HCF_TRACE_ISR_INFO | HCF_TRACE_EXIT );
4247 //
4248 //
4249 //
4250 //
4251 // return;
4252 //} // isr_info
4253
4254
4255 /************************************************************************************************************
4256 *
4257 *.SUBMODULE void mdd_assert( IFBP ifbp, unsigned int line_number, hcf_32 q )
4258 *.PURPOSE filters assert on level and interfaces to the MSF supplied msf_assert routine.
4259 *
4260 *.ARGUMENTS
4261 * ifbp address of the Interface Block
4262 * line_number line number of the line which caused the assert
4263 * q qualifier, additional information which may give a clue about the problem
4264 *
4265 *.RETURNS N.A.
4266 *
4267 *.DESCRIPTION
4268 *
4269 *
4270 *.DIAGRAM
4271 *
4272 *.NOTICE
4273 * mdd_assert has been through a turmoil, renaming hcf_assert to assert and hcf_assert again and supporting off
4274 * and on being called from the MSF level and other ( immature ) ModularDriverDevelopment modules like DHF and
4275 * MMD.
4276 * !!!! The assert routine is not an hcf_..... routine in the sense that it may be called by the MSF,
4277 * however it is called from mmd.c and dhf.c, so it must be external.
4278 * To prevent namespace pollution it needs a prefix, to prevent that MSF programmers think that
4279 * they are allowed to call the assert logic, the prefix HCF can't be used, so MDD is selected!!!!
4280 *
4281 * When called from the DHF module the line number is incremented by DHF_FILE_NAME_OFFSET and when called from
4282 * the MMD module by MMD_FILE_NAME_OFFSET.
4283 *
4284 *.ENDDOC END DOCUMENTATION
4285 *
4286 ************************************************************************************************************/
4287 #if HCF_ASSERT
4288 void
4289 mdd_assert( IFBP ifbp, unsigned int line_number, hcf_32 q )
4290 {
4291 hcf_16 run_time_flag = ifbp->IFB_AssertLvl;
4292
4293 if ( run_time_flag /* > ;?????? */ ) { //prevent recursive behavior, later to be extended to level filtering
4294 ifbp->IFB_AssertQualifier = q;
4295 ifbp->IFB_AssertLine = (hcf_16)line_number;
4296 #if (HCF_ASSERT) & ( HCF_ASSERT_LNK_MSF_RTN | HCF_ASSERT_RT_MSF_RTN )
4297 if ( ifbp->IFB_AssertRtn ) {
4298 ifbp->IFB_AssertRtn( line_number, ifbp->IFB_AssertTrace, q );
4299 }
4300 #endif // HCF_ASSERT_LNK_MSF_RTN / HCF_ASSERT_RT_MSF_RTN
4301 #if (HCF_ASSERT) & HCF_ASSERT_SW_SUP
4302 OPW( HREG_SW_2, line_number );
4303 OPW( HREG_SW_2, ifbp->IFB_AssertTrace );
4304 OPW( HREG_SW_2, (hcf_16)q );
4305 OPW( HREG_SW_2, (hcf_16)(q >> 16 ) );
4306 #endif // HCF_ASSERT_SW_SUP
4307
4308 #if (HCF_ASSERT) & HCF_ASSERT_MB
4309 ifbp->IFB_AssertLvl = 0; // prevent recursive behavior
4310 hcf_put_info( ifbp, (LTVP)&ifbp->IFB_AssertStrct );
4311 ifbp->IFB_AssertLvl = run_time_flag; // restore appropriate filter level
4312 #endif // HCF_ASSERT_MB
4313 }
4314 } // mdd_assert
4315 #endif // HCF_ASSERT
4316
4317
4318 /************************************************************************************************************
4319 *
4320 *.SUBMODULE void put_frag( IFBP ifbp, wci_bufp bufp, int len BE_PAR( int word_len ) )
4321 *.PURPOSE writes with 16/32 bit I/O via BAP1 port from Host memory to NIC RAM.
4322 *
4323 *.ARGUMENTS
4324 * ifbp address of the Interface Block
4325 * bufp (byte) address of buffer
4326 * len length in bytes of buffer specified by bufp
4327 * word_len Big Endian only: number of leading bytes to swap in pairs
4328 *
4329 *.RETURNS N.A.
4330 *
4331 *.DESCRIPTION
4332 * process the single byte (if applicable) not yet written by the previous put_frag and copy len
4333 * (or len-1) bytes from bufp to NIC.
4334 *
4335 *
4336 *.DIAGRAM
4337 *
4338 *.NOTICE
4339 * It turns out DOS ODI uses zero length fragments. The HCF code can cope with it, but as a consequence, no
4340 * Assert on len is possible
4341 *
4342 *.ENDDOC END DOCUMENTATION
4343 *
4344 ************************************************************************************************************/
4345 HCF_STATIC void
4346 put_frag( IFBP ifbp, wci_bufp bufp, int len BE_PAR( int word_len ) )
4347 {
4348 hcf_io io_port = ifbp->IFB_IOBase + HREG_DATA_1; //BAP data register
4349 int i; //prevent side effects from macro
4350 hcf_16 j;
4351 HCFASSERT( ((hcf_32)bufp & (HCF_ALIGN-1) ) == 0, (hcf_32)bufp );
4352 #if HCF_BIG_ENDIAN
4353 HCFASSERT( word_len == 0 || word_len == 2 || word_len == 4, word_len );
4354 HCFASSERT( word_len == 0 || ((hcf_32)bufp & 1 ) == 0, (hcf_32)bufp );
4355 HCFASSERT( word_len <= len, MERGE_2( word_len, len ) );
4356
4357 if ( word_len ) { //if there is anything to convert
4358 //. convert and write the 1st hcf_16
4359 j = bufp[1] | bufp[0]<<8;
4360 OUT_PORT_WORD( io_port, j );
4361 //. update pointer and counter accordingly
4362 len -= 2;
4363 bufp += 2;
4364 if ( word_len > 1 ) { //. if there is to convert more than 1 word ( i.e 2 )
4365 //. . convert and write the 2nd hcf_16
4366 j = bufp[1] | bufp[0]<<8; /*bufp is already incremented by 2*/
4367 OUT_PORT_WORD( io_port, j );
4368 //. . update pointer and counter accordingly
4369 len -= 2;
4370 bufp += 2;
4371 }
4372 }
4373 #endif // HCF_BIG_ENDIAN
4374 i = len;
4375 if ( i && ifbp->IFB_CarryOut ) { //skip zero-length
4376 j = ((*bufp)<<8) + ( ifbp->IFB_CarryOut & 0xFF );
4377 OUT_PORT_WORD( io_port, j );
4378 bufp++; i--;
4379 ifbp->IFB_CarryOut = 0;
4380 }
4381 #if (HCF_IO) & HCF_IO_32BITS
4382 //skip zero-length I/O, single byte I/O and I/O not worthwhile (i.e. less than 6 bytes)for DW logic
4383 //if buffer length >= 6 and 32 bits I/O support
4384 if ( !(ifbp->IFB_CntlOpt & USE_16BIT) && i >= 6 ) {
4385 hcf_32 FAR *p4; //prevent side effects from macro
4386 if ( ( (hcf_32)bufp & 0x1 ) == 0 ) { //. if buffer at least word aligned
4387 if ( (hcf_32)bufp & 0x2 ) { //. . if buffer not double word aligned
4388 //. . . write a single word to get double word aligned
4389 j = *(wci_recordp)bufp; //just to help ease writing macros with embedded assembly
4390 OUT_PORT_WORD( io_port, j );
4391 //. . . adjust buffer length and pointer accordingly
4392 bufp += 2; i -= 2;
4393 }
4394 //. . write as many double word as possible
4395 p4 = (hcf_32 FAR *)bufp;
4396 j = (hcf_16)i/4;
4397 OUT_PORT_STRING_32( io_port, p4, j );
4398 //. . adjust buffer length and pointer accordingly
4399 bufp += i & ~0x0003;
4400 i &= 0x0003;
4401 }
4402 }
4403 #endif // HCF_IO_32BITS
4404 //if no 32-bit support OR byte aligned OR 1 word left
4405 if ( i ) {
4406 //. if odd number of bytes left
4407 if ( i & 0x0001 ) {
4408 //. . save left over byte (before bufp is corrupted) in carry, set carry flag
4409 ifbp->IFB_CarryOut = (hcf_16)bufp[i-1] | 0x0100; //note that i and bufp are always simultaneously modified, &bufp[i-1] is invariant
4410 }
4411 //. write as many word as possible in "alignment safe" way
4412 j = (hcf_16)i/2;
4413 OUT_PORT_STRING_8_16( io_port, bufp, j );
4414 }
4415 } // put_frag
4416
4417
4418 /************************************************************************************************************
4419 *
4420 *.SUBMODULE void put_frag_finalize( IFBP ifbp )
4421 *.PURPOSE cleanup after put_frag for trailing odd byte and MIC transfer to NIC.
4422 *
4423 *.ARGUMENTS
4424 * ifbp address of the Interface Block
4425 *
4426 *.RETURNS N.A.
4427 *
4428 *.DESCRIPTION
4429 * finalize the MIC calculation with the padding pattern, output the last byte (if applicable)
4430 * of the message and the MIC to the TxFS
4431 *
4432 *
4433 *.DIAGRAM
4434 *2: 1 byte of the last put_frag may be still in IFB_CarryOut ( the put_frag carry holder ), so ........
4435 * 1 - 3 bytes of the last put_frag may be still in IFB_tx_32 ( the MIC engine carry holder ), so ........
4436 * The call to the MIC calculation routine feeds these remaining bytes (if any) of put_frag and the
4437 * just as many bytes of the padding as needed to the MIC calculation engine. Note that the "unneeded" pad
4438 * bytes simply end up in the MIC engine carry holder and are never used.
4439 *8: write the remainder of the MIC and possible some garbage to NIC RAM
4440 * Note: i is always 4 (a loop-invariant of the while in point 2)
4441 *
4442 *.NOTICE
4443 *
4444 *.ENDDOC END DOCUMENTATION
4445 *
4446 ************************************************************************************************************/
4447 HCF_STATIC void
4448 put_frag_finalize( IFBP ifbp )
4449 {
4450 #if (HCF_TYPE) & HCF_TYPE_WPA
4451 if ( ifbp->IFB_MICTxCarry != 0xFFFF) { //if MIC calculation active
4452 CALC_TX_MIC( mic_pad, 8); //. feed (up to 8 bytes of) virtual padding to MIC engine
4453 //. write (possibly) trailing byte + (most of) MIC
4454 put_frag( ifbp, (wci_bufp)ifbp->IFB_MICTx, 8 BE_PAR(0) );
4455 }
4456 #endif // HCF_TYPE_WPA
4457 put_frag( ifbp, null_addr, 1 BE_PAR(0) ); //write (possibly) trailing data or MIC byte
4458 } // put_frag_finalize
4459
4460
4461 /************************************************************************************************************
4462 *
4463 *.SUBMODULE int put_info( IFBP ifbp, LTVP ltvp )
4464 *.PURPOSE support routine to handle the "basic" task of hcf_put_info to pass RIDs to the NIC.
4465 *
4466 *.ARGUMENTS
4467 * ifbp address of the Interface Block
4468 * ltvp address in NIC RAM where LVT-records are located
4469 *
4470 *.RETURNS
4471 * HCF_SUCCESS
4472 * >>put_frag
4473 * >>cmd_wait
4474 *
4475 *.DESCRIPTION
4476 *
4477 *
4478 *.DIAGRAM
4479 *20: do not write RIDs to NICs which have incompatible Firmware
4480 *24: If the RID does not exist, the L-field is set to zero.
4481 * Note that some RIDs can not be read, e.g. the pseudo RIDs for direct Hermes commands and CFG_DEFAULT_KEYS
4482 *28: If the RID is written successful, pass it to the NIC by means of an Access Write command
4483 *
4484 *.NOTICE
4485 * The mechanism to HCF_ASSERT on invalid typ-codes in the LTV record is based on the following strategy:
4486 * - some codes (e.g. CFG_REG_MB) are explicitly handled by the HCF which implies that these codes
4487 * are valid. These codes are already consumed by hcf_put_info.
4488 * - all other codes are passed to the Hermes. Before the put action is executed, hcf_get_info is called
4489 * with an LTV record with a value of 1 in the L-field and the intended put action type in the Typ-code
4490 * field. If the put action type is valid, it is also valid as a get action type code - except
4491 * for CFG_DEFAULT_KEYS and CFG_ADD_TKIP_DEFAULT_KEY - so the HCF_ASSERT logic of hcf_get_info should
4492 * not catch.
4493 *
4494 *.ENDDOC END DOCUMENTATION
4495 *
4496 ************************************************************************************************************/
4497 HCF_STATIC int
4498 put_info( IFBP ifbp, LTVP ltvp )
4499 {
4500
4501 int rc = HCF_SUCCESS;
4502
4503 HCFASSERT( ifbp->IFB_CardStat == 0, MERGE_2( ltvp->typ, ifbp->IFB_CardStat ) );
4504 HCFASSERT( CFG_RID_CFG_MIN <= ltvp->typ && ltvp->typ <= CFG_RID_CFG_MAX, ltvp->typ );
4505
4506 if ( ifbp->IFB_CardStat == 0 && /* 20*/
4507 ( ( CFG_RID_CFG_MIN <= ltvp->typ && ltvp->typ <= CFG_RID_CFG_MAX ) ||
4508 ( CFG_RID_ENG_MIN <= ltvp->typ /* && ltvp->typ <= 0xFFFF */ ) ) ) {
4509 #if HCF_ASSERT //FCC8, FCB0, FCB4, FCB6, FCB7, FCB8, FCC0, FCC4, FCBC, FCBD, FCBE, FCBF
4510 {
4511 hcf_16 t = ltvp->typ;
4512 LTV_STRCT x = { 2, t, {0} }; /*24*/
4513 hcf_get_info( ifbp, (LTVP)&x );
4514 if ( x.len == 0 &&
4515 ( t != CFG_DEFAULT_KEYS && t != CFG_ADD_TKIP_DEFAULT_KEY && t != CFG_REMOVE_TKIP_DEFAULT_KEY &&
4516 t != CFG_ADD_TKIP_MAPPED_KEY && t != CFG_REMOVE_TKIP_MAPPED_KEY &&
4517 t != CFG_HANDOVER_ADDR && t != CFG_DISASSOCIATE_ADDR &&
4518 t != CFG_FCBC && t != CFG_FCBD && t != CFG_FCBE && t != CFG_FCBF &&
4519 t != CFG_DEAUTHENTICATE_ADDR
4520 )
4521 ) {
4522 HCFASSERT( DO_ASSERT, ltvp->typ );
4523 }
4524 }
4525 #endif // HCF_ASSERT
4526
4527 rc = setup_bap( ifbp, ltvp->typ, 0, IO_OUT );
4528 put_frag( ifbp, (wci_bufp)ltvp, 2*ltvp->len + 2 BE_PAR(2) );
4529 /*28*/ if ( rc == HCF_SUCCESS ) {
4530 rc = cmd_exe( ifbp, HCMD_ACCESS + HCMD_ACCESS_WRITE, ltvp->typ );
4531 }
4532 }
4533 return rc;
4534 } // put_info
4535
4536
4537 /************************************************************************************************************
4538 *
4539 *.SUBMODULE int put_info_mb( IFBP ifbp, CFG_MB_INFO_STRCT FAR * ltvp )
4540 *.PURPOSE accumulates a ( series of) buffers into a single Info block into the MailBox.
4541 *
4542 *.ARGUMENTS
4543 * ifbp address of the Interface Block
4544 * ltvp address of structure specifying the "type" and the fragments of the information to be synthesized
4545 * as an LTV into the MailBox
4546 *
4547 *.RETURNS
4548 *
4549 *.DESCRIPTION
4550 * If the data does not fit (including no MailBox is available), the IFB_MBTally is incremented and an
4551 * error status is returned.
4552 * HCF_ASSERT does not catch.
4553 * Calling put_info_mb when their is no MailBox available, is considered a design error in the MSF.
4554 *
4555 * Note that there is always at least 1 word of unused space in the mail box.
4556 * As a consequence:
4557 * - no problem in pointer arithmetic (MB_RP == MB_WP means unambiguously mail box is completely empty
4558 * - There is always free space to write an L field with a value of zero after each MB_Info block. This
4559 * allows for an easy scan mechanism in the "get MB_Info block" logic.
4560 *
4561 *
4562 *.DIAGRAM
4563 *1: Calculate L field of the MBIB, i.e. 1 for the T-field + the cumulative length of the fragments.
4564 *2: The free space in the MailBox is calculated (2a: free part from Write Ptr to Read Ptr, 2b: free part
4565 * turns out to wrap around) . If this space suffices to store the number of words reflected by len (T-field
4566 * + Value-field) plus the additional MailBox Info L-field + a trailing 0 to act as the L-field of a trailing
4567 * dummy or empty LTV record, then a MailBox Info block is build in the MailBox consisting of
4568 * - the value len in the first word
4569 * - type in the second word
4570 * - a copy of the contents of the fragments in the second and higher word
4571 *
4572 *4: Since put_info_mb() can more or less directly be called from the MSF level, the I/F must be robust
4573 * against out-of-range variables. As failsafe coding, the MB update is skipped by changing tlen to 0 if
4574 * len == 0; This will indirectly cause an assert as result of the violation of the next if clause.
4575 *6: Check whether the free space in MailBox suffices (this covers the complete absence of the MailBox).
4576 * Note that len is unsigned, so even MSF I/F violation works out O.K.
4577 * The '2' in the expression "len+2" is used because 1 word is needed for L itself and 1 word is needed
4578 * for the zero-sentinel
4579 *8: update MailBox Info length report to MSF with "oldest" MB Info Block size. Be careful here, if you get
4580 * here before the MailBox is registered, you can't read from the buffer addressed by IFB_MBp (it is the
4581 * Null buffer) so don't move this code till the end of this routine but keep it where there is garuanteed
4582 * a buffer.
4583 *
4584 *.NOTICE
4585 * boundary testing depends on the fact that IFB_MBSize is guaranteed to be zero if no MailBox is present,
4586 * and to a lesser degree, that IFB_MBWp = IFB_MBRp = 0
4587 *
4588 *.ENDDOC END DOCUMENTATION
4589 *
4590 ************************************************************************************************************/
4591
4592 HCF_STATIC int
4593 put_info_mb( IFBP ifbp, CFG_MB_INFO_STRCT FAR * ltvp )
4594 {
4595
4596 int rc = HCF_SUCCESS;
4597 hcf_16 i; //work counter
4598 hcf_16 *dp; //destination pointer (in MailBox)
4599 wci_recordp sp; //source pointer
4600 hcf_16 len; //total length to copy to MailBox
4601 hcf_16 tlen; //free length/working length/offset in WMP frame
4602
4603 if ( ifbp->IFB_MBp == NULL ) return rc; //;?not sufficient
4604 HCFASSERT( ifbp->IFB_MBp != NULL, 0 ); //!!!be careful, don't get into an endless recursion
4605 HCFASSERT( ifbp->IFB_MBSize, 0 );
4606
4607 len = 1; /* 1 */
4608 for ( i = 0; i < ltvp->frag_cnt; i++ ) {
4609 len += ltvp->frag_buf[i].frag_len;
4610 }
4611 if ( ifbp->IFB_MBRp > ifbp->IFB_MBWp ) {
4612 tlen = ifbp->IFB_MBRp - ifbp->IFB_MBWp; /* 2a*/
4613 } else {
4614 if ( ifbp->IFB_MBRp == ifbp->IFB_MBWp ) {
4615 ifbp->IFB_MBRp = ifbp->IFB_MBWp = 0; // optimize Wrapping
4616 }
4617 tlen = ifbp->IFB_MBSize - ifbp->IFB_MBWp; /* 2b*/
4618 if ( ( tlen <= len + 2 ) && ( len + 2 < ifbp->IFB_MBRp ) ) { //if trailing space is too small but
4619 // leading space is sufficiently large
4620 ifbp->IFB_MBp[ifbp->IFB_MBWp] = 0xFFFF; //flag dummy LTV to fill the trailing space
4621 ifbp->IFB_MBWp = 0; //reset WritePointer to begin of MailBox
4622 tlen = ifbp->IFB_MBRp; //get new available space size
4623 }
4624 }
4625 dp = &ifbp->IFB_MBp[ifbp->IFB_MBWp];
4626 if ( len == 0 ) {
4627 tlen = 0; //;? what is this good for
4628 }
4629 if ( len + 2 >= tlen ){ /* 6 */
4630 //Do Not ASSERT, this is a normal condition
4631 IF_TALLY( ifbp->IFB_HCF_Tallies.NoBufMB++ );
4632 rc = HCF_ERR_LEN;
4633 } else {
4634 *dp++ = len; //write Len (= size of T+V in words to MB_Info block
4635 *dp++ = ltvp->base_typ; //write Type to MB_Info block
4636 ifbp->IFB_MBWp += len + 1; //update WritePointer of MailBox
4637 for ( i = 0; i < ltvp->frag_cnt; i++ ) { // process each of the fragments
4638 sp = ltvp->frag_buf[i].frag_addr;
4639 len = ltvp->frag_buf[i].frag_len;
4640 while ( len-- ) *dp++ = *sp++;
4641 }
4642 ifbp->IFB_MBp[ifbp->IFB_MBWp] = 0; //to assure get_info for CFG_MB_INFO stops
4643 ifbp->IFB_MBInfoLen = ifbp->IFB_MBp[ifbp->IFB_MBRp]; /* 8 */
4644 }
4645 return rc;
4646 } // put_info_mb
4647
4648
4649 /************************************************************************************************************
4650 *
4651 *.SUBMODULE int setup_bap( IFBP ifbp, hcf_16 fid, int offset, int type )
4652 *.PURPOSE set up data access to NIC RAM via BAP_1.
4653 *
4654 *.ARGUMENTS
4655 * ifbp address of I/F Block
4656 * fid FID/RID
4657 * offset !!even!! offset in FID/RID
4658 * type IO_IN, IO_OUT
4659 *
4660 *.RETURNS
4661 * HCF_SUCCESS O.K
4662 * HCF_ERR_NO_NIC card is removed
4663 * HCF_ERR_DEFUNCT_TIME_OUT Fatal malfunction detected
4664 * HCF_ERR_DEFUNCT_..... if and only if IFB_DefunctStat <> 0
4665 *
4666 *.DESCRIPTION
4667 *
4668 * A non-zero return status indicates:
4669 * - the NIC is considered nonoperational, e.g. due to a time-out of some Hermes activity in the past
4670 * - BAP_1 could not properly be initialized
4671 * - the card is removed before completion of the data transfer
4672 * In all other cases, a zero is returned.
4673 * BAP Initialization failure indicates an H/W error which is very likely to signal complete H/W failure.
4674 * Once a BAP Initialization failure has occurred all subsequent interactions with the Hermes will return a
4675 * "defunct" status till the Hermes is re-initialized by means of an hcf_connect.
4676 *
4677 * A BAP is a set of registers (Offset, Select and Data) offering read/write access to a particular FID or
4678 * RID. This access is based on a auto-increment feature.
4679 * There are two BAPs but these days the HCF uses only BAP_1 and leaves BAP_0 to the PCI Busmastering H/W.
4680 *
4681 * The BAP-mechanism is based on the Busy bit in the Offset register (see the Hermes definition). The waiting
4682 * for Busy must occur between writing the Offset register and accessing the Data register. The
4683 * implementation to wait for the Busy bit drop after each write to the Offset register, implies that the
4684 * requirement that the Busy bit is low before the Select register is written, is automatically met.
4685 * BAP-setup may be time consuming (e.g. 380 usec for large offsets occurs frequently). The wait for Busy bit
4686 * drop is protected by a loop counter, which is initialized with IFB_TickIni, which is calibrated in init.
4687 *
4688 * The NIC I/F is optimized for word transfer and can only handle word transfer at a word boundary in NIC
4689 * RAM. The intended solution for transfer of a single byte has multiple H/W flaws. There have been different
4690 * S/W Workaround strategies. RID access is hcf_16 based by "nature", so no byte access problems. For Tx/Rx
4691 * FID access, the byte logic became obsolete by absorbing it in the double word oriented nature of the MIC
4692 * feature.
4693 *
4694 *
4695 *.DIAGRAM
4696 *
4697 *2: the test on rc checks whether the HCF went into "defunct" mode ( e.g. BAP initialization or a call to
4698 * cmd_wait did ever fail).
4699 *4: the select register and offset register are set
4700 * the offset register is monitored till a successful condition (no busy bit) is detected or till the
4701 * (calibrated) protection counter expires
4702 * If the counter expires, this is reflected in IFB_DefunctStat, so all subsequent calls to setup_bap fail
4703 * immediately ( see 2)
4704 *6: initialization of the carry as used by pet/get_frag
4705 *8: HREG_OFFSET_ERR is ignored as error because:
4706 * a: the Hermes is robust against it
4707 * b: it is not known what causes it (probably a bug), hence no strategy can be specified which level is
4708 * to handle this error in which way. In the past, it could be induced by the MSF level, e.g. by calling
4709 * hcf_rcv_msg while there was no Rx-FID available. Since this is an MSF-error which is caught by ASSERT,
4710 * there is no run-time action required by the HCF.
4711 * Lumping the Offset error in with the Busy bit error, as has been done in the past turns out to be a
4712 * disaster or a life saver, just depending on what the cause of the error is. Since no prediction can be
4713 * done about the future, it is "felt" to be the best strategy to ignore this error. One day the code was
4714 * accompanied by the following comment:
4715 * // ignore HREG_OFFSET_ERR, someone, supposedly the MSF programmer ;) made a bug. Since we don't know
4716 * // what is going on, we might as well go on - under management pressure - by ignoring it
4717 *
4718 *.ENDDOC END DOCUMENTATION
4719 *
4720 ************************************************************************************************************/
4721 HCF_STATIC int
4722 setup_bap( IFBP ifbp, hcf_16 fid, int offset, int type )
4723 {
4724 PROT_CNT_INI;
4725 int rc;
4726
4727 HCFTRACE( ifbp, HCF_TRACE_STRIO );
4728 rc = ifbp->IFB_DefunctStat;
4729 if (rc == HCF_SUCCESS) { /*2*/
4730 OPW( HREG_SELECT_1, fid ); /*4*/
4731 OPW( HREG_OFFSET_1, offset );
4732 if ( type == IO_IN ) {
4733 ifbp->IFB_CarryIn = 0;
4734 }
4735 else ifbp->IFB_CarryOut = 0;
4736 HCF_WAIT_WHILE( IPW( HREG_OFFSET_1) & HCMD_BUSY );
4737 HCFASSERT( !( IPW( HREG_OFFSET_1) & HREG_OFFSET_ERR ), MERGE_2( fid, offset ) ); /*8*/
4738 if ( prot_cnt == 0 ) {
4739 HCFASSERT( DO_ASSERT, MERGE_2( fid, offset ) );
4740 rc = ifbp->IFB_DefunctStat = HCF_ERR_DEFUNCT_TIME_OUT;
4741 ifbp->IFB_CardStat |= CARD_STAT_DEFUNCT;
4742 }
4743 }
4744 HCFTRACE( ifbp, HCF_TRACE_STRIO | HCF_TRACE_EXIT );
4745 return rc;
4746 } // setup_bap
4747
Linux kernel - Deliverables
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