Merge tag 'f2fs-fixes-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/jaegeuk...
[deliverable/linux.git] / drivers / staging / xillybus / xillybus_pcie.c
1 /*
2 * linux/drivers/misc/xillybus_pcie.c
3 *
4 * Copyright 2011 Xillybus Ltd, http://xillybus.com
5 *
6 * Driver for the Xillybus FPGA/host framework using PCI Express.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the smems of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 */
12
13 #include <linux/module.h>
14 #include <linux/pci.h>
15 #include <linux/pci-aspm.h>
16 #include <linux/slab.h>
17 #include "xillybus.h"
18
19 MODULE_DESCRIPTION("Xillybus driver for PCIe");
20 MODULE_AUTHOR("Eli Billauer, Xillybus Ltd.");
21 MODULE_VERSION("1.06");
22 MODULE_ALIAS("xillybus_pcie");
23 MODULE_LICENSE("GPL v2");
24
25 #define PCI_DEVICE_ID_XILLYBUS 0xebeb
26
27 #define PCI_VENDOR_ID_ALTERA 0x1172
28 #define PCI_VENDOR_ID_ACTEL 0x11aa
29 #define PCI_VENDOR_ID_LATTICE 0x1204
30
31 static const char xillyname[] = "xillybus_pcie";
32
33 static const struct pci_device_id xillyids[] = {
34 {PCI_DEVICE(PCI_VENDOR_ID_XILINX, PCI_DEVICE_ID_XILLYBUS)},
35 {PCI_DEVICE(PCI_VENDOR_ID_ALTERA, PCI_DEVICE_ID_XILLYBUS)},
36 {PCI_DEVICE(PCI_VENDOR_ID_ACTEL, PCI_DEVICE_ID_XILLYBUS)},
37 {PCI_DEVICE(PCI_VENDOR_ID_LATTICE, PCI_DEVICE_ID_XILLYBUS)},
38 { /* End: all zeroes */ }
39 };
40
41 static int xilly_pci_direction(int direction)
42 {
43 switch (direction) {
44 case DMA_TO_DEVICE:
45 return PCI_DMA_TODEVICE;
46 case DMA_FROM_DEVICE:
47 return PCI_DMA_FROMDEVICE;
48 default:
49 return PCI_DMA_BIDIRECTIONAL;
50 }
51 }
52
53 static void xilly_dma_sync_single_for_cpu_pci(struct xilly_endpoint *ep,
54 dma_addr_t dma_handle,
55 size_t size,
56 int direction)
57 {
58 pci_dma_sync_single_for_cpu(ep->pdev,
59 dma_handle,
60 size,
61 xilly_pci_direction(direction));
62 }
63
64 static void xilly_dma_sync_single_for_device_pci(struct xilly_endpoint *ep,
65 dma_addr_t dma_handle,
66 size_t size,
67 int direction)
68 {
69 pci_dma_sync_single_for_device(ep->pdev,
70 dma_handle,
71 size,
72 xilly_pci_direction(direction));
73 }
74
75 /*
76 * Map either through the PCI DMA mapper or the non_PCI one. Behind the
77 * scenes exactly the same functions are called with the same parameters,
78 * but that can change.
79 */
80
81 static dma_addr_t xilly_map_single_pci(struct xilly_cleanup *mem,
82 struct xilly_endpoint *ep,
83 void *ptr,
84 size_t size,
85 int direction
86 )
87 {
88
89 dma_addr_t addr = 0;
90 struct xilly_dma *this;
91 int pci_direction;
92
93 this = kmalloc(sizeof(struct xilly_dma), GFP_KERNEL);
94 if (!this)
95 return 0;
96
97 pci_direction = xilly_pci_direction(direction);
98 addr = pci_map_single(ep->pdev, ptr, size, pci_direction);
99 this->direction = pci_direction;
100
101 if (pci_dma_mapping_error(ep->pdev, addr)) {
102 kfree(this);
103 return 0;
104 }
105
106 this->dma_addr = addr;
107 this->pdev = ep->pdev;
108 this->size = size;
109
110 list_add_tail(&this->node, &mem->to_unmap);
111
112 return addr;
113 }
114
115 static void xilly_unmap_single_pci(struct xilly_dma *entry)
116 {
117 pci_unmap_single(entry->pdev,
118 entry->dma_addr,
119 entry->size,
120 entry->direction);
121 }
122
123 static struct xilly_endpoint_hardware pci_hw = {
124 .owner = THIS_MODULE,
125 .hw_sync_sgl_for_cpu = xilly_dma_sync_single_for_cpu_pci,
126 .hw_sync_sgl_for_device = xilly_dma_sync_single_for_device_pci,
127 .map_single = xilly_map_single_pci,
128 .unmap_single = xilly_unmap_single_pci
129 };
130
131 static int xilly_probe(struct pci_dev *pdev,
132 const struct pci_device_id *ent)
133 {
134 struct xilly_endpoint *endpoint;
135 int rc = 0;
136
137 endpoint = xillybus_init_endpoint(pdev, &pdev->dev, &pci_hw);
138
139 if (!endpoint)
140 return -ENOMEM;
141
142 pci_set_drvdata(pdev, endpoint);
143
144 rc = pcim_enable_device(pdev);
145
146 if (rc) {
147 dev_err(endpoint->dev,
148 "pcim_enable_device() failed. Aborting.\n");
149 return rc;
150 }
151
152 /* L0s has caused packet drops. No power saving, thank you. */
153
154 pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S);
155
156 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
157 dev_err(endpoint->dev,
158 "Incorrect BAR configuration. Aborting.\n");
159 return -ENODEV;
160 }
161
162 rc = pcim_iomap_regions(pdev, 0x01, xillyname);
163 if (rc) {
164 dev_err(endpoint->dev,
165 "pcim_iomap_regions() failed. Aborting.\n");
166 return rc;
167 }
168
169 endpoint->registers = pcim_iomap_table(pdev)[0];
170
171 pci_set_master(pdev);
172
173 /* Set up a single MSI interrupt */
174 if (pci_enable_msi(pdev)) {
175 dev_err(endpoint->dev,
176 "Failed to enable MSI interrupts. Aborting.\n");
177 return -ENODEV;
178 }
179 rc = devm_request_irq(&pdev->dev, pdev->irq, xillybus_isr, 0,
180 xillyname, endpoint);
181
182 if (rc) {
183 dev_err(endpoint->dev,
184 "Failed to register MSI handler. Aborting.\n");
185 return -ENODEV;
186 }
187
188 /*
189 * In theory, an attempt to set the DMA mask to 64 and dma_using_dac=1
190 * is the right thing. But some unclever PCIe drivers report it's OK
191 * when the hardware drops those 64-bit PCIe packets. So trust
192 * nobody and use 32 bits DMA addressing in any case.
193 */
194
195 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
196 endpoint->dma_using_dac = 0;
197 else {
198 dev_err(endpoint->dev, "Failed to set DMA mask. Aborting.\n");
199 return -ENODEV;
200 }
201
202 rc = xillybus_endpoint_discovery(endpoint);
203
204 if (!rc)
205 return 0;
206
207 xillybus_do_cleanup(&endpoint->cleanup, endpoint);
208
209 return rc;
210 }
211
212 static void xilly_remove(struct pci_dev *pdev)
213 {
214 struct xilly_endpoint *endpoint = pci_get_drvdata(pdev);
215
216 xillybus_endpoint_remove(endpoint);
217
218 xillybus_do_cleanup(&endpoint->cleanup, endpoint);
219 }
220
221 MODULE_DEVICE_TABLE(pci, xillyids);
222
223 static struct pci_driver xillybus_driver = {
224 .name = xillyname,
225 .id_table = xillyids,
226 .probe = xilly_probe,
227 .remove = xilly_remove,
228 };
229
230 module_pci_driver(xillybus_driver);
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