2 * Intel PXA25x and IXP4xx on-chip full speed USB device controllers
4 * Copyright (C) 2002 Intrinsyc, Inc. (Frank Becker)
5 * Copyright (C) 2003 Robert Schwebel, Pengutronix
6 * Copyright (C) 2003 Benedikt Spranger, Pengutronix
7 * Copyright (C) 2003 David Brownell
8 * Copyright (C) 2003 Joshua Wise
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 /* #define VERBOSE_DEBUG */
28 #include <linux/device.h>
29 #include <linux/module.h>
30 #include <linux/kernel.h>
31 #include <linux/ioport.h>
32 #include <linux/types.h>
33 #include <linux/errno.h>
34 #include <linux/delay.h>
35 #include <linux/slab.h>
36 #include <linux/init.h>
37 #include <linux/timer.h>
38 #include <linux/list.h>
39 #include <linux/interrupt.h>
41 #include <linux/platform_device.h>
42 #include <linux/dma-mapping.h>
43 #include <linux/irq.h>
44 #include <linux/clk.h>
45 #include <linux/err.h>
46 #include <linux/seq_file.h>
47 #include <linux/debugfs.h>
49 #include <linux/prefetch.h>
51 #include <asm/byteorder.h>
54 #include <asm/system.h>
55 #include <asm/mach-types.h>
56 #include <asm/unaligned.h>
58 #include <linux/usb/ch9.h>
59 #include <linux/usb/gadget.h>
60 #include <linux/usb/otg.h>
63 * This driver is PXA25x only. Grab the right register definitions.
65 #ifdef CONFIG_ARCH_PXA
66 #include <mach/pxa25x-udc.h>
69 #ifdef CONFIG_ARCH_LUBBOCK
70 #include <mach/lubbock.h>
73 #include <asm/mach/udc_pxa2xx.h>
77 * This driver handles the USB Device Controller (UDC) in Intel's PXA 25x
78 * series processors. The UDC for the IXP 4xx series is very similar.
79 * There are fifteen endpoints, in addition to ep0.
81 * Such controller drivers work with a gadget driver. The gadget driver
82 * returns descriptors, implements configuration and data protocols used
83 * by the host to interact with this device, and allocates endpoints to
84 * the different protocol interfaces. The controller driver virtualizes
85 * usb hardware so that the gadget drivers will be more portable.
87 * This UDC hardware wants to implement a bit too much USB protocol, so
88 * it constrains the sorts of USB configuration change events that work.
89 * The errata for these chips are misleading; some "fixed" bugs from
90 * pxa250 a0/a1 b0/b1/b2 sure act like they're still there.
92 * Note that the UDC hardware supports DMA (except on IXP) but that's
93 * not used here. IN-DMA (to host) is simple enough, when the data is
94 * suitably aligned (16 bytes) ... the network stack doesn't do that,
95 * other software can. OUT-DMA is buggy in most chip versions, as well
96 * as poorly designed (data toggle not automatic). So this driver won't
97 * bother using DMA. (Mostly-working IN-DMA support was available in
98 * kernels before 2.6.23, but was never enabled or well tested.)
101 #define DRIVER_VERSION "30-June-2007"
102 #define DRIVER_DESC "PXA 25x USB Device Controller driver"
105 static const char driver_name
[] = "pxa25x_udc";
107 static const char ep0name
[] = "ep0";
110 #ifdef CONFIG_ARCH_IXP4XX
112 /* cpu-specific register addresses are compiled in to this code */
113 #ifdef CONFIG_ARCH_PXA
114 #error "Can't configure both IXP and PXA"
117 /* IXP doesn't yet support <linux/clk.h> */
118 #define clk_get(dev,name) NULL
119 #define clk_enable(clk) do { } while (0)
120 #define clk_disable(clk) do { } while (0)
121 #define clk_put(clk) do { } while (0)
125 #include "pxa25x_udc.h"
128 #ifdef CONFIG_USB_PXA25X_SMALL
129 #define SIZE_STR " (small)"
134 /* ---------------------------------------------------------------------------
135 * endpoint related parts of the api to the usb controller hardware,
136 * used by gadget driver; and the inner talker-to-hardware core.
137 * ---------------------------------------------------------------------------
140 static void pxa25x_ep_fifo_flush (struct usb_ep
*ep
);
141 static void nuke (struct pxa25x_ep
*, int status
);
143 /* one GPIO should control a D+ pullup, so host sees this device (or not) */
144 static void pullup_off(void)
146 struct pxa2xx_udc_mach_info
*mach
= the_controller
->mach
;
147 int off_level
= mach
->gpio_pullup_inverted
;
149 if (gpio_is_valid(mach
->gpio_pullup
))
150 gpio_set_value(mach
->gpio_pullup
, off_level
);
151 else if (mach
->udc_command
)
152 mach
->udc_command(PXA2XX_UDC_CMD_DISCONNECT
);
155 static void pullup_on(void)
157 struct pxa2xx_udc_mach_info
*mach
= the_controller
->mach
;
158 int on_level
= !mach
->gpio_pullup_inverted
;
160 if (gpio_is_valid(mach
->gpio_pullup
))
161 gpio_set_value(mach
->gpio_pullup
, on_level
);
162 else if (mach
->udc_command
)
163 mach
->udc_command(PXA2XX_UDC_CMD_CONNECT
);
166 static void pio_irq_enable(int bEndpointAddress
)
168 bEndpointAddress
&= 0xf;
169 if (bEndpointAddress
< 8)
170 UICR0
&= ~(1 << bEndpointAddress
);
172 bEndpointAddress
-= 8;
173 UICR1
&= ~(1 << bEndpointAddress
);
177 static void pio_irq_disable(int bEndpointAddress
)
179 bEndpointAddress
&= 0xf;
180 if (bEndpointAddress
< 8)
181 UICR0
|= 1 << bEndpointAddress
;
183 bEndpointAddress
-= 8;
184 UICR1
|= 1 << bEndpointAddress
;
188 /* The UDCCR reg contains mask and interrupt status bits,
189 * so using '|=' isn't safe as it may ack an interrupt.
191 #define UDCCR_MASK_BITS (UDCCR_REM | UDCCR_SRM | UDCCR_UDE)
193 static inline void udc_set_mask_UDCCR(int mask
)
195 UDCCR
= (UDCCR
& UDCCR_MASK_BITS
) | (mask
& UDCCR_MASK_BITS
);
198 static inline void udc_clear_mask_UDCCR(int mask
)
200 UDCCR
= (UDCCR
& UDCCR_MASK_BITS
) & ~(mask
& UDCCR_MASK_BITS
);
203 static inline void udc_ack_int_UDCCR(int mask
)
205 /* udccr contains the bits we dont want to change */
206 __u32 udccr
= UDCCR
& UDCCR_MASK_BITS
;
208 UDCCR
= udccr
| (mask
& ~UDCCR_MASK_BITS
);
212 * endpoint enable/disable
214 * we need to verify the descriptors used to enable endpoints. since pxa25x
215 * endpoint configurations are fixed, and are pretty much always enabled,
216 * there's not a lot to manage here.
218 * because pxa25x can't selectively initialize bulk (or interrupt) endpoints,
219 * (resetting endpoint halt and toggle), SET_INTERFACE is unusable except
220 * for a single interface (with only the default altsetting) and for gadget
221 * drivers that don't halt endpoints (not reset by set_interface). that also
222 * means that if you use ISO, you must violate the USB spec rule that all
223 * iso endpoints must be in non-default altsettings.
225 static int pxa25x_ep_enable (struct usb_ep
*_ep
,
226 const struct usb_endpoint_descriptor
*desc
)
228 struct pxa25x_ep
*ep
;
229 struct pxa25x_udc
*dev
;
231 ep
= container_of (_ep
, struct pxa25x_ep
, ep
);
232 if (!_ep
|| !desc
|| ep
->desc
|| _ep
->name
== ep0name
233 || desc
->bDescriptorType
!= USB_DT_ENDPOINT
234 || ep
->bEndpointAddress
!= desc
->bEndpointAddress
235 || ep
->fifo_size
< le16_to_cpu
236 (desc
->wMaxPacketSize
)) {
237 DMSG("%s, bad ep or descriptor\n", __func__
);
241 /* xfer types must match, except that interrupt ~= bulk */
242 if (ep
->bmAttributes
!= desc
->bmAttributes
243 && ep
->bmAttributes
!= USB_ENDPOINT_XFER_BULK
244 && desc
->bmAttributes
!= USB_ENDPOINT_XFER_INT
) {
245 DMSG("%s, %s type mismatch\n", __func__
, _ep
->name
);
249 /* hardware _could_ do smaller, but driver doesn't */
250 if ((desc
->bmAttributes
== USB_ENDPOINT_XFER_BULK
251 && le16_to_cpu (desc
->wMaxPacketSize
)
253 || !desc
->wMaxPacketSize
) {
254 DMSG("%s, bad %s maxpacket\n", __func__
, _ep
->name
);
259 if (!dev
->driver
|| dev
->gadget
.speed
== USB_SPEED_UNKNOWN
) {
260 DMSG("%s, bogus device state\n", __func__
);
267 ep
->ep
.maxpacket
= le16_to_cpu (desc
->wMaxPacketSize
);
269 /* flush fifo (mostly for OUT buffers) */
270 pxa25x_ep_fifo_flush (_ep
);
272 /* ... reset halt state too, if we could ... */
274 DBG(DBG_VERBOSE
, "enabled %s\n", _ep
->name
);
278 static int pxa25x_ep_disable (struct usb_ep
*_ep
)
280 struct pxa25x_ep
*ep
;
283 ep
= container_of (_ep
, struct pxa25x_ep
, ep
);
284 if (!_ep
|| !ep
->desc
) {
285 DMSG("%s, %s not enabled\n", __func__
,
286 _ep
? ep
->ep
.name
: NULL
);
289 local_irq_save(flags
);
291 nuke (ep
, -ESHUTDOWN
);
293 /* flush fifo (mostly for IN buffers) */
294 pxa25x_ep_fifo_flush (_ep
);
299 local_irq_restore(flags
);
300 DBG(DBG_VERBOSE
, "%s disabled\n", _ep
->name
);
304 /*-------------------------------------------------------------------------*/
306 /* for the pxa25x, these can just wrap kmalloc/kfree. gadget drivers
307 * must still pass correctly initialized endpoints, since other controller
308 * drivers may care about how it's currently set up (dma issues etc).
312 * pxa25x_ep_alloc_request - allocate a request data structure
314 static struct usb_request
*
315 pxa25x_ep_alloc_request (struct usb_ep
*_ep
, gfp_t gfp_flags
)
317 struct pxa25x_request
*req
;
319 req
= kzalloc(sizeof(*req
), gfp_flags
);
323 INIT_LIST_HEAD (&req
->queue
);
329 * pxa25x_ep_free_request - deallocate a request data structure
332 pxa25x_ep_free_request (struct usb_ep
*_ep
, struct usb_request
*_req
)
334 struct pxa25x_request
*req
;
336 req
= container_of (_req
, struct pxa25x_request
, req
);
337 WARN_ON(!list_empty (&req
->queue
));
341 /*-------------------------------------------------------------------------*/
344 * done - retire a request; caller blocked irqs
346 static void done(struct pxa25x_ep
*ep
, struct pxa25x_request
*req
, int status
)
348 unsigned stopped
= ep
->stopped
;
350 list_del_init(&req
->queue
);
352 if (likely (req
->req
.status
== -EINPROGRESS
))
353 req
->req
.status
= status
;
355 status
= req
->req
.status
;
357 if (status
&& status
!= -ESHUTDOWN
)
358 DBG(DBG_VERBOSE
, "complete %s req %p stat %d len %u/%u\n",
359 ep
->ep
.name
, &req
->req
, status
,
360 req
->req
.actual
, req
->req
.length
);
362 /* don't modify queue heads during completion callback */
364 req
->req
.complete(&ep
->ep
, &req
->req
);
365 ep
->stopped
= stopped
;
369 static inline void ep0_idle (struct pxa25x_udc
*dev
)
371 dev
->ep0state
= EP0_IDLE
;
375 write_packet(volatile u32
*uddr
, struct pxa25x_request
*req
, unsigned max
)
378 unsigned length
, count
;
380 buf
= req
->req
.buf
+ req
->req
.actual
;
383 /* how big will this packet be? */
384 length
= min(req
->req
.length
- req
->req
.actual
, max
);
385 req
->req
.actual
+= length
;
388 while (likely(count
--))
395 * write to an IN endpoint fifo, as many packets as possible.
396 * irqs will use this to write the rest later.
397 * caller guarantees at least one packet buffer is ready (or a zlp).
400 write_fifo (struct pxa25x_ep
*ep
, struct pxa25x_request
*req
)
404 max
= le16_to_cpu(ep
->desc
->wMaxPacketSize
);
407 int is_last
, is_short
;
409 count
= write_packet(ep
->reg_uddr
, req
, max
);
411 /* last packet is usually short (or a zlp) */
412 if (unlikely (count
!= max
))
413 is_last
= is_short
= 1;
415 if (likely(req
->req
.length
!= req
->req
.actual
)
420 /* interrupt/iso maxpacket may not fill the fifo */
421 is_short
= unlikely (max
< ep
->fifo_size
);
424 DBG(DBG_VERY_NOISY
, "wrote %s %d bytes%s%s %d left %p\n",
426 is_last
? "/L" : "", is_short
? "/S" : "",
427 req
->req
.length
- req
->req
.actual
, req
);
429 /* let loose that packet. maybe try writing another one,
430 * double buffering might work. TSP, TPC, and TFS
431 * bit values are the same for all normal IN endpoints.
433 *ep
->reg_udccs
= UDCCS_BI_TPC
;
435 *ep
->reg_udccs
= UDCCS_BI_TSP
;
437 /* requests complete when all IN data is in the FIFO */
440 if (list_empty(&ep
->queue
))
441 pio_irq_disable (ep
->bEndpointAddress
);
445 // TODO experiment: how robust can fifo mode tweaking be?
446 // double buffering is off in the default fifo mode, which
447 // prevents TFS from being set here.
449 } while (*ep
->reg_udccs
& UDCCS_BI_TFS
);
453 /* caller asserts req->pending (ep0 irq status nyet cleared); starts
454 * ep0 data stage. these chips want very simple state transitions.
457 void ep0start(struct pxa25x_udc
*dev
, u32 flags
, const char *tag
)
459 UDCCS0
= flags
|UDCCS0_SA
|UDCCS0_OPR
;
461 dev
->req_pending
= 0;
462 DBG(DBG_VERY_NOISY
, "%s %s, %02x/%02x\n",
463 __func__
, tag
, UDCCS0
, flags
);
467 write_ep0_fifo (struct pxa25x_ep
*ep
, struct pxa25x_request
*req
)
472 count
= write_packet(&UDDR0
, req
, EP0_FIFO_SIZE
);
473 ep
->dev
->stats
.write
.bytes
+= count
;
475 /* last packet "must be" short (or a zlp) */
476 is_short
= (count
!= EP0_FIFO_SIZE
);
478 DBG(DBG_VERY_NOISY
, "ep0in %d bytes %d left %p\n", count
,
479 req
->req
.length
- req
->req
.actual
, req
);
481 if (unlikely (is_short
)) {
482 if (ep
->dev
->req_pending
)
483 ep0start(ep
->dev
, UDCCS0_IPR
, "short IN");
487 count
= req
->req
.length
;
490 #ifndef CONFIG_ARCH_IXP4XX
492 /* This seems to get rid of lost status irqs in some cases:
493 * host responds quickly, or next request involves config
494 * change automagic, or should have been hidden, or ...
496 * FIXME get rid of all udelays possible...
498 if (count
>= EP0_FIFO_SIZE
) {
501 if ((UDCCS0
& UDCCS0_OPR
) != 0) {
502 /* clear OPR, generate ack */
512 } else if (ep
->dev
->req_pending
)
513 ep0start(ep
->dev
, 0, "IN");
519 * read_fifo - unload packet(s) from the fifo we use for usb OUT
520 * transfers and put them into the request. caller should have made
521 * sure there's at least one packet ready.
523 * returns true if the request completed because of short packet or the
524 * request buffer having filled (and maybe overran till end-of-packet).
527 read_fifo (struct pxa25x_ep
*ep
, struct pxa25x_request
*req
)
532 unsigned bufferspace
, count
, is_short
;
534 /* make sure there's a packet in the FIFO.
535 * UDCCS_{BO,IO}_RPC are all the same bit value.
536 * UDCCS_{BO,IO}_RNE are all the same bit value.
538 udccs
= *ep
->reg_udccs
;
539 if (unlikely ((udccs
& UDCCS_BO_RPC
) == 0))
541 buf
= req
->req
.buf
+ req
->req
.actual
;
543 bufferspace
= req
->req
.length
- req
->req
.actual
;
545 /* read all bytes from this packet */
546 if (likely (udccs
& UDCCS_BO_RNE
)) {
547 count
= 1 + (0x0ff & *ep
->reg_ubcr
);
548 req
->req
.actual
+= min (count
, bufferspace
);
551 is_short
= (count
< ep
->ep
.maxpacket
);
552 DBG(DBG_VERY_NOISY
, "read %s %02x, %d bytes%s req %p %d/%d\n",
553 ep
->ep
.name
, udccs
, count
,
554 is_short
? "/S" : "",
555 req
, req
->req
.actual
, req
->req
.length
);
556 while (likely (count
-- != 0)) {
557 u8 byte
= (u8
) *ep
->reg_uddr
;
559 if (unlikely (bufferspace
== 0)) {
560 /* this happens when the driver's buffer
561 * is smaller than what the host sent.
562 * discard the extra data.
564 if (req
->req
.status
!= -EOVERFLOW
)
565 DMSG("%s overflow %d\n",
567 req
->req
.status
= -EOVERFLOW
;
573 *ep
->reg_udccs
= UDCCS_BO_RPC
;
574 /* RPC/RSP/RNE could now reflect the other packet buffer */
576 /* iso is one request per packet */
577 if (ep
->bmAttributes
== USB_ENDPOINT_XFER_ISOC
) {
578 if (udccs
& UDCCS_IO_ROF
)
579 req
->req
.status
= -EHOSTUNREACH
;
580 /* more like "is_done" */
585 if (is_short
|| req
->req
.actual
== req
->req
.length
) {
587 if (list_empty(&ep
->queue
))
588 pio_irq_disable (ep
->bEndpointAddress
);
592 /* finished that packet. the next one may be waiting... */
598 * special ep0 version of the above. no UBCR0 or double buffering; status
599 * handshaking is magic. most device protocols don't need control-OUT.
600 * CDC vendor commands (and RNDIS), mass storage CB/CBI, and some other
601 * protocols do use them.
604 read_ep0_fifo (struct pxa25x_ep
*ep
, struct pxa25x_request
*req
)
607 unsigned bufferspace
;
609 buf
= req
->req
.buf
+ req
->req
.actual
;
610 bufferspace
= req
->req
.length
- req
->req
.actual
;
612 while (UDCCS0
& UDCCS0_RNE
) {
615 if (unlikely (bufferspace
== 0)) {
616 /* this happens when the driver's buffer
617 * is smaller than what the host sent.
618 * discard the extra data.
620 if (req
->req
.status
!= -EOVERFLOW
)
621 DMSG("%s overflow\n", ep
->ep
.name
);
622 req
->req
.status
= -EOVERFLOW
;
630 UDCCS0
= UDCCS0_OPR
| UDCCS0_IPR
;
633 if (req
->req
.actual
>= req
->req
.length
)
636 /* finished that packet. the next one may be waiting... */
640 /*-------------------------------------------------------------------------*/
643 pxa25x_ep_queue(struct usb_ep
*_ep
, struct usb_request
*_req
, gfp_t gfp_flags
)
645 struct pxa25x_request
*req
;
646 struct pxa25x_ep
*ep
;
647 struct pxa25x_udc
*dev
;
650 req
= container_of(_req
, struct pxa25x_request
, req
);
651 if (unlikely (!_req
|| !_req
->complete
|| !_req
->buf
652 || !list_empty(&req
->queue
))) {
653 DMSG("%s, bad params\n", __func__
);
657 ep
= container_of(_ep
, struct pxa25x_ep
, ep
);
658 if (unlikely (!_ep
|| (!ep
->desc
&& ep
->ep
.name
!= ep0name
))) {
659 DMSG("%s, bad ep\n", __func__
);
664 if (unlikely (!dev
->driver
665 || dev
->gadget
.speed
== USB_SPEED_UNKNOWN
)) {
666 DMSG("%s, bogus device state\n", __func__
);
670 /* iso is always one packet per request, that's the only way
671 * we can report per-packet status. that also helps with dma.
673 if (unlikely (ep
->bmAttributes
== USB_ENDPOINT_XFER_ISOC
674 && req
->req
.length
> le16_to_cpu
675 (ep
->desc
->wMaxPacketSize
)))
678 DBG(DBG_NOISY
, "%s queue req %p, len %d buf %p\n",
679 _ep
->name
, _req
, _req
->length
, _req
->buf
);
681 local_irq_save(flags
);
683 _req
->status
= -EINPROGRESS
;
686 /* kickstart this i/o queue? */
687 if (list_empty(&ep
->queue
) && !ep
->stopped
) {
688 if (ep
->desc
== NULL
/* ep0 */) {
689 unsigned length
= _req
->length
;
691 switch (dev
->ep0state
) {
692 case EP0_IN_DATA_PHASE
:
693 dev
->stats
.write
.ops
++;
694 if (write_ep0_fifo(ep
, req
))
698 case EP0_OUT_DATA_PHASE
:
699 dev
->stats
.read
.ops
++;
701 if (dev
->req_config
) {
702 DBG(DBG_VERBOSE
, "ep0 config ack%s\n",
703 dev
->has_cfr
? "" : " raced");
705 UDCCFR
= UDCCFR_AREN
|UDCCFR_ACM
708 dev
->ep0state
= EP0_END_XFER
;
709 local_irq_restore (flags
);
712 if (dev
->req_pending
)
713 ep0start(dev
, UDCCS0_IPR
, "OUT");
714 if (length
== 0 || ((UDCCS0
& UDCCS0_RNE
) != 0
715 && read_ep0_fifo(ep
, req
))) {
723 DMSG("ep0 i/o, odd state %d\n", dev
->ep0state
);
724 local_irq_restore (flags
);
727 /* can the FIFO can satisfy the request immediately? */
728 } else if ((ep
->bEndpointAddress
& USB_DIR_IN
) != 0) {
729 if ((*ep
->reg_udccs
& UDCCS_BI_TFS
) != 0
730 && write_fifo(ep
, req
))
732 } else if ((*ep
->reg_udccs
& UDCCS_BO_RFS
) != 0
733 && read_fifo(ep
, req
)) {
737 if (likely (req
&& ep
->desc
))
738 pio_irq_enable(ep
->bEndpointAddress
);
741 /* pio or dma irq handler advances the queue. */
742 if (likely(req
!= NULL
))
743 list_add_tail(&req
->queue
, &ep
->queue
);
744 local_irq_restore(flags
);
751 * nuke - dequeue ALL requests
753 static void nuke(struct pxa25x_ep
*ep
, int status
)
755 struct pxa25x_request
*req
;
757 /* called with irqs blocked */
758 while (!list_empty(&ep
->queue
)) {
759 req
= list_entry(ep
->queue
.next
,
760 struct pxa25x_request
,
762 done(ep
, req
, status
);
765 pio_irq_disable (ep
->bEndpointAddress
);
769 /* dequeue JUST ONE request */
770 static int pxa25x_ep_dequeue(struct usb_ep
*_ep
, struct usb_request
*_req
)
772 struct pxa25x_ep
*ep
;
773 struct pxa25x_request
*req
;
776 ep
= container_of(_ep
, struct pxa25x_ep
, ep
);
777 if (!_ep
|| ep
->ep
.name
== ep0name
)
780 local_irq_save(flags
);
782 /* make sure it's actually queued on this endpoint */
783 list_for_each_entry (req
, &ep
->queue
, queue
) {
784 if (&req
->req
== _req
)
787 if (&req
->req
!= _req
) {
788 local_irq_restore(flags
);
792 done(ep
, req
, -ECONNRESET
);
794 local_irq_restore(flags
);
798 /*-------------------------------------------------------------------------*/
800 static int pxa25x_ep_set_halt(struct usb_ep
*_ep
, int value
)
802 struct pxa25x_ep
*ep
;
805 ep
= container_of(_ep
, struct pxa25x_ep
, ep
);
807 || (!ep
->desc
&& ep
->ep
.name
!= ep0name
))
808 || ep
->bmAttributes
== USB_ENDPOINT_XFER_ISOC
) {
809 DMSG("%s, bad ep\n", __func__
);
813 /* this path (reset toggle+halt) is needed to implement
814 * SET_INTERFACE on normal hardware. but it can't be
815 * done from software on the PXA UDC, and the hardware
816 * forgets to do it as part of SET_INTERFACE automagic.
818 DMSG("only host can clear %s halt\n", _ep
->name
);
822 local_irq_save(flags
);
824 if ((ep
->bEndpointAddress
& USB_DIR_IN
) != 0
825 && ((*ep
->reg_udccs
& UDCCS_BI_TFS
) == 0
826 || !list_empty(&ep
->queue
))) {
827 local_irq_restore(flags
);
831 /* FST bit is the same for control, bulk in, bulk out, interrupt in */
832 *ep
->reg_udccs
= UDCCS_BI_FST
|UDCCS_BI_FTF
;
834 /* ep0 needs special care */
836 start_watchdog(ep
->dev
);
837 ep
->dev
->req_pending
= 0;
838 ep
->dev
->ep0state
= EP0_STALL
;
840 /* and bulk/intr endpoints like dropping stalls too */
843 for (i
= 0; i
< 1000; i
+= 20) {
844 if (*ep
->reg_udccs
& UDCCS_BI_SST
)
849 local_irq_restore(flags
);
851 DBG(DBG_VERBOSE
, "%s halt\n", _ep
->name
);
855 static int pxa25x_ep_fifo_status(struct usb_ep
*_ep
)
857 struct pxa25x_ep
*ep
;
859 ep
= container_of(_ep
, struct pxa25x_ep
, ep
);
861 DMSG("%s, bad ep\n", __func__
);
864 /* pxa can't report unclaimed bytes from IN fifos */
865 if ((ep
->bEndpointAddress
& USB_DIR_IN
) != 0)
867 if (ep
->dev
->gadget
.speed
== USB_SPEED_UNKNOWN
868 || (*ep
->reg_udccs
& UDCCS_BO_RFS
) == 0)
871 return (*ep
->reg_ubcr
& 0xfff) + 1;
874 static void pxa25x_ep_fifo_flush(struct usb_ep
*_ep
)
876 struct pxa25x_ep
*ep
;
878 ep
= container_of(_ep
, struct pxa25x_ep
, ep
);
879 if (!_ep
|| ep
->ep
.name
== ep0name
|| !list_empty(&ep
->queue
)) {
880 DMSG("%s, bad ep\n", __func__
);
884 /* toggle and halt bits stay unchanged */
886 /* for OUT, just read and discard the FIFO contents. */
887 if ((ep
->bEndpointAddress
& USB_DIR_IN
) == 0) {
888 while (((*ep
->reg_udccs
) & UDCCS_BO_RNE
) != 0)
889 (void) *ep
->reg_uddr
;
893 /* most IN status is the same, but ISO can't stall */
894 *ep
->reg_udccs
= UDCCS_BI_TPC
|UDCCS_BI_FTF
|UDCCS_BI_TUR
895 | (ep
->bmAttributes
== USB_ENDPOINT_XFER_ISOC
900 static struct usb_ep_ops pxa25x_ep_ops
= {
901 .enable
= pxa25x_ep_enable
,
902 .disable
= pxa25x_ep_disable
,
904 .alloc_request
= pxa25x_ep_alloc_request
,
905 .free_request
= pxa25x_ep_free_request
,
907 .queue
= pxa25x_ep_queue
,
908 .dequeue
= pxa25x_ep_dequeue
,
910 .set_halt
= pxa25x_ep_set_halt
,
911 .fifo_status
= pxa25x_ep_fifo_status
,
912 .fifo_flush
= pxa25x_ep_fifo_flush
,
916 /* ---------------------------------------------------------------------------
917 * device-scoped parts of the api to the usb controller hardware
918 * ---------------------------------------------------------------------------
921 static int pxa25x_udc_get_frame(struct usb_gadget
*_gadget
)
923 return ((UFNRH
& 0x07) << 8) | (UFNRL
& 0xff);
926 static int pxa25x_udc_wakeup(struct usb_gadget
*_gadget
)
928 /* host may not have enabled remote wakeup */
929 if ((UDCCS0
& UDCCS0_DRWF
) == 0)
930 return -EHOSTUNREACH
;
931 udc_set_mask_UDCCR(UDCCR_RSM
);
935 static void stop_activity(struct pxa25x_udc
*, struct usb_gadget_driver
*);
936 static void udc_enable (struct pxa25x_udc
*);
937 static void udc_disable(struct pxa25x_udc
*);
939 /* We disable the UDC -- and its 48 MHz clock -- whenever it's not
942 static int pullup(struct pxa25x_udc
*udc
)
944 int is_active
= udc
->vbus
&& udc
->pullup
&& !udc
->suspended
;
945 DMSG("%s\n", is_active
? "active" : "inactive");
949 /* Enable clock for USB device */
950 clk_enable(udc
->clk
);
955 if (udc
->gadget
.speed
!= USB_SPEED_UNKNOWN
) {
956 DMSG("disconnect %s\n", udc
->driver
957 ? udc
->driver
->driver
.name
959 stop_activity(udc
, udc
->driver
);
962 /* Disable clock for USB device */
963 clk_disable(udc
->clk
);
971 /* VBUS reporting logically comes from a transceiver */
972 static int pxa25x_udc_vbus_session(struct usb_gadget
*_gadget
, int is_active
)
974 struct pxa25x_udc
*udc
;
976 udc
= container_of(_gadget
, struct pxa25x_udc
, gadget
);
977 udc
->vbus
= is_active
;
978 DMSG("vbus %s\n", is_active
? "supplied" : "inactive");
983 /* drivers may have software control over D+ pullup */
984 static int pxa25x_udc_pullup(struct usb_gadget
*_gadget
, int is_active
)
986 struct pxa25x_udc
*udc
;
988 udc
= container_of(_gadget
, struct pxa25x_udc
, gadget
);
990 /* not all boards support pullup control */
991 if (!gpio_is_valid(udc
->mach
->gpio_pullup
) && !udc
->mach
->udc_command
)
994 udc
->pullup
= (is_active
!= 0);
999 /* boards may consume current from VBUS, up to 100-500mA based on config.
1000 * the 500uA suspend ceiling means that exclusively vbus-powered PXA designs
1001 * violate USB specs.
1003 static int pxa25x_udc_vbus_draw(struct usb_gadget
*_gadget
, unsigned mA
)
1005 struct pxa25x_udc
*udc
;
1007 udc
= container_of(_gadget
, struct pxa25x_udc
, gadget
);
1009 if (udc
->transceiver
)
1010 return otg_set_power(udc
->transceiver
, mA
);
1014 static const struct usb_gadget_ops pxa25x_udc_ops
= {
1015 .get_frame
= pxa25x_udc_get_frame
,
1016 .wakeup
= pxa25x_udc_wakeup
,
1017 .vbus_session
= pxa25x_udc_vbus_session
,
1018 .pullup
= pxa25x_udc_pullup
,
1019 .vbus_draw
= pxa25x_udc_vbus_draw
,
1022 /*-------------------------------------------------------------------------*/
1024 #ifdef CONFIG_USB_GADGET_DEBUG_FS
1027 udc_seq_show(struct seq_file
*m
, void *_d
)
1029 struct pxa25x_udc
*dev
= m
->private;
1030 unsigned long flags
;
1034 local_irq_save(flags
);
1036 /* basic device status */
1037 seq_printf(m
, DRIVER_DESC
"\n"
1038 "%s version: %s\nGadget driver: %s\nHost %s\n\n",
1039 driver_name
, DRIVER_VERSION SIZE_STR
"(pio)",
1040 dev
->driver
? dev
->driver
->driver
.name
: "(none)",
1041 dev
->gadget
.speed
== USB_SPEED_FULL
? "full speed" : "disconnected");
1043 /* registers for device and ep0 */
1045 "uicr %02X.%02X, usir %02X.%02x, ufnr %02X.%02X\n",
1046 UICR1
, UICR0
, USIR1
, USIR0
, UFNRH
, UFNRL
);
1050 "udccr %02X =%s%s%s%s%s%s%s%s\n", tmp
,
1051 (tmp
& UDCCR_REM
) ? " rem" : "",
1052 (tmp
& UDCCR_RSTIR
) ? " rstir" : "",
1053 (tmp
& UDCCR_SRM
) ? " srm" : "",
1054 (tmp
& UDCCR_SUSIR
) ? " susir" : "",
1055 (tmp
& UDCCR_RESIR
) ? " resir" : "",
1056 (tmp
& UDCCR_RSM
) ? " rsm" : "",
1057 (tmp
& UDCCR_UDA
) ? " uda" : "",
1058 (tmp
& UDCCR_UDE
) ? " ude" : "");
1062 "udccs0 %02X =%s%s%s%s%s%s%s%s\n", tmp
,
1063 (tmp
& UDCCS0_SA
) ? " sa" : "",
1064 (tmp
& UDCCS0_RNE
) ? " rne" : "",
1065 (tmp
& UDCCS0_FST
) ? " fst" : "",
1066 (tmp
& UDCCS0_SST
) ? " sst" : "",
1067 (tmp
& UDCCS0_DRWF
) ? " dwrf" : "",
1068 (tmp
& UDCCS0_FTF
) ? " ftf" : "",
1069 (tmp
& UDCCS0_IPR
) ? " ipr" : "",
1070 (tmp
& UDCCS0_OPR
) ? " opr" : "");
1075 "udccfr %02X =%s%s\n", tmp
,
1076 (tmp
& UDCCFR_AREN
) ? " aren" : "",
1077 (tmp
& UDCCFR_ACM
) ? " acm" : "");
1080 if (dev
->gadget
.speed
!= USB_SPEED_FULL
|| !dev
->driver
)
1083 seq_printf(m
, "ep0 IN %lu/%lu, OUT %lu/%lu\nirqs %lu\n\n",
1084 dev
->stats
.write
.bytes
, dev
->stats
.write
.ops
,
1085 dev
->stats
.read
.bytes
, dev
->stats
.read
.ops
,
1088 /* dump endpoint queues */
1089 for (i
= 0; i
< PXA_UDC_NUM_ENDPOINTS
; i
++) {
1090 struct pxa25x_ep
*ep
= &dev
->ep
[i
];
1091 struct pxa25x_request
*req
;
1094 const struct usb_endpoint_descriptor
*desc
;
1099 tmp
= *dev
->ep
[i
].reg_udccs
;
1101 "%s max %d %s udccs %02x irqs %lu\n",
1102 ep
->ep
.name
, le16_to_cpu(desc
->wMaxPacketSize
),
1103 "pio", tmp
, ep
->pio_irqs
);
1104 /* TODO translate all five groups of udccs bits! */
1106 } else /* ep0 should only have one transfer queued */
1107 seq_printf(m
, "ep0 max 16 pio irqs %lu\n",
1110 if (list_empty(&ep
->queue
)) {
1111 seq_printf(m
, "\t(nothing queued)\n");
1114 list_for_each_entry(req
, &ep
->queue
, queue
) {
1116 "\treq %p len %d/%d buf %p\n",
1117 &req
->req
, req
->req
.actual
,
1118 req
->req
.length
, req
->req
.buf
);
1123 local_irq_restore(flags
);
1128 udc_debugfs_open(struct inode
*inode
, struct file
*file
)
1130 return single_open(file
, udc_seq_show
, inode
->i_private
);
1133 static const struct file_operations debug_fops
= {
1134 .open
= udc_debugfs_open
,
1136 .llseek
= seq_lseek
,
1137 .release
= single_release
,
1138 .owner
= THIS_MODULE
,
1141 #define create_debug_files(dev) \
1143 dev->debugfs_udc = debugfs_create_file(dev->gadget.name, \
1144 S_IRUGO, NULL, dev, &debug_fops); \
1146 #define remove_debug_files(dev) \
1148 if (dev->debugfs_udc) \
1149 debugfs_remove(dev->debugfs_udc); \
1152 #else /* !CONFIG_USB_GADGET_DEBUG_FILES */
1154 #define create_debug_files(dev) do {} while (0)
1155 #define remove_debug_files(dev) do {} while (0)
1157 #endif /* CONFIG_USB_GADGET_DEBUG_FILES */
1159 /*-------------------------------------------------------------------------*/
1162 * udc_disable - disable USB device controller
1164 static void udc_disable(struct pxa25x_udc
*dev
)
1166 /* block all irqs */
1167 udc_set_mask_UDCCR(UDCCR_SRM
|UDCCR_REM
);
1168 UICR0
= UICR1
= 0xff;
1171 /* if hardware supports it, disconnect from usb */
1174 udc_clear_mask_UDCCR(UDCCR_UDE
);
1177 dev
->gadget
.speed
= USB_SPEED_UNKNOWN
;
1182 * udc_reinit - initialize software state
1184 static void udc_reinit(struct pxa25x_udc
*dev
)
1188 /* device/ep0 records init */
1189 INIT_LIST_HEAD (&dev
->gadget
.ep_list
);
1190 INIT_LIST_HEAD (&dev
->gadget
.ep0
->ep_list
);
1191 dev
->ep0state
= EP0_IDLE
;
1193 /* basic endpoint records init */
1194 for (i
= 0; i
< PXA_UDC_NUM_ENDPOINTS
; i
++) {
1195 struct pxa25x_ep
*ep
= &dev
->ep
[i
];
1198 list_add_tail (&ep
->ep
.ep_list
, &dev
->gadget
.ep_list
);
1202 INIT_LIST_HEAD (&ep
->queue
);
1206 /* the rest was statically initialized, and is read-only */
1209 /* until it's enabled, this UDC should be completely invisible
1212 static void udc_enable (struct pxa25x_udc
*dev
)
1214 udc_clear_mask_UDCCR(UDCCR_UDE
);
1216 /* try to clear these bits before we enable the udc */
1217 udc_ack_int_UDCCR(UDCCR_SUSIR
|/*UDCCR_RSTIR|*/UDCCR_RESIR
);
1220 dev
->gadget
.speed
= USB_SPEED_UNKNOWN
;
1221 dev
->stats
.irqs
= 0;
1224 * sequence taken from chapter 12.5.10, PXA250 AppProcDevManual:
1226 * - if RESET is already in progress, ack interrupt
1227 * - unmask reset interrupt
1229 udc_set_mask_UDCCR(UDCCR_UDE
);
1230 if (!(UDCCR
& UDCCR_UDA
))
1231 udc_ack_int_UDCCR(UDCCR_RSTIR
);
1233 if (dev
->has_cfr
/* UDC_RES2 is defined */) {
1234 /* pxa255 (a0+) can avoid a set_config race that could
1235 * prevent gadget drivers from configuring correctly
1237 UDCCFR
= UDCCFR_ACM
| UDCCFR_MB1
;
1239 /* "USB test mode" for pxa250 errata 40-42 (stepping a0, a1)
1240 * which could result in missing packets and interrupts.
1241 * supposedly one bit per endpoint, controlling whether it
1242 * double buffers or not; ACM/AREN bits fit into the holes.
1243 * zero bits (like USIR0_IRx) disable double buffering.
1249 /* enable suspend/resume and reset irqs */
1250 udc_clear_mask_UDCCR(UDCCR_SRM
| UDCCR_REM
);
1252 /* enable ep0 irqs */
1253 UICR0
&= ~UICR0_IM0
;
1255 /* if hardware supports it, pullup D+ and wait for reset */
1260 /* when a driver is successfully registered, it will receive
1261 * control requests including set_configuration(), which enables
1262 * non-control requests. then usb traffic follows until a
1263 * disconnect is reported. then a host may connect again, or
1264 * the driver might get unbound.
1266 int usb_gadget_probe_driver(struct usb_gadget_driver
*driver
,
1267 int (*bind
)(struct usb_gadget
*))
1269 struct pxa25x_udc
*dev
= the_controller
;
1273 || driver
->speed
< USB_SPEED_FULL
1275 || !driver
->disconnect
1283 /* first hook up the driver ... */
1284 dev
->driver
= driver
;
1285 dev
->gadget
.dev
.driver
= &driver
->driver
;
1288 retval
= device_add (&dev
->gadget
.dev
);
1292 dev
->gadget
.dev
.driver
= NULL
;
1295 retval
= bind(&dev
->gadget
);
1297 DMSG("bind to driver %s --> error %d\n",
1298 driver
->driver
.name
, retval
);
1299 device_del (&dev
->gadget
.dev
);
1303 /* ... then enable host detection and ep0; and we're ready
1304 * for set_configuration as well as eventual disconnect.
1306 DMSG("registered gadget driver '%s'\n", driver
->driver
.name
);
1308 /* connect to bus through transceiver */
1309 if (dev
->transceiver
) {
1310 retval
= otg_set_peripheral(dev
->transceiver
, &dev
->gadget
);
1312 DMSG("can't bind to transceiver\n");
1314 driver
->unbind(&dev
->gadget
);
1325 EXPORT_SYMBOL(usb_gadget_probe_driver
);
1328 stop_activity(struct pxa25x_udc
*dev
, struct usb_gadget_driver
*driver
)
1332 /* don't disconnect drivers more than once */
1333 if (dev
->gadget
.speed
== USB_SPEED_UNKNOWN
)
1335 dev
->gadget
.speed
= USB_SPEED_UNKNOWN
;
1337 /* prevent new request submissions, kill any outstanding requests */
1338 for (i
= 0; i
< PXA_UDC_NUM_ENDPOINTS
; i
++) {
1339 struct pxa25x_ep
*ep
= &dev
->ep
[i
];
1342 nuke(ep
, -ESHUTDOWN
);
1344 del_timer_sync(&dev
->timer
);
1346 /* report disconnect; the driver is already quiesced */
1348 driver
->disconnect(&dev
->gadget
);
1350 /* re-init driver-visible data structures */
1354 int usb_gadget_unregister_driver(struct usb_gadget_driver
*driver
)
1356 struct pxa25x_udc
*dev
= the_controller
;
1360 if (!driver
|| driver
!= dev
->driver
|| !driver
->unbind
)
1363 local_irq_disable();
1366 stop_activity(dev
, driver
);
1369 if (dev
->transceiver
)
1370 (void) otg_set_peripheral(dev
->transceiver
, NULL
);
1372 driver
->unbind(&dev
->gadget
);
1373 dev
->gadget
.dev
.driver
= NULL
;
1376 device_del (&dev
->gadget
.dev
);
1378 DMSG("unregistered gadget driver '%s'\n", driver
->driver
.name
);
1382 EXPORT_SYMBOL(usb_gadget_unregister_driver
);
1385 /*-------------------------------------------------------------------------*/
1387 #ifdef CONFIG_ARCH_LUBBOCK
1389 /* Lubbock has separate connect and disconnect irqs. More typical designs
1390 * use one GPIO as the VBUS IRQ, and another to control the D+ pullup.
1394 lubbock_vbus_irq(int irq
, void *_dev
)
1396 struct pxa25x_udc
*dev
= _dev
;
1401 case LUBBOCK_USB_IRQ
:
1403 disable_irq(LUBBOCK_USB_IRQ
);
1404 enable_irq(LUBBOCK_USB_DISC_IRQ
);
1406 case LUBBOCK_USB_DISC_IRQ
:
1408 disable_irq(LUBBOCK_USB_DISC_IRQ
);
1409 enable_irq(LUBBOCK_USB_IRQ
);
1415 pxa25x_udc_vbus_session(&dev
->gadget
, vbus
);
1422 /*-------------------------------------------------------------------------*/
1424 static inline void clear_ep_state (struct pxa25x_udc
*dev
)
1428 /* hardware SET_{CONFIGURATION,INTERFACE} automagic resets endpoint
1429 * fifos, and pending transactions mustn't be continued in any case.
1431 for (i
= 1; i
< PXA_UDC_NUM_ENDPOINTS
; i
++)
1432 nuke(&dev
->ep
[i
], -ECONNABORTED
);
1435 static void udc_watchdog(unsigned long _dev
)
1437 struct pxa25x_udc
*dev
= (void *)_dev
;
1439 local_irq_disable();
1440 if (dev
->ep0state
== EP0_STALL
1441 && (UDCCS0
& UDCCS0_FST
) == 0
1442 && (UDCCS0
& UDCCS0_SST
) == 0) {
1443 UDCCS0
= UDCCS0_FST
|UDCCS0_FTF
;
1444 DBG(DBG_VERBOSE
, "ep0 re-stall\n");
1445 start_watchdog(dev
);
1450 static void handle_ep0 (struct pxa25x_udc
*dev
)
1452 u32 udccs0
= UDCCS0
;
1453 struct pxa25x_ep
*ep
= &dev
->ep
[0];
1454 struct pxa25x_request
*req
;
1456 struct usb_ctrlrequest r
;
1461 if (list_empty(&ep
->queue
))
1464 req
= list_entry(ep
->queue
.next
, struct pxa25x_request
, queue
);
1466 /* clear stall status */
1467 if (udccs0
& UDCCS0_SST
) {
1469 UDCCS0
= UDCCS0_SST
;
1470 del_timer(&dev
->timer
);
1474 /* previous request unfinished? non-error iff back-to-back ... */
1475 if ((udccs0
& UDCCS0_SA
) != 0 && dev
->ep0state
!= EP0_IDLE
) {
1477 del_timer(&dev
->timer
);
1481 switch (dev
->ep0state
) {
1483 /* late-breaking status? */
1486 /* start control request? */
1487 if (likely((udccs0
& (UDCCS0_OPR
|UDCCS0_SA
|UDCCS0_RNE
))
1488 == (UDCCS0_OPR
|UDCCS0_SA
|UDCCS0_RNE
))) {
1493 /* read SETUP packet */
1494 for (i
= 0; i
< 8; i
++) {
1495 if (unlikely(!(UDCCS0
& UDCCS0_RNE
))) {
1497 DMSG("SETUP %d!\n", i
);
1500 u
.raw
[i
] = (u8
) UDDR0
;
1502 if (unlikely((UDCCS0
& UDCCS0_RNE
) != 0))
1506 DBG(DBG_VERBOSE
, "SETUP %02x.%02x v%04x i%04x l%04x\n",
1507 u
.r
.bRequestType
, u
.r
.bRequest
,
1508 le16_to_cpu(u
.r
.wValue
),
1509 le16_to_cpu(u
.r
.wIndex
),
1510 le16_to_cpu(u
.r
.wLength
));
1512 /* cope with automagic for some standard requests. */
1513 dev
->req_std
= (u
.r
.bRequestType
& USB_TYPE_MASK
)
1514 == USB_TYPE_STANDARD
;
1515 dev
->req_config
= 0;
1516 dev
->req_pending
= 1;
1517 switch (u
.r
.bRequest
) {
1518 /* hardware restricts gadget drivers here! */
1519 case USB_REQ_SET_CONFIGURATION
:
1520 if (u
.r
.bRequestType
== USB_RECIP_DEVICE
) {
1521 /* reflect hardware's automagic
1522 * up to the gadget driver.
1525 dev
->req_config
= 1;
1526 clear_ep_state(dev
);
1527 /* if !has_cfr, there's no synch
1528 * else use AREN (later) not SA|OPR
1529 * USIR0_IR0 acts edge sensitive
1533 /* ... and here, even more ... */
1534 case USB_REQ_SET_INTERFACE
:
1535 if (u
.r
.bRequestType
== USB_RECIP_INTERFACE
) {
1536 /* udc hardware is broken by design:
1537 * - altsetting may only be zero;
1538 * - hw resets all interfaces' eps;
1539 * - ep reset doesn't include halt(?).
1541 DMSG("broken set_interface (%d/%d)\n",
1542 le16_to_cpu(u
.r
.wIndex
),
1543 le16_to_cpu(u
.r
.wValue
));
1547 /* hardware was supposed to hide this */
1548 case USB_REQ_SET_ADDRESS
:
1549 if (u
.r
.bRequestType
== USB_RECIP_DEVICE
) {
1550 ep0start(dev
, 0, "address");
1556 if (u
.r
.bRequestType
& USB_DIR_IN
)
1557 dev
->ep0state
= EP0_IN_DATA_PHASE
;
1559 dev
->ep0state
= EP0_OUT_DATA_PHASE
;
1561 i
= dev
->driver
->setup(&dev
->gadget
, &u
.r
);
1563 /* hardware automagic preventing STALL... */
1564 if (dev
->req_config
) {
1565 /* hardware sometimes neglects to tell
1566 * tell us about config change events,
1567 * so later ones may fail...
1569 WARNING("config change %02x fail %d?\n",
1572 /* TODO experiment: if has_cfr,
1573 * hardware didn't ACK; maybe we
1574 * could actually STALL!
1577 DBG(DBG_VERBOSE
, "protocol STALL, "
1578 "%02x err %d\n", UDCCS0
, i
);
1580 /* the watchdog timer helps deal with cases
1581 * where udc seems to clear FST wrongly, and
1582 * then NAKs instead of STALLing.
1584 ep0start(dev
, UDCCS0_FST
|UDCCS0_FTF
, "stall");
1585 start_watchdog(dev
);
1586 dev
->ep0state
= EP0_STALL
;
1588 /* deferred i/o == no response yet */
1589 } else if (dev
->req_pending
) {
1590 if (likely(dev
->ep0state
== EP0_IN_DATA_PHASE
1591 || dev
->req_std
|| u
.r
.wLength
))
1592 ep0start(dev
, 0, "defer");
1594 ep0start(dev
, UDCCS0_IPR
, "defer/IPR");
1597 /* expect at least one data or status stage irq */
1600 } else if (likely((udccs0
& (UDCCS0_OPR
|UDCCS0_SA
))
1601 == (UDCCS0_OPR
|UDCCS0_SA
))) {
1604 /* pxa210/250 erratum 131 for B0/B1 says RNE lies.
1605 * still observed on a pxa255 a0.
1607 DBG(DBG_VERBOSE
, "e131\n");
1610 /* read SETUP data, but don't trust it too much */
1611 for (i
= 0; i
< 8; i
++)
1612 u
.raw
[i
] = (u8
) UDDR0
;
1613 if ((u
.r
.bRequestType
& USB_RECIP_MASK
)
1616 if (u
.word
[0] == 0 && u
.word
[1] == 0)
1620 /* some random early IRQ:
1623 * - OPR got set, without SA (likely status stage)
1625 UDCCS0
= udccs0
& (UDCCS0_SA
|UDCCS0_OPR
);
1628 case EP0_IN_DATA_PHASE
: /* GET_DESCRIPTOR etc */
1629 if (udccs0
& UDCCS0_OPR
) {
1630 UDCCS0
= UDCCS0_OPR
|UDCCS0_FTF
;
1631 DBG(DBG_VERBOSE
, "ep0in premature status\n");
1635 } else /* irq was IPR clearing */ {
1637 /* this IN packet might finish the request */
1638 (void) write_ep0_fifo(ep
, req
);
1639 } /* else IN token before response was written */
1642 case EP0_OUT_DATA_PHASE
: /* SET_DESCRIPTOR etc */
1643 if (udccs0
& UDCCS0_OPR
) {
1645 /* this OUT packet might finish the request */
1646 if (read_ep0_fifo(ep
, req
))
1648 /* else more OUT packets expected */
1649 } /* else OUT token before read was issued */
1650 } else /* irq was IPR clearing */ {
1651 DBG(DBG_VERBOSE
, "ep0out premature status\n");
1660 /* ack control-IN status (maybe in-zlp was skipped)
1661 * also appears after some config change events.
1663 if (udccs0
& UDCCS0_OPR
)
1664 UDCCS0
= UDCCS0_OPR
;
1668 UDCCS0
= UDCCS0_FST
;
1674 static void handle_ep(struct pxa25x_ep
*ep
)
1676 struct pxa25x_request
*req
;
1677 int is_in
= ep
->bEndpointAddress
& USB_DIR_IN
;
1683 if (likely (!list_empty(&ep
->queue
)))
1684 req
= list_entry(ep
->queue
.next
,
1685 struct pxa25x_request
, queue
);
1689 // TODO check FST handling
1691 udccs
= *ep
->reg_udccs
;
1692 if (unlikely(is_in
)) { /* irq from TPC, SST, or (ISO) TUR */
1694 if (likely(ep
->bmAttributes
== USB_ENDPOINT_XFER_BULK
))
1695 tmp
|= UDCCS_BI_SST
;
1698 *ep
->reg_udccs
= tmp
;
1699 if (req
&& likely ((udccs
& UDCCS_BI_TFS
) != 0))
1700 completed
= write_fifo(ep
, req
);
1702 } else { /* irq from RPC (or for ISO, ROF) */
1703 if (likely(ep
->bmAttributes
== USB_ENDPOINT_XFER_BULK
))
1704 tmp
= UDCCS_BO_SST
| UDCCS_BO_DME
;
1706 tmp
= UDCCS_IO_ROF
| UDCCS_IO_DME
;
1709 *ep
->reg_udccs
= tmp
;
1711 /* fifos can hold packets, ready for reading... */
1713 completed
= read_fifo(ep
, req
);
1715 pio_irq_disable (ep
->bEndpointAddress
);
1718 } while (completed
);
1722 * pxa25x_udc_irq - interrupt handler
1724 * avoid delays in ep0 processing. the control handshaking isn't always
1725 * under software control (pxa250c0 and the pxa255 are better), and delays
1726 * could cause usb protocol errors.
1729 pxa25x_udc_irq(int irq
, void *_dev
)
1731 struct pxa25x_udc
*dev
= _dev
;
1740 /* SUSpend Interrupt Request */
1741 if (unlikely(udccr
& UDCCR_SUSIR
)) {
1742 udc_ack_int_UDCCR(UDCCR_SUSIR
);
1744 DBG(DBG_VERBOSE
, "USB suspend\n");
1746 if (dev
->gadget
.speed
!= USB_SPEED_UNKNOWN
1748 && dev
->driver
->suspend
)
1749 dev
->driver
->suspend(&dev
->gadget
);
1753 /* RESume Interrupt Request */
1754 if (unlikely(udccr
& UDCCR_RESIR
)) {
1755 udc_ack_int_UDCCR(UDCCR_RESIR
);
1757 DBG(DBG_VERBOSE
, "USB resume\n");
1759 if (dev
->gadget
.speed
!= USB_SPEED_UNKNOWN
1761 && dev
->driver
->resume
)
1762 dev
->driver
->resume(&dev
->gadget
);
1765 /* ReSeT Interrupt Request - USB reset */
1766 if (unlikely(udccr
& UDCCR_RSTIR
)) {
1767 udc_ack_int_UDCCR(UDCCR_RSTIR
);
1770 if ((UDCCR
& UDCCR_UDA
) == 0) {
1771 DBG(DBG_VERBOSE
, "USB reset start\n");
1773 /* reset driver and endpoints,
1774 * in case that's not yet done
1776 stop_activity (dev
, dev
->driver
);
1779 DBG(DBG_VERBOSE
, "USB reset end\n");
1780 dev
->gadget
.speed
= USB_SPEED_FULL
;
1781 memset(&dev
->stats
, 0, sizeof dev
->stats
);
1782 /* driver and endpoints are still reset */
1786 u32 usir0
= USIR0
& ~UICR0
;
1787 u32 usir1
= USIR1
& ~UICR1
;
1790 if (unlikely (!usir0
&& !usir1
))
1793 DBG(DBG_VERY_NOISY
, "irq %02x.%02x\n", usir1
, usir0
);
1795 /* control traffic */
1796 if (usir0
& USIR0_IR0
) {
1797 dev
->ep
[0].pio_irqs
++;
1802 /* endpoint data transfers */
1803 for (i
= 0; i
< 8; i
++) {
1806 if (i
&& (usir0
& tmp
)) {
1807 handle_ep(&dev
->ep
[i
]);
1811 #ifndef CONFIG_USB_PXA25X_SMALL
1813 handle_ep(&dev
->ep
[i
+8]);
1821 /* we could also ask for 1 msec SOF (SIR) interrupts */
1827 /*-------------------------------------------------------------------------*/
1829 static void nop_release (struct device
*dev
)
1831 DMSG("%s %s\n", __func__
, dev_name(dev
));
1834 /* this uses load-time allocation and initialization (instead of
1835 * doing it at run-time) to save code, eliminate fault paths, and
1836 * be more obviously correct.
1838 static struct pxa25x_udc memory
= {
1840 .ops
= &pxa25x_udc_ops
,
1841 .ep0
= &memory
.ep
[0].ep
,
1842 .name
= driver_name
,
1844 .init_name
= "gadget",
1845 .release
= nop_release
,
1849 /* control endpoint */
1853 .ops
= &pxa25x_ep_ops
,
1854 .maxpacket
= EP0_FIFO_SIZE
,
1857 .reg_udccs
= &UDCCS0
,
1861 /* first group of endpoints */
1864 .name
= "ep1in-bulk",
1865 .ops
= &pxa25x_ep_ops
,
1866 .maxpacket
= BULK_FIFO_SIZE
,
1869 .fifo_size
= BULK_FIFO_SIZE
,
1870 .bEndpointAddress
= USB_DIR_IN
| 1,
1871 .bmAttributes
= USB_ENDPOINT_XFER_BULK
,
1872 .reg_udccs
= &UDCCS1
,
1877 .name
= "ep2out-bulk",
1878 .ops
= &pxa25x_ep_ops
,
1879 .maxpacket
= BULK_FIFO_SIZE
,
1882 .fifo_size
= BULK_FIFO_SIZE
,
1883 .bEndpointAddress
= 2,
1884 .bmAttributes
= USB_ENDPOINT_XFER_BULK
,
1885 .reg_udccs
= &UDCCS2
,
1889 #ifndef CONFIG_USB_PXA25X_SMALL
1892 .name
= "ep3in-iso",
1893 .ops
= &pxa25x_ep_ops
,
1894 .maxpacket
= ISO_FIFO_SIZE
,
1897 .fifo_size
= ISO_FIFO_SIZE
,
1898 .bEndpointAddress
= USB_DIR_IN
| 3,
1899 .bmAttributes
= USB_ENDPOINT_XFER_ISOC
,
1900 .reg_udccs
= &UDCCS3
,
1905 .name
= "ep4out-iso",
1906 .ops
= &pxa25x_ep_ops
,
1907 .maxpacket
= ISO_FIFO_SIZE
,
1910 .fifo_size
= ISO_FIFO_SIZE
,
1911 .bEndpointAddress
= 4,
1912 .bmAttributes
= USB_ENDPOINT_XFER_ISOC
,
1913 .reg_udccs
= &UDCCS4
,
1919 .name
= "ep5in-int",
1920 .ops
= &pxa25x_ep_ops
,
1921 .maxpacket
= INT_FIFO_SIZE
,
1924 .fifo_size
= INT_FIFO_SIZE
,
1925 .bEndpointAddress
= USB_DIR_IN
| 5,
1926 .bmAttributes
= USB_ENDPOINT_XFER_INT
,
1927 .reg_udccs
= &UDCCS5
,
1931 /* second group of endpoints */
1934 .name
= "ep6in-bulk",
1935 .ops
= &pxa25x_ep_ops
,
1936 .maxpacket
= BULK_FIFO_SIZE
,
1939 .fifo_size
= BULK_FIFO_SIZE
,
1940 .bEndpointAddress
= USB_DIR_IN
| 6,
1941 .bmAttributes
= USB_ENDPOINT_XFER_BULK
,
1942 .reg_udccs
= &UDCCS6
,
1947 .name
= "ep7out-bulk",
1948 .ops
= &pxa25x_ep_ops
,
1949 .maxpacket
= BULK_FIFO_SIZE
,
1952 .fifo_size
= BULK_FIFO_SIZE
,
1953 .bEndpointAddress
= 7,
1954 .bmAttributes
= USB_ENDPOINT_XFER_BULK
,
1955 .reg_udccs
= &UDCCS7
,
1961 .name
= "ep8in-iso",
1962 .ops
= &pxa25x_ep_ops
,
1963 .maxpacket
= ISO_FIFO_SIZE
,
1966 .fifo_size
= ISO_FIFO_SIZE
,
1967 .bEndpointAddress
= USB_DIR_IN
| 8,
1968 .bmAttributes
= USB_ENDPOINT_XFER_ISOC
,
1969 .reg_udccs
= &UDCCS8
,
1974 .name
= "ep9out-iso",
1975 .ops
= &pxa25x_ep_ops
,
1976 .maxpacket
= ISO_FIFO_SIZE
,
1979 .fifo_size
= ISO_FIFO_SIZE
,
1980 .bEndpointAddress
= 9,
1981 .bmAttributes
= USB_ENDPOINT_XFER_ISOC
,
1982 .reg_udccs
= &UDCCS9
,
1988 .name
= "ep10in-int",
1989 .ops
= &pxa25x_ep_ops
,
1990 .maxpacket
= INT_FIFO_SIZE
,
1993 .fifo_size
= INT_FIFO_SIZE
,
1994 .bEndpointAddress
= USB_DIR_IN
| 10,
1995 .bmAttributes
= USB_ENDPOINT_XFER_INT
,
1996 .reg_udccs
= &UDCCS10
,
1997 .reg_uddr
= &UDDR10
,
2000 /* third group of endpoints */
2003 .name
= "ep11in-bulk",
2004 .ops
= &pxa25x_ep_ops
,
2005 .maxpacket
= BULK_FIFO_SIZE
,
2008 .fifo_size
= BULK_FIFO_SIZE
,
2009 .bEndpointAddress
= USB_DIR_IN
| 11,
2010 .bmAttributes
= USB_ENDPOINT_XFER_BULK
,
2011 .reg_udccs
= &UDCCS11
,
2012 .reg_uddr
= &UDDR11
,
2016 .name
= "ep12out-bulk",
2017 .ops
= &pxa25x_ep_ops
,
2018 .maxpacket
= BULK_FIFO_SIZE
,
2021 .fifo_size
= BULK_FIFO_SIZE
,
2022 .bEndpointAddress
= 12,
2023 .bmAttributes
= USB_ENDPOINT_XFER_BULK
,
2024 .reg_udccs
= &UDCCS12
,
2025 .reg_ubcr
= &UBCR12
,
2026 .reg_uddr
= &UDDR12
,
2030 .name
= "ep13in-iso",
2031 .ops
= &pxa25x_ep_ops
,
2032 .maxpacket
= ISO_FIFO_SIZE
,
2035 .fifo_size
= ISO_FIFO_SIZE
,
2036 .bEndpointAddress
= USB_DIR_IN
| 13,
2037 .bmAttributes
= USB_ENDPOINT_XFER_ISOC
,
2038 .reg_udccs
= &UDCCS13
,
2039 .reg_uddr
= &UDDR13
,
2043 .name
= "ep14out-iso",
2044 .ops
= &pxa25x_ep_ops
,
2045 .maxpacket
= ISO_FIFO_SIZE
,
2048 .fifo_size
= ISO_FIFO_SIZE
,
2049 .bEndpointAddress
= 14,
2050 .bmAttributes
= USB_ENDPOINT_XFER_ISOC
,
2051 .reg_udccs
= &UDCCS14
,
2052 .reg_ubcr
= &UBCR14
,
2053 .reg_uddr
= &UDDR14
,
2057 .name
= "ep15in-int",
2058 .ops
= &pxa25x_ep_ops
,
2059 .maxpacket
= INT_FIFO_SIZE
,
2062 .fifo_size
= INT_FIFO_SIZE
,
2063 .bEndpointAddress
= USB_DIR_IN
| 15,
2064 .bmAttributes
= USB_ENDPOINT_XFER_INT
,
2065 .reg_udccs
= &UDCCS15
,
2066 .reg_uddr
= &UDDR15
,
2068 #endif /* !CONFIG_USB_PXA25X_SMALL */
2071 #define CP15R0_VENDOR_MASK 0xffffe000
2073 #if defined(CONFIG_ARCH_PXA)
2074 #define CP15R0_XSCALE_VALUE 0x69052000 /* intel/arm/xscale */
2076 #elif defined(CONFIG_ARCH_IXP4XX)
2077 #define CP15R0_XSCALE_VALUE 0x69054000 /* intel/arm/ixp4xx */
2081 #define CP15R0_PROD_MASK 0x000003f0
2082 #define PXA25x 0x00000100 /* and PXA26x */
2083 #define PXA210 0x00000120
2085 #define CP15R0_REV_MASK 0x0000000f
2087 #define CP15R0_PRODREV_MASK (CP15R0_PROD_MASK | CP15R0_REV_MASK)
2089 #define PXA255_A0 0x00000106 /* or PXA260_B1 */
2090 #define PXA250_C0 0x00000105 /* or PXA26x_B0 */
2091 #define PXA250_B2 0x00000104
2092 #define PXA250_B1 0x00000103 /* or PXA260_A0 */
2093 #define PXA250_B0 0x00000102
2094 #define PXA250_A1 0x00000101
2095 #define PXA250_A0 0x00000100
2097 #define PXA210_C0 0x00000125
2098 #define PXA210_B2 0x00000124
2099 #define PXA210_B1 0x00000123
2100 #define PXA210_B0 0x00000122
2101 #define IXP425_A0 0x000001c1
2102 #define IXP425_B0 0x000001f1
2103 #define IXP465_AD 0x00000200
2106 * probe - binds to the platform device
2108 static int __init
pxa25x_udc_probe(struct platform_device
*pdev
)
2110 struct pxa25x_udc
*dev
= &memory
;
2114 /* insist on Intel/ARM/XScale */
2115 asm("mrc%? p15, 0, %0, c0, c0" : "=r" (chiprev
));
2116 if ((chiprev
& CP15R0_VENDOR_MASK
) != CP15R0_XSCALE_VALUE
) {
2117 pr_err("%s: not XScale!\n", driver_name
);
2121 /* trigger chiprev-specific logic */
2122 switch (chiprev
& CP15R0_PRODREV_MASK
) {
2123 #if defined(CONFIG_ARCH_PXA)
2129 /* A0/A1 "not released"; ep 13, 15 unusable */
2131 case PXA250_B2
: case PXA210_B2
:
2132 case PXA250_B1
: case PXA210_B1
:
2133 case PXA250_B0
: case PXA210_B0
:
2134 /* OUT-DMA is broken ... */
2136 case PXA250_C0
: case PXA210_C0
:
2138 #elif defined(CONFIG_ARCH_IXP4XX)
2146 pr_err("%s: unrecognized processor: %08x\n",
2147 driver_name
, chiprev
);
2148 /* iop3xx, ixp4xx, ... */
2152 irq
= platform_get_irq(pdev
, 0);
2156 dev
->clk
= clk_get(&pdev
->dev
, NULL
);
2157 if (IS_ERR(dev
->clk
)) {
2158 retval
= PTR_ERR(dev
->clk
);
2162 pr_debug("%s: IRQ %d%s%s\n", driver_name
, irq
,
2163 dev
->has_cfr
? "" : " (!cfr)",
2167 /* other non-static parts of init */
2168 dev
->dev
= &pdev
->dev
;
2169 dev
->mach
= pdev
->dev
.platform_data
;
2171 dev
->transceiver
= otg_get_transceiver();
2173 if (gpio_is_valid(dev
->mach
->gpio_pullup
)) {
2174 if ((retval
= gpio_request(dev
->mach
->gpio_pullup
,
2175 "pca25x_udc GPIO PULLUP"))) {
2177 "can't get pullup gpio %d, err: %d\n",
2178 dev
->mach
->gpio_pullup
, retval
);
2179 goto err_gpio_pullup
;
2181 gpio_direction_output(dev
->mach
->gpio_pullup
, 0);
2184 init_timer(&dev
->timer
);
2185 dev
->timer
.function
= udc_watchdog
;
2186 dev
->timer
.data
= (unsigned long) dev
;
2188 device_initialize(&dev
->gadget
.dev
);
2189 dev
->gadget
.dev
.parent
= &pdev
->dev
;
2190 dev
->gadget
.dev
.dma_mask
= pdev
->dev
.dma_mask
;
2192 the_controller
= dev
;
2193 platform_set_drvdata(pdev
, dev
);
2200 /* irq setup after old hardware state is cleaned up */
2201 retval
= request_irq(irq
, pxa25x_udc_irq
,
2202 IRQF_DISABLED
, driver_name
, dev
);
2204 pr_err("%s: can't get irq %d, err %d\n",
2205 driver_name
, irq
, retval
);
2210 #ifdef CONFIG_ARCH_LUBBOCK
2211 if (machine_is_lubbock()) {
2212 retval
= request_irq(LUBBOCK_USB_DISC_IRQ
,
2214 IRQF_DISABLED
| IRQF_SAMPLE_RANDOM
,
2217 pr_err("%s: can't get irq %i, err %d\n",
2218 driver_name
, LUBBOCK_USB_DISC_IRQ
, retval
);
2221 retval
= request_irq(LUBBOCK_USB_IRQ
,
2223 IRQF_DISABLED
| IRQF_SAMPLE_RANDOM
,
2226 pr_err("%s: can't get irq %i, err %d\n",
2227 driver_name
, LUBBOCK_USB_IRQ
, retval
);
2232 create_debug_files(dev
);
2236 #ifdef CONFIG_ARCH_LUBBOCK
2238 free_irq(LUBBOCK_USB_DISC_IRQ
, dev
);
2243 if (gpio_is_valid(dev
->mach
->gpio_pullup
))
2244 gpio_free(dev
->mach
->gpio_pullup
);
2246 if (dev
->transceiver
) {
2247 otg_put_transceiver(dev
->transceiver
);
2248 dev
->transceiver
= NULL
;
2255 static void pxa25x_udc_shutdown(struct platform_device
*_dev
)
2260 static int __exit
pxa25x_udc_remove(struct platform_device
*pdev
)
2262 struct pxa25x_udc
*dev
= platform_get_drvdata(pdev
);
2270 remove_debug_files(dev
);
2273 free_irq(platform_get_irq(pdev
, 0), dev
);
2276 #ifdef CONFIG_ARCH_LUBBOCK
2277 if (machine_is_lubbock()) {
2278 free_irq(LUBBOCK_USB_DISC_IRQ
, dev
);
2279 free_irq(LUBBOCK_USB_IRQ
, dev
);
2282 if (gpio_is_valid(dev
->mach
->gpio_pullup
))
2283 gpio_free(dev
->mach
->gpio_pullup
);
2287 if (dev
->transceiver
) {
2288 otg_put_transceiver(dev
->transceiver
);
2289 dev
->transceiver
= NULL
;
2292 platform_set_drvdata(pdev
, NULL
);
2293 the_controller
= NULL
;
2297 /*-------------------------------------------------------------------------*/
2301 /* USB suspend (controlled by the host) and system suspend (controlled
2302 * by the PXA) don't necessarily work well together. If USB is active,
2303 * the 48 MHz clock is required; so the system can't enter 33 MHz idle
2304 * mode, or any deeper PM saving state.
2306 * For now, we punt and forcibly disconnect from the USB host when PXA
2307 * enters any suspend state. While we're disconnected, we always disable
2308 * the 48MHz USB clock ... allowing PXA sleep and/or 33 MHz idle states.
2309 * Boards without software pullup control shouldn't use those states.
2310 * VBUS IRQs should probably be ignored so that the PXA device just acts
2311 * "dead" to USB hosts until system resume.
2313 static int pxa25x_udc_suspend(struct platform_device
*dev
, pm_message_t state
)
2315 struct pxa25x_udc
*udc
= platform_get_drvdata(dev
);
2316 unsigned long flags
;
2318 if (!gpio_is_valid(udc
->mach
->gpio_pullup
) && !udc
->mach
->udc_command
)
2319 WARNING("USB host won't detect disconnect!\n");
2322 local_irq_save(flags
);
2324 local_irq_restore(flags
);
2329 static int pxa25x_udc_resume(struct platform_device
*dev
)
2331 struct pxa25x_udc
*udc
= platform_get_drvdata(dev
);
2332 unsigned long flags
;
2335 local_irq_save(flags
);
2337 local_irq_restore(flags
);
2343 #define pxa25x_udc_suspend NULL
2344 #define pxa25x_udc_resume NULL
2347 /*-------------------------------------------------------------------------*/
2349 static struct platform_driver udc_driver
= {
2350 .shutdown
= pxa25x_udc_shutdown
,
2351 .remove
= __exit_p(pxa25x_udc_remove
),
2352 .suspend
= pxa25x_udc_suspend
,
2353 .resume
= pxa25x_udc_resume
,
2355 .owner
= THIS_MODULE
,
2356 .name
= "pxa25x-udc",
2360 static int __init
udc_init(void)
2362 pr_info("%s: version %s\n", driver_name
, DRIVER_VERSION
);
2363 return platform_driver_probe(&udc_driver
, pxa25x_udc_probe
);
2365 module_init(udc_init
);
2367 static void __exit
udc_exit(void)
2369 platform_driver_unregister(&udc_driver
);
2371 module_exit(udc_exit
);
2373 MODULE_DESCRIPTION(DRIVER_DESC
);
2374 MODULE_AUTHOR("Frank Becker, Robert Schwebel, David Brownell");
2375 MODULE_LICENSE("GPL");
2376 MODULE_ALIAS("platform:pxa25x-udc");