2 * Copyright (c) 2001-2004 by David Brownell
3 * Copyright (c) 2003 Michal Sojka, for high-speed iso transfers
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
12 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software Foundation,
17 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 /* this file is part of ehci-hcd.c */
22 /*-------------------------------------------------------------------------*/
25 * EHCI scheduled transaction support: interrupt, iso, split iso
26 * These are called "periodic" transactions in the EHCI spec.
28 * Note that for interrupt transfers, the QH/QTD manipulation is shared
29 * with the "asynchronous" transaction support (control/bulk transfers).
30 * The only real difference is in how interrupt transfers are scheduled.
32 * For ISO, we make an "iso_stream" head to serve the same role as a QH.
33 * It keeps track of every ITD (or SITD) that's linked, and holds enough
34 * pre-calculated schedule data to make appending to the queue be quick.
37 static int ehci_get_frame (struct usb_hcd
*hcd
);
39 /*-------------------------------------------------------------------------*/
42 * periodic_next_shadow - return "next" pointer on shadow list
43 * @periodic: host pointer to qh/itd/sitd
44 * @tag: hardware tag for type of this record
46 static union ehci_shadow
*
47 periodic_next_shadow(struct ehci_hcd
*ehci
, union ehci_shadow
*periodic
,
50 switch (hc32_to_cpu(ehci
, tag
)) {
52 return &periodic
->qh
->qh_next
;
54 return &periodic
->fstn
->fstn_next
;
56 return &periodic
->itd
->itd_next
;
59 return &periodic
->sitd
->sitd_next
;
64 shadow_next_periodic(struct ehci_hcd
*ehci
, union ehci_shadow
*periodic
,
67 switch (hc32_to_cpu(ehci
, tag
)) {
68 /* our ehci_shadow.qh is actually software part */
70 return &periodic
->qh
->hw
->hw_next
;
71 /* others are hw parts */
73 return periodic
->hw_next
;
77 /* caller must hold ehci->lock */
78 static void periodic_unlink (struct ehci_hcd
*ehci
, unsigned frame
, void *ptr
)
80 union ehci_shadow
*prev_p
= &ehci
->pshadow
[frame
];
81 __hc32
*hw_p
= &ehci
->periodic
[frame
];
82 union ehci_shadow here
= *prev_p
;
84 /* find predecessor of "ptr"; hw and shadow lists are in sync */
85 while (here
.ptr
&& here
.ptr
!= ptr
) {
86 prev_p
= periodic_next_shadow(ehci
, prev_p
,
87 Q_NEXT_TYPE(ehci
, *hw_p
));
88 hw_p
= shadow_next_periodic(ehci
, &here
,
89 Q_NEXT_TYPE(ehci
, *hw_p
));
92 /* an interrupt entry (at list end) could have been shared */
96 /* update shadow and hardware lists ... the old "next" pointers
97 * from ptr may still be in use, the caller updates them.
99 *prev_p
= *periodic_next_shadow(ehci
, &here
,
100 Q_NEXT_TYPE(ehci
, *hw_p
));
101 *hw_p
= *shadow_next_periodic(ehci
, &here
, Q_NEXT_TYPE(ehci
, *hw_p
));
104 /* how many of the uframe's 125 usecs are allocated? */
105 static unsigned short
106 periodic_usecs (struct ehci_hcd
*ehci
, unsigned frame
, unsigned uframe
)
108 __hc32
*hw_p
= &ehci
->periodic
[frame
];
109 union ehci_shadow
*q
= &ehci
->pshadow
[frame
];
111 struct ehci_qh_hw
*hw
;
114 switch (hc32_to_cpu(ehci
, Q_NEXT_TYPE(ehci
, *hw_p
))) {
117 /* is it in the S-mask? */
118 if (hw
->hw_info2
& cpu_to_hc32(ehci
, 1 << uframe
))
119 usecs
+= q
->qh
->usecs
;
121 if (hw
->hw_info2
& cpu_to_hc32(ehci
,
123 usecs
+= q
->qh
->c_usecs
;
129 /* for "save place" FSTNs, count the relevant INTR
130 * bandwidth from the previous frame
132 if (q
->fstn
->hw_prev
!= EHCI_LIST_END(ehci
)) {
133 ehci_dbg (ehci
, "ignoring FSTN cost ...\n");
135 hw_p
= &q
->fstn
->hw_next
;
136 q
= &q
->fstn
->fstn_next
;
139 if (q
->itd
->hw_transaction
[uframe
])
140 usecs
+= q
->itd
->stream
->usecs
;
141 hw_p
= &q
->itd
->hw_next
;
142 q
= &q
->itd
->itd_next
;
145 /* is it in the S-mask? (count SPLIT, DATA) */
146 if (q
->sitd
->hw_uframe
& cpu_to_hc32(ehci
,
148 if (q
->sitd
->hw_fullspeed_ep
&
149 cpu_to_hc32(ehci
, 1<<31))
150 usecs
+= q
->sitd
->stream
->usecs
;
151 else /* worst case for OUT start-split */
152 usecs
+= HS_USECS_ISO (188);
155 /* ... C-mask? (count CSPLIT, DATA) */
156 if (q
->sitd
->hw_uframe
&
157 cpu_to_hc32(ehci
, 1 << (8 + uframe
))) {
158 /* worst case for IN complete-split */
159 usecs
+= q
->sitd
->stream
->c_usecs
;
162 hw_p
= &q
->sitd
->hw_next
;
163 q
= &q
->sitd
->sitd_next
;
169 ehci_err (ehci
, "uframe %d sched overrun: %d usecs\n",
170 frame
* 8 + uframe
, usecs
);
175 /*-------------------------------------------------------------------------*/
177 static int same_tt (struct usb_device
*dev1
, struct usb_device
*dev2
)
179 if (!dev1
->tt
|| !dev2
->tt
)
181 if (dev1
->tt
!= dev2
->tt
)
184 return dev1
->ttport
== dev2
->ttport
;
189 #ifdef CONFIG_USB_EHCI_TT_NEWSCHED
191 /* Which uframe does the low/fullspeed transfer start in?
193 * The parameter is the mask of ssplits in "H-frame" terms
194 * and this returns the transfer start uframe in "B-frame" terms,
195 * which allows both to match, e.g. a ssplit in "H-frame" uframe 0
196 * will cause a transfer in "B-frame" uframe 0. "B-frames" lag
197 * "H-frames" by 1 uframe. See the EHCI spec sec 4.5 and figure 4.7.
199 static inline unsigned char tt_start_uframe(struct ehci_hcd
*ehci
, __hc32 mask
)
201 unsigned char smask
= QH_SMASK
& hc32_to_cpu(ehci
, mask
);
203 ehci_err(ehci
, "invalid empty smask!\n");
204 /* uframe 7 can't have bw so this will indicate failure */
207 return ffs(smask
) - 1;
210 static const unsigned char
211 max_tt_usecs
[] = { 125, 125, 125, 125, 125, 125, 30, 0 };
213 /* carryover low/fullspeed bandwidth that crosses uframe boundries */
214 static inline void carryover_tt_bandwidth(unsigned short tt_usecs
[8])
217 for (i
=0; i
<7; i
++) {
218 if (max_tt_usecs
[i
] < tt_usecs
[i
]) {
219 tt_usecs
[i
+1] += tt_usecs
[i
] - max_tt_usecs
[i
];
220 tt_usecs
[i
] = max_tt_usecs
[i
];
225 /* How many of the tt's periodic downstream 1000 usecs are allocated?
227 * While this measures the bandwidth in terms of usecs/uframe,
228 * the low/fullspeed bus has no notion of uframes, so any particular
229 * low/fullspeed transfer can "carry over" from one uframe to the next,
230 * since the TT just performs downstream transfers in sequence.
232 * For example two separate 100 usec transfers can start in the same uframe,
233 * and the second one would "carry over" 75 usecs into the next uframe.
237 struct ehci_hcd
*ehci
,
238 struct usb_device
*dev
,
240 unsigned short tt_usecs
[8]
243 __hc32
*hw_p
= &ehci
->periodic
[frame
];
244 union ehci_shadow
*q
= &ehci
->pshadow
[frame
];
247 memset(tt_usecs
, 0, 16);
250 switch (hc32_to_cpu(ehci
, Q_NEXT_TYPE(ehci
, *hw_p
))) {
252 hw_p
= &q
->itd
->hw_next
;
253 q
= &q
->itd
->itd_next
;
256 if (same_tt(dev
, q
->qh
->dev
)) {
257 uf
= tt_start_uframe(ehci
, q
->qh
->hw
->hw_info2
);
258 tt_usecs
[uf
] += q
->qh
->tt_usecs
;
260 hw_p
= &q
->qh
->hw
->hw_next
;
264 if (same_tt(dev
, q
->sitd
->urb
->dev
)) {
265 uf
= tt_start_uframe(ehci
, q
->sitd
->hw_uframe
);
266 tt_usecs
[uf
] += q
->sitd
->stream
->tt_usecs
;
268 hw_p
= &q
->sitd
->hw_next
;
269 q
= &q
->sitd
->sitd_next
;
273 ehci_dbg(ehci
, "ignoring periodic frame %d FSTN\n",
275 hw_p
= &q
->fstn
->hw_next
;
276 q
= &q
->fstn
->fstn_next
;
280 carryover_tt_bandwidth(tt_usecs
);
282 if (max_tt_usecs
[7] < tt_usecs
[7])
283 ehci_err(ehci
, "frame %d tt sched overrun: %d usecs\n",
284 frame
, tt_usecs
[7] - max_tt_usecs
[7]);
288 * Return true if the device's tt's downstream bus is available for a
289 * periodic transfer of the specified length (usecs), starting at the
290 * specified frame/uframe. Note that (as summarized in section 11.19
291 * of the usb 2.0 spec) TTs can buffer multiple transactions for each
294 * The uframe parameter is when the fullspeed/lowspeed transfer
295 * should be executed in "B-frame" terms, which is the same as the
296 * highspeed ssplit's uframe (which is in "H-frame" terms). For example
297 * a ssplit in "H-frame" 0 causes a transfer in "B-frame" 0.
298 * See the EHCI spec sec 4.5 and fig 4.7.
300 * This checks if the full/lowspeed bus, at the specified starting uframe,
301 * has the specified bandwidth available, according to rules listed
302 * in USB 2.0 spec section 11.18.1 fig 11-60.
304 * This does not check if the transfer would exceed the max ssplit
305 * limit of 16, specified in USB 2.0 spec section 11.18.4 requirement #4,
306 * since proper scheduling limits ssplits to less than 16 per uframe.
308 static int tt_available (
309 struct ehci_hcd
*ehci
,
311 struct usb_device
*dev
,
317 if ((period
== 0) || (uframe
>= 7)) /* error */
320 for (; frame
< ehci
->periodic_size
; frame
+= period
) {
321 unsigned short tt_usecs
[8];
323 periodic_tt_usecs (ehci
, dev
, frame
, tt_usecs
);
325 ehci_vdbg(ehci
, "tt frame %d check %d usecs start uframe %d in"
326 " schedule %d/%d/%d/%d/%d/%d/%d/%d\n",
327 frame
, usecs
, uframe
,
328 tt_usecs
[0], tt_usecs
[1], tt_usecs
[2], tt_usecs
[3],
329 tt_usecs
[4], tt_usecs
[5], tt_usecs
[6], tt_usecs
[7]);
331 if (max_tt_usecs
[uframe
] <= tt_usecs
[uframe
]) {
332 ehci_vdbg(ehci
, "frame %d uframe %d fully scheduled\n",
337 /* special case for isoc transfers larger than 125us:
338 * the first and each subsequent fully used uframe
339 * must be empty, so as to not illegally delay
340 * already scheduled transactions
343 int ufs
= (usecs
/ 125);
345 for (i
= uframe
; i
< (uframe
+ ufs
) && i
< 8; i
++)
346 if (0 < tt_usecs
[i
]) {
348 "multi-uframe xfer can't fit "
349 "in frame %d uframe %d\n",
355 tt_usecs
[uframe
] += usecs
;
357 carryover_tt_bandwidth(tt_usecs
);
359 /* fail if the carryover pushed bw past the last uframe's limit */
360 if (max_tt_usecs
[7] < tt_usecs
[7]) {
362 "tt unavailable usecs %d frame %d uframe %d\n",
363 usecs
, frame
, uframe
);
373 /* return true iff the device's transaction translator is available
374 * for a periodic transfer starting at the specified frame, using
375 * all the uframes in the mask.
377 static int tt_no_collision (
378 struct ehci_hcd
*ehci
,
380 struct usb_device
*dev
,
385 if (period
== 0) /* error */
388 /* note bandwidth wastage: split never follows csplit
389 * (different dev or endpoint) until the next uframe.
390 * calling convention doesn't make that distinction.
392 for (; frame
< ehci
->periodic_size
; frame
+= period
) {
393 union ehci_shadow here
;
395 struct ehci_qh_hw
*hw
;
397 here
= ehci
->pshadow
[frame
];
398 type
= Q_NEXT_TYPE(ehci
, ehci
->periodic
[frame
]);
400 switch (hc32_to_cpu(ehci
, type
)) {
402 type
= Q_NEXT_TYPE(ehci
, here
.itd
->hw_next
);
403 here
= here
.itd
->itd_next
;
407 if (same_tt (dev
, here
.qh
->dev
)) {
410 mask
= hc32_to_cpu(ehci
,
412 /* "knows" no gap is needed */
417 type
= Q_NEXT_TYPE(ehci
, hw
->hw_next
);
418 here
= here
.qh
->qh_next
;
421 if (same_tt (dev
, here
.sitd
->urb
->dev
)) {
424 mask
= hc32_to_cpu(ehci
, here
.sitd
426 /* FIXME assumes no gap for IN! */
431 type
= Q_NEXT_TYPE(ehci
, here
.sitd
->hw_next
);
432 here
= here
.sitd
->sitd_next
;
437 "periodic frame %d bogus type %d\n",
441 /* collision or error */
450 #endif /* CONFIG_USB_EHCI_TT_NEWSCHED */
452 /*-------------------------------------------------------------------------*/
454 static int enable_periodic (struct ehci_hcd
*ehci
)
459 if (ehci
->periodic_sched
++)
462 /* did clearing PSE did take effect yet?
463 * takes effect only at frame boundaries...
465 status
= handshake_on_error_set_halt(ehci
, &ehci
->regs
->status
,
466 STS_PSS
, 0, 9 * 125);
470 cmd
= ehci_readl(ehci
, &ehci
->regs
->command
) | CMD_PSE
;
471 ehci_writel(ehci
, cmd
, &ehci
->regs
->command
);
472 /* posted write ... PSS happens later */
473 ehci_to_hcd(ehci
)->state
= HC_STATE_RUNNING
;
475 /* make sure ehci_work scans these */
476 ehci
->next_uframe
= ehci_readl(ehci
, &ehci
->regs
->frame_index
)
477 % (ehci
->periodic_size
<< 3);
478 if (unlikely(ehci
->broken_periodic
))
479 ehci
->last_periodic_enable
= ktime_get_real();
483 static int disable_periodic (struct ehci_hcd
*ehci
)
488 if (--ehci
->periodic_sched
)
491 if (unlikely(ehci
->broken_periodic
)) {
492 /* delay experimentally determined */
493 ktime_t safe
= ktime_add_us(ehci
->last_periodic_enable
, 1000);
494 ktime_t now
= ktime_get_real();
495 s64 delay
= ktime_us_delta(safe
, now
);
497 if (unlikely(delay
> 0))
501 /* did setting PSE not take effect yet?
502 * takes effect only at frame boundaries...
504 status
= handshake_on_error_set_halt(ehci
, &ehci
->regs
->status
,
505 STS_PSS
, STS_PSS
, 9 * 125);
509 cmd
= ehci_readl(ehci
, &ehci
->regs
->command
) & ~CMD_PSE
;
510 ehci_writel(ehci
, cmd
, &ehci
->regs
->command
);
511 /* posted write ... */
513 free_cached_lists(ehci
);
515 ehci
->next_uframe
= -1;
519 /*-------------------------------------------------------------------------*/
521 /* periodic schedule slots have iso tds (normal or split) first, then a
522 * sparse tree for active interrupt transfers.
524 * this just links in a qh; caller guarantees uframe masks are set right.
525 * no FSTN support (yet; ehci 0.96+)
527 static int qh_link_periodic (struct ehci_hcd
*ehci
, struct ehci_qh
*qh
)
530 unsigned period
= qh
->period
;
532 dev_dbg (&qh
->dev
->dev
,
533 "link qh%d-%04x/%p start %d [%d/%d us]\n",
534 period
, hc32_to_cpup(ehci
, &qh
->hw
->hw_info2
)
535 & (QH_CMASK
| QH_SMASK
),
536 qh
, qh
->start
, qh
->usecs
, qh
->c_usecs
);
538 /* high bandwidth, or otherwise every microframe */
542 for (i
= qh
->start
; i
< ehci
->periodic_size
; i
+= period
) {
543 union ehci_shadow
*prev
= &ehci
->pshadow
[i
];
544 __hc32
*hw_p
= &ehci
->periodic
[i
];
545 union ehci_shadow here
= *prev
;
548 /* skip the iso nodes at list head */
550 type
= Q_NEXT_TYPE(ehci
, *hw_p
);
551 if (type
== cpu_to_hc32(ehci
, Q_TYPE_QH
))
553 prev
= periodic_next_shadow(ehci
, prev
, type
);
554 hw_p
= shadow_next_periodic(ehci
, &here
, type
);
558 /* sorting each branch by period (slow-->fast)
559 * enables sharing interior tree nodes
561 while (here
.ptr
&& qh
!= here
.qh
) {
562 if (qh
->period
> here
.qh
->period
)
564 prev
= &here
.qh
->qh_next
;
565 hw_p
= &here
.qh
->hw
->hw_next
;
568 /* link in this qh, unless some earlier pass did that */
572 qh
->hw
->hw_next
= *hw_p
;
575 *hw_p
= QH_NEXT (ehci
, qh
->qh_dma
);
578 qh
->qh_state
= QH_STATE_LINKED
;
582 /* update per-qh bandwidth for usbfs */
583 ehci_to_hcd(ehci
)->self
.bandwidth_allocated
+= qh
->period
584 ? ((qh
->usecs
+ qh
->c_usecs
) / qh
->period
)
587 /* maybe enable periodic schedule processing */
588 return enable_periodic(ehci
);
591 static int qh_unlink_periodic(struct ehci_hcd
*ehci
, struct ehci_qh
*qh
)
597 // IF this isn't high speed
598 // and this qh is active in the current uframe
599 // (and overlay token SplitXstate is false?)
601 // qh->hw_info1 |= cpu_to_hc32(1 << 7 /* "ignore" */);
603 /* high bandwidth, or otherwise part of every microframe */
604 if ((period
= qh
->period
) == 0)
607 for (i
= qh
->start
; i
< ehci
->periodic_size
; i
+= period
)
608 periodic_unlink (ehci
, i
, qh
);
610 /* update per-qh bandwidth for usbfs */
611 ehci_to_hcd(ehci
)->self
.bandwidth_allocated
-= qh
->period
612 ? ((qh
->usecs
+ qh
->c_usecs
) / qh
->period
)
615 dev_dbg (&qh
->dev
->dev
,
616 "unlink qh%d-%04x/%p start %d [%d/%d us]\n",
618 hc32_to_cpup(ehci
, &qh
->hw
->hw_info2
) & (QH_CMASK
| QH_SMASK
),
619 qh
, qh
->start
, qh
->usecs
, qh
->c_usecs
);
621 /* qh->qh_next still "live" to HC */
622 qh
->qh_state
= QH_STATE_UNLINK
;
623 qh
->qh_next
.ptr
= NULL
;
626 /* maybe turn off periodic schedule */
627 return disable_periodic(ehci
);
630 static void intr_deschedule (struct ehci_hcd
*ehci
, struct ehci_qh
*qh
)
633 struct ehci_qh_hw
*hw
= qh
->hw
;
636 /* If the QH isn't linked then there's nothing we can do
637 * unless we were called during a giveback, in which case
638 * qh_completions() has to deal with it.
640 if (qh
->qh_state
!= QH_STATE_LINKED
) {
641 if (qh
->qh_state
== QH_STATE_COMPLETING
)
642 qh
->needs_rescan
= 1;
646 qh_unlink_periodic (ehci
, qh
);
648 /* simple/paranoid: always delay, expecting the HC needs to read
649 * qh->hw_next or finish a writeback after SPLIT/CSPLIT ... and
650 * expect khubd to clean up after any CSPLITs we won't issue.
651 * active high speed queues may need bigger delays...
653 if (list_empty (&qh
->qtd_list
)
654 || (cpu_to_hc32(ehci
, QH_CMASK
)
655 & hw
->hw_info2
) != 0)
658 wait
= 55; /* worst case: 3 * 1024 */
661 qh
->qh_state
= QH_STATE_IDLE
;
662 hw
->hw_next
= EHCI_LIST_END(ehci
);
665 qh_completions(ehci
, qh
);
667 /* reschedule QH iff another request is queued */
668 if (!list_empty(&qh
->qtd_list
) &&
669 HC_IS_RUNNING(ehci_to_hcd(ehci
)->state
)) {
670 rc
= qh_schedule(ehci
, qh
);
672 /* An error here likely indicates handshake failure
673 * or no space left in the schedule. Neither fault
674 * should happen often ...
676 * FIXME kill the now-dysfunctional queued urbs
679 ehci_err(ehci
, "can't reschedule qh %p, err %d\n",
684 /*-------------------------------------------------------------------------*/
686 static int check_period (
687 struct ehci_hcd
*ehci
,
695 /* complete split running into next frame?
696 * given FSTN support, we could sometimes check...
702 * 80% periodic == 100 usec/uframe available
703 * convert "usecs we need" to "max already claimed"
707 /* we "know" 2 and 4 uframe intervals were rejected; so
708 * for period 0, check _every_ microframe in the schedule.
710 if (unlikely (period
== 0)) {
712 for (uframe
= 0; uframe
< 7; uframe
++) {
713 claimed
= periodic_usecs (ehci
, frame
, uframe
);
717 } while ((frame
+= 1) < ehci
->periodic_size
);
719 /* just check the specified uframe, at that period */
722 claimed
= periodic_usecs (ehci
, frame
, uframe
);
725 } while ((frame
+= period
) < ehci
->periodic_size
);
732 static int check_intr_schedule (
733 struct ehci_hcd
*ehci
,
736 const struct ehci_qh
*qh
,
740 int retval
= -ENOSPC
;
743 if (qh
->c_usecs
&& uframe
>= 6) /* FSTN territory? */
746 if (!check_period (ehci
, frame
, uframe
, qh
->period
, qh
->usecs
))
754 #ifdef CONFIG_USB_EHCI_TT_NEWSCHED
755 if (tt_available (ehci
, qh
->period
, qh
->dev
, frame
, uframe
,
759 /* TODO : this may need FSTN for SSPLIT in uframe 5. */
760 for (i
=uframe
+1; i
<8 && i
<uframe
+4; i
++)
761 if (!check_period (ehci
, frame
, i
,
762 qh
->period
, qh
->c_usecs
))
769 *c_maskp
= cpu_to_hc32(ehci
, mask
<< 8);
772 /* Make sure this tt's buffer is also available for CSPLITs.
773 * We pessimize a bit; probably the typical full speed case
774 * doesn't need the second CSPLIT.
776 * NOTE: both SPLIT and CSPLIT could be checked in just
779 mask
= 0x03 << (uframe
+ qh
->gap_uf
);
780 *c_maskp
= cpu_to_hc32(ehci
, mask
<< 8);
783 if (tt_no_collision (ehci
, qh
->period
, qh
->dev
, frame
, mask
)) {
784 if (!check_period (ehci
, frame
, uframe
+ qh
->gap_uf
+ 1,
785 qh
->period
, qh
->c_usecs
))
787 if (!check_period (ehci
, frame
, uframe
+ qh
->gap_uf
,
788 qh
->period
, qh
->c_usecs
))
797 /* "first fit" scheduling policy used the first time through,
798 * or when the previous schedule slot can't be re-used.
800 static int qh_schedule(struct ehci_hcd
*ehci
, struct ehci_qh
*qh
)
805 unsigned frame
; /* 0..(qh->period - 1), or NO_FRAME */
806 struct ehci_qh_hw
*hw
= qh
->hw
;
808 qh_refresh(ehci
, qh
);
809 hw
->hw_next
= EHCI_LIST_END(ehci
);
812 /* reuse the previous schedule slots, if we can */
813 if (frame
< qh
->period
) {
814 uframe
= ffs(hc32_to_cpup(ehci
, &hw
->hw_info2
) & QH_SMASK
);
815 status
= check_intr_schedule (ehci
, frame
, --uframe
,
823 /* else scan the schedule to find a group of slots such that all
824 * uframes have enough periodic bandwidth available.
827 /* "normal" case, uframing flexible except with splits */
831 for (i
= qh
->period
; status
&& i
> 0; --i
) {
832 frame
= ++ehci
->random_frame
% qh
->period
;
833 for (uframe
= 0; uframe
< 8; uframe
++) {
834 status
= check_intr_schedule (ehci
,
842 /* qh->period == 0 means every uframe */
845 status
= check_intr_schedule (ehci
, 0, 0, qh
, &c_mask
);
851 /* reset S-frame and (maybe) C-frame masks */
852 hw
->hw_info2
&= cpu_to_hc32(ehci
, ~(QH_CMASK
| QH_SMASK
));
853 hw
->hw_info2
|= qh
->period
854 ? cpu_to_hc32(ehci
, 1 << uframe
)
855 : cpu_to_hc32(ehci
, QH_SMASK
);
856 hw
->hw_info2
|= c_mask
;
858 ehci_dbg (ehci
, "reused qh %p schedule\n", qh
);
860 /* stuff into the periodic schedule */
861 status
= qh_link_periodic (ehci
, qh
);
866 static int intr_submit (
867 struct ehci_hcd
*ehci
,
869 struct list_head
*qtd_list
,
876 struct list_head empty
;
878 /* get endpoint and transfer/schedule data */
879 epnum
= urb
->ep
->desc
.bEndpointAddress
;
881 spin_lock_irqsave (&ehci
->lock
, flags
);
883 if (unlikely(!HCD_HW_ACCESSIBLE(ehci_to_hcd(ehci
)))) {
885 goto done_not_linked
;
887 status
= usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci
), urb
);
888 if (unlikely(status
))
889 goto done_not_linked
;
891 /* get qh and force any scheduling errors */
892 INIT_LIST_HEAD (&empty
);
893 qh
= qh_append_tds(ehci
, urb
, &empty
, epnum
, &urb
->ep
->hcpriv
);
898 if (qh
->qh_state
== QH_STATE_IDLE
) {
899 if ((status
= qh_schedule (ehci
, qh
)) != 0)
903 /* then queue the urb's tds to the qh */
904 qh
= qh_append_tds(ehci
, urb
, qtd_list
, epnum
, &urb
->ep
->hcpriv
);
907 /* ... update usbfs periodic stats */
908 ehci_to_hcd(ehci
)->self
.bandwidth_int_reqs
++;
911 if (unlikely(status
))
912 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci
), urb
);
914 spin_unlock_irqrestore (&ehci
->lock
, flags
);
916 qtd_list_free (ehci
, urb
, qtd_list
);
921 /*-------------------------------------------------------------------------*/
923 /* ehci_iso_stream ops work with both ITD and SITD */
925 static struct ehci_iso_stream
*
926 iso_stream_alloc (gfp_t mem_flags
)
928 struct ehci_iso_stream
*stream
;
930 stream
= kzalloc(sizeof *stream
, mem_flags
);
931 if (likely (stream
!= NULL
)) {
932 INIT_LIST_HEAD(&stream
->td_list
);
933 INIT_LIST_HEAD(&stream
->free_list
);
934 stream
->next_uframe
= -1;
935 stream
->refcount
= 1;
942 struct ehci_hcd
*ehci
,
943 struct ehci_iso_stream
*stream
,
944 struct usb_device
*dev
,
949 static const u8 smask_out
[] = { 0x01, 0x03, 0x07, 0x0f, 0x1f, 0x3f };
952 unsigned epnum
, maxp
;
957 * this might be a "high bandwidth" highspeed endpoint,
958 * as encoded in the ep descriptor's wMaxPacket field
960 epnum
= usb_pipeendpoint (pipe
);
961 is_input
= usb_pipein (pipe
) ? USB_DIR_IN
: 0;
962 maxp
= usb_maxpacket(dev
, pipe
, !is_input
);
969 /* knows about ITD vs SITD */
970 if (dev
->speed
== USB_SPEED_HIGH
) {
971 unsigned multi
= hb_mult(maxp
);
973 stream
->highspeed
= 1;
975 maxp
= max_packet(maxp
);
979 stream
->buf0
= cpu_to_hc32(ehci
, (epnum
<< 8) | dev
->devnum
);
980 stream
->buf1
= cpu_to_hc32(ehci
, buf1
);
981 stream
->buf2
= cpu_to_hc32(ehci
, multi
);
983 /* usbfs wants to report the average usecs per frame tied up
984 * when transfers on this endpoint are scheduled ...
986 stream
->usecs
= HS_USECS_ISO (maxp
);
987 bandwidth
= stream
->usecs
* 8;
988 bandwidth
/= interval
;
995 addr
= dev
->ttport
<< 24;
996 if (!ehci_is_TDI(ehci
)
998 ehci_to_hcd(ehci
)->self
.root_hub
))
999 addr
|= dev
->tt
->hub
->devnum
<< 16;
1001 addr
|= dev
->devnum
;
1002 stream
->usecs
= HS_USECS_ISO (maxp
);
1003 think_time
= dev
->tt
? dev
->tt
->think_time
: 0;
1004 stream
->tt_usecs
= NS_TO_US (think_time
+ usb_calc_bus_time (
1005 dev
->speed
, is_input
, 1, maxp
));
1006 hs_transfers
= max (1u, (maxp
+ 187) / 188);
1011 stream
->c_usecs
= stream
->usecs
;
1012 stream
->usecs
= HS_USECS_ISO (1);
1013 stream
->raw_mask
= 1;
1015 /* c-mask as specified in USB 2.0 11.18.4 3.c */
1016 tmp
= (1 << (hs_transfers
+ 2)) - 1;
1017 stream
->raw_mask
|= tmp
<< (8 + 2);
1019 stream
->raw_mask
= smask_out
[hs_transfers
- 1];
1020 bandwidth
= stream
->usecs
+ stream
->c_usecs
;
1021 bandwidth
/= interval
<< 3;
1023 /* stream->splits gets created from raw_mask later */
1024 stream
->address
= cpu_to_hc32(ehci
, addr
);
1026 stream
->bandwidth
= bandwidth
;
1030 stream
->bEndpointAddress
= is_input
| epnum
;
1031 stream
->interval
= interval
;
1032 stream
->maxp
= maxp
;
1036 iso_stream_put(struct ehci_hcd
*ehci
, struct ehci_iso_stream
*stream
)
1040 /* free whenever just a dev->ep reference remains.
1041 * not like a QH -- no persistent state (toggle, halt)
1043 if (stream
->refcount
== 1) {
1046 // BUG_ON (!list_empty(&stream->td_list));
1048 while (!list_empty (&stream
->free_list
)) {
1049 struct list_head
*entry
;
1051 entry
= stream
->free_list
.next
;
1054 /* knows about ITD vs SITD */
1055 if (stream
->highspeed
) {
1056 struct ehci_itd
*itd
;
1058 itd
= list_entry (entry
, struct ehci_itd
,
1060 dma_pool_free (ehci
->itd_pool
, itd
,
1063 struct ehci_sitd
*sitd
;
1065 sitd
= list_entry (entry
, struct ehci_sitd
,
1067 dma_pool_free (ehci
->sitd_pool
, sitd
,
1072 is_in
= (stream
->bEndpointAddress
& USB_DIR_IN
) ? 0x10 : 0;
1073 stream
->bEndpointAddress
&= 0x0f;
1075 stream
->ep
->hcpriv
= NULL
;
1081 static inline struct ehci_iso_stream
*
1082 iso_stream_get (struct ehci_iso_stream
*stream
)
1084 if (likely (stream
!= NULL
))
1089 static struct ehci_iso_stream
*
1090 iso_stream_find (struct ehci_hcd
*ehci
, struct urb
*urb
)
1093 struct ehci_iso_stream
*stream
;
1094 struct usb_host_endpoint
*ep
;
1095 unsigned long flags
;
1097 epnum
= usb_pipeendpoint (urb
->pipe
);
1098 if (usb_pipein(urb
->pipe
))
1099 ep
= urb
->dev
->ep_in
[epnum
];
1101 ep
= urb
->dev
->ep_out
[epnum
];
1103 spin_lock_irqsave (&ehci
->lock
, flags
);
1104 stream
= ep
->hcpriv
;
1106 if (unlikely (stream
== NULL
)) {
1107 stream
= iso_stream_alloc(GFP_ATOMIC
);
1108 if (likely (stream
!= NULL
)) {
1109 /* dev->ep owns the initial refcount */
1110 ep
->hcpriv
= stream
;
1112 iso_stream_init(ehci
, stream
, urb
->dev
, urb
->pipe
,
1116 /* if dev->ep [epnum] is a QH, hw is set */
1117 } else if (unlikely (stream
->hw
!= NULL
)) {
1118 ehci_dbg (ehci
, "dev %s ep%d%s, not iso??\n",
1119 urb
->dev
->devpath
, epnum
,
1120 usb_pipein(urb
->pipe
) ? "in" : "out");
1124 /* caller guarantees an eventual matching iso_stream_put */
1125 stream
= iso_stream_get (stream
);
1127 spin_unlock_irqrestore (&ehci
->lock
, flags
);
1131 /*-------------------------------------------------------------------------*/
1133 /* ehci_iso_sched ops can be ITD-only or SITD-only */
1135 static struct ehci_iso_sched
*
1136 iso_sched_alloc (unsigned packets
, gfp_t mem_flags
)
1138 struct ehci_iso_sched
*iso_sched
;
1139 int size
= sizeof *iso_sched
;
1141 size
+= packets
* sizeof (struct ehci_iso_packet
);
1142 iso_sched
= kzalloc(size
, mem_flags
);
1143 if (likely (iso_sched
!= NULL
)) {
1144 INIT_LIST_HEAD (&iso_sched
->td_list
);
1151 struct ehci_hcd
*ehci
,
1152 struct ehci_iso_sched
*iso_sched
,
1153 struct ehci_iso_stream
*stream
,
1158 dma_addr_t dma
= urb
->transfer_dma
;
1160 /* how many uframes are needed for these transfers */
1161 iso_sched
->span
= urb
->number_of_packets
* stream
->interval
;
1163 /* figure out per-uframe itd fields that we'll need later
1164 * when we fit new itds into the schedule.
1166 for (i
= 0; i
< urb
->number_of_packets
; i
++) {
1167 struct ehci_iso_packet
*uframe
= &iso_sched
->packet
[i
];
1172 length
= urb
->iso_frame_desc
[i
].length
;
1173 buf
= dma
+ urb
->iso_frame_desc
[i
].offset
;
1175 trans
= EHCI_ISOC_ACTIVE
;
1176 trans
|= buf
& 0x0fff;
1177 if (unlikely (((i
+ 1) == urb
->number_of_packets
))
1178 && !(urb
->transfer_flags
& URB_NO_INTERRUPT
))
1179 trans
|= EHCI_ITD_IOC
;
1180 trans
|= length
<< 16;
1181 uframe
->transaction
= cpu_to_hc32(ehci
, trans
);
1183 /* might need to cross a buffer page within a uframe */
1184 uframe
->bufp
= (buf
& ~(u64
)0x0fff);
1186 if (unlikely ((uframe
->bufp
!= (buf
& ~(u64
)0x0fff))))
1193 struct ehci_iso_stream
*stream
,
1194 struct ehci_iso_sched
*iso_sched
1199 // caller must hold ehci->lock!
1200 list_splice (&iso_sched
->td_list
, &stream
->free_list
);
1205 itd_urb_transaction (
1206 struct ehci_iso_stream
*stream
,
1207 struct ehci_hcd
*ehci
,
1212 struct ehci_itd
*itd
;
1216 struct ehci_iso_sched
*sched
;
1217 unsigned long flags
;
1219 sched
= iso_sched_alloc (urb
->number_of_packets
, mem_flags
);
1220 if (unlikely (sched
== NULL
))
1223 itd_sched_init(ehci
, sched
, stream
, urb
);
1225 if (urb
->interval
< 8)
1226 num_itds
= 1 + (sched
->span
+ 7) / 8;
1228 num_itds
= urb
->number_of_packets
;
1230 /* allocate/init ITDs */
1231 spin_lock_irqsave (&ehci
->lock
, flags
);
1232 for (i
= 0; i
< num_itds
; i
++) {
1234 /* free_list.next might be cache-hot ... but maybe
1235 * the HC caches it too. avoid that issue for now.
1238 /* prefer previously-allocated itds */
1239 if (likely (!list_empty(&stream
->free_list
))) {
1240 itd
= list_entry (stream
->free_list
.prev
,
1241 struct ehci_itd
, itd_list
);
1242 list_del (&itd
->itd_list
);
1243 itd_dma
= itd
->itd_dma
;
1245 spin_unlock_irqrestore (&ehci
->lock
, flags
);
1246 itd
= dma_pool_alloc (ehci
->itd_pool
, mem_flags
,
1248 spin_lock_irqsave (&ehci
->lock
, flags
);
1250 iso_sched_free(stream
, sched
);
1251 spin_unlock_irqrestore(&ehci
->lock
, flags
);
1256 memset (itd
, 0, sizeof *itd
);
1257 itd
->itd_dma
= itd_dma
;
1258 list_add (&itd
->itd_list
, &sched
->td_list
);
1260 spin_unlock_irqrestore (&ehci
->lock
, flags
);
1262 /* temporarily store schedule info in hcpriv */
1263 urb
->hcpriv
= sched
;
1264 urb
->error_count
= 0;
1268 /*-------------------------------------------------------------------------*/
1272 struct ehci_hcd
*ehci
,
1281 /* can't commit more than 80% periodic == 100 usec */
1282 if (periodic_usecs (ehci
, uframe
>> 3, uframe
& 0x7)
1286 /* we know urb->interval is 2^N uframes */
1288 } while (uframe
< mod
);
1294 struct ehci_hcd
*ehci
,
1296 struct ehci_iso_stream
*stream
,
1298 struct ehci_iso_sched
*sched
,
1305 mask
= stream
->raw_mask
<< (uframe
& 7);
1307 /* for IN, don't wrap CSPLIT into the next frame */
1311 /* this multi-pass logic is simple, but performance may
1312 * suffer when the schedule data isn't cached.
1315 /* check bandwidth */
1316 uframe
%= period_uframes
;
1320 frame
= uframe
>> 3;
1323 #ifdef CONFIG_USB_EHCI_TT_NEWSCHED
1324 /* The tt's fullspeed bus bandwidth must be available.
1325 * tt_available scheduling guarantees 10+% for control/bulk.
1327 if (!tt_available (ehci
, period_uframes
<< 3,
1328 stream
->udev
, frame
, uf
, stream
->tt_usecs
))
1331 /* tt must be idle for start(s), any gap, and csplit.
1332 * assume scheduling slop leaves 10+% for control/bulk.
1334 if (!tt_no_collision (ehci
, period_uframes
<< 3,
1335 stream
->udev
, frame
, mask
))
1339 /* check starts (OUT uses more than one) */
1340 max_used
= 100 - stream
->usecs
;
1341 for (tmp
= stream
->raw_mask
& 0xff; tmp
; tmp
>>= 1, uf
++) {
1342 if (periodic_usecs (ehci
, frame
, uf
) > max_used
)
1346 /* for IN, check CSPLIT */
1347 if (stream
->c_usecs
) {
1349 max_used
= 100 - stream
->c_usecs
;
1353 if ((stream
->raw_mask
& tmp
) == 0)
1355 if (periodic_usecs (ehci
, frame
, uf
)
1361 /* we know urb->interval is 2^N uframes */
1362 uframe
+= period_uframes
;
1363 } while (uframe
< mod
);
1365 stream
->splits
= cpu_to_hc32(ehci
, stream
->raw_mask
<< (uframe
& 7));
1370 * This scheduler plans almost as far into the future as it has actual
1371 * periodic schedule slots. (Affected by TUNE_FLS, which defaults to
1372 * "as small as possible" to be cache-friendlier.) That limits the size
1373 * transfers you can stream reliably; avoid more than 64 msec per urb.
1374 * Also avoid queue depths of less than ehci's worst irq latency (affected
1375 * by the per-urb URB_NO_INTERRUPT hint, the log2_irq_thresh module parameter,
1376 * and other factors); or more than about 230 msec total (for portability,
1377 * given EHCI_TUNE_FLS and the slop). Or, write a smarter scheduler!
1380 #define SCHEDULE_SLOP 80 /* microframes */
1383 iso_stream_schedule (
1384 struct ehci_hcd
*ehci
,
1386 struct ehci_iso_stream
*stream
1389 u32 now
, next
, start
, period
, span
;
1391 unsigned mod
= ehci
->periodic_size
<< 3;
1392 struct ehci_iso_sched
*sched
= urb
->hcpriv
;
1394 period
= urb
->interval
;
1396 if (!stream
->highspeed
) {
1401 if (span
> mod
- SCHEDULE_SLOP
) {
1402 ehci_dbg (ehci
, "iso request %p too long\n", urb
);
1407 now
= ehci_readl(ehci
, &ehci
->regs
->frame_index
) & (mod
- 1);
1409 /* Typical case: reuse current schedule, stream is still active.
1410 * Hopefully there are no gaps from the host falling behind
1411 * (irq delays etc), but if there are we'll take the next
1412 * slot in the schedule, implicitly assuming URB_ISO_ASAP.
1414 if (likely (!list_empty (&stream
->td_list
))) {
1417 /* For high speed devices, allow scheduling within the
1418 * isochronous scheduling threshold. For full speed devices
1419 * and Intel PCI-based controllers, don't (work around for
1422 if (!stream
->highspeed
&& ehci
->fs_i_thresh
)
1423 next
= now
+ ehci
->i_thresh
;
1427 /* Fell behind (by up to twice the slop amount)?
1428 * We decide based on the time of the last currently-scheduled
1429 * slot, not the time of the next available slot.
1431 excess
= (stream
->next_uframe
- period
- next
) & (mod
- 1);
1432 if (excess
>= mod
- 2 * SCHEDULE_SLOP
)
1433 start
= next
+ excess
- mod
+ period
*
1434 DIV_ROUND_UP(mod
- excess
, period
);
1436 start
= next
+ excess
+ period
;
1437 if (start
- now
>= mod
) {
1438 ehci_dbg(ehci
, "request %p would overflow (%d+%d >= %d)\n",
1439 urb
, start
- now
- period
, period
,
1446 /* need to schedule; when's the next (u)frame we could start?
1447 * this is bigger than ehci->i_thresh allows; scheduling itself
1448 * isn't free, the slop should handle reasonably slow cpus. it
1449 * can also help high bandwidth if the dma and irq loads don't
1450 * jump until after the queue is primed.
1453 start
= SCHEDULE_SLOP
+ (now
& ~0x07);
1455 /* NOTE: assumes URB_ISO_ASAP, to limit complexity/bugs */
1457 /* find a uframe slot with enough bandwidth */
1458 next
= start
+ period
;
1459 for (; start
< next
; start
++) {
1461 /* check schedule: enough space? */
1462 if (stream
->highspeed
) {
1463 if (itd_slot_ok(ehci
, mod
, start
,
1464 stream
->usecs
, period
))
1467 if ((start
% 8) >= 6)
1469 if (sitd_slot_ok(ehci
, mod
, stream
,
1470 start
, sched
, period
))
1475 /* no room in the schedule */
1476 if (start
== next
) {
1477 ehci_dbg(ehci
, "iso resched full %p (now %d max %d)\n",
1478 urb
, now
, now
+ mod
);
1484 /* Tried to schedule too far into the future? */
1485 if (unlikely(start
- now
+ span
- period
1486 >= mod
- 2 * SCHEDULE_SLOP
)) {
1487 ehci_dbg(ehci
, "request %p would overflow (%d+%d >= %d)\n",
1488 urb
, start
- now
, span
- period
,
1489 mod
- 2 * SCHEDULE_SLOP
);
1494 stream
->next_uframe
= start
& (mod
- 1);
1496 /* report high speed start in uframes; full speed, in frames */
1497 urb
->start_frame
= stream
->next_uframe
;
1498 if (!stream
->highspeed
)
1499 urb
->start_frame
>>= 3;
1503 iso_sched_free(stream
, sched
);
1508 /*-------------------------------------------------------------------------*/
1511 itd_init(struct ehci_hcd
*ehci
, struct ehci_iso_stream
*stream
,
1512 struct ehci_itd
*itd
)
1516 /* it's been recently zeroed */
1517 itd
->hw_next
= EHCI_LIST_END(ehci
);
1518 itd
->hw_bufp
[0] = stream
->buf0
;
1519 itd
->hw_bufp
[1] = stream
->buf1
;
1520 itd
->hw_bufp
[2] = stream
->buf2
;
1522 for (i
= 0; i
< 8; i
++)
1525 /* All other fields are filled when scheduling */
1530 struct ehci_hcd
*ehci
,
1531 struct ehci_itd
*itd
,
1532 struct ehci_iso_sched
*iso_sched
,
1537 struct ehci_iso_packet
*uf
= &iso_sched
->packet
[index
];
1538 unsigned pg
= itd
->pg
;
1540 // BUG_ON (pg == 6 && uf->cross);
1543 itd
->index
[uframe
] = index
;
1545 itd
->hw_transaction
[uframe
] = uf
->transaction
;
1546 itd
->hw_transaction
[uframe
] |= cpu_to_hc32(ehci
, pg
<< 12);
1547 itd
->hw_bufp
[pg
] |= cpu_to_hc32(ehci
, uf
->bufp
& ~(u32
)0);
1548 itd
->hw_bufp_hi
[pg
] |= cpu_to_hc32(ehci
, (u32
)(uf
->bufp
>> 32));
1550 /* iso_frame_desc[].offset must be strictly increasing */
1551 if (unlikely (uf
->cross
)) {
1552 u64 bufp
= uf
->bufp
+ 4096;
1555 itd
->hw_bufp
[pg
] |= cpu_to_hc32(ehci
, bufp
& ~(u32
)0);
1556 itd
->hw_bufp_hi
[pg
] |= cpu_to_hc32(ehci
, (u32
)(bufp
>> 32));
1561 itd_link (struct ehci_hcd
*ehci
, unsigned frame
, struct ehci_itd
*itd
)
1563 union ehci_shadow
*prev
= &ehci
->pshadow
[frame
];
1564 __hc32
*hw_p
= &ehci
->periodic
[frame
];
1565 union ehci_shadow here
= *prev
;
1568 /* skip any iso nodes which might belong to previous microframes */
1570 type
= Q_NEXT_TYPE(ehci
, *hw_p
);
1571 if (type
== cpu_to_hc32(ehci
, Q_TYPE_QH
))
1573 prev
= periodic_next_shadow(ehci
, prev
, type
);
1574 hw_p
= shadow_next_periodic(ehci
, &here
, type
);
1578 itd
->itd_next
= here
;
1579 itd
->hw_next
= *hw_p
;
1583 *hw_p
= cpu_to_hc32(ehci
, itd
->itd_dma
| Q_TYPE_ITD
);
1586 /* fit urb's itds into the selected schedule slot; activate as needed */
1589 struct ehci_hcd
*ehci
,
1592 struct ehci_iso_stream
*stream
1596 unsigned next_uframe
, uframe
, frame
;
1597 struct ehci_iso_sched
*iso_sched
= urb
->hcpriv
;
1598 struct ehci_itd
*itd
;
1600 next_uframe
= stream
->next_uframe
& (mod
- 1);
1602 if (unlikely (list_empty(&stream
->td_list
))) {
1603 ehci_to_hcd(ehci
)->self
.bandwidth_allocated
1604 += stream
->bandwidth
;
1606 "schedule devp %s ep%d%s-iso period %d start %d.%d\n",
1607 urb
->dev
->devpath
, stream
->bEndpointAddress
& 0x0f,
1608 (stream
->bEndpointAddress
& USB_DIR_IN
) ? "in" : "out",
1610 next_uframe
>> 3, next_uframe
& 0x7);
1612 ehci_to_hcd(ehci
)->self
.bandwidth_isoc_reqs
++;
1614 /* fill iTDs uframe by uframe */
1615 for (packet
= 0, itd
= NULL
; packet
< urb
->number_of_packets
; ) {
1617 /* ASSERT: we have all necessary itds */
1618 // BUG_ON (list_empty (&iso_sched->td_list));
1620 /* ASSERT: no itds for this endpoint in this uframe */
1622 itd
= list_entry (iso_sched
->td_list
.next
,
1623 struct ehci_itd
, itd_list
);
1624 list_move_tail (&itd
->itd_list
, &stream
->td_list
);
1625 itd
->stream
= iso_stream_get (stream
);
1627 itd_init (ehci
, stream
, itd
);
1630 uframe
= next_uframe
& 0x07;
1631 frame
= next_uframe
>> 3;
1633 itd_patch(ehci
, itd
, iso_sched
, packet
, uframe
);
1635 next_uframe
+= stream
->interval
;
1636 next_uframe
&= mod
- 1;
1639 /* link completed itds into the schedule */
1640 if (((next_uframe
>> 3) != frame
)
1641 || packet
== urb
->number_of_packets
) {
1642 itd_link(ehci
, frame
& (ehci
->periodic_size
- 1), itd
);
1646 stream
->next_uframe
= next_uframe
;
1648 /* don't need that schedule data any more */
1649 iso_sched_free (stream
, iso_sched
);
1652 timer_action (ehci
, TIMER_IO_WATCHDOG
);
1653 return enable_periodic(ehci
);
1656 #define ISO_ERRS (EHCI_ISOC_BUF_ERR | EHCI_ISOC_BABBLE | EHCI_ISOC_XACTERR)
1658 /* Process and recycle a completed ITD. Return true iff its urb completed,
1659 * and hence its completion callback probably added things to the hardware
1662 * Note that we carefully avoid recycling this descriptor until after any
1663 * completion callback runs, so that it won't be reused quickly. That is,
1664 * assuming (a) no more than two urbs per frame on this endpoint, and also
1665 * (b) only this endpoint's completions submit URBs. It seems some silicon
1666 * corrupts things if you reuse completed descriptors very quickly...
1670 struct ehci_hcd
*ehci
,
1671 struct ehci_itd
*itd
1673 struct urb
*urb
= itd
->urb
;
1674 struct usb_iso_packet_descriptor
*desc
;
1678 struct ehci_iso_stream
*stream
= itd
->stream
;
1679 struct usb_device
*dev
;
1680 unsigned retval
= false;
1682 /* for each uframe with a packet */
1683 for (uframe
= 0; uframe
< 8; uframe
++) {
1684 if (likely (itd
->index
[uframe
] == -1))
1686 urb_index
= itd
->index
[uframe
];
1687 desc
= &urb
->iso_frame_desc
[urb_index
];
1689 t
= hc32_to_cpup(ehci
, &itd
->hw_transaction
[uframe
]);
1690 itd
->hw_transaction
[uframe
] = 0;
1692 /* report transfer status */
1693 if (unlikely (t
& ISO_ERRS
)) {
1695 if (t
& EHCI_ISOC_BUF_ERR
)
1696 desc
->status
= usb_pipein (urb
->pipe
)
1697 ? -ENOSR
/* hc couldn't read */
1698 : -ECOMM
; /* hc couldn't write */
1699 else if (t
& EHCI_ISOC_BABBLE
)
1700 desc
->status
= -EOVERFLOW
;
1701 else /* (t & EHCI_ISOC_XACTERR) */
1702 desc
->status
= -EPROTO
;
1704 /* HC need not update length with this error */
1705 if (!(t
& EHCI_ISOC_BABBLE
)) {
1706 desc
->actual_length
= EHCI_ITD_LENGTH(t
);
1707 urb
->actual_length
+= desc
->actual_length
;
1709 } else if (likely ((t
& EHCI_ISOC_ACTIVE
) == 0)) {
1711 desc
->actual_length
= EHCI_ITD_LENGTH(t
);
1712 urb
->actual_length
+= desc
->actual_length
;
1714 /* URB was too late */
1715 desc
->status
= -EXDEV
;
1719 /* handle completion now? */
1720 if (likely ((urb_index
+ 1) != urb
->number_of_packets
))
1723 /* ASSERT: it's really the last itd for this urb
1724 list_for_each_entry (itd, &stream->td_list, itd_list)
1725 BUG_ON (itd->urb == urb);
1728 /* give urb back to the driver; completion often (re)submits */
1730 ehci_urb_done(ehci
, urb
, 0);
1733 (void) disable_periodic(ehci
);
1734 ehci_to_hcd(ehci
)->self
.bandwidth_isoc_reqs
--;
1736 if (unlikely(list_is_singular(&stream
->td_list
))) {
1737 ehci_to_hcd(ehci
)->self
.bandwidth_allocated
1738 -= stream
->bandwidth
;
1740 "deschedule devp %s ep%d%s-iso\n",
1741 dev
->devpath
, stream
->bEndpointAddress
& 0x0f,
1742 (stream
->bEndpointAddress
& USB_DIR_IN
) ? "in" : "out");
1744 iso_stream_put (ehci
, stream
);
1748 if (ehci
->clock_frame
!= itd
->frame
|| itd
->index
[7] != -1) {
1749 /* OK to recycle this ITD now. */
1751 list_move(&itd
->itd_list
, &stream
->free_list
);
1752 iso_stream_put(ehci
, stream
);
1754 /* HW might remember this ITD, so we can't recycle it yet.
1755 * Move it to a safe place until a new frame starts.
1757 list_move(&itd
->itd_list
, &ehci
->cached_itd_list
);
1758 if (stream
->refcount
== 2) {
1759 /* If iso_stream_put() were called here, stream
1760 * would be freed. Instead, just prevent reuse.
1762 stream
->ep
->hcpriv
= NULL
;
1769 /*-------------------------------------------------------------------------*/
1771 static int itd_submit (struct ehci_hcd
*ehci
, struct urb
*urb
,
1774 int status
= -EINVAL
;
1775 unsigned long flags
;
1776 struct ehci_iso_stream
*stream
;
1778 /* Get iso_stream head */
1779 stream
= iso_stream_find (ehci
, urb
);
1780 if (unlikely (stream
== NULL
)) {
1781 ehci_dbg (ehci
, "can't get iso stream\n");
1784 if (unlikely (urb
->interval
!= stream
->interval
)) {
1785 ehci_dbg (ehci
, "can't change iso interval %d --> %d\n",
1786 stream
->interval
, urb
->interval
);
1790 #ifdef EHCI_URB_TRACE
1792 "%s %s urb %p ep%d%s len %d, %d pkts %d uframes [%p]\n",
1793 __func__
, urb
->dev
->devpath
, urb
,
1794 usb_pipeendpoint (urb
->pipe
),
1795 usb_pipein (urb
->pipe
) ? "in" : "out",
1796 urb
->transfer_buffer_length
,
1797 urb
->number_of_packets
, urb
->interval
,
1801 /* allocate ITDs w/o locking anything */
1802 status
= itd_urb_transaction (stream
, ehci
, urb
, mem_flags
);
1803 if (unlikely (status
< 0)) {
1804 ehci_dbg (ehci
, "can't init itds\n");
1808 /* schedule ... need to lock */
1809 spin_lock_irqsave (&ehci
->lock
, flags
);
1810 if (unlikely(!HCD_HW_ACCESSIBLE(ehci_to_hcd(ehci
)))) {
1811 status
= -ESHUTDOWN
;
1812 goto done_not_linked
;
1814 status
= usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci
), urb
);
1815 if (unlikely(status
))
1816 goto done_not_linked
;
1817 status
= iso_stream_schedule(ehci
, urb
, stream
);
1818 if (likely (status
== 0))
1819 itd_link_urb (ehci
, urb
, ehci
->periodic_size
<< 3, stream
);
1821 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci
), urb
);
1823 spin_unlock_irqrestore (&ehci
->lock
, flags
);
1826 if (unlikely (status
< 0))
1827 iso_stream_put (ehci
, stream
);
1831 /*-------------------------------------------------------------------------*/
1834 * "Split ISO TDs" ... used for USB 1.1 devices going through the
1835 * TTs in USB 2.0 hubs. These need microframe scheduling.
1840 struct ehci_hcd
*ehci
,
1841 struct ehci_iso_sched
*iso_sched
,
1842 struct ehci_iso_stream
*stream
,
1847 dma_addr_t dma
= urb
->transfer_dma
;
1849 /* how many frames are needed for these transfers */
1850 iso_sched
->span
= urb
->number_of_packets
* stream
->interval
;
1852 /* figure out per-frame sitd fields that we'll need later
1853 * when we fit new sitds into the schedule.
1855 for (i
= 0; i
< urb
->number_of_packets
; i
++) {
1856 struct ehci_iso_packet
*packet
= &iso_sched
->packet
[i
];
1861 length
= urb
->iso_frame_desc
[i
].length
& 0x03ff;
1862 buf
= dma
+ urb
->iso_frame_desc
[i
].offset
;
1864 trans
= SITD_STS_ACTIVE
;
1865 if (((i
+ 1) == urb
->number_of_packets
)
1866 && !(urb
->transfer_flags
& URB_NO_INTERRUPT
))
1868 trans
|= length
<< 16;
1869 packet
->transaction
= cpu_to_hc32(ehci
, trans
);
1871 /* might need to cross a buffer page within a td */
1873 packet
->buf1
= (buf
+ length
) & ~0x0fff;
1874 if (packet
->buf1
!= (buf
& ~(u64
)0x0fff))
1877 /* OUT uses multiple start-splits */
1878 if (stream
->bEndpointAddress
& USB_DIR_IN
)
1880 length
= (length
+ 187) / 188;
1881 if (length
> 1) /* BEGIN vs ALL */
1883 packet
->buf1
|= length
;
1888 sitd_urb_transaction (
1889 struct ehci_iso_stream
*stream
,
1890 struct ehci_hcd
*ehci
,
1895 struct ehci_sitd
*sitd
;
1896 dma_addr_t sitd_dma
;
1898 struct ehci_iso_sched
*iso_sched
;
1899 unsigned long flags
;
1901 iso_sched
= iso_sched_alloc (urb
->number_of_packets
, mem_flags
);
1902 if (iso_sched
== NULL
)
1905 sitd_sched_init(ehci
, iso_sched
, stream
, urb
);
1907 /* allocate/init sITDs */
1908 spin_lock_irqsave (&ehci
->lock
, flags
);
1909 for (i
= 0; i
< urb
->number_of_packets
; i
++) {
1911 /* NOTE: for now, we don't try to handle wraparound cases
1912 * for IN (using sitd->hw_backpointer, like a FSTN), which
1913 * means we never need two sitds for full speed packets.
1916 /* free_list.next might be cache-hot ... but maybe
1917 * the HC caches it too. avoid that issue for now.
1920 /* prefer previously-allocated sitds */
1921 if (!list_empty(&stream
->free_list
)) {
1922 sitd
= list_entry (stream
->free_list
.prev
,
1923 struct ehci_sitd
, sitd_list
);
1924 list_del (&sitd
->sitd_list
);
1925 sitd_dma
= sitd
->sitd_dma
;
1927 spin_unlock_irqrestore (&ehci
->lock
, flags
);
1928 sitd
= dma_pool_alloc (ehci
->sitd_pool
, mem_flags
,
1930 spin_lock_irqsave (&ehci
->lock
, flags
);
1932 iso_sched_free(stream
, iso_sched
);
1933 spin_unlock_irqrestore(&ehci
->lock
, flags
);
1938 memset (sitd
, 0, sizeof *sitd
);
1939 sitd
->sitd_dma
= sitd_dma
;
1940 list_add (&sitd
->sitd_list
, &iso_sched
->td_list
);
1943 /* temporarily store schedule info in hcpriv */
1944 urb
->hcpriv
= iso_sched
;
1945 urb
->error_count
= 0;
1947 spin_unlock_irqrestore (&ehci
->lock
, flags
);
1951 /*-------------------------------------------------------------------------*/
1955 struct ehci_hcd
*ehci
,
1956 struct ehci_iso_stream
*stream
,
1957 struct ehci_sitd
*sitd
,
1958 struct ehci_iso_sched
*iso_sched
,
1962 struct ehci_iso_packet
*uf
= &iso_sched
->packet
[index
];
1963 u64 bufp
= uf
->bufp
;
1965 sitd
->hw_next
= EHCI_LIST_END(ehci
);
1966 sitd
->hw_fullspeed_ep
= stream
->address
;
1967 sitd
->hw_uframe
= stream
->splits
;
1968 sitd
->hw_results
= uf
->transaction
;
1969 sitd
->hw_backpointer
= EHCI_LIST_END(ehci
);
1972 sitd
->hw_buf
[0] = cpu_to_hc32(ehci
, bufp
);
1973 sitd
->hw_buf_hi
[0] = cpu_to_hc32(ehci
, bufp
>> 32);
1975 sitd
->hw_buf
[1] = cpu_to_hc32(ehci
, uf
->buf1
);
1978 sitd
->hw_buf_hi
[1] = cpu_to_hc32(ehci
, bufp
>> 32);
1979 sitd
->index
= index
;
1983 sitd_link (struct ehci_hcd
*ehci
, unsigned frame
, struct ehci_sitd
*sitd
)
1985 /* note: sitd ordering could matter (CSPLIT then SSPLIT) */
1986 sitd
->sitd_next
= ehci
->pshadow
[frame
];
1987 sitd
->hw_next
= ehci
->periodic
[frame
];
1988 ehci
->pshadow
[frame
].sitd
= sitd
;
1989 sitd
->frame
= frame
;
1991 ehci
->periodic
[frame
] = cpu_to_hc32(ehci
, sitd
->sitd_dma
| Q_TYPE_SITD
);
1994 /* fit urb's sitds into the selected schedule slot; activate as needed */
1997 struct ehci_hcd
*ehci
,
2000 struct ehci_iso_stream
*stream
2004 unsigned next_uframe
;
2005 struct ehci_iso_sched
*sched
= urb
->hcpriv
;
2006 struct ehci_sitd
*sitd
;
2008 next_uframe
= stream
->next_uframe
;
2010 if (list_empty(&stream
->td_list
)) {
2011 /* usbfs ignores TT bandwidth */
2012 ehci_to_hcd(ehci
)->self
.bandwidth_allocated
2013 += stream
->bandwidth
;
2015 "sched devp %s ep%d%s-iso [%d] %dms/%04x\n",
2016 urb
->dev
->devpath
, stream
->bEndpointAddress
& 0x0f,
2017 (stream
->bEndpointAddress
& USB_DIR_IN
) ? "in" : "out",
2018 (next_uframe
>> 3) & (ehci
->periodic_size
- 1),
2019 stream
->interval
, hc32_to_cpu(ehci
, stream
->splits
));
2021 ehci_to_hcd(ehci
)->self
.bandwidth_isoc_reqs
++;
2023 /* fill sITDs frame by frame */
2024 for (packet
= 0, sitd
= NULL
;
2025 packet
< urb
->number_of_packets
;
2028 /* ASSERT: we have all necessary sitds */
2029 BUG_ON (list_empty (&sched
->td_list
));
2031 /* ASSERT: no itds for this endpoint in this frame */
2033 sitd
= list_entry (sched
->td_list
.next
,
2034 struct ehci_sitd
, sitd_list
);
2035 list_move_tail (&sitd
->sitd_list
, &stream
->td_list
);
2036 sitd
->stream
= iso_stream_get (stream
);
2039 sitd_patch(ehci
, stream
, sitd
, sched
, packet
);
2040 sitd_link(ehci
, (next_uframe
>> 3) & (ehci
->periodic_size
- 1),
2043 next_uframe
+= stream
->interval
<< 3;
2045 stream
->next_uframe
= next_uframe
& (mod
- 1);
2047 /* don't need that schedule data any more */
2048 iso_sched_free (stream
, sched
);
2051 timer_action (ehci
, TIMER_IO_WATCHDOG
);
2052 return enable_periodic(ehci
);
2055 /*-------------------------------------------------------------------------*/
2057 #define SITD_ERRS (SITD_STS_ERR | SITD_STS_DBE | SITD_STS_BABBLE \
2058 | SITD_STS_XACT | SITD_STS_MMF)
2060 /* Process and recycle a completed SITD. Return true iff its urb completed,
2061 * and hence its completion callback probably added things to the hardware
2064 * Note that we carefully avoid recycling this descriptor until after any
2065 * completion callback runs, so that it won't be reused quickly. That is,
2066 * assuming (a) no more than two urbs per frame on this endpoint, and also
2067 * (b) only this endpoint's completions submit URBs. It seems some silicon
2068 * corrupts things if you reuse completed descriptors very quickly...
2072 struct ehci_hcd
*ehci
,
2073 struct ehci_sitd
*sitd
2075 struct urb
*urb
= sitd
->urb
;
2076 struct usb_iso_packet_descriptor
*desc
;
2079 struct ehci_iso_stream
*stream
= sitd
->stream
;
2080 struct usb_device
*dev
;
2081 unsigned retval
= false;
2083 urb_index
= sitd
->index
;
2084 desc
= &urb
->iso_frame_desc
[urb_index
];
2085 t
= hc32_to_cpup(ehci
, &sitd
->hw_results
);
2087 /* report transfer status */
2088 if (t
& SITD_ERRS
) {
2090 if (t
& SITD_STS_DBE
)
2091 desc
->status
= usb_pipein (urb
->pipe
)
2092 ? -ENOSR
/* hc couldn't read */
2093 : -ECOMM
; /* hc couldn't write */
2094 else if (t
& SITD_STS_BABBLE
)
2095 desc
->status
= -EOVERFLOW
;
2096 else /* XACT, MMF, etc */
2097 desc
->status
= -EPROTO
;
2100 desc
->actual_length
= desc
->length
- SITD_LENGTH(t
);
2101 urb
->actual_length
+= desc
->actual_length
;
2104 /* handle completion now? */
2105 if ((urb_index
+ 1) != urb
->number_of_packets
)
2108 /* ASSERT: it's really the last sitd for this urb
2109 list_for_each_entry (sitd, &stream->td_list, sitd_list)
2110 BUG_ON (sitd->urb == urb);
2113 /* give urb back to the driver; completion often (re)submits */
2115 ehci_urb_done(ehci
, urb
, 0);
2118 (void) disable_periodic(ehci
);
2119 ehci_to_hcd(ehci
)->self
.bandwidth_isoc_reqs
--;
2121 if (list_is_singular(&stream
->td_list
)) {
2122 ehci_to_hcd(ehci
)->self
.bandwidth_allocated
2123 -= stream
->bandwidth
;
2125 "deschedule devp %s ep%d%s-iso\n",
2126 dev
->devpath
, stream
->bEndpointAddress
& 0x0f,
2127 (stream
->bEndpointAddress
& USB_DIR_IN
) ? "in" : "out");
2129 iso_stream_put (ehci
, stream
);
2133 if (ehci
->clock_frame
!= sitd
->frame
) {
2134 /* OK to recycle this SITD now. */
2135 sitd
->stream
= NULL
;
2136 list_move(&sitd
->sitd_list
, &stream
->free_list
);
2137 iso_stream_put(ehci
, stream
);
2139 /* HW might remember this SITD, so we can't recycle it yet.
2140 * Move it to a safe place until a new frame starts.
2142 list_move(&sitd
->sitd_list
, &ehci
->cached_sitd_list
);
2143 if (stream
->refcount
== 2) {
2144 /* If iso_stream_put() were called here, stream
2145 * would be freed. Instead, just prevent reuse.
2147 stream
->ep
->hcpriv
= NULL
;
2155 static int sitd_submit (struct ehci_hcd
*ehci
, struct urb
*urb
,
2158 int status
= -EINVAL
;
2159 unsigned long flags
;
2160 struct ehci_iso_stream
*stream
;
2162 /* Get iso_stream head */
2163 stream
= iso_stream_find (ehci
, urb
);
2164 if (stream
== NULL
) {
2165 ehci_dbg (ehci
, "can't get iso stream\n");
2168 if (urb
->interval
!= stream
->interval
) {
2169 ehci_dbg (ehci
, "can't change iso interval %d --> %d\n",
2170 stream
->interval
, urb
->interval
);
2174 #ifdef EHCI_URB_TRACE
2176 "submit %p dev%s ep%d%s-iso len %d\n",
2177 urb
, urb
->dev
->devpath
,
2178 usb_pipeendpoint (urb
->pipe
),
2179 usb_pipein (urb
->pipe
) ? "in" : "out",
2180 urb
->transfer_buffer_length
);
2183 /* allocate SITDs */
2184 status
= sitd_urb_transaction (stream
, ehci
, urb
, mem_flags
);
2186 ehci_dbg (ehci
, "can't init sitds\n");
2190 /* schedule ... need to lock */
2191 spin_lock_irqsave (&ehci
->lock
, flags
);
2192 if (unlikely(!HCD_HW_ACCESSIBLE(ehci_to_hcd(ehci
)))) {
2193 status
= -ESHUTDOWN
;
2194 goto done_not_linked
;
2196 status
= usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci
), urb
);
2197 if (unlikely(status
))
2198 goto done_not_linked
;
2199 status
= iso_stream_schedule(ehci
, urb
, stream
);
2201 sitd_link_urb (ehci
, urb
, ehci
->periodic_size
<< 3, stream
);
2203 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci
), urb
);
2205 spin_unlock_irqrestore (&ehci
->lock
, flags
);
2209 iso_stream_put (ehci
, stream
);
2213 /*-------------------------------------------------------------------------*/
2215 static void free_cached_lists(struct ehci_hcd
*ehci
)
2217 struct ehci_itd
*itd
, *n
;
2218 struct ehci_sitd
*sitd
, *sn
;
2220 list_for_each_entry_safe(itd
, n
, &ehci
->cached_itd_list
, itd_list
) {
2221 struct ehci_iso_stream
*stream
= itd
->stream
;
2223 list_move(&itd
->itd_list
, &stream
->free_list
);
2224 iso_stream_put(ehci
, stream
);
2227 list_for_each_entry_safe(sitd
, sn
, &ehci
->cached_sitd_list
, sitd_list
) {
2228 struct ehci_iso_stream
*stream
= sitd
->stream
;
2229 sitd
->stream
= NULL
;
2230 list_move(&sitd
->sitd_list
, &stream
->free_list
);
2231 iso_stream_put(ehci
, stream
);
2235 /*-------------------------------------------------------------------------*/
2238 scan_periodic (struct ehci_hcd
*ehci
)
2240 unsigned now_uframe
, frame
, clock
, clock_frame
, mod
;
2243 mod
= ehci
->periodic_size
<< 3;
2246 * When running, scan from last scan point up to "now"
2247 * else clean up by scanning everything that's left.
2248 * Touches as few pages as possible: cache-friendly.
2250 now_uframe
= ehci
->next_uframe
;
2251 if (HC_IS_RUNNING(ehci_to_hcd(ehci
)->state
)) {
2252 clock
= ehci_readl(ehci
, &ehci
->regs
->frame_index
);
2253 clock_frame
= (clock
>> 3) & (ehci
->periodic_size
- 1);
2255 clock
= now_uframe
+ mod
- 1;
2258 if (ehci
->clock_frame
!= clock_frame
) {
2259 free_cached_lists(ehci
);
2260 ehci
->clock_frame
= clock_frame
;
2263 clock_frame
= clock
>> 3;
2266 union ehci_shadow q
, *q_p
;
2268 unsigned incomplete
= false;
2270 frame
= now_uframe
>> 3;
2273 /* scan each element in frame's queue for completions */
2274 q_p
= &ehci
->pshadow
[frame
];
2275 hw_p
= &ehci
->periodic
[frame
];
2277 type
= Q_NEXT_TYPE(ehci
, *hw_p
);
2280 while (q
.ptr
!= NULL
) {
2282 union ehci_shadow temp
;
2285 live
= HC_IS_RUNNING (ehci_to_hcd(ehci
)->state
);
2286 switch (hc32_to_cpu(ehci
, type
)) {
2288 /* handle any completions */
2289 temp
.qh
= qh_get (q
.qh
);
2290 type
= Q_NEXT_TYPE(ehci
, q
.qh
->hw
->hw_next
);
2292 modified
= qh_completions (ehci
, temp
.qh
);
2293 if (unlikely(list_empty(&temp
.qh
->qtd_list
) ||
2294 temp
.qh
->needs_rescan
))
2295 intr_deschedule (ehci
, temp
.qh
);
2299 /* for "save place" FSTNs, look at QH entries
2300 * in the previous frame for completions.
2302 if (q
.fstn
->hw_prev
!= EHCI_LIST_END(ehci
)) {
2303 dbg ("ignoring completions from FSTNs");
2305 type
= Q_NEXT_TYPE(ehci
, q
.fstn
->hw_next
);
2306 q
= q
.fstn
->fstn_next
;
2309 /* If this ITD is still active, leave it for
2310 * later processing ... check the next entry.
2311 * No need to check for activity unless the
2314 if (frame
== clock_frame
&& live
) {
2316 for (uf
= 0; uf
< 8; uf
++) {
2317 if (q
.itd
->hw_transaction
[uf
] &
2323 q_p
= &q
.itd
->itd_next
;
2324 hw_p
= &q
.itd
->hw_next
;
2325 type
= Q_NEXT_TYPE(ehci
,
2332 /* Take finished ITDs out of the schedule
2333 * and process them: recycle, maybe report
2334 * URB completion. HC won't cache the
2335 * pointer for much longer, if at all.
2337 *q_p
= q
.itd
->itd_next
;
2338 *hw_p
= q
.itd
->hw_next
;
2339 type
= Q_NEXT_TYPE(ehci
, q
.itd
->hw_next
);
2341 modified
= itd_complete (ehci
, q
.itd
);
2345 /* If this SITD is still active, leave it for
2346 * later processing ... check the next entry.
2347 * No need to check for activity unless the
2350 if (((frame
== clock_frame
) ||
2351 (((frame
+ 1) & (ehci
->periodic_size
- 1))
2354 && (q
.sitd
->hw_results
&
2355 SITD_ACTIVE(ehci
))) {
2358 q_p
= &q
.sitd
->sitd_next
;
2359 hw_p
= &q
.sitd
->hw_next
;
2360 type
= Q_NEXT_TYPE(ehci
,
2366 /* Take finished SITDs out of the schedule
2367 * and process them: recycle, maybe report
2370 *q_p
= q
.sitd
->sitd_next
;
2371 *hw_p
= q
.sitd
->hw_next
;
2372 type
= Q_NEXT_TYPE(ehci
, q
.sitd
->hw_next
);
2374 modified
= sitd_complete (ehci
, q
.sitd
);
2378 dbg ("corrupt type %d frame %d shadow %p",
2379 type
, frame
, q
.ptr
);
2384 /* assume completion callbacks modify the queue */
2385 if (unlikely (modified
)) {
2386 if (likely(ehci
->periodic_sched
> 0))
2388 /* short-circuit this scan */
2394 /* If we can tell we caught up to the hardware, stop now.
2395 * We can't advance our scan without collecting the ISO
2396 * transfers that are still pending in this frame.
2398 if (incomplete
&& HC_IS_RUNNING(ehci_to_hcd(ehci
)->state
)) {
2399 ehci
->next_uframe
= now_uframe
;
2403 // FIXME: this assumes we won't get lapped when
2404 // latencies climb; that should be rare, but...
2405 // detect it, and just go all the way around.
2406 // FLR might help detect this case, so long as latencies
2407 // don't exceed periodic_size msec (default 1.024 sec).
2409 // FIXME: likewise assumes HC doesn't halt mid-scan
2411 if (now_uframe
== clock
) {
2414 if (!HC_IS_RUNNING (ehci_to_hcd(ehci
)->state
)
2415 || ehci
->periodic_sched
== 0)
2417 ehci
->next_uframe
= now_uframe
;
2418 now
= ehci_readl(ehci
, &ehci
->regs
->frame_index
) &
2420 if (now_uframe
== now
)
2423 /* rescan the rest of this frame, then ... */
2425 clock_frame
= clock
>> 3;
2426 if (ehci
->clock_frame
!= clock_frame
) {
2427 free_cached_lists(ehci
);
2428 ehci
->clock_frame
= clock_frame
;
2432 now_uframe
&= mod
- 1;