2 * OHCI HCD (Host Controller Driver) for USB.
4 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
5 * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
7 * [ Initialisation is based on Linus' ]
8 * [ uhci code and gregs ohci fragments ]
9 * [ (C) Copyright 1999 Linus Torvalds ]
10 * [ (C) Copyright 1999 Gregory P. Smith]
14 * This file is licenced under the GPL.
17 #include <linux/jiffies.h>
19 #ifdef CONFIG_PPC_PMAC
20 #include <asm/machdep.h>
21 #include <asm/pmac_feature.h>
22 #include <asm/pci-bridge.h>
27 #error "This file is PCI bus glue. CONFIG_PCI must be defined."
30 /*-------------------------------------------------------------------------*/
33 ohci_pci_reset (struct usb_hcd
*hcd
)
35 struct ohci_hcd
*ohci
= hcd_to_ohci (hcd
);
38 return ohci_init (ohci
);
42 ohci_pci_start (struct usb_hcd
*hcd
)
44 struct ohci_hcd
*ohci
= hcd_to_ohci (hcd
);
47 if(hcd
->self
.controller
&& hcd
->self
.controller
->bus
== &pci_bus_type
) {
48 struct pci_dev
*pdev
= to_pci_dev(hcd
->self
.controller
);
50 /* AMD 756, for most chips (early revs), corrupts register
51 * values on read ... so enable the vendor workaround.
53 if (pdev
->vendor
== PCI_VENDOR_ID_AMD
54 && pdev
->device
== 0x740c) {
55 ohci
->flags
= OHCI_QUIRK_AMD756
;
56 ohci_dbg (ohci
, "AMD756 erratum 4 workaround\n");
57 // also somewhat erratum 10 (suspend/resume issues)
60 /* FIXME for some of the early AMD 760 southbridges, OHCI
61 * won't work at all. blacklist them.
64 /* Apple's OHCI driver has a lot of bizarre workarounds
65 * for this chip. Evidently control and bulk lists
66 * can get confused. (B&W G3 models, and ...)
68 else if (pdev
->vendor
== PCI_VENDOR_ID_OPTI
69 && pdev
->device
== 0xc861) {
71 "WARNING: OPTi workarounds unavailable\n");
74 /* Check for NSC87560. We have to look at the bridge (fn1) to
75 * identify the USB (fn2). This quirk might apply to more or
78 else if (pdev
->vendor
== PCI_VENDOR_ID_NS
) {
81 b
= pci_find_slot (pdev
->bus
->number
,
82 PCI_DEVFN (PCI_SLOT (pdev
->devfn
), 1));
83 if (b
&& b
->device
== PCI_DEVICE_ID_NS_87560_LIO
84 && b
->vendor
== PCI_VENDOR_ID_NS
) {
85 ohci
->flags
|= OHCI_QUIRK_SUPERIO
;
86 ohci_dbg (ohci
, "Using NSC SuperIO setup\n");
90 /* Check for Compaq's ZFMicro chipset, which needs short
91 * delays before control or bulk queues get re-activated
94 else if (pdev
->vendor
== PCI_VENDOR_ID_COMPAQ
95 && pdev
->device
== 0xa0f8) {
96 ohci
->flags
|= OHCI_QUIRK_ZFMICRO
;
98 "enabled Compaq ZFMicro chipset quirk\n");
102 /* NOTE: there may have already been a first reset, to
103 * keep bios/smm irqs from making trouble
105 if ((ret
= ohci_run (ohci
)) < 0) {
106 ohci_err (ohci
, "can't start\n");
115 static int ohci_pci_suspend (struct usb_hcd
*hcd
, pm_message_t message
)
117 /* root hub was already suspended */
119 /* FIXME these PMAC things get called in the wrong places. ASIC
120 * clocks should be turned off AFTER entering D3, and on BEFORE
121 * trying to enter D0. Evidently the PCI layer doesn't currently
122 * provide the right sort of platform hooks for this ...
124 #ifdef CONFIG_PPC_PMAC
125 if (_machine
== _MACH_Pmac
) {
126 struct device_node
*of_node
;
128 /* Disable USB PAD & cell clock */
129 of_node
= pci_device_to_OF_node (to_pci_dev(hcd
->self
.controller
));
131 pmac_call_feature(PMAC_FTR_USB_ENABLE
, of_node
, 0, 0);
133 #endif /* CONFIG_PPC_PMAC */
138 static int ohci_pci_resume (struct usb_hcd
*hcd
)
140 #ifdef CONFIG_PPC_PMAC
141 if (_machine
== _MACH_Pmac
) {
142 struct device_node
*of_node
;
144 /* Re-enable USB PAD & cell clock */
145 of_node
= pci_device_to_OF_node (to_pci_dev(hcd
->self
.controller
));
147 pmac_call_feature (PMAC_FTR_USB_ENABLE
, of_node
, 0, 1);
149 #endif /* CONFIG_PPC_PMAC */
151 usb_hcd_resume_root_hub(hcd
);
155 #endif /* CONFIG_PM */
158 /*-------------------------------------------------------------------------*/
160 static const struct hc_driver ohci_pci_hc_driver
= {
161 .description
= hcd_name
,
162 .product_desc
= "OHCI Host Controller",
163 .hcd_priv_size
= sizeof(struct ohci_hcd
),
166 * generic hardware linkage
169 .flags
= HCD_MEMORY
| HCD_USB11
,
172 * basic lifecycle operations
174 .reset
= ohci_pci_reset
,
175 .start
= ohci_pci_start
,
177 .suspend
= ohci_pci_suspend
,
178 .resume
= ohci_pci_resume
,
183 * managing i/o requests and associated device resources
185 .urb_enqueue
= ohci_urb_enqueue
,
186 .urb_dequeue
= ohci_urb_dequeue
,
187 .endpoint_disable
= ohci_endpoint_disable
,
192 .get_frame_number
= ohci_get_frame
,
197 .hub_status_data
= ohci_hub_status_data
,
198 .hub_control
= ohci_hub_control
,
200 .bus_suspend
= ohci_bus_suspend
,
201 .bus_resume
= ohci_bus_resume
,
203 .start_port_reset
= ohci_start_port_reset
,
206 /*-------------------------------------------------------------------------*/
209 static const struct pci_device_id pci_ids
[] = { {
210 /* handle any USB OHCI controller */
211 PCI_DEVICE_CLASS((PCI_CLASS_SERIAL_USB
<< 8) | 0x10, ~0),
212 .driver_data
= (unsigned long) &ohci_pci_hc_driver
,
213 }, { /* end: all zeroes */ }
215 MODULE_DEVICE_TABLE (pci
, pci_ids
);
217 /* pci driver glue; this is a "new style" PCI driver module */
218 static struct pci_driver ohci_pci_driver
= {
219 .name
= (char *) hcd_name
,
221 .owner
= THIS_MODULE
,
223 .probe
= usb_hcd_pci_probe
,
224 .remove
= usb_hcd_pci_remove
,
227 .suspend
= usb_hcd_pci_suspend
,
228 .resume
= usb_hcd_pci_resume
,
233 static int __init
ohci_hcd_pci_init (void)
235 printk (KERN_DEBUG
"%s: " DRIVER_INFO
" (PCI)\n", hcd_name
);
239 pr_debug ("%s: block sizes: ed %Zd td %Zd\n", hcd_name
,
240 sizeof (struct ed
), sizeof (struct td
));
241 return pci_register_driver (&ohci_pci_driver
);
243 module_init (ohci_hcd_pci_init
);
245 /*-------------------------------------------------------------------------*/
247 static void __exit
ohci_hcd_pci_cleanup (void)
249 pci_unregister_driver (&ohci_pci_driver
);
251 module_exit (ohci_hcd_pci_cleanup
);