Pull misc into release branch
[deliverable/linux.git] / drivers / usb / host / uhci-q.c
1 /*
2 * Universal Host Controller Interface driver for USB.
3 *
4 * Maintainer: Alan Stern <stern@rowland.harvard.edu>
5 *
6 * (C) Copyright 1999 Linus Torvalds
7 * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
8 * (C) Copyright 1999 Randy Dunlap
9 * (C) Copyright 1999 Georg Acher, acher@in.tum.de
10 * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
11 * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
12 * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at
13 * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
14 * support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
15 * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
16 * (C) Copyright 2004-2007 Alan Stern, stern@rowland.harvard.edu
17 */
18
19
20 /*
21 * Technically, updating td->status here is a race, but it's not really a
22 * problem. The worst that can happen is that we set the IOC bit again
23 * generating a spurious interrupt. We could fix this by creating another
24 * QH and leaving the IOC bit always set, but then we would have to play
25 * games with the FSBR code to make sure we get the correct order in all
26 * the cases. I don't think it's worth the effort
27 */
28 static void uhci_set_next_interrupt(struct uhci_hcd *uhci)
29 {
30 if (uhci->is_stopped)
31 mod_timer(&uhci_to_hcd(uhci)->rh_timer, jiffies);
32 uhci->term_td->status |= cpu_to_le32(TD_CTRL_IOC);
33 }
34
35 static inline void uhci_clear_next_interrupt(struct uhci_hcd *uhci)
36 {
37 uhci->term_td->status &= ~cpu_to_le32(TD_CTRL_IOC);
38 }
39
40
41 /*
42 * Full-Speed Bandwidth Reclamation (FSBR).
43 * We turn on FSBR whenever a queue that wants it is advancing,
44 * and leave it on for a short time thereafter.
45 */
46 static void uhci_fsbr_on(struct uhci_hcd *uhci)
47 {
48 struct uhci_qh *lqh;
49
50 /* The terminating skeleton QH always points back to the first
51 * FSBR QH. Make the last async QH point to the terminating
52 * skeleton QH. */
53 uhci->fsbr_is_on = 1;
54 lqh = list_entry(uhci->skel_async_qh->node.prev,
55 struct uhci_qh, node);
56 lqh->link = LINK_TO_QH(uhci->skel_term_qh);
57 }
58
59 static void uhci_fsbr_off(struct uhci_hcd *uhci)
60 {
61 struct uhci_qh *lqh;
62
63 /* Remove the link from the last async QH to the terminating
64 * skeleton QH. */
65 uhci->fsbr_is_on = 0;
66 lqh = list_entry(uhci->skel_async_qh->node.prev,
67 struct uhci_qh, node);
68 lqh->link = UHCI_PTR_TERM;
69 }
70
71 static void uhci_add_fsbr(struct uhci_hcd *uhci, struct urb *urb)
72 {
73 struct urb_priv *urbp = urb->hcpriv;
74
75 if (!(urb->transfer_flags & URB_NO_FSBR))
76 urbp->fsbr = 1;
77 }
78
79 static void uhci_urbp_wants_fsbr(struct uhci_hcd *uhci, struct urb_priv *urbp)
80 {
81 if (urbp->fsbr) {
82 uhci->fsbr_is_wanted = 1;
83 if (!uhci->fsbr_is_on)
84 uhci_fsbr_on(uhci);
85 else if (uhci->fsbr_expiring) {
86 uhci->fsbr_expiring = 0;
87 del_timer(&uhci->fsbr_timer);
88 }
89 }
90 }
91
92 static void uhci_fsbr_timeout(unsigned long _uhci)
93 {
94 struct uhci_hcd *uhci = (struct uhci_hcd *) _uhci;
95 unsigned long flags;
96
97 spin_lock_irqsave(&uhci->lock, flags);
98 if (uhci->fsbr_expiring) {
99 uhci->fsbr_expiring = 0;
100 uhci_fsbr_off(uhci);
101 }
102 spin_unlock_irqrestore(&uhci->lock, flags);
103 }
104
105
106 static struct uhci_td *uhci_alloc_td(struct uhci_hcd *uhci)
107 {
108 dma_addr_t dma_handle;
109 struct uhci_td *td;
110
111 td = dma_pool_alloc(uhci->td_pool, GFP_ATOMIC, &dma_handle);
112 if (!td)
113 return NULL;
114
115 td->dma_handle = dma_handle;
116 td->frame = -1;
117
118 INIT_LIST_HEAD(&td->list);
119 INIT_LIST_HEAD(&td->fl_list);
120
121 return td;
122 }
123
124 static void uhci_free_td(struct uhci_hcd *uhci, struct uhci_td *td)
125 {
126 if (!list_empty(&td->list)) {
127 dev_warn(uhci_dev(uhci), "td %p still in list!\n", td);
128 WARN_ON(1);
129 }
130 if (!list_empty(&td->fl_list)) {
131 dev_warn(uhci_dev(uhci), "td %p still in fl_list!\n", td);
132 WARN_ON(1);
133 }
134
135 dma_pool_free(uhci->td_pool, td, td->dma_handle);
136 }
137
138 static inline void uhci_fill_td(struct uhci_td *td, u32 status,
139 u32 token, u32 buffer)
140 {
141 td->status = cpu_to_le32(status);
142 td->token = cpu_to_le32(token);
143 td->buffer = cpu_to_le32(buffer);
144 }
145
146 static void uhci_add_td_to_urbp(struct uhci_td *td, struct urb_priv *urbp)
147 {
148 list_add_tail(&td->list, &urbp->td_list);
149 }
150
151 static void uhci_remove_td_from_urbp(struct uhci_td *td)
152 {
153 list_del_init(&td->list);
154 }
155
156 /*
157 * We insert Isochronous URBs directly into the frame list at the beginning
158 */
159 static inline void uhci_insert_td_in_frame_list(struct uhci_hcd *uhci,
160 struct uhci_td *td, unsigned framenum)
161 {
162 framenum &= (UHCI_NUMFRAMES - 1);
163
164 td->frame = framenum;
165
166 /* Is there a TD already mapped there? */
167 if (uhci->frame_cpu[framenum]) {
168 struct uhci_td *ftd, *ltd;
169
170 ftd = uhci->frame_cpu[framenum];
171 ltd = list_entry(ftd->fl_list.prev, struct uhci_td, fl_list);
172
173 list_add_tail(&td->fl_list, &ftd->fl_list);
174
175 td->link = ltd->link;
176 wmb();
177 ltd->link = LINK_TO_TD(td);
178 } else {
179 td->link = uhci->frame[framenum];
180 wmb();
181 uhci->frame[framenum] = LINK_TO_TD(td);
182 uhci->frame_cpu[framenum] = td;
183 }
184 }
185
186 static inline void uhci_remove_td_from_frame_list(struct uhci_hcd *uhci,
187 struct uhci_td *td)
188 {
189 /* If it's not inserted, don't remove it */
190 if (td->frame == -1) {
191 WARN_ON(!list_empty(&td->fl_list));
192 return;
193 }
194
195 if (uhci->frame_cpu[td->frame] == td) {
196 if (list_empty(&td->fl_list)) {
197 uhci->frame[td->frame] = td->link;
198 uhci->frame_cpu[td->frame] = NULL;
199 } else {
200 struct uhci_td *ntd;
201
202 ntd = list_entry(td->fl_list.next, struct uhci_td, fl_list);
203 uhci->frame[td->frame] = LINK_TO_TD(ntd);
204 uhci->frame_cpu[td->frame] = ntd;
205 }
206 } else {
207 struct uhci_td *ptd;
208
209 ptd = list_entry(td->fl_list.prev, struct uhci_td, fl_list);
210 ptd->link = td->link;
211 }
212
213 list_del_init(&td->fl_list);
214 td->frame = -1;
215 }
216
217 static inline void uhci_remove_tds_from_frame(struct uhci_hcd *uhci,
218 unsigned int framenum)
219 {
220 struct uhci_td *ftd, *ltd;
221
222 framenum &= (UHCI_NUMFRAMES - 1);
223
224 ftd = uhci->frame_cpu[framenum];
225 if (ftd) {
226 ltd = list_entry(ftd->fl_list.prev, struct uhci_td, fl_list);
227 uhci->frame[framenum] = ltd->link;
228 uhci->frame_cpu[framenum] = NULL;
229
230 while (!list_empty(&ftd->fl_list))
231 list_del_init(ftd->fl_list.prev);
232 }
233 }
234
235 /*
236 * Remove all the TDs for an Isochronous URB from the frame list
237 */
238 static void uhci_unlink_isochronous_tds(struct uhci_hcd *uhci, struct urb *urb)
239 {
240 struct urb_priv *urbp = (struct urb_priv *) urb->hcpriv;
241 struct uhci_td *td;
242
243 list_for_each_entry(td, &urbp->td_list, list)
244 uhci_remove_td_from_frame_list(uhci, td);
245 }
246
247 static struct uhci_qh *uhci_alloc_qh(struct uhci_hcd *uhci,
248 struct usb_device *udev, struct usb_host_endpoint *hep)
249 {
250 dma_addr_t dma_handle;
251 struct uhci_qh *qh;
252
253 qh = dma_pool_alloc(uhci->qh_pool, GFP_ATOMIC, &dma_handle);
254 if (!qh)
255 return NULL;
256
257 memset(qh, 0, sizeof(*qh));
258 qh->dma_handle = dma_handle;
259
260 qh->element = UHCI_PTR_TERM;
261 qh->link = UHCI_PTR_TERM;
262
263 INIT_LIST_HEAD(&qh->queue);
264 INIT_LIST_HEAD(&qh->node);
265
266 if (udev) { /* Normal QH */
267 qh->type = hep->desc.bmAttributes & USB_ENDPOINT_XFERTYPE_MASK;
268 if (qh->type != USB_ENDPOINT_XFER_ISOC) {
269 qh->dummy_td = uhci_alloc_td(uhci);
270 if (!qh->dummy_td) {
271 dma_pool_free(uhci->qh_pool, qh, dma_handle);
272 return NULL;
273 }
274 }
275 qh->state = QH_STATE_IDLE;
276 qh->hep = hep;
277 qh->udev = udev;
278 hep->hcpriv = qh;
279
280 if (qh->type == USB_ENDPOINT_XFER_INT ||
281 qh->type == USB_ENDPOINT_XFER_ISOC)
282 qh->load = usb_calc_bus_time(udev->speed,
283 usb_endpoint_dir_in(&hep->desc),
284 qh->type == USB_ENDPOINT_XFER_ISOC,
285 le16_to_cpu(hep->desc.wMaxPacketSize))
286 / 1000 + 1;
287
288 } else { /* Skeleton QH */
289 qh->state = QH_STATE_ACTIVE;
290 qh->type = -1;
291 }
292 return qh;
293 }
294
295 static void uhci_free_qh(struct uhci_hcd *uhci, struct uhci_qh *qh)
296 {
297 WARN_ON(qh->state != QH_STATE_IDLE && qh->udev);
298 if (!list_empty(&qh->queue)) {
299 dev_warn(uhci_dev(uhci), "qh %p list not empty!\n", qh);
300 WARN_ON(1);
301 }
302
303 list_del(&qh->node);
304 if (qh->udev) {
305 qh->hep->hcpriv = NULL;
306 if (qh->dummy_td)
307 uhci_free_td(uhci, qh->dummy_td);
308 }
309 dma_pool_free(uhci->qh_pool, qh, qh->dma_handle);
310 }
311
312 /*
313 * When a queue is stopped and a dequeued URB is given back, adjust
314 * the previous TD link (if the URB isn't first on the queue) or
315 * save its toggle value (if it is first and is currently executing).
316 *
317 * Returns 0 if the URB should not yet be given back, 1 otherwise.
318 */
319 static int uhci_cleanup_queue(struct uhci_hcd *uhci, struct uhci_qh *qh,
320 struct urb *urb)
321 {
322 struct urb_priv *urbp = urb->hcpriv;
323 struct uhci_td *td;
324 int ret = 1;
325
326 /* Isochronous pipes don't use toggles and their TD link pointers
327 * get adjusted during uhci_urb_dequeue(). But since their queues
328 * cannot truly be stopped, we have to watch out for dequeues
329 * occurring after the nominal unlink frame. */
330 if (qh->type == USB_ENDPOINT_XFER_ISOC) {
331 ret = (uhci->frame_number + uhci->is_stopped !=
332 qh->unlink_frame);
333 goto done;
334 }
335
336 /* If the URB isn't first on its queue, adjust the link pointer
337 * of the last TD in the previous URB. The toggle doesn't need
338 * to be saved since this URB can't be executing yet. */
339 if (qh->queue.next != &urbp->node) {
340 struct urb_priv *purbp;
341 struct uhci_td *ptd;
342
343 purbp = list_entry(urbp->node.prev, struct urb_priv, node);
344 WARN_ON(list_empty(&purbp->td_list));
345 ptd = list_entry(purbp->td_list.prev, struct uhci_td,
346 list);
347 td = list_entry(urbp->td_list.prev, struct uhci_td,
348 list);
349 ptd->link = td->link;
350 goto done;
351 }
352
353 /* If the QH element pointer is UHCI_PTR_TERM then then currently
354 * executing URB has already been unlinked, so this one isn't it. */
355 if (qh_element(qh) == UHCI_PTR_TERM)
356 goto done;
357 qh->element = UHCI_PTR_TERM;
358
359 /* Control pipes don't have to worry about toggles */
360 if (qh->type == USB_ENDPOINT_XFER_CONTROL)
361 goto done;
362
363 /* Save the next toggle value */
364 WARN_ON(list_empty(&urbp->td_list));
365 td = list_entry(urbp->td_list.next, struct uhci_td, list);
366 qh->needs_fixup = 1;
367 qh->initial_toggle = uhci_toggle(td_token(td));
368
369 done:
370 return ret;
371 }
372
373 /*
374 * Fix up the data toggles for URBs in a queue, when one of them
375 * terminates early (short transfer, error, or dequeued).
376 */
377 static void uhci_fixup_toggles(struct uhci_qh *qh, int skip_first)
378 {
379 struct urb_priv *urbp = NULL;
380 struct uhci_td *td;
381 unsigned int toggle = qh->initial_toggle;
382 unsigned int pipe;
383
384 /* Fixups for a short transfer start with the second URB in the
385 * queue (the short URB is the first). */
386 if (skip_first)
387 urbp = list_entry(qh->queue.next, struct urb_priv, node);
388
389 /* When starting with the first URB, if the QH element pointer is
390 * still valid then we know the URB's toggles are okay. */
391 else if (qh_element(qh) != UHCI_PTR_TERM)
392 toggle = 2;
393
394 /* Fix up the toggle for the URBs in the queue. Normally this
395 * loop won't run more than once: When an error or short transfer
396 * occurs, the queue usually gets emptied. */
397 urbp = list_prepare_entry(urbp, &qh->queue, node);
398 list_for_each_entry_continue(urbp, &qh->queue, node) {
399
400 /* If the first TD has the right toggle value, we don't
401 * need to change any toggles in this URB */
402 td = list_entry(urbp->td_list.next, struct uhci_td, list);
403 if (toggle > 1 || uhci_toggle(td_token(td)) == toggle) {
404 td = list_entry(urbp->td_list.prev, struct uhci_td,
405 list);
406 toggle = uhci_toggle(td_token(td)) ^ 1;
407
408 /* Otherwise all the toggles in the URB have to be switched */
409 } else {
410 list_for_each_entry(td, &urbp->td_list, list) {
411 td->token ^= __constant_cpu_to_le32(
412 TD_TOKEN_TOGGLE);
413 toggle ^= 1;
414 }
415 }
416 }
417
418 wmb();
419 pipe = list_entry(qh->queue.next, struct urb_priv, node)->urb->pipe;
420 usb_settoggle(qh->udev, usb_pipeendpoint(pipe),
421 usb_pipeout(pipe), toggle);
422 qh->needs_fixup = 0;
423 }
424
425 /*
426 * Link an Isochronous QH into its skeleton's list
427 */
428 static inline void link_iso(struct uhci_hcd *uhci, struct uhci_qh *qh)
429 {
430 list_add_tail(&qh->node, &uhci->skel_iso_qh->node);
431
432 /* Isochronous QHs aren't linked by the hardware */
433 }
434
435 /*
436 * Link a high-period interrupt QH into the schedule at the end of its
437 * skeleton's list
438 */
439 static void link_interrupt(struct uhci_hcd *uhci, struct uhci_qh *qh)
440 {
441 struct uhci_qh *pqh;
442
443 list_add_tail(&qh->node, &uhci->skelqh[qh->skel]->node);
444
445 pqh = list_entry(qh->node.prev, struct uhci_qh, node);
446 qh->link = pqh->link;
447 wmb();
448 pqh->link = LINK_TO_QH(qh);
449 }
450
451 /*
452 * Link a period-1 interrupt or async QH into the schedule at the
453 * correct spot in the async skeleton's list, and update the FSBR link
454 */
455 static void link_async(struct uhci_hcd *uhci, struct uhci_qh *qh)
456 {
457 struct uhci_qh *pqh;
458 __le32 link_to_new_qh;
459
460 /* Find the predecessor QH for our new one and insert it in the list.
461 * The list of QHs is expected to be short, so linear search won't
462 * take too long. */
463 list_for_each_entry_reverse(pqh, &uhci->skel_async_qh->node, node) {
464 if (pqh->skel <= qh->skel)
465 break;
466 }
467 list_add(&qh->node, &pqh->node);
468
469 /* Link it into the schedule */
470 qh->link = pqh->link;
471 wmb();
472 link_to_new_qh = LINK_TO_QH(qh);
473 pqh->link = link_to_new_qh;
474
475 /* If this is now the first FSBR QH, link the terminating skeleton
476 * QH to it. */
477 if (pqh->skel < SKEL_FSBR && qh->skel >= SKEL_FSBR)
478 uhci->skel_term_qh->link = link_to_new_qh;
479 }
480
481 /*
482 * Put a QH on the schedule in both hardware and software
483 */
484 static void uhci_activate_qh(struct uhci_hcd *uhci, struct uhci_qh *qh)
485 {
486 WARN_ON(list_empty(&qh->queue));
487
488 /* Set the element pointer if it isn't set already.
489 * This isn't needed for Isochronous queues, but it doesn't hurt. */
490 if (qh_element(qh) == UHCI_PTR_TERM) {
491 struct urb_priv *urbp = list_entry(qh->queue.next,
492 struct urb_priv, node);
493 struct uhci_td *td = list_entry(urbp->td_list.next,
494 struct uhci_td, list);
495
496 qh->element = LINK_TO_TD(td);
497 }
498
499 /* Treat the queue as if it has just advanced */
500 qh->wait_expired = 0;
501 qh->advance_jiffies = jiffies;
502
503 if (qh->state == QH_STATE_ACTIVE)
504 return;
505 qh->state = QH_STATE_ACTIVE;
506
507 /* Move the QH from its old list to the correct spot in the appropriate
508 * skeleton's list */
509 if (qh == uhci->next_qh)
510 uhci->next_qh = list_entry(qh->node.next, struct uhci_qh,
511 node);
512 list_del(&qh->node);
513
514 if (qh->skel == SKEL_ISO)
515 link_iso(uhci, qh);
516 else if (qh->skel < SKEL_ASYNC)
517 link_interrupt(uhci, qh);
518 else
519 link_async(uhci, qh);
520 }
521
522 /*
523 * Unlink a high-period interrupt QH from the schedule
524 */
525 static void unlink_interrupt(struct uhci_hcd *uhci, struct uhci_qh *qh)
526 {
527 struct uhci_qh *pqh;
528
529 pqh = list_entry(qh->node.prev, struct uhci_qh, node);
530 pqh->link = qh->link;
531 mb();
532 }
533
534 /*
535 * Unlink a period-1 interrupt or async QH from the schedule
536 */
537 static void unlink_async(struct uhci_hcd *uhci, struct uhci_qh *qh)
538 {
539 struct uhci_qh *pqh;
540 __le32 link_to_next_qh = qh->link;
541
542 pqh = list_entry(qh->node.prev, struct uhci_qh, node);
543 pqh->link = link_to_next_qh;
544
545 /* If this was the old first FSBR QH, link the terminating skeleton
546 * QH to the next (new first FSBR) QH. */
547 if (pqh->skel < SKEL_FSBR && qh->skel >= SKEL_FSBR)
548 uhci->skel_term_qh->link = link_to_next_qh;
549 mb();
550 }
551
552 /*
553 * Take a QH off the hardware schedule
554 */
555 static void uhci_unlink_qh(struct uhci_hcd *uhci, struct uhci_qh *qh)
556 {
557 if (qh->state == QH_STATE_UNLINKING)
558 return;
559 WARN_ON(qh->state != QH_STATE_ACTIVE || !qh->udev);
560 qh->state = QH_STATE_UNLINKING;
561
562 /* Unlink the QH from the schedule and record when we did it */
563 if (qh->skel == SKEL_ISO)
564 ;
565 else if (qh->skel < SKEL_ASYNC)
566 unlink_interrupt(uhci, qh);
567 else
568 unlink_async(uhci, qh);
569
570 uhci_get_current_frame_number(uhci);
571 qh->unlink_frame = uhci->frame_number;
572
573 /* Force an interrupt so we know when the QH is fully unlinked */
574 if (list_empty(&uhci->skel_unlink_qh->node))
575 uhci_set_next_interrupt(uhci);
576
577 /* Move the QH from its old list to the end of the unlinking list */
578 if (qh == uhci->next_qh)
579 uhci->next_qh = list_entry(qh->node.next, struct uhci_qh,
580 node);
581 list_move_tail(&qh->node, &uhci->skel_unlink_qh->node);
582 }
583
584 /*
585 * When we and the controller are through with a QH, it becomes IDLE.
586 * This happens when a QH has been off the schedule (on the unlinking
587 * list) for more than one frame, or when an error occurs while adding
588 * the first URB onto a new QH.
589 */
590 static void uhci_make_qh_idle(struct uhci_hcd *uhci, struct uhci_qh *qh)
591 {
592 WARN_ON(qh->state == QH_STATE_ACTIVE);
593
594 if (qh == uhci->next_qh)
595 uhci->next_qh = list_entry(qh->node.next, struct uhci_qh,
596 node);
597 list_move(&qh->node, &uhci->idle_qh_list);
598 qh->state = QH_STATE_IDLE;
599
600 /* Now that the QH is idle, its post_td isn't being used */
601 if (qh->post_td) {
602 uhci_free_td(uhci, qh->post_td);
603 qh->post_td = NULL;
604 }
605
606 /* If anyone is waiting for a QH to become idle, wake them up */
607 if (uhci->num_waiting)
608 wake_up_all(&uhci->waitqh);
609 }
610
611 /*
612 * Find the highest existing bandwidth load for a given phase and period.
613 */
614 static int uhci_highest_load(struct uhci_hcd *uhci, int phase, int period)
615 {
616 int highest_load = uhci->load[phase];
617
618 for (phase += period; phase < MAX_PHASE; phase += period)
619 highest_load = max_t(int, highest_load, uhci->load[phase]);
620 return highest_load;
621 }
622
623 /*
624 * Set qh->phase to the optimal phase for a periodic transfer and
625 * check whether the bandwidth requirement is acceptable.
626 */
627 static int uhci_check_bandwidth(struct uhci_hcd *uhci, struct uhci_qh *qh)
628 {
629 int minimax_load;
630
631 /* Find the optimal phase (unless it is already set) and get
632 * its load value. */
633 if (qh->phase >= 0)
634 minimax_load = uhci_highest_load(uhci, qh->phase, qh->period);
635 else {
636 int phase, load;
637 int max_phase = min_t(int, MAX_PHASE, qh->period);
638
639 qh->phase = 0;
640 minimax_load = uhci_highest_load(uhci, qh->phase, qh->period);
641 for (phase = 1; phase < max_phase; ++phase) {
642 load = uhci_highest_load(uhci, phase, qh->period);
643 if (load < minimax_load) {
644 minimax_load = load;
645 qh->phase = phase;
646 }
647 }
648 }
649
650 /* Maximum allowable periodic bandwidth is 90%, or 900 us per frame */
651 if (minimax_load + qh->load > 900) {
652 dev_dbg(uhci_dev(uhci), "bandwidth allocation failed: "
653 "period %d, phase %d, %d + %d us\n",
654 qh->period, qh->phase, minimax_load, qh->load);
655 return -ENOSPC;
656 }
657 return 0;
658 }
659
660 /*
661 * Reserve a periodic QH's bandwidth in the schedule
662 */
663 static void uhci_reserve_bandwidth(struct uhci_hcd *uhci, struct uhci_qh *qh)
664 {
665 int i;
666 int load = qh->load;
667 char *p = "??";
668
669 for (i = qh->phase; i < MAX_PHASE; i += qh->period) {
670 uhci->load[i] += load;
671 uhci->total_load += load;
672 }
673 uhci_to_hcd(uhci)->self.bandwidth_allocated =
674 uhci->total_load / MAX_PHASE;
675 switch (qh->type) {
676 case USB_ENDPOINT_XFER_INT:
677 ++uhci_to_hcd(uhci)->self.bandwidth_int_reqs;
678 p = "INT";
679 break;
680 case USB_ENDPOINT_XFER_ISOC:
681 ++uhci_to_hcd(uhci)->self.bandwidth_isoc_reqs;
682 p = "ISO";
683 break;
684 }
685 qh->bandwidth_reserved = 1;
686 dev_dbg(uhci_dev(uhci),
687 "%s dev %d ep%02x-%s, period %d, phase %d, %d us\n",
688 "reserve", qh->udev->devnum,
689 qh->hep->desc.bEndpointAddress, p,
690 qh->period, qh->phase, load);
691 }
692
693 /*
694 * Release a periodic QH's bandwidth reservation
695 */
696 static void uhci_release_bandwidth(struct uhci_hcd *uhci, struct uhci_qh *qh)
697 {
698 int i;
699 int load = qh->load;
700 char *p = "??";
701
702 for (i = qh->phase; i < MAX_PHASE; i += qh->period) {
703 uhci->load[i] -= load;
704 uhci->total_load -= load;
705 }
706 uhci_to_hcd(uhci)->self.bandwidth_allocated =
707 uhci->total_load / MAX_PHASE;
708 switch (qh->type) {
709 case USB_ENDPOINT_XFER_INT:
710 --uhci_to_hcd(uhci)->self.bandwidth_int_reqs;
711 p = "INT";
712 break;
713 case USB_ENDPOINT_XFER_ISOC:
714 --uhci_to_hcd(uhci)->self.bandwidth_isoc_reqs;
715 p = "ISO";
716 break;
717 }
718 qh->bandwidth_reserved = 0;
719 dev_dbg(uhci_dev(uhci),
720 "%s dev %d ep%02x-%s, period %d, phase %d, %d us\n",
721 "release", qh->udev->devnum,
722 qh->hep->desc.bEndpointAddress, p,
723 qh->period, qh->phase, load);
724 }
725
726 static inline struct urb_priv *uhci_alloc_urb_priv(struct uhci_hcd *uhci,
727 struct urb *urb)
728 {
729 struct urb_priv *urbp;
730
731 urbp = kmem_cache_zalloc(uhci_up_cachep, GFP_ATOMIC);
732 if (!urbp)
733 return NULL;
734
735 urbp->urb = urb;
736 urb->hcpriv = urbp;
737
738 INIT_LIST_HEAD(&urbp->node);
739 INIT_LIST_HEAD(&urbp->td_list);
740
741 return urbp;
742 }
743
744 static void uhci_free_urb_priv(struct uhci_hcd *uhci,
745 struct urb_priv *urbp)
746 {
747 struct uhci_td *td, *tmp;
748
749 if (!list_empty(&urbp->node)) {
750 dev_warn(uhci_dev(uhci), "urb %p still on QH's list!\n",
751 urbp->urb);
752 WARN_ON(1);
753 }
754
755 list_for_each_entry_safe(td, tmp, &urbp->td_list, list) {
756 uhci_remove_td_from_urbp(td);
757 uhci_free_td(uhci, td);
758 }
759
760 urbp->urb->hcpriv = NULL;
761 kmem_cache_free(uhci_up_cachep, urbp);
762 }
763
764 /*
765 * Map status to standard result codes
766 *
767 * <status> is (td_status(td) & 0xF60000), a.k.a.
768 * uhci_status_bits(td_status(td)).
769 * Note: <status> does not include the TD_CTRL_NAK bit.
770 * <dir_out> is True for output TDs and False for input TDs.
771 */
772 static int uhci_map_status(int status, int dir_out)
773 {
774 if (!status)
775 return 0;
776 if (status & TD_CTRL_BITSTUFF) /* Bitstuff error */
777 return -EPROTO;
778 if (status & TD_CTRL_CRCTIMEO) { /* CRC/Timeout */
779 if (dir_out)
780 return -EPROTO;
781 else
782 return -EILSEQ;
783 }
784 if (status & TD_CTRL_BABBLE) /* Babble */
785 return -EOVERFLOW;
786 if (status & TD_CTRL_DBUFERR) /* Buffer error */
787 return -ENOSR;
788 if (status & TD_CTRL_STALLED) /* Stalled */
789 return -EPIPE;
790 return 0;
791 }
792
793 /*
794 * Control transfers
795 */
796 static int uhci_submit_control(struct uhci_hcd *uhci, struct urb *urb,
797 struct uhci_qh *qh)
798 {
799 struct uhci_td *td;
800 unsigned long destination, status;
801 int maxsze = le16_to_cpu(qh->hep->desc.wMaxPacketSize);
802 int len = urb->transfer_buffer_length;
803 dma_addr_t data = urb->transfer_dma;
804 __le32 *plink;
805 struct urb_priv *urbp = urb->hcpriv;
806 int skel;
807
808 /* The "pipe" thing contains the destination in bits 8--18 */
809 destination = (urb->pipe & PIPE_DEVEP_MASK) | USB_PID_SETUP;
810
811 /* 3 errors, dummy TD remains inactive */
812 status = uhci_maxerr(3);
813 if (urb->dev->speed == USB_SPEED_LOW)
814 status |= TD_CTRL_LS;
815
816 /*
817 * Build the TD for the control request setup packet
818 */
819 td = qh->dummy_td;
820 uhci_add_td_to_urbp(td, urbp);
821 uhci_fill_td(td, status, destination | uhci_explen(8),
822 urb->setup_dma);
823 plink = &td->link;
824 status |= TD_CTRL_ACTIVE;
825
826 /*
827 * If direction is "send", change the packet ID from SETUP (0x2D)
828 * to OUT (0xE1). Else change it from SETUP to IN (0x69) and
829 * set Short Packet Detect (SPD) for all data packets.
830 *
831 * 0-length transfers always get treated as "send".
832 */
833 if (usb_pipeout(urb->pipe) || len == 0)
834 destination ^= (USB_PID_SETUP ^ USB_PID_OUT);
835 else {
836 destination ^= (USB_PID_SETUP ^ USB_PID_IN);
837 status |= TD_CTRL_SPD;
838 }
839
840 /*
841 * Build the DATA TDs
842 */
843 while (len > 0) {
844 int pktsze = maxsze;
845
846 if (len <= pktsze) { /* The last data packet */
847 pktsze = len;
848 status &= ~TD_CTRL_SPD;
849 }
850
851 td = uhci_alloc_td(uhci);
852 if (!td)
853 goto nomem;
854 *plink = LINK_TO_TD(td);
855
856 /* Alternate Data0/1 (start with Data1) */
857 destination ^= TD_TOKEN_TOGGLE;
858
859 uhci_add_td_to_urbp(td, urbp);
860 uhci_fill_td(td, status, destination | uhci_explen(pktsze),
861 data);
862 plink = &td->link;
863
864 data += pktsze;
865 len -= pktsze;
866 }
867
868 /*
869 * Build the final TD for control status
870 */
871 td = uhci_alloc_td(uhci);
872 if (!td)
873 goto nomem;
874 *plink = LINK_TO_TD(td);
875
876 /* Change direction for the status transaction */
877 destination ^= (USB_PID_IN ^ USB_PID_OUT);
878 destination |= TD_TOKEN_TOGGLE; /* End in Data1 */
879
880 uhci_add_td_to_urbp(td, urbp);
881 uhci_fill_td(td, status | TD_CTRL_IOC,
882 destination | uhci_explen(0), 0);
883 plink = &td->link;
884
885 /*
886 * Build the new dummy TD and activate the old one
887 */
888 td = uhci_alloc_td(uhci);
889 if (!td)
890 goto nomem;
891 *plink = LINK_TO_TD(td);
892
893 uhci_fill_td(td, 0, USB_PID_OUT | uhci_explen(0), 0);
894 wmb();
895 qh->dummy_td->status |= __constant_cpu_to_le32(TD_CTRL_ACTIVE);
896 qh->dummy_td = td;
897
898 /* Low-speed transfers get a different queue, and won't hog the bus.
899 * Also, some devices enumerate better without FSBR; the easiest way
900 * to do that is to put URBs on the low-speed queue while the device
901 * isn't in the CONFIGURED state. */
902 if (urb->dev->speed == USB_SPEED_LOW ||
903 urb->dev->state != USB_STATE_CONFIGURED)
904 skel = SKEL_LS_CONTROL;
905 else {
906 skel = SKEL_FS_CONTROL;
907 uhci_add_fsbr(uhci, urb);
908 }
909 if (qh->state != QH_STATE_ACTIVE)
910 qh->skel = skel;
911
912 urb->actual_length = -8; /* Account for the SETUP packet */
913 return 0;
914
915 nomem:
916 /* Remove the dummy TD from the td_list so it doesn't get freed */
917 uhci_remove_td_from_urbp(qh->dummy_td);
918 return -ENOMEM;
919 }
920
921 /*
922 * Common submit for bulk and interrupt
923 */
924 static int uhci_submit_common(struct uhci_hcd *uhci, struct urb *urb,
925 struct uhci_qh *qh)
926 {
927 struct uhci_td *td;
928 unsigned long destination, status;
929 int maxsze = le16_to_cpu(qh->hep->desc.wMaxPacketSize);
930 int len = urb->transfer_buffer_length;
931 dma_addr_t data = urb->transfer_dma;
932 __le32 *plink;
933 struct urb_priv *urbp = urb->hcpriv;
934 unsigned int toggle;
935
936 if (len < 0)
937 return -EINVAL;
938
939 /* The "pipe" thing contains the destination in bits 8--18 */
940 destination = (urb->pipe & PIPE_DEVEP_MASK) | usb_packetid(urb->pipe);
941 toggle = usb_gettoggle(urb->dev, usb_pipeendpoint(urb->pipe),
942 usb_pipeout(urb->pipe));
943
944 /* 3 errors, dummy TD remains inactive */
945 status = uhci_maxerr(3);
946 if (urb->dev->speed == USB_SPEED_LOW)
947 status |= TD_CTRL_LS;
948 if (usb_pipein(urb->pipe))
949 status |= TD_CTRL_SPD;
950
951 /*
952 * Build the DATA TDs
953 */
954 plink = NULL;
955 td = qh->dummy_td;
956 do { /* Allow zero length packets */
957 int pktsze = maxsze;
958
959 if (len <= pktsze) { /* The last packet */
960 pktsze = len;
961 if (!(urb->transfer_flags & URB_SHORT_NOT_OK))
962 status &= ~TD_CTRL_SPD;
963 }
964
965 if (plink) {
966 td = uhci_alloc_td(uhci);
967 if (!td)
968 goto nomem;
969 *plink = LINK_TO_TD(td);
970 }
971 uhci_add_td_to_urbp(td, urbp);
972 uhci_fill_td(td, status,
973 destination | uhci_explen(pktsze) |
974 (toggle << TD_TOKEN_TOGGLE_SHIFT),
975 data);
976 plink = &td->link;
977 status |= TD_CTRL_ACTIVE;
978
979 data += pktsze;
980 len -= maxsze;
981 toggle ^= 1;
982 } while (len > 0);
983
984 /*
985 * URB_ZERO_PACKET means adding a 0-length packet, if direction
986 * is OUT and the transfer_length was an exact multiple of maxsze,
987 * hence (len = transfer_length - N * maxsze) == 0
988 * however, if transfer_length == 0, the zero packet was already
989 * prepared above.
990 */
991 if ((urb->transfer_flags & URB_ZERO_PACKET) &&
992 usb_pipeout(urb->pipe) && len == 0 &&
993 urb->transfer_buffer_length > 0) {
994 td = uhci_alloc_td(uhci);
995 if (!td)
996 goto nomem;
997 *plink = LINK_TO_TD(td);
998
999 uhci_add_td_to_urbp(td, urbp);
1000 uhci_fill_td(td, status,
1001 destination | uhci_explen(0) |
1002 (toggle << TD_TOKEN_TOGGLE_SHIFT),
1003 data);
1004 plink = &td->link;
1005
1006 toggle ^= 1;
1007 }
1008
1009 /* Set the interrupt-on-completion flag on the last packet.
1010 * A more-or-less typical 4 KB URB (= size of one memory page)
1011 * will require about 3 ms to transfer; that's a little on the
1012 * fast side but not enough to justify delaying an interrupt
1013 * more than 2 or 3 URBs, so we will ignore the URB_NO_INTERRUPT
1014 * flag setting. */
1015 td->status |= __constant_cpu_to_le32(TD_CTRL_IOC);
1016
1017 /*
1018 * Build the new dummy TD and activate the old one
1019 */
1020 td = uhci_alloc_td(uhci);
1021 if (!td)
1022 goto nomem;
1023 *plink = LINK_TO_TD(td);
1024
1025 uhci_fill_td(td, 0, USB_PID_OUT | uhci_explen(0), 0);
1026 wmb();
1027 qh->dummy_td->status |= __constant_cpu_to_le32(TD_CTRL_ACTIVE);
1028 qh->dummy_td = td;
1029
1030 usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe),
1031 usb_pipeout(urb->pipe), toggle);
1032 return 0;
1033
1034 nomem:
1035 /* Remove the dummy TD from the td_list so it doesn't get freed */
1036 uhci_remove_td_from_urbp(qh->dummy_td);
1037 return -ENOMEM;
1038 }
1039
1040 static int uhci_submit_bulk(struct uhci_hcd *uhci, struct urb *urb,
1041 struct uhci_qh *qh)
1042 {
1043 int ret;
1044
1045 /* Can't have low-speed bulk transfers */
1046 if (urb->dev->speed == USB_SPEED_LOW)
1047 return -EINVAL;
1048
1049 if (qh->state != QH_STATE_ACTIVE)
1050 qh->skel = SKEL_BULK;
1051 ret = uhci_submit_common(uhci, urb, qh);
1052 if (ret == 0)
1053 uhci_add_fsbr(uhci, urb);
1054 return ret;
1055 }
1056
1057 static int uhci_submit_interrupt(struct uhci_hcd *uhci, struct urb *urb,
1058 struct uhci_qh *qh)
1059 {
1060 int ret;
1061
1062 /* USB 1.1 interrupt transfers only involve one packet per interval.
1063 * Drivers can submit URBs of any length, but longer ones will need
1064 * multiple intervals to complete.
1065 */
1066
1067 if (!qh->bandwidth_reserved) {
1068 int exponent;
1069
1070 /* Figure out which power-of-two queue to use */
1071 for (exponent = 7; exponent >= 0; --exponent) {
1072 if ((1 << exponent) <= urb->interval)
1073 break;
1074 }
1075 if (exponent < 0)
1076 return -EINVAL;
1077 qh->period = 1 << exponent;
1078 qh->skel = SKEL_INDEX(exponent);
1079
1080 /* For now, interrupt phase is fixed by the layout
1081 * of the QH lists. */
1082 qh->phase = (qh->period / 2) & (MAX_PHASE - 1);
1083 ret = uhci_check_bandwidth(uhci, qh);
1084 if (ret)
1085 return ret;
1086 } else if (qh->period > urb->interval)
1087 return -EINVAL; /* Can't decrease the period */
1088
1089 ret = uhci_submit_common(uhci, urb, qh);
1090 if (ret == 0) {
1091 urb->interval = qh->period;
1092 if (!qh->bandwidth_reserved)
1093 uhci_reserve_bandwidth(uhci, qh);
1094 }
1095 return ret;
1096 }
1097
1098 /*
1099 * Fix up the data structures following a short transfer
1100 */
1101 static int uhci_fixup_short_transfer(struct uhci_hcd *uhci,
1102 struct uhci_qh *qh, struct urb_priv *urbp)
1103 {
1104 struct uhci_td *td;
1105 struct list_head *tmp;
1106 int ret;
1107
1108 td = list_entry(urbp->td_list.prev, struct uhci_td, list);
1109 if (qh->type == USB_ENDPOINT_XFER_CONTROL) {
1110
1111 /* When a control transfer is short, we have to restart
1112 * the queue at the status stage transaction, which is
1113 * the last TD. */
1114 WARN_ON(list_empty(&urbp->td_list));
1115 qh->element = LINK_TO_TD(td);
1116 tmp = td->list.prev;
1117 ret = -EINPROGRESS;
1118
1119 } else {
1120
1121 /* When a bulk/interrupt transfer is short, we have to
1122 * fix up the toggles of the following URBs on the queue
1123 * before restarting the queue at the next URB. */
1124 qh->initial_toggle = uhci_toggle(td_token(qh->post_td)) ^ 1;
1125 uhci_fixup_toggles(qh, 1);
1126
1127 if (list_empty(&urbp->td_list))
1128 td = qh->post_td;
1129 qh->element = td->link;
1130 tmp = urbp->td_list.prev;
1131 ret = 0;
1132 }
1133
1134 /* Remove all the TDs we skipped over, from tmp back to the start */
1135 while (tmp != &urbp->td_list) {
1136 td = list_entry(tmp, struct uhci_td, list);
1137 tmp = tmp->prev;
1138
1139 uhci_remove_td_from_urbp(td);
1140 uhci_free_td(uhci, td);
1141 }
1142 return ret;
1143 }
1144
1145 /*
1146 * Common result for control, bulk, and interrupt
1147 */
1148 static int uhci_result_common(struct uhci_hcd *uhci, struct urb *urb)
1149 {
1150 struct urb_priv *urbp = urb->hcpriv;
1151 struct uhci_qh *qh = urbp->qh;
1152 struct uhci_td *td, *tmp;
1153 unsigned status;
1154 int ret = 0;
1155
1156 list_for_each_entry_safe(td, tmp, &urbp->td_list, list) {
1157 unsigned int ctrlstat;
1158 int len;
1159
1160 ctrlstat = td_status(td);
1161 status = uhci_status_bits(ctrlstat);
1162 if (status & TD_CTRL_ACTIVE)
1163 return -EINPROGRESS;
1164
1165 len = uhci_actual_length(ctrlstat);
1166 urb->actual_length += len;
1167
1168 if (status) {
1169 ret = uhci_map_status(status,
1170 uhci_packetout(td_token(td)));
1171 if ((debug == 1 && ret != -EPIPE) || debug > 1) {
1172 /* Some debugging code */
1173 dev_dbg(&urb->dev->dev,
1174 "%s: failed with status %x\n",
1175 __FUNCTION__, status);
1176
1177 if (debug > 1 && errbuf) {
1178 /* Print the chain for debugging */
1179 uhci_show_qh(uhci, urbp->qh, errbuf,
1180 ERRBUF_LEN, 0);
1181 lprintk(errbuf);
1182 }
1183 }
1184
1185 /* Did we receive a short packet? */
1186 } else if (len < uhci_expected_length(td_token(td))) {
1187
1188 /* For control transfers, go to the status TD if
1189 * this isn't already the last data TD */
1190 if (qh->type == USB_ENDPOINT_XFER_CONTROL) {
1191 if (td->list.next != urbp->td_list.prev)
1192 ret = 1;
1193 }
1194
1195 /* For bulk and interrupt, this may be an error */
1196 else if (urb->transfer_flags & URB_SHORT_NOT_OK)
1197 ret = -EREMOTEIO;
1198
1199 /* Fixup needed only if this isn't the URB's last TD */
1200 else if (&td->list != urbp->td_list.prev)
1201 ret = 1;
1202 }
1203
1204 uhci_remove_td_from_urbp(td);
1205 if (qh->post_td)
1206 uhci_free_td(uhci, qh->post_td);
1207 qh->post_td = td;
1208
1209 if (ret != 0)
1210 goto err;
1211 }
1212 return ret;
1213
1214 err:
1215 if (ret < 0) {
1216 /* Note that the queue has stopped and save
1217 * the next toggle value */
1218 qh->element = UHCI_PTR_TERM;
1219 qh->is_stopped = 1;
1220 qh->needs_fixup = (qh->type != USB_ENDPOINT_XFER_CONTROL);
1221 qh->initial_toggle = uhci_toggle(td_token(td)) ^
1222 (ret == -EREMOTEIO);
1223
1224 } else /* Short packet received */
1225 ret = uhci_fixup_short_transfer(uhci, qh, urbp);
1226 return ret;
1227 }
1228
1229 /*
1230 * Isochronous transfers
1231 */
1232 static int uhci_submit_isochronous(struct uhci_hcd *uhci, struct urb *urb,
1233 struct uhci_qh *qh)
1234 {
1235 struct uhci_td *td = NULL; /* Since urb->number_of_packets > 0 */
1236 int i, frame;
1237 unsigned long destination, status;
1238 struct urb_priv *urbp = (struct urb_priv *) urb->hcpriv;
1239
1240 /* Values must not be too big (could overflow below) */
1241 if (urb->interval >= UHCI_NUMFRAMES ||
1242 urb->number_of_packets >= UHCI_NUMFRAMES)
1243 return -EFBIG;
1244
1245 /* Check the period and figure out the starting frame number */
1246 if (!qh->bandwidth_reserved) {
1247 qh->period = urb->interval;
1248 if (urb->transfer_flags & URB_ISO_ASAP) {
1249 qh->phase = -1; /* Find the best phase */
1250 i = uhci_check_bandwidth(uhci, qh);
1251 if (i)
1252 return i;
1253
1254 /* Allow a little time to allocate the TDs */
1255 uhci_get_current_frame_number(uhci);
1256 frame = uhci->frame_number + 10;
1257
1258 /* Move forward to the first frame having the
1259 * correct phase */
1260 urb->start_frame = frame + ((qh->phase - frame) &
1261 (qh->period - 1));
1262 } else {
1263 i = urb->start_frame - uhci->last_iso_frame;
1264 if (i <= 0 || i >= UHCI_NUMFRAMES)
1265 return -EINVAL;
1266 qh->phase = urb->start_frame & (qh->period - 1);
1267 i = uhci_check_bandwidth(uhci, qh);
1268 if (i)
1269 return i;
1270 }
1271
1272 } else if (qh->period != urb->interval) {
1273 return -EINVAL; /* Can't change the period */
1274
1275 } else { /* Pick up where the last URB leaves off */
1276 if (list_empty(&qh->queue)) {
1277 frame = qh->iso_frame;
1278 } else {
1279 struct urb *lurb;
1280
1281 lurb = list_entry(qh->queue.prev,
1282 struct urb_priv, node)->urb;
1283 frame = lurb->start_frame +
1284 lurb->number_of_packets *
1285 lurb->interval;
1286 }
1287 if (urb->transfer_flags & URB_ISO_ASAP)
1288 urb->start_frame = frame;
1289 else if (urb->start_frame != frame)
1290 return -EINVAL;
1291 }
1292
1293 /* Make sure we won't have to go too far into the future */
1294 if (uhci_frame_before_eq(uhci->last_iso_frame + UHCI_NUMFRAMES,
1295 urb->start_frame + urb->number_of_packets *
1296 urb->interval))
1297 return -EFBIG;
1298
1299 status = TD_CTRL_ACTIVE | TD_CTRL_IOS;
1300 destination = (urb->pipe & PIPE_DEVEP_MASK) | usb_packetid(urb->pipe);
1301
1302 for (i = 0; i < urb->number_of_packets; i++) {
1303 td = uhci_alloc_td(uhci);
1304 if (!td)
1305 return -ENOMEM;
1306
1307 uhci_add_td_to_urbp(td, urbp);
1308 uhci_fill_td(td, status, destination |
1309 uhci_explen(urb->iso_frame_desc[i].length),
1310 urb->transfer_dma +
1311 urb->iso_frame_desc[i].offset);
1312 }
1313
1314 /* Set the interrupt-on-completion flag on the last packet. */
1315 td->status |= __constant_cpu_to_le32(TD_CTRL_IOC);
1316
1317 /* Add the TDs to the frame list */
1318 frame = urb->start_frame;
1319 list_for_each_entry(td, &urbp->td_list, list) {
1320 uhci_insert_td_in_frame_list(uhci, td, frame);
1321 frame += qh->period;
1322 }
1323
1324 if (list_empty(&qh->queue)) {
1325 qh->iso_packet_desc = &urb->iso_frame_desc[0];
1326 qh->iso_frame = urb->start_frame;
1327 qh->iso_status = 0;
1328 }
1329
1330 qh->skel = SKEL_ISO;
1331 if (!qh->bandwidth_reserved)
1332 uhci_reserve_bandwidth(uhci, qh);
1333 return 0;
1334 }
1335
1336 static int uhci_result_isochronous(struct uhci_hcd *uhci, struct urb *urb)
1337 {
1338 struct uhci_td *td, *tmp;
1339 struct urb_priv *urbp = urb->hcpriv;
1340 struct uhci_qh *qh = urbp->qh;
1341
1342 list_for_each_entry_safe(td, tmp, &urbp->td_list, list) {
1343 unsigned int ctrlstat;
1344 int status;
1345 int actlength;
1346
1347 if (uhci_frame_before_eq(uhci->cur_iso_frame, qh->iso_frame))
1348 return -EINPROGRESS;
1349
1350 uhci_remove_tds_from_frame(uhci, qh->iso_frame);
1351
1352 ctrlstat = td_status(td);
1353 if (ctrlstat & TD_CTRL_ACTIVE) {
1354 status = -EXDEV; /* TD was added too late? */
1355 } else {
1356 status = uhci_map_status(uhci_status_bits(ctrlstat),
1357 usb_pipeout(urb->pipe));
1358 actlength = uhci_actual_length(ctrlstat);
1359
1360 urb->actual_length += actlength;
1361 qh->iso_packet_desc->actual_length = actlength;
1362 qh->iso_packet_desc->status = status;
1363 }
1364
1365 if (status) {
1366 urb->error_count++;
1367 qh->iso_status = status;
1368 }
1369
1370 uhci_remove_td_from_urbp(td);
1371 uhci_free_td(uhci, td);
1372 qh->iso_frame += qh->period;
1373 ++qh->iso_packet_desc;
1374 }
1375 return qh->iso_status;
1376 }
1377
1378 static int uhci_urb_enqueue(struct usb_hcd *hcd,
1379 struct usb_host_endpoint *hep,
1380 struct urb *urb, gfp_t mem_flags)
1381 {
1382 int ret;
1383 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
1384 unsigned long flags;
1385 struct urb_priv *urbp;
1386 struct uhci_qh *qh;
1387
1388 spin_lock_irqsave(&uhci->lock, flags);
1389
1390 ret = urb->status;
1391 if (ret != -EINPROGRESS) /* URB already unlinked! */
1392 goto done;
1393
1394 ret = -ENOMEM;
1395 urbp = uhci_alloc_urb_priv(uhci, urb);
1396 if (!urbp)
1397 goto done;
1398
1399 if (hep->hcpriv)
1400 qh = (struct uhci_qh *) hep->hcpriv;
1401 else {
1402 qh = uhci_alloc_qh(uhci, urb->dev, hep);
1403 if (!qh)
1404 goto err_no_qh;
1405 }
1406 urbp->qh = qh;
1407
1408 switch (qh->type) {
1409 case USB_ENDPOINT_XFER_CONTROL:
1410 ret = uhci_submit_control(uhci, urb, qh);
1411 break;
1412 case USB_ENDPOINT_XFER_BULK:
1413 ret = uhci_submit_bulk(uhci, urb, qh);
1414 break;
1415 case USB_ENDPOINT_XFER_INT:
1416 ret = uhci_submit_interrupt(uhci, urb, qh);
1417 break;
1418 case USB_ENDPOINT_XFER_ISOC:
1419 urb->error_count = 0;
1420 ret = uhci_submit_isochronous(uhci, urb, qh);
1421 break;
1422 }
1423 if (ret != 0)
1424 goto err_submit_failed;
1425
1426 /* Add this URB to the QH */
1427 urbp->qh = qh;
1428 list_add_tail(&urbp->node, &qh->queue);
1429
1430 /* If the new URB is the first and only one on this QH then either
1431 * the QH is new and idle or else it's unlinked and waiting to
1432 * become idle, so we can activate it right away. But only if the
1433 * queue isn't stopped. */
1434 if (qh->queue.next == &urbp->node && !qh->is_stopped) {
1435 uhci_activate_qh(uhci, qh);
1436 uhci_urbp_wants_fsbr(uhci, urbp);
1437 }
1438 goto done;
1439
1440 err_submit_failed:
1441 if (qh->state == QH_STATE_IDLE)
1442 uhci_make_qh_idle(uhci, qh); /* Reclaim unused QH */
1443
1444 err_no_qh:
1445 uhci_free_urb_priv(uhci, urbp);
1446
1447 done:
1448 spin_unlock_irqrestore(&uhci->lock, flags);
1449 return ret;
1450 }
1451
1452 static int uhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb)
1453 {
1454 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
1455 unsigned long flags;
1456 struct urb_priv *urbp;
1457 struct uhci_qh *qh;
1458
1459 spin_lock_irqsave(&uhci->lock, flags);
1460 urbp = urb->hcpriv;
1461 if (!urbp) /* URB was never linked! */
1462 goto done;
1463 qh = urbp->qh;
1464
1465 /* Remove Isochronous TDs from the frame list ASAP */
1466 if (qh->type == USB_ENDPOINT_XFER_ISOC) {
1467 uhci_unlink_isochronous_tds(uhci, urb);
1468 mb();
1469
1470 /* If the URB has already started, update the QH unlink time */
1471 uhci_get_current_frame_number(uhci);
1472 if (uhci_frame_before_eq(urb->start_frame, uhci->frame_number))
1473 qh->unlink_frame = uhci->frame_number;
1474 }
1475
1476 uhci_unlink_qh(uhci, qh);
1477
1478 done:
1479 spin_unlock_irqrestore(&uhci->lock, flags);
1480 return 0;
1481 }
1482
1483 /*
1484 * Finish unlinking an URB and give it back
1485 */
1486 static void uhci_giveback_urb(struct uhci_hcd *uhci, struct uhci_qh *qh,
1487 struct urb *urb)
1488 __releases(uhci->lock)
1489 __acquires(uhci->lock)
1490 {
1491 struct urb_priv *urbp = (struct urb_priv *) urb->hcpriv;
1492
1493 if (qh->type == USB_ENDPOINT_XFER_CONTROL) {
1494
1495 /* urb->actual_length < 0 means the setup transaction didn't
1496 * complete successfully. Either it failed or the URB was
1497 * unlinked first. Regardless, don't confuse people with a
1498 * negative length. */
1499 urb->actual_length = max(urb->actual_length, 0);
1500
1501 /* Report erroneous short transfers */
1502 if (unlikely((urb->transfer_flags & URB_SHORT_NOT_OK) &&
1503 urb->actual_length <
1504 urb->transfer_buffer_length &&
1505 urb->status == 0))
1506 urb->status = -EREMOTEIO;
1507 }
1508
1509 /* When giving back the first URB in an Isochronous queue,
1510 * reinitialize the QH's iso-related members for the next URB. */
1511 else if (qh->type == USB_ENDPOINT_XFER_ISOC &&
1512 urbp->node.prev == &qh->queue &&
1513 urbp->node.next != &qh->queue) {
1514 struct urb *nurb = list_entry(urbp->node.next,
1515 struct urb_priv, node)->urb;
1516
1517 qh->iso_packet_desc = &nurb->iso_frame_desc[0];
1518 qh->iso_frame = nurb->start_frame;
1519 qh->iso_status = 0;
1520 }
1521
1522 /* Take the URB off the QH's queue. If the queue is now empty,
1523 * this is a perfect time for a toggle fixup. */
1524 list_del_init(&urbp->node);
1525 if (list_empty(&qh->queue) && qh->needs_fixup) {
1526 usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe),
1527 usb_pipeout(urb->pipe), qh->initial_toggle);
1528 qh->needs_fixup = 0;
1529 }
1530
1531 uhci_free_urb_priv(uhci, urbp);
1532
1533 spin_unlock(&uhci->lock);
1534 usb_hcd_giveback_urb(uhci_to_hcd(uhci), urb);
1535 spin_lock(&uhci->lock);
1536
1537 /* If the queue is now empty, we can unlink the QH and give up its
1538 * reserved bandwidth. */
1539 if (list_empty(&qh->queue)) {
1540 uhci_unlink_qh(uhci, qh);
1541 if (qh->bandwidth_reserved)
1542 uhci_release_bandwidth(uhci, qh);
1543 }
1544 }
1545
1546 /*
1547 * Scan the URBs in a QH's queue
1548 */
1549 #define QH_FINISHED_UNLINKING(qh) \
1550 (qh->state == QH_STATE_UNLINKING && \
1551 uhci->frame_number + uhci->is_stopped != qh->unlink_frame)
1552
1553 static void uhci_scan_qh(struct uhci_hcd *uhci, struct uhci_qh *qh)
1554 {
1555 struct urb_priv *urbp;
1556 struct urb *urb;
1557 int status;
1558
1559 while (!list_empty(&qh->queue)) {
1560 urbp = list_entry(qh->queue.next, struct urb_priv, node);
1561 urb = urbp->urb;
1562
1563 if (qh->type == USB_ENDPOINT_XFER_ISOC)
1564 status = uhci_result_isochronous(uhci, urb);
1565 else
1566 status = uhci_result_common(uhci, urb);
1567 if (status == -EINPROGRESS)
1568 break;
1569
1570 spin_lock(&urb->lock);
1571 if (urb->status == -EINPROGRESS) /* Not dequeued */
1572 urb->status = status;
1573 else
1574 status = ECONNRESET; /* Not -ECONNRESET */
1575 spin_unlock(&urb->lock);
1576
1577 /* Dequeued but completed URBs can't be given back unless
1578 * the QH is stopped or has finished unlinking. */
1579 if (status == ECONNRESET) {
1580 if (QH_FINISHED_UNLINKING(qh))
1581 qh->is_stopped = 1;
1582 else if (!qh->is_stopped)
1583 return;
1584 }
1585
1586 uhci_giveback_urb(uhci, qh, urb);
1587 if (status < 0 && qh->type != USB_ENDPOINT_XFER_ISOC)
1588 break;
1589 }
1590
1591 /* If the QH is neither stopped nor finished unlinking (normal case),
1592 * our work here is done. */
1593 if (QH_FINISHED_UNLINKING(qh))
1594 qh->is_stopped = 1;
1595 else if (!qh->is_stopped)
1596 return;
1597
1598 /* Otherwise give back each of the dequeued URBs */
1599 restart:
1600 list_for_each_entry(urbp, &qh->queue, node) {
1601 urb = urbp->urb;
1602 if (urb->status != -EINPROGRESS) {
1603
1604 /* Fix up the TD links and save the toggles for
1605 * non-Isochronous queues. For Isochronous queues,
1606 * test for too-recent dequeues. */
1607 if (!uhci_cleanup_queue(uhci, qh, urb)) {
1608 qh->is_stopped = 0;
1609 return;
1610 }
1611 uhci_giveback_urb(uhci, qh, urb);
1612 goto restart;
1613 }
1614 }
1615 qh->is_stopped = 0;
1616
1617 /* There are no more dequeued URBs. If there are still URBs on the
1618 * queue, the QH can now be re-activated. */
1619 if (!list_empty(&qh->queue)) {
1620 if (qh->needs_fixup)
1621 uhci_fixup_toggles(qh, 0);
1622
1623 /* If the first URB on the queue wants FSBR but its time
1624 * limit has expired, set the next TD to interrupt on
1625 * completion before reactivating the QH. */
1626 urbp = list_entry(qh->queue.next, struct urb_priv, node);
1627 if (urbp->fsbr && qh->wait_expired) {
1628 struct uhci_td *td = list_entry(urbp->td_list.next,
1629 struct uhci_td, list);
1630
1631 td->status |= __cpu_to_le32(TD_CTRL_IOC);
1632 }
1633
1634 uhci_activate_qh(uhci, qh);
1635 }
1636
1637 /* The queue is empty. The QH can become idle if it is fully
1638 * unlinked. */
1639 else if (QH_FINISHED_UNLINKING(qh))
1640 uhci_make_qh_idle(uhci, qh);
1641 }
1642
1643 /*
1644 * Check for queues that have made some forward progress.
1645 * Returns 0 if the queue is not Isochronous, is ACTIVE, and
1646 * has not advanced since last examined; 1 otherwise.
1647 *
1648 * Early Intel controllers have a bug which causes qh->element sometimes
1649 * not to advance when a TD completes successfully. The queue remains
1650 * stuck on the inactive completed TD. We detect such cases and advance
1651 * the element pointer by hand.
1652 */
1653 static int uhci_advance_check(struct uhci_hcd *uhci, struct uhci_qh *qh)
1654 {
1655 struct urb_priv *urbp = NULL;
1656 struct uhci_td *td;
1657 int ret = 1;
1658 unsigned status;
1659
1660 if (qh->type == USB_ENDPOINT_XFER_ISOC)
1661 goto done;
1662
1663 /* Treat an UNLINKING queue as though it hasn't advanced.
1664 * This is okay because reactivation will treat it as though
1665 * it has advanced, and if it is going to become IDLE then
1666 * this doesn't matter anyway. Furthermore it's possible
1667 * for an UNLINKING queue not to have any URBs at all, or
1668 * for its first URB not to have any TDs (if it was dequeued
1669 * just as it completed). So it's not easy in any case to
1670 * test whether such queues have advanced. */
1671 if (qh->state != QH_STATE_ACTIVE) {
1672 urbp = NULL;
1673 status = 0;
1674
1675 } else {
1676 urbp = list_entry(qh->queue.next, struct urb_priv, node);
1677 td = list_entry(urbp->td_list.next, struct uhci_td, list);
1678 status = td_status(td);
1679 if (!(status & TD_CTRL_ACTIVE)) {
1680
1681 /* We're okay, the queue has advanced */
1682 qh->wait_expired = 0;
1683 qh->advance_jiffies = jiffies;
1684 goto done;
1685 }
1686 ret = 0;
1687 }
1688
1689 /* The queue hasn't advanced; check for timeout */
1690 if (qh->wait_expired)
1691 goto done;
1692
1693 if (time_after(jiffies, qh->advance_jiffies + QH_WAIT_TIMEOUT)) {
1694
1695 /* Detect the Intel bug and work around it */
1696 if (qh->post_td && qh_element(qh) == LINK_TO_TD(qh->post_td)) {
1697 qh->element = qh->post_td->link;
1698 qh->advance_jiffies = jiffies;
1699 ret = 1;
1700 goto done;
1701 }
1702
1703 qh->wait_expired = 1;
1704
1705 /* If the current URB wants FSBR, unlink it temporarily
1706 * so that we can safely set the next TD to interrupt on
1707 * completion. That way we'll know as soon as the queue
1708 * starts moving again. */
1709 if (urbp && urbp->fsbr && !(status & TD_CTRL_IOC))
1710 uhci_unlink_qh(uhci, qh);
1711
1712 } else {
1713 /* Unmoving but not-yet-expired queues keep FSBR alive */
1714 if (urbp)
1715 uhci_urbp_wants_fsbr(uhci, urbp);
1716 }
1717
1718 done:
1719 return ret;
1720 }
1721
1722 /*
1723 * Process events in the schedule, but only in one thread at a time
1724 */
1725 static void uhci_scan_schedule(struct uhci_hcd *uhci)
1726 {
1727 int i;
1728 struct uhci_qh *qh;
1729
1730 /* Don't allow re-entrant calls */
1731 if (uhci->scan_in_progress) {
1732 uhci->need_rescan = 1;
1733 return;
1734 }
1735 uhci->scan_in_progress = 1;
1736 rescan:
1737 uhci->need_rescan = 0;
1738 uhci->fsbr_is_wanted = 0;
1739
1740 uhci_clear_next_interrupt(uhci);
1741 uhci_get_current_frame_number(uhci);
1742 uhci->cur_iso_frame = uhci->frame_number;
1743
1744 /* Go through all the QH queues and process the URBs in each one */
1745 for (i = 0; i < UHCI_NUM_SKELQH - 1; ++i) {
1746 uhci->next_qh = list_entry(uhci->skelqh[i]->node.next,
1747 struct uhci_qh, node);
1748 while ((qh = uhci->next_qh) != uhci->skelqh[i]) {
1749 uhci->next_qh = list_entry(qh->node.next,
1750 struct uhci_qh, node);
1751
1752 if (uhci_advance_check(uhci, qh)) {
1753 uhci_scan_qh(uhci, qh);
1754 if (qh->state == QH_STATE_ACTIVE) {
1755 uhci_urbp_wants_fsbr(uhci,
1756 list_entry(qh->queue.next, struct urb_priv, node));
1757 }
1758 }
1759 }
1760 }
1761
1762 uhci->last_iso_frame = uhci->cur_iso_frame;
1763 if (uhci->need_rescan)
1764 goto rescan;
1765 uhci->scan_in_progress = 0;
1766
1767 if (uhci->fsbr_is_on && !uhci->fsbr_is_wanted &&
1768 !uhci->fsbr_expiring) {
1769 uhci->fsbr_expiring = 1;
1770 mod_timer(&uhci->fsbr_timer, jiffies + FSBR_OFF_DELAY);
1771 }
1772
1773 if (list_empty(&uhci->skel_unlink_qh->node))
1774 uhci_clear_next_interrupt(uhci);
1775 else
1776 uhci_set_next_interrupt(uhci);
1777 }
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