xhci: Don't let the USB core disable SuperSpeed ports.
[deliverable/linux.git] / drivers / usb / host / xhci-hub.c
1 /*
2 * xHCI host controller driver
3 *
4 * Copyright (C) 2008 Intel Corp.
5 *
6 * Author: Sarah Sharp
7 * Some code borrowed from the Linux EHCI driver.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 * for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23 #include <asm/unaligned.h>
24
25 #include "xhci.h"
26
27 #define PORT_WAKE_BITS (PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E)
28 #define PORT_RWC_BITS (PORT_CSC | PORT_PEC | PORT_WRC | PORT_OCC | \
29 PORT_RC | PORT_PLC | PORT_PE)
30
31 static void xhci_hub_descriptor(struct xhci_hcd *xhci,
32 struct usb_hub_descriptor *desc)
33 {
34 int ports;
35 u16 temp;
36
37 ports = HCS_MAX_PORTS(xhci->hcs_params1);
38
39 /* USB 3.0 hubs have a different descriptor, but we fake this for now */
40 desc->bDescriptorType = 0x29;
41 desc->bPwrOn2PwrGood = 10; /* xhci section 5.4.9 says 20ms max */
42 desc->bHubContrCurrent = 0;
43
44 desc->bNbrPorts = ports;
45 temp = 1 + (ports / 8);
46 desc->bDescLength = 7 + 2 * temp;
47
48 /* Why does core/hcd.h define bitmap? It's just confusing. */
49 memset(&desc->DeviceRemovable[0], 0, temp);
50 memset(&desc->DeviceRemovable[temp], 0xff, temp);
51
52 /* Ugh, these should be #defines, FIXME */
53 /* Using table 11-13 in USB 2.0 spec. */
54 temp = 0;
55 /* Bits 1:0 - support port power switching, or power always on */
56 if (HCC_PPC(xhci->hcc_params))
57 temp |= 0x0001;
58 else
59 temp |= 0x0002;
60 /* Bit 2 - root hubs are not part of a compound device */
61 /* Bits 4:3 - individual port over current protection */
62 temp |= 0x0008;
63 /* Bits 6:5 - no TTs in root ports */
64 /* Bit 7 - no port indicators */
65 desc->wHubCharacteristics = (__force __u16) cpu_to_le16(temp);
66 }
67
68 static unsigned int xhci_port_speed(unsigned int port_status)
69 {
70 if (DEV_LOWSPEED(port_status))
71 return USB_PORT_STAT_LOW_SPEED;
72 if (DEV_HIGHSPEED(port_status))
73 return USB_PORT_STAT_HIGH_SPEED;
74 if (DEV_SUPERSPEED(port_status))
75 return USB_PORT_STAT_SUPER_SPEED;
76 /*
77 * FIXME: Yes, we should check for full speed, but the core uses that as
78 * a default in portspeed() in usb/core/hub.c (which is the only place
79 * USB_PORT_STAT_*_SPEED is used).
80 */
81 return 0;
82 }
83
84 /*
85 * These bits are Read Only (RO) and should be saved and written to the
86 * registers: 0, 3, 10:13, 30
87 * connect status, over-current status, port speed, and device removable.
88 * connect status and port speed are also sticky - meaning they're in
89 * the AUX well and they aren't changed by a hot, warm, or cold reset.
90 */
91 #define XHCI_PORT_RO ((1<<0) | (1<<3) | (0xf<<10) | (1<<30))
92 /*
93 * These bits are RW; writing a 0 clears the bit, writing a 1 sets the bit:
94 * bits 5:8, 9, 14:15, 25:27
95 * link state, port power, port indicator state, "wake on" enable state
96 */
97 #define XHCI_PORT_RWS ((0xf<<5) | (1<<9) | (0x3<<14) | (0x7<<25))
98 /*
99 * These bits are RW; writing a 1 sets the bit, writing a 0 has no effect:
100 * bit 4 (port reset)
101 */
102 #define XHCI_PORT_RW1S ((1<<4))
103 /*
104 * These bits are RW; writing a 1 clears the bit, writing a 0 has no effect:
105 * bits 1, 17, 18, 19, 20, 21, 22, 23
106 * port enable/disable, and
107 * change bits: connect, PED, warm port reset changed (reserved zero for USB 2.0 ports),
108 * over-current, reset, link state, and L1 change
109 */
110 #define XHCI_PORT_RW1CS ((1<<1) | (0x7f<<17))
111 /*
112 * Bit 16 is RW, and writing a '1' to it causes the link state control to be
113 * latched in
114 */
115 #define XHCI_PORT_RW ((1<<16))
116 /*
117 * These bits are Reserved Zero (RsvdZ) and zero should be written to them:
118 * bits 2, 24, 28:31
119 */
120 #define XHCI_PORT_RZ ((1<<2) | (1<<24) | (0xf<<28))
121
122 /*
123 * Given a port state, this function returns a value that would result in the
124 * port being in the same state, if the value was written to the port status
125 * control register.
126 * Save Read Only (RO) bits and save read/write bits where
127 * writing a 0 clears the bit and writing a 1 sets the bit (RWS).
128 * For all other types (RW1S, RW1CS, RW, and RZ), writing a '0' has no effect.
129 */
130 u32 xhci_port_state_to_neutral(u32 state)
131 {
132 /* Save read-only status and port state */
133 return (state & XHCI_PORT_RO) | (state & XHCI_PORT_RWS);
134 }
135
136 /*
137 * find slot id based on port number.
138 */
139 int xhci_find_slot_id_by_port(struct xhci_hcd *xhci, u16 port)
140 {
141 int slot_id;
142 int i;
143
144 slot_id = 0;
145 for (i = 0; i < MAX_HC_SLOTS; i++) {
146 if (!xhci->devs[i])
147 continue;
148 if (xhci->devs[i]->port == port) {
149 slot_id = i;
150 break;
151 }
152 }
153
154 return slot_id;
155 }
156
157 /*
158 * Stop device
159 * It issues stop endpoint command for EP 0 to 30. And wait the last command
160 * to complete.
161 * suspend will set to 1, if suspend bit need to set in command.
162 */
163 static int xhci_stop_device(struct xhci_hcd *xhci, int slot_id, int suspend)
164 {
165 struct xhci_virt_device *virt_dev;
166 struct xhci_command *cmd;
167 unsigned long flags;
168 int timeleft;
169 int ret;
170 int i;
171
172 ret = 0;
173 virt_dev = xhci->devs[slot_id];
174 cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
175 if (!cmd) {
176 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
177 return -ENOMEM;
178 }
179
180 spin_lock_irqsave(&xhci->lock, flags);
181 for (i = LAST_EP_INDEX; i > 0; i--) {
182 if (virt_dev->eps[i].ring && virt_dev->eps[i].ring->dequeue)
183 xhci_queue_stop_endpoint(xhci, slot_id, i, suspend);
184 }
185 cmd->command_trb = xhci->cmd_ring->enqueue;
186 list_add_tail(&cmd->cmd_list, &virt_dev->cmd_list);
187 xhci_queue_stop_endpoint(xhci, slot_id, 0, suspend);
188 xhci_ring_cmd_db(xhci);
189 spin_unlock_irqrestore(&xhci->lock, flags);
190
191 /* Wait for last stop endpoint command to finish */
192 timeleft = wait_for_completion_interruptible_timeout(
193 cmd->completion,
194 USB_CTRL_SET_TIMEOUT);
195 if (timeleft <= 0) {
196 xhci_warn(xhci, "%s while waiting for stop endpoint command\n",
197 timeleft == 0 ? "Timeout" : "Signal");
198 spin_lock_irqsave(&xhci->lock, flags);
199 /* The timeout might have raced with the event ring handler, so
200 * only delete from the list if the item isn't poisoned.
201 */
202 if (cmd->cmd_list.next != LIST_POISON1)
203 list_del(&cmd->cmd_list);
204 spin_unlock_irqrestore(&xhci->lock, flags);
205 ret = -ETIME;
206 goto command_cleanup;
207 }
208
209 command_cleanup:
210 xhci_free_command(xhci, cmd);
211 return ret;
212 }
213
214 /*
215 * Ring device, it rings the all doorbells unconditionally.
216 */
217 void xhci_ring_device(struct xhci_hcd *xhci, int slot_id)
218 {
219 int i;
220
221 for (i = 0; i < LAST_EP_INDEX + 1; i++)
222 if (xhci->devs[slot_id]->eps[i].ring &&
223 xhci->devs[slot_id]->eps[i].ring->dequeue)
224 xhci_ring_ep_doorbell(xhci, slot_id, i, 0);
225
226 return;
227 }
228
229 static void xhci_disable_port(struct xhci_hcd *xhci, u16 wIndex,
230 u32 __iomem *addr, u32 port_status)
231 {
232 /* Don't allow the USB core to disable SuperSpeed ports. */
233 if (xhci->port_array[wIndex] == 0x03) {
234 xhci_dbg(xhci, "Ignoring request to disable "
235 "SuperSpeed port.\n");
236 return;
237 }
238
239 /* Write 1 to disable the port */
240 xhci_writel(xhci, port_status | PORT_PE, addr);
241 port_status = xhci_readl(xhci, addr);
242 xhci_dbg(xhci, "disable port, actual port %d status = 0x%x\n",
243 wIndex, port_status);
244 }
245
246 static void xhci_clear_port_change_bit(struct xhci_hcd *xhci, u16 wValue,
247 u16 wIndex, u32 __iomem *addr, u32 port_status)
248 {
249 char *port_change_bit;
250 u32 status;
251
252 switch (wValue) {
253 case USB_PORT_FEAT_C_RESET:
254 status = PORT_RC;
255 port_change_bit = "reset";
256 break;
257 case USB_PORT_FEAT_C_CONNECTION:
258 status = PORT_CSC;
259 port_change_bit = "connect";
260 break;
261 case USB_PORT_FEAT_C_OVER_CURRENT:
262 status = PORT_OCC;
263 port_change_bit = "over-current";
264 break;
265 case USB_PORT_FEAT_C_ENABLE:
266 status = PORT_PEC;
267 port_change_bit = "enable/disable";
268 break;
269 case USB_PORT_FEAT_C_SUSPEND:
270 status = PORT_PLC;
271 port_change_bit = "suspend/resume";
272 break;
273 default:
274 /* Should never happen */
275 return;
276 }
277 /* Change bits are all write 1 to clear */
278 xhci_writel(xhci, port_status | status, addr);
279 port_status = xhci_readl(xhci, addr);
280 xhci_dbg(xhci, "clear port %s change, actual port %d status = 0x%x\n",
281 port_change_bit, wIndex, port_status);
282 }
283
284 int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
285 u16 wIndex, char *buf, u16 wLength)
286 {
287 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
288 int ports;
289 unsigned long flags;
290 u32 temp, temp1, status;
291 int retval = 0;
292 u32 __iomem *addr;
293 int slot_id;
294
295 ports = HCS_MAX_PORTS(xhci->hcs_params1);
296
297 spin_lock_irqsave(&xhci->lock, flags);
298 switch (typeReq) {
299 case GetHubStatus:
300 /* No power source, over-current reported per port */
301 memset(buf, 0, 4);
302 break;
303 case GetHubDescriptor:
304 xhci_hub_descriptor(xhci, (struct usb_hub_descriptor *) buf);
305 break;
306 case GetPortStatus:
307 if (!wIndex || wIndex > ports)
308 goto error;
309 wIndex--;
310 status = 0;
311 addr = &xhci->op_regs->port_status_base + NUM_PORT_REGS*(wIndex & 0xff);
312 temp = xhci_readl(xhci, addr);
313 xhci_dbg(xhci, "get port status, actual port %d status = 0x%x\n", wIndex, temp);
314
315 /* wPortChange bits */
316 if (temp & PORT_CSC)
317 status |= USB_PORT_STAT_C_CONNECTION << 16;
318 if (temp & PORT_PEC)
319 status |= USB_PORT_STAT_C_ENABLE << 16;
320 if ((temp & PORT_OCC))
321 status |= USB_PORT_STAT_C_OVERCURRENT << 16;
322 /*
323 * FIXME ignoring reset and USB 2.1/3.0 specific
324 * changes
325 */
326 if ((temp & PORT_PLS_MASK) == XDEV_U3
327 && (temp & PORT_POWER))
328 status |= 1 << USB_PORT_FEAT_SUSPEND;
329 if ((temp & PORT_PLS_MASK) == XDEV_RESUME) {
330 if ((temp & PORT_RESET) || !(temp & PORT_PE))
331 goto error;
332 if (!DEV_SUPERSPEED(temp) && time_after_eq(jiffies,
333 xhci->resume_done[wIndex])) {
334 xhci_dbg(xhci, "Resume USB2 port %d\n",
335 wIndex + 1);
336 xhci->resume_done[wIndex] = 0;
337 temp1 = xhci_port_state_to_neutral(temp);
338 temp1 &= ~PORT_PLS_MASK;
339 temp1 |= PORT_LINK_STROBE | XDEV_U0;
340 xhci_writel(xhci, temp1, addr);
341
342 xhci_dbg(xhci, "set port %d resume\n",
343 wIndex + 1);
344 slot_id = xhci_find_slot_id_by_port(xhci,
345 wIndex + 1);
346 if (!slot_id) {
347 xhci_dbg(xhci, "slot_id is zero\n");
348 goto error;
349 }
350 xhci_ring_device(xhci, slot_id);
351 xhci->port_c_suspend[wIndex >> 5] |=
352 1 << (wIndex & 31);
353 xhci->suspended_ports[wIndex >> 5] &=
354 ~(1 << (wIndex & 31));
355 }
356 }
357 if ((temp & PORT_PLS_MASK) == XDEV_U0
358 && (temp & PORT_POWER)
359 && (xhci->suspended_ports[wIndex >> 5] &
360 (1 << (wIndex & 31)))) {
361 xhci->suspended_ports[wIndex >> 5] &=
362 ~(1 << (wIndex & 31));
363 xhci->port_c_suspend[wIndex >> 5] |=
364 1 << (wIndex & 31);
365 }
366 if (temp & PORT_CONNECT) {
367 status |= USB_PORT_STAT_CONNECTION;
368 status |= xhci_port_speed(temp);
369 }
370 if (temp & PORT_PE)
371 status |= USB_PORT_STAT_ENABLE;
372 if (temp & PORT_OC)
373 status |= USB_PORT_STAT_OVERCURRENT;
374 if (temp & PORT_RESET)
375 status |= USB_PORT_STAT_RESET;
376 if (temp & PORT_POWER)
377 status |= USB_PORT_STAT_POWER;
378 if (xhci->port_c_suspend[wIndex >> 5] & (1 << (wIndex & 31)))
379 status |= 1 << USB_PORT_FEAT_C_SUSPEND;
380 xhci_dbg(xhci, "Get port status returned 0x%x\n", status);
381 put_unaligned(cpu_to_le32(status), (__le32 *) buf);
382 break;
383 case SetPortFeature:
384 wIndex &= 0xff;
385 if (!wIndex || wIndex > ports)
386 goto error;
387 wIndex--;
388 addr = &xhci->op_regs->port_status_base + NUM_PORT_REGS*(wIndex & 0xff);
389 temp = xhci_readl(xhci, addr);
390 temp = xhci_port_state_to_neutral(temp);
391 switch (wValue) {
392 case USB_PORT_FEAT_SUSPEND:
393 temp = xhci_readl(xhci, addr);
394 /* In spec software should not attempt to suspend
395 * a port unless the port reports that it is in the
396 * enabled (PED = ‘1’,PLS < ‘3’) state.
397 */
398 if ((temp & PORT_PE) == 0 || (temp & PORT_RESET)
399 || (temp & PORT_PLS_MASK) >= XDEV_U3) {
400 xhci_warn(xhci, "USB core suspending device "
401 "not in U0/U1/U2.\n");
402 goto error;
403 }
404
405 slot_id = xhci_find_slot_id_by_port(xhci, wIndex + 1);
406 if (!slot_id) {
407 xhci_warn(xhci, "slot_id is zero\n");
408 goto error;
409 }
410 /* unlock to execute stop endpoint commands */
411 spin_unlock_irqrestore(&xhci->lock, flags);
412 xhci_stop_device(xhci, slot_id, 1);
413 spin_lock_irqsave(&xhci->lock, flags);
414
415 temp = xhci_port_state_to_neutral(temp);
416 temp &= ~PORT_PLS_MASK;
417 temp |= PORT_LINK_STROBE | XDEV_U3;
418 xhci_writel(xhci, temp, addr);
419
420 spin_unlock_irqrestore(&xhci->lock, flags);
421 msleep(10); /* wait device to enter */
422 spin_lock_irqsave(&xhci->lock, flags);
423
424 temp = xhci_readl(xhci, addr);
425 xhci->suspended_ports[wIndex >> 5] |=
426 1 << (wIndex & (31));
427 break;
428 case USB_PORT_FEAT_POWER:
429 /*
430 * Turn on ports, even if there isn't per-port switching.
431 * HC will report connect events even before this is set.
432 * However, khubd will ignore the roothub events until
433 * the roothub is registered.
434 */
435 xhci_writel(xhci, temp | PORT_POWER, addr);
436
437 temp = xhci_readl(xhci, addr);
438 xhci_dbg(xhci, "set port power, actual port %d status = 0x%x\n", wIndex, temp);
439 break;
440 case USB_PORT_FEAT_RESET:
441 temp = (temp | PORT_RESET);
442 xhci_writel(xhci, temp, addr);
443
444 temp = xhci_readl(xhci, addr);
445 xhci_dbg(xhci, "set port reset, actual port %d status = 0x%x\n", wIndex, temp);
446 break;
447 default:
448 goto error;
449 }
450 temp = xhci_readl(xhci, addr); /* unblock any posted writes */
451 break;
452 case ClearPortFeature:
453 if (!wIndex || wIndex > ports)
454 goto error;
455 wIndex--;
456 addr = &xhci->op_regs->port_status_base +
457 NUM_PORT_REGS*(wIndex & 0xff);
458 temp = xhci_readl(xhci, addr);
459 temp = xhci_port_state_to_neutral(temp);
460 switch (wValue) {
461 case USB_PORT_FEAT_SUSPEND:
462 temp = xhci_readl(xhci, addr);
463 xhci_dbg(xhci, "clear USB_PORT_FEAT_SUSPEND\n");
464 xhci_dbg(xhci, "PORTSC %04x\n", temp);
465 if (temp & PORT_RESET)
466 goto error;
467 if (temp & XDEV_U3) {
468 if ((temp & PORT_PE) == 0)
469 goto error;
470 if (DEV_SUPERSPEED(temp)) {
471 temp = xhci_port_state_to_neutral(temp);
472 temp &= ~PORT_PLS_MASK;
473 temp |= PORT_LINK_STROBE | XDEV_U0;
474 xhci_writel(xhci, temp, addr);
475 xhci_readl(xhci, addr);
476 } else {
477 temp = xhci_port_state_to_neutral(temp);
478 temp &= ~PORT_PLS_MASK;
479 temp |= PORT_LINK_STROBE | XDEV_RESUME;
480 xhci_writel(xhci, temp, addr);
481
482 spin_unlock_irqrestore(&xhci->lock,
483 flags);
484 msleep(20);
485 spin_lock_irqsave(&xhci->lock, flags);
486
487 temp = xhci_readl(xhci, addr);
488 temp = xhci_port_state_to_neutral(temp);
489 temp &= ~PORT_PLS_MASK;
490 temp |= PORT_LINK_STROBE | XDEV_U0;
491 xhci_writel(xhci, temp, addr);
492 }
493 xhci->port_c_suspend[wIndex >> 5] |=
494 1 << (wIndex & 31);
495 }
496
497 slot_id = xhci_find_slot_id_by_port(xhci, wIndex + 1);
498 if (!slot_id) {
499 xhci_dbg(xhci, "slot_id is zero\n");
500 goto error;
501 }
502 xhci_ring_device(xhci, slot_id);
503 break;
504 case USB_PORT_FEAT_C_SUSPEND:
505 xhci->port_c_suspend[wIndex >> 5] &=
506 ~(1 << (wIndex & 31));
507 case USB_PORT_FEAT_C_RESET:
508 case USB_PORT_FEAT_C_CONNECTION:
509 case USB_PORT_FEAT_C_OVER_CURRENT:
510 case USB_PORT_FEAT_C_ENABLE:
511 xhci_clear_port_change_bit(xhci, wValue, wIndex,
512 addr, temp);
513 break;
514 case USB_PORT_FEAT_ENABLE:
515 xhci_disable_port(xhci, wIndex, addr, temp);
516 break;
517 default:
518 goto error;
519 }
520 break;
521 default:
522 error:
523 /* "stall" on error */
524 retval = -EPIPE;
525 }
526 spin_unlock_irqrestore(&xhci->lock, flags);
527 return retval;
528 }
529
530 /*
531 * Returns 0 if the status hasn't changed, or the number of bytes in buf.
532 * Ports are 0-indexed from the HCD point of view,
533 * and 1-indexed from the USB core pointer of view.
534 *
535 * Note that the status change bits will be cleared as soon as a port status
536 * change event is generated, so we use the saved status from that event.
537 */
538 int xhci_hub_status_data(struct usb_hcd *hcd, char *buf)
539 {
540 unsigned long flags;
541 u32 temp, status;
542 u32 mask;
543 int i, retval;
544 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
545 int ports;
546 u32 __iomem *addr;
547
548 ports = HCS_MAX_PORTS(xhci->hcs_params1);
549
550 /* Initial status is no changes */
551 retval = (ports + 8) / 8;
552 memset(buf, 0, retval);
553 status = 0;
554
555 mask = PORT_CSC | PORT_PEC | PORT_OCC;
556
557 spin_lock_irqsave(&xhci->lock, flags);
558 /* For each port, did anything change? If so, set that bit in buf. */
559 for (i = 0; i < ports; i++) {
560 addr = &xhci->op_regs->port_status_base +
561 NUM_PORT_REGS*i;
562 temp = xhci_readl(xhci, addr);
563 if ((temp & mask) != 0 ||
564 (xhci->port_c_suspend[i >> 5] & 1 << (i & 31)) ||
565 (xhci->resume_done[i] && time_after_eq(
566 jiffies, xhci->resume_done[i]))) {
567 buf[(i + 1) / 8] |= 1 << (i + 1) % 8;
568 status = 1;
569 }
570 }
571 spin_unlock_irqrestore(&xhci->lock, flags);
572 return status ? retval : 0;
573 }
574
575 #ifdef CONFIG_PM
576
577 int xhci_bus_suspend(struct usb_hcd *hcd)
578 {
579 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
580 int port;
581 unsigned long flags;
582
583 xhci_dbg(xhci, "suspend root hub\n");
584
585 spin_lock_irqsave(&xhci->lock, flags);
586
587 if (hcd->self.root_hub->do_remote_wakeup) {
588 port = HCS_MAX_PORTS(xhci->hcs_params1);
589 while (port--) {
590 if (xhci->resume_done[port] != 0) {
591 spin_unlock_irqrestore(&xhci->lock, flags);
592 xhci_dbg(xhci, "suspend failed because "
593 "port %d is resuming\n",
594 port + 1);
595 return -EBUSY;
596 }
597 }
598 }
599
600 port = HCS_MAX_PORTS(xhci->hcs_params1);
601 xhci->bus_suspended = 0;
602 while (port--) {
603 /* suspend the port if the port is not suspended */
604 u32 __iomem *addr;
605 u32 t1, t2;
606 int slot_id;
607
608 addr = &xhci->op_regs->port_status_base +
609 NUM_PORT_REGS * (port & 0xff);
610 t1 = xhci_readl(xhci, addr);
611 t2 = xhci_port_state_to_neutral(t1);
612
613 if ((t1 & PORT_PE) && !(t1 & PORT_PLS_MASK)) {
614 xhci_dbg(xhci, "port %d not suspended\n", port);
615 slot_id = xhci_find_slot_id_by_port(xhci, port + 1);
616 if (slot_id) {
617 spin_unlock_irqrestore(&xhci->lock, flags);
618 xhci_stop_device(xhci, slot_id, 1);
619 spin_lock_irqsave(&xhci->lock, flags);
620 }
621 t2 &= ~PORT_PLS_MASK;
622 t2 |= PORT_LINK_STROBE | XDEV_U3;
623 set_bit(port, &xhci->bus_suspended);
624 }
625 if (hcd->self.root_hub->do_remote_wakeup) {
626 if (t1 & PORT_CONNECT) {
627 t2 |= PORT_WKOC_E | PORT_WKDISC_E;
628 t2 &= ~PORT_WKCONN_E;
629 } else {
630 t2 |= PORT_WKOC_E | PORT_WKCONN_E;
631 t2 &= ~PORT_WKDISC_E;
632 }
633 } else
634 t2 &= ~PORT_WAKE_BITS;
635
636 t1 = xhci_port_state_to_neutral(t1);
637 if (t1 != t2)
638 xhci_writel(xhci, t2, addr);
639
640 if (DEV_HIGHSPEED(t1)) {
641 /* enable remote wake up for USB 2.0 */
642 u32 __iomem *addr;
643 u32 tmp;
644
645 addr = &xhci->op_regs->port_power_base +
646 NUM_PORT_REGS * (port & 0xff);
647 tmp = xhci_readl(xhci, addr);
648 tmp |= PORT_RWE;
649 xhci_writel(xhci, tmp, addr);
650 }
651 }
652 hcd->state = HC_STATE_SUSPENDED;
653 xhci->next_statechange = jiffies + msecs_to_jiffies(10);
654 spin_unlock_irqrestore(&xhci->lock, flags);
655 return 0;
656 }
657
658 int xhci_bus_resume(struct usb_hcd *hcd)
659 {
660 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
661 int port;
662 u32 temp;
663 unsigned long flags;
664
665 xhci_dbg(xhci, "resume root hub\n");
666
667 if (time_before(jiffies, xhci->next_statechange))
668 msleep(5);
669
670 spin_lock_irqsave(&xhci->lock, flags);
671 if (!HCD_HW_ACCESSIBLE(hcd)) {
672 spin_unlock_irqrestore(&xhci->lock, flags);
673 return -ESHUTDOWN;
674 }
675
676 /* delay the irqs */
677 temp = xhci_readl(xhci, &xhci->op_regs->command);
678 temp &= ~CMD_EIE;
679 xhci_writel(xhci, temp, &xhci->op_regs->command);
680
681 port = HCS_MAX_PORTS(xhci->hcs_params1);
682 while (port--) {
683 /* Check whether need resume ports. If needed
684 resume port and disable remote wakeup */
685 u32 __iomem *addr;
686 u32 temp;
687 int slot_id;
688
689 addr = &xhci->op_regs->port_status_base +
690 NUM_PORT_REGS * (port & 0xff);
691 temp = xhci_readl(xhci, addr);
692 if (DEV_SUPERSPEED(temp))
693 temp &= ~(PORT_RWC_BITS | PORT_CEC | PORT_WAKE_BITS);
694 else
695 temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS);
696 if (test_bit(port, &xhci->bus_suspended) &&
697 (temp & PORT_PLS_MASK)) {
698 if (DEV_SUPERSPEED(temp)) {
699 temp = xhci_port_state_to_neutral(temp);
700 temp &= ~PORT_PLS_MASK;
701 temp |= PORT_LINK_STROBE | XDEV_U0;
702 xhci_writel(xhci, temp, addr);
703 } else {
704 temp = xhci_port_state_to_neutral(temp);
705 temp &= ~PORT_PLS_MASK;
706 temp |= PORT_LINK_STROBE | XDEV_RESUME;
707 xhci_writel(xhci, temp, addr);
708
709 spin_unlock_irqrestore(&xhci->lock, flags);
710 msleep(20);
711 spin_lock_irqsave(&xhci->lock, flags);
712
713 temp = xhci_readl(xhci, addr);
714 temp = xhci_port_state_to_neutral(temp);
715 temp &= ~PORT_PLS_MASK;
716 temp |= PORT_LINK_STROBE | XDEV_U0;
717 xhci_writel(xhci, temp, addr);
718 }
719 slot_id = xhci_find_slot_id_by_port(xhci, port + 1);
720 if (slot_id)
721 xhci_ring_device(xhci, slot_id);
722 } else
723 xhci_writel(xhci, temp, addr);
724
725 if (DEV_HIGHSPEED(temp)) {
726 /* disable remote wake up for USB 2.0 */
727 u32 __iomem *addr;
728 u32 tmp;
729
730 addr = &xhci->op_regs->port_power_base +
731 NUM_PORT_REGS * (port & 0xff);
732 tmp = xhci_readl(xhci, addr);
733 tmp &= ~PORT_RWE;
734 xhci_writel(xhci, tmp, addr);
735 }
736 }
737
738 (void) xhci_readl(xhci, &xhci->op_regs->command);
739
740 xhci->next_statechange = jiffies + msecs_to_jiffies(5);
741 hcd->state = HC_STATE_RUNNING;
742 /* re-enable irqs */
743 temp = xhci_readl(xhci, &xhci->op_regs->command);
744 temp |= CMD_EIE;
745 xhci_writel(xhci, temp, &xhci->op_regs->command);
746 temp = xhci_readl(xhci, &xhci->op_regs->command);
747
748 spin_unlock_irqrestore(&xhci->lock, flags);
749 return 0;
750 }
751
752 #endif /* CONFIG_PM */
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