2 * Copyright (C) 2005-2006 by Texas Instruments
4 * This file is part of the Inventra Controller Driver for Linux.
6 * The Inventra Controller Driver for Linux is free software; you
7 * can redistribute it and/or modify it under the terms of the GNU
8 * General Public License version 2 as published by the Free Software
11 * The Inventra Controller Driver for Linux is distributed in
12 * the hope that it will be useful, but WITHOUT ANY WARRANTY;
13 * without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 * License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with The Inventra Controller Driver for Linux ; if not,
19 * write to the Free Software Foundation, Inc., 59 Temple Place,
20 * Suite 330, Boston, MA 02111-1307 USA
24 #include <linux/module.h>
25 #include <linux/kernel.h>
26 #include <linux/sched.h>
27 #include <linux/init.h>
28 #include <linux/list.h>
29 #include <linux/delay.h>
30 #include <linux/clk.h>
32 #include <linux/gpio.h>
33 #include <linux/platform_device.h>
34 #include <linux/dma-mapping.h>
36 #include <mach/cputype.h>
37 #include <mach/hardware.h>
39 #include <asm/mach-types.h>
41 #include "musb_core.h"
43 #ifdef CONFIG_MACH_DAVINCI_EVM
44 #define GPIO_nVBUS_DRV 160
51 #define USB_PHY_CTRL IO_ADDRESS(USBPHY_CTL_PADDR)
52 #define DM355_DEEPSLEEP IO_ADDRESS(DM355_DEEPSLEEP_PADDR)
56 struct platform_device
*musb
;
60 /* REVISIT (PM) we should be able to keep the PHY in low power mode most
61 * of the time (24 MHZ oscillator and PLL off, etc) by setting POWER.D0
62 * and, when in host mode, autosuspending idle root ports... PHYPLLON
63 * (overriding SUSPENDM?) then likely needs to stay off.
66 static inline void phy_on(void)
68 u32 phy_ctrl
= __raw_readl(USB_PHY_CTRL
);
70 /* power everything up; start the on-chip PHY and its PLL */
71 phy_ctrl
&= ~(USBPHY_OSCPDWN
| USBPHY_OTGPDWN
| USBPHY_PHYPDWN
);
72 phy_ctrl
|= USBPHY_SESNDEN
| USBPHY_VBDTCTEN
| USBPHY_PHYPLLON
;
73 __raw_writel(phy_ctrl
, USB_PHY_CTRL
);
75 /* wait for PLL to lock before proceeding */
76 while ((__raw_readl(USB_PHY_CTRL
) & USBPHY_PHYCLKGD
) == 0)
80 static inline void phy_off(void)
82 u32 phy_ctrl
= __raw_readl(USB_PHY_CTRL
);
84 /* powerdown the on-chip PHY, its PLL, and the OTG block */
85 phy_ctrl
&= ~(USBPHY_SESNDEN
| USBPHY_VBDTCTEN
| USBPHY_PHYPLLON
);
86 phy_ctrl
|= USBPHY_OSCPDWN
| USBPHY_OTGPDWN
| USBPHY_PHYPDWN
;
87 __raw_writel(phy_ctrl
, USB_PHY_CTRL
);
90 static int dma_off
= 1;
92 static void davinci_musb_enable(struct musb
*musb
)
96 /* workaround: setup irqs through both register sets */
97 tmp
= (musb
->epmask
& DAVINCI_USB_TX_ENDPTS_MASK
)
98 << DAVINCI_USB_TXINT_SHIFT
;
99 musb_writel(musb
->ctrl_base
, DAVINCI_USB_INT_MASK_SET_REG
, tmp
);
101 tmp
= (musb
->epmask
& (0xfffe & DAVINCI_USB_RX_ENDPTS_MASK
))
102 << DAVINCI_USB_RXINT_SHIFT
;
103 musb_writel(musb
->ctrl_base
, DAVINCI_USB_INT_MASK_SET_REG
, tmp
);
106 val
= ~MUSB_INTR_SOF
;
107 tmp
|= ((val
& 0x01ff) << DAVINCI_USB_USBINT_SHIFT
);
108 musb_writel(musb
->ctrl_base
, DAVINCI_USB_INT_MASK_SET_REG
, tmp
);
110 if (is_dma_capable() && !dma_off
)
111 printk(KERN_WARNING
"%s %s: dma not reactivated\n",
116 /* force a DRVVBUS irq so we can start polling for ID change */
117 if (is_otg_enabled(musb
))
118 musb_writel(musb
->ctrl_base
, DAVINCI_USB_INT_SET_REG
,
119 DAVINCI_INTR_DRVVBUS
<< DAVINCI_USB_USBINT_SHIFT
);
123 * Disable the HDRC and flush interrupts
125 static void davinci_musb_disable(struct musb
*musb
)
127 /* because we don't set CTRLR.UINT, "important" to:
128 * - not read/write INTRUSB/INTRUSBE
129 * - (except during initial setup, as workaround)
130 * - use INTSETR/INTCLRR instead
132 musb_writel(musb
->ctrl_base
, DAVINCI_USB_INT_MASK_CLR_REG
,
133 DAVINCI_USB_USBINT_MASK
134 | DAVINCI_USB_TXINT_MASK
135 | DAVINCI_USB_RXINT_MASK
);
136 musb_writeb(musb
->mregs
, MUSB_DEVCTL
, 0);
137 musb_writel(musb
->ctrl_base
, DAVINCI_USB_EOI_REG
, 0);
139 if (is_dma_capable() && !dma_off
)
140 WARNING("dma still active\n");
144 #define portstate(stmt) stmt
147 * VBUS SWITCHING IS BOARD-SPECIFIC ... at least for the DM6446 EVM,
148 * which doesn't wire DRVVBUS to the FET that switches it. Unclear
149 * if that's a problem with the DM6446 chip or just with that board.
151 * In either case, the DM355 EVM automates DRVVBUS the normal way,
152 * when J10 is out, and TI documents it as handling OTG.
155 #ifdef CONFIG_MACH_DAVINCI_EVM
157 static int vbus_state
= -1;
159 /* I2C operations are always synchronous, and require a task context.
160 * With unloaded systems, using the shared workqueue seems to suffice
161 * to satisfy the 100msec A_WAIT_VRISE timeout...
163 static void evm_deferred_drvvbus(struct work_struct
*ignored
)
165 gpio_set_value_cansleep(GPIO_nVBUS_DRV
, vbus_state
);
166 vbus_state
= !vbus_state
;
171 static void davinci_musb_source_power(struct musb
*musb
, int is_on
, int immediate
)
173 #ifdef CONFIG_MACH_DAVINCI_EVM
177 if (vbus_state
== is_on
)
179 vbus_state
= !is_on
; /* 0/1 vs "-1 == unknown/init" */
181 if (machine_is_davinci_evm()) {
182 static DECLARE_WORK(evm_vbus_work
, evm_deferred_drvvbus
);
185 gpio_set_value_cansleep(GPIO_nVBUS_DRV
, vbus_state
);
187 schedule_work(&evm_vbus_work
);
194 static void davinci_musb_set_vbus(struct musb
*musb
, int is_on
)
196 WARN_ON(is_on
&& is_peripheral_active(musb
));
197 davinci_musb_source_power(musb
, is_on
, 0);
201 #define POLL_SECONDS 2
203 static struct timer_list otg_workaround
;
205 static void otg_timer(unsigned long _musb
)
207 struct musb
*musb
= (void *)_musb
;
208 void __iomem
*mregs
= musb
->mregs
;
212 /* We poll because DaVinci's won't expose several OTG-critical
213 * status change events (from the transceiver) otherwise.
215 devctl
= musb_readb(mregs
, MUSB_DEVCTL
);
216 dev_dbg(musb
->controller
, "poll devctl %02x (%s)\n", devctl
,
217 otg_state_string(musb
->xceiv
->state
));
219 spin_lock_irqsave(&musb
->lock
, flags
);
220 switch (musb
->xceiv
->state
) {
221 case OTG_STATE_A_WAIT_VFALL
:
222 /* Wait till VBUS falls below SessionEnd (~0.2V); the 1.3 RTL
223 * seems to mis-handle session "start" otherwise (or in our
224 * case "recover"), in routine "VBUS was valid by the time
225 * VBUSERR got reported during enumeration" cases.
227 if (devctl
& MUSB_DEVCTL_VBUS
) {
228 mod_timer(&otg_workaround
, jiffies
+ POLL_SECONDS
* HZ
);
231 musb
->xceiv
->state
= OTG_STATE_A_WAIT_VRISE
;
232 musb_writel(musb
->ctrl_base
, DAVINCI_USB_INT_SET_REG
,
233 MUSB_INTR_VBUSERROR
<< DAVINCI_USB_USBINT_SHIFT
);
235 case OTG_STATE_B_IDLE
:
236 if (!is_peripheral_enabled(musb
))
239 /* There's no ID-changed IRQ, so we have no good way to tell
240 * when to switch to the A-Default state machine (by setting
241 * the DEVCTL.SESSION flag).
243 * Workaround: whenever we're in B_IDLE, try setting the
244 * session flag every few seconds. If it works, ID was
245 * grounded and we're now in the A-Default state machine.
247 * NOTE setting the session flag is _supposed_ to trigger
248 * SRP, but clearly it doesn't.
250 musb_writeb(mregs
, MUSB_DEVCTL
,
251 devctl
| MUSB_DEVCTL_SESSION
);
252 devctl
= musb_readb(mregs
, MUSB_DEVCTL
);
253 if (devctl
& MUSB_DEVCTL_BDEVICE
)
254 mod_timer(&otg_workaround
, jiffies
+ POLL_SECONDS
* HZ
);
256 musb
->xceiv
->state
= OTG_STATE_A_IDLE
;
261 spin_unlock_irqrestore(&musb
->lock
, flags
);
264 static irqreturn_t
davinci_musb_interrupt(int irq
, void *__hci
)
267 irqreturn_t retval
= IRQ_NONE
;
268 struct musb
*musb
= __hci
;
269 struct usb_otg
*otg
= musb
->xceiv
->otg
;
270 void __iomem
*tibase
= musb
->ctrl_base
;
274 spin_lock_irqsave(&musb
->lock
, flags
);
276 /* NOTE: DaVinci shadows the Mentor IRQs. Don't manage them through
277 * the Mentor registers (except for setup), use the TI ones and EOI.
279 * Docs describe irq "vector" registers associated with the CPPI and
280 * USB EOI registers. These hold a bitmask corresponding to the
281 * current IRQ, not an irq handler address. Would using those bits
282 * resolve some of the races observed in this dispatch code??
285 /* CPPI interrupts share the same IRQ line, but have their own
286 * mask, state, "vector", and EOI registers.
288 cppi
= container_of(musb
->dma_controller
, struct cppi
, controller
);
289 if (is_cppi_enabled() && musb
->dma_controller
&& !cppi
->irq
)
290 retval
= cppi_interrupt(irq
, __hci
);
292 /* ack and handle non-CPPI interrupts */
293 tmp
= musb_readl(tibase
, DAVINCI_USB_INT_SRC_MASKED_REG
);
294 musb_writel(tibase
, DAVINCI_USB_INT_SRC_CLR_REG
, tmp
);
295 dev_dbg(musb
->controller
, "IRQ %08x\n", tmp
);
297 musb
->int_rx
= (tmp
& DAVINCI_USB_RXINT_MASK
)
298 >> DAVINCI_USB_RXINT_SHIFT
;
299 musb
->int_tx
= (tmp
& DAVINCI_USB_TXINT_MASK
)
300 >> DAVINCI_USB_TXINT_SHIFT
;
301 musb
->int_usb
= (tmp
& DAVINCI_USB_USBINT_MASK
)
302 >> DAVINCI_USB_USBINT_SHIFT
;
304 /* DRVVBUS irqs are the only proxy we have (a very poor one!) for
305 * DaVinci's missing ID change IRQ. We need an ID change IRQ to
306 * switch appropriately between halves of the OTG state machine.
307 * Managing DEVCTL.SESSION per Mentor docs requires we know its
308 * value, but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set.
309 * Also, DRVVBUS pulses for SRP (but not at 5V) ...
311 if (tmp
& (DAVINCI_INTR_DRVVBUS
<< DAVINCI_USB_USBINT_SHIFT
)) {
312 int drvvbus
= musb_readl(tibase
, DAVINCI_USB_STAT_REG
);
313 void __iomem
*mregs
= musb
->mregs
;
314 u8 devctl
= musb_readb(mregs
, MUSB_DEVCTL
);
315 int err
= musb
->int_usb
& MUSB_INTR_VBUSERROR
;
317 err
= is_host_enabled(musb
)
318 && (musb
->int_usb
& MUSB_INTR_VBUSERROR
);
320 /* The Mentor core doesn't debounce VBUS as needed
321 * to cope with device connect current spikes. This
322 * means it's not uncommon for bus-powered devices
323 * to get VBUS errors during enumeration.
325 * This is a workaround, but newer RTL from Mentor
326 * seems to allow a better one: "re"starting sessions
327 * without waiting (on EVM, a **long** time) for VBUS
328 * to stop registering in devctl.
330 musb
->int_usb
&= ~MUSB_INTR_VBUSERROR
;
331 musb
->xceiv
->state
= OTG_STATE_A_WAIT_VFALL
;
332 mod_timer(&otg_workaround
, jiffies
+ POLL_SECONDS
* HZ
);
333 WARNING("VBUS error workaround (delay coming)\n");
334 } else if (is_host_enabled(musb
) && drvvbus
) {
337 musb
->xceiv
->state
= OTG_STATE_A_WAIT_VRISE
;
338 portstate(musb
->port1_status
|= USB_PORT_STAT_POWER
);
339 del_timer(&otg_workaround
);
344 musb
->xceiv
->state
= OTG_STATE_B_IDLE
;
345 portstate(musb
->port1_status
&= ~USB_PORT_STAT_POWER
);
348 /* NOTE: this must complete poweron within 100 msec
349 * (OTG_TIME_A_WAIT_VRISE) but we don't check for that.
351 davinci_musb_source_power(musb
, drvvbus
, 0);
352 dev_dbg(musb
->controller
, "VBUS %s (%s)%s, devctl %02x\n",
353 drvvbus
? "on" : "off",
354 otg_state_string(musb
->xceiv
->state
),
357 retval
= IRQ_HANDLED
;
360 if (musb
->int_tx
|| musb
->int_rx
|| musb
->int_usb
)
361 retval
|= musb_interrupt(musb
);
363 /* irq stays asserted until EOI is written */
364 musb_writel(tibase
, DAVINCI_USB_EOI_REG
, 0);
366 /* poll for ID change */
367 if (is_otg_enabled(musb
)
368 && musb
->xceiv
->state
== OTG_STATE_B_IDLE
)
369 mod_timer(&otg_workaround
, jiffies
+ POLL_SECONDS
* HZ
);
371 spin_unlock_irqrestore(&musb
->lock
, flags
);
376 static int davinci_musb_set_mode(struct musb
*musb
, u8 mode
)
378 /* EVM can't do this (right?) */
382 static int davinci_musb_init(struct musb
*musb
)
384 void __iomem
*tibase
= musb
->ctrl_base
;
387 usb_nop_xceiv_register();
388 musb
->xceiv
= usb_get_transceiver();
392 musb
->mregs
+= DAVINCI_BASE_OFFSET
;
394 /* returns zero if e.g. not clocked */
395 revision
= musb_readl(tibase
, DAVINCI_USB_VERSION_REG
);
399 if (is_host_enabled(musb
))
400 setup_timer(&otg_workaround
, otg_timer
, (unsigned long) musb
);
402 davinci_musb_source_power(musb
, 0, 1);
404 /* dm355 EVM swaps D+/D- for signal integrity, and
405 * is clocked from the main 24 MHz crystal.
407 if (machine_is_davinci_dm355_evm()) {
408 u32 phy_ctrl
= __raw_readl(USB_PHY_CTRL
);
410 phy_ctrl
&= ~(3 << 9);
411 phy_ctrl
|= USBPHY_DATAPOL
;
412 __raw_writel(phy_ctrl
, USB_PHY_CTRL
);
415 /* On dm355, the default-A state machine needs DRVVBUS control.
416 * If we won't be a host, there's no need to turn it on.
418 if (cpu_is_davinci_dm355()) {
419 u32 deepsleep
= __raw_readl(DM355_DEEPSLEEP
);
421 if (is_host_enabled(musb
)) {
422 deepsleep
&= ~DRVVBUS_OVERRIDE
;
424 deepsleep
&= ~DRVVBUS_FORCE
;
425 deepsleep
|= DRVVBUS_OVERRIDE
;
427 __raw_writel(deepsleep
, DM355_DEEPSLEEP
);
430 /* reset the controller */
431 musb_writel(tibase
, DAVINCI_USB_CTRL_REG
, 0x1);
433 /* start the on-chip PHY and its PLL */
438 /* NOTE: irqs are in mixed mode, not bypass to pure-musb */
439 pr_debug("DaVinci OTG revision %08x phy %03x control %02x\n",
440 revision
, __raw_readl(USB_PHY_CTRL
),
441 musb_readb(tibase
, DAVINCI_USB_CTRL_REG
));
443 musb
->isr
= davinci_musb_interrupt
;
447 usb_put_transceiver(musb
->xceiv
);
449 usb_nop_xceiv_unregister();
453 static int davinci_musb_exit(struct musb
*musb
)
455 if (is_host_enabled(musb
))
456 del_timer_sync(&otg_workaround
);
459 if (cpu_is_davinci_dm355()) {
460 u32 deepsleep
= __raw_readl(DM355_DEEPSLEEP
);
462 deepsleep
&= ~DRVVBUS_FORCE
;
463 deepsleep
|= DRVVBUS_OVERRIDE
;
464 __raw_writel(deepsleep
, DM355_DEEPSLEEP
);
467 davinci_musb_source_power(musb
, 0 /*off*/, 1);
469 /* delay, to avoid problems with module reload */
470 if (is_host_enabled(musb
) && musb
->xceiv
->otg
->default_a
) {
474 /* if there's no peripheral connected, this can take a
475 * long time to fall, especially on EVM with huge C133.
478 devctl
= musb_readb(musb
->mregs
, MUSB_DEVCTL
);
479 if (!(devctl
& MUSB_DEVCTL_VBUS
))
481 if ((devctl
& MUSB_DEVCTL_VBUS
) != warn
) {
482 warn
= devctl
& MUSB_DEVCTL_VBUS
;
483 dev_dbg(musb
->controller
, "VBUS %d\n",
484 warn
>> MUSB_DEVCTL_VBUS_SHIFT
);
488 } while (maxdelay
> 0);
490 /* in OTG mode, another host might be connected */
491 if (devctl
& MUSB_DEVCTL_VBUS
)
492 dev_dbg(musb
->controller
, "VBUS off timeout (devctl %02x)\n", devctl
);
497 usb_put_transceiver(musb
->xceiv
);
498 usb_nop_xceiv_unregister();
503 static const struct musb_platform_ops davinci_ops
= {
504 .init
= davinci_musb_init
,
505 .exit
= davinci_musb_exit
,
507 .enable
= davinci_musb_enable
,
508 .disable
= davinci_musb_disable
,
510 .set_mode
= davinci_musb_set_mode
,
512 .set_vbus
= davinci_musb_set_vbus
,
515 static u64 davinci_dmamask
= DMA_BIT_MASK(32);
517 static int __devinit
davinci_probe(struct platform_device
*pdev
)
519 struct musb_hdrc_platform_data
*pdata
= pdev
->dev
.platform_data
;
520 struct platform_device
*musb
;
521 struct davinci_glue
*glue
;
526 glue
= kzalloc(sizeof(*glue
), GFP_KERNEL
);
528 dev_err(&pdev
->dev
, "failed to allocate glue context\n");
532 musb
= platform_device_alloc("musb-hdrc", -1);
534 dev_err(&pdev
->dev
, "failed to allocate musb device\n");
538 clk
= clk_get(&pdev
->dev
, "usb");
540 dev_err(&pdev
->dev
, "failed to get clock\n");
545 ret
= clk_enable(clk
);
547 dev_err(&pdev
->dev
, "failed to enable clock\n");
551 musb
->dev
.parent
= &pdev
->dev
;
552 musb
->dev
.dma_mask
= &davinci_dmamask
;
553 musb
->dev
.coherent_dma_mask
= davinci_dmamask
;
555 glue
->dev
= &pdev
->dev
;
559 pdata
->platform_ops
= &davinci_ops
;
561 platform_set_drvdata(pdev
, glue
);
563 ret
= platform_device_add_resources(musb
, pdev
->resource
,
564 pdev
->num_resources
);
566 dev_err(&pdev
->dev
, "failed to add resources\n");
570 ret
= platform_device_add_data(musb
, pdata
, sizeof(*pdata
));
572 dev_err(&pdev
->dev
, "failed to add platform_data\n");
576 ret
= platform_device_add(musb
);
578 dev_err(&pdev
->dev
, "failed to register musb device\n");
591 platform_device_put(musb
);
600 static int __devexit
davinci_remove(struct platform_device
*pdev
)
602 struct davinci_glue
*glue
= platform_get_drvdata(pdev
);
604 platform_device_del(glue
->musb
);
605 platform_device_put(glue
->musb
);
606 clk_disable(glue
->clk
);
613 static struct platform_driver davinci_driver
= {
614 .probe
= davinci_probe
,
615 .remove
= __devexit_p(davinci_remove
),
617 .name
= "musb-davinci",
621 MODULE_DESCRIPTION("DaVinci MUSB Glue Layer");
622 MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
623 MODULE_LICENSE("GPL v2");
625 static int __init
davinci_init(void)
627 return platform_driver_register(&davinci_driver
);
629 module_init(davinci_init
);
631 static void __exit
davinci_exit(void)
633 platform_driver_unregister(&davinci_driver
);
635 module_exit(davinci_exit
);