2 * Texas Instruments DSPS platforms "glue layer"
4 * Copyright (C) 2012, by Texas Instruments
6 * Based on the am35x "glue layer" code.
8 * This file is part of the Inventra Controller Driver for Linux.
10 * The Inventra Controller Driver for Linux is free software; you
11 * can redistribute it and/or modify it under the terms of the GNU
12 * General Public License version 2 as published by the Free Software
15 * The Inventra Controller Driver for Linux is distributed in
16 * the hope that it will be useful, but WITHOUT ANY WARRANTY;
17 * without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
19 * License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with The Inventra Controller Driver for Linux ; if not,
23 * write to the Free Software Foundation, Inc., 59 Temple Place,
24 * Suite 330, Boston, MA 02111-1307 USA
26 * musb_dsps.c will be a common file for all the TI DSPS platforms
27 * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x.
28 * For now only ti81x is using this and in future davinci.c, am35x.c
29 * da8xx.c would be merged to this file after testing.
32 #include <linux/init.h>
35 #include <linux/err.h>
36 #include <linux/platform_device.h>
37 #include <linux/dma-mapping.h>
38 #include <linux/pm_runtime.h>
39 #include <linux/module.h>
40 #include <linux/usb/nop-usb-xceiv.h>
41 #include <linux/platform_data/usb-omap.h>
44 #include <linux/of_device.h>
45 #include <linux/of_address.h>
47 #include "musb_core.h"
50 static const struct of_device_id musb_dsps_of_match
[];
54 * avoid using musb_readx()/musb_writex() as glue layer should not be
55 * dependent on musb core layer symbols.
57 static inline u8
dsps_readb(const void __iomem
*addr
, unsigned offset
)
58 { return __raw_readb(addr
+ offset
); }
60 static inline u32
dsps_readl(const void __iomem
*addr
, unsigned offset
)
61 { return __raw_readl(addr
+ offset
); }
63 static inline void dsps_writeb(void __iomem
*addr
, unsigned offset
, u8 data
)
64 { __raw_writeb(data
, addr
+ offset
); }
66 static inline void dsps_writel(void __iomem
*addr
, unsigned offset
, u32 data
)
67 { __raw_writel(data
, addr
+ offset
); }
70 * DSPS musb wrapper register offset.
71 * FIXME: This should be expanded to have all the wrapper registers from TI DSPS
74 struct dsps_musb_wrapper
{
88 /* bit positions for control */
91 /* bit positions for interrupt */
97 unsigned txep_shift
:5;
101 unsigned rxep_shift
:5;
105 /* bit positions for phy_utmi */
106 unsigned otg_disable
:5;
108 /* bit positions for mode */
110 /* miscellaneous stuff */
111 u32 musb_core_offset
;
113 /* number of musb instances */
118 * DSPS glue structure.
122 struct platform_device
*musb
[2]; /* child musb pdev */
123 const struct dsps_musb_wrapper
*wrp
; /* wrapper register offsets */
124 struct timer_list timer
[2]; /* otg_workaround timer */
125 unsigned long last_timer
[2]; /* last timer data for each instance */
126 u32 __iomem
*usb_ctrl
[2];
129 #define DSPS_AM33XX_CONTROL_MODULE_PHYS_0 0x44e10620
130 #define DSPS_AM33XX_CONTROL_MODULE_PHYS_1 0x44e10628
132 static const resource_size_t dsps_control_module_phys
[] = {
133 DSPS_AM33XX_CONTROL_MODULE_PHYS_0
,
134 DSPS_AM33XX_CONTROL_MODULE_PHYS_1
,
138 * musb_dsps_phy_control - phy on/off
139 * @glue: struct dsps_glue *
141 * @on: flag for phy to be switched on or off
143 * This is to enable the PHY using usb_ctrl register in system control
146 * XXX: This function will be removed once we have a seperate driver for
149 static void musb_dsps_phy_control(struct dsps_glue
*glue
, u8 id
, u8 on
)
153 usbphycfg
= readl(glue
->usb_ctrl
[id
]);
156 usbphycfg
&= ~(USBPHY_CM_PWRDN
| USBPHY_OTG_PWRDN
);
157 usbphycfg
|= USBPHY_OTGVDET_EN
| USBPHY_OTGSESSEND_EN
;
159 usbphycfg
|= USBPHY_CM_PWRDN
| USBPHY_OTG_PWRDN
;
162 writel(usbphycfg
, glue
->usb_ctrl
[id
]);
165 * dsps_musb_enable - enable interrupts
167 static void dsps_musb_enable(struct musb
*musb
)
169 struct device
*dev
= musb
->controller
;
170 struct platform_device
*pdev
= to_platform_device(dev
->parent
);
171 struct dsps_glue
*glue
= platform_get_drvdata(pdev
);
172 const struct dsps_musb_wrapper
*wrp
= glue
->wrp
;
173 void __iomem
*reg_base
= musb
->ctrl_base
;
174 u32 epmask
, coremask
;
176 /* Workaround: setup IRQs through both register sets. */
177 epmask
= ((musb
->epmask
& wrp
->txep_mask
) << wrp
->txep_shift
) |
178 ((musb
->epmask
& wrp
->rxep_mask
) << wrp
->rxep_shift
);
179 coremask
= (wrp
->usb_bitmap
& ~MUSB_INTR_SOF
);
181 dsps_writel(reg_base
, wrp
->epintr_set
, epmask
);
182 dsps_writel(reg_base
, wrp
->coreintr_set
, coremask
);
183 /* Force the DRVVBUS IRQ so we can start polling for ID change. */
184 dsps_writel(reg_base
, wrp
->coreintr_set
,
185 (1 << wrp
->drvvbus
) << wrp
->usb_shift
);
189 * dsps_musb_disable - disable HDRC and flush interrupts
191 static void dsps_musb_disable(struct musb
*musb
)
193 struct device
*dev
= musb
->controller
;
194 struct platform_device
*pdev
= to_platform_device(dev
->parent
);
195 struct dsps_glue
*glue
= platform_get_drvdata(pdev
);
196 const struct dsps_musb_wrapper
*wrp
= glue
->wrp
;
197 void __iomem
*reg_base
= musb
->ctrl_base
;
199 dsps_writel(reg_base
, wrp
->coreintr_clear
, wrp
->usb_bitmap
);
200 dsps_writel(reg_base
, wrp
->epintr_clear
,
201 wrp
->txep_bitmap
| wrp
->rxep_bitmap
);
202 dsps_writeb(musb
->mregs
, MUSB_DEVCTL
, 0);
203 dsps_writel(reg_base
, wrp
->eoi
, 0);
206 static void otg_timer(unsigned long _musb
)
208 struct musb
*musb
= (void *)_musb
;
209 void __iomem
*mregs
= musb
->mregs
;
210 struct device
*dev
= musb
->controller
;
211 struct platform_device
*pdev
= to_platform_device(dev
);
212 struct dsps_glue
*glue
= dev_get_drvdata(dev
->parent
);
213 const struct dsps_musb_wrapper
*wrp
= glue
->wrp
;
218 * We poll because DSPS IP's won't expose several OTG-critical
219 * status change events (from the transceiver) otherwise.
221 devctl
= dsps_readb(mregs
, MUSB_DEVCTL
);
222 dev_dbg(musb
->controller
, "Poll devctl %02x (%s)\n", devctl
,
223 otg_state_string(musb
->xceiv
->state
));
225 spin_lock_irqsave(&musb
->lock
, flags
);
226 switch (musb
->xceiv
->state
) {
227 case OTG_STATE_A_WAIT_BCON
:
228 devctl
&= ~MUSB_DEVCTL_SESSION
;
229 dsps_writeb(musb
->mregs
, MUSB_DEVCTL
, devctl
);
231 devctl
= dsps_readb(musb
->mregs
, MUSB_DEVCTL
);
232 if (devctl
& MUSB_DEVCTL_BDEVICE
) {
233 musb
->xceiv
->state
= OTG_STATE_B_IDLE
;
236 musb
->xceiv
->state
= OTG_STATE_A_IDLE
;
240 case OTG_STATE_A_WAIT_VFALL
:
241 musb
->xceiv
->state
= OTG_STATE_A_WAIT_VRISE
;
242 dsps_writel(musb
->ctrl_base
, wrp
->coreintr_set
,
243 MUSB_INTR_VBUSERROR
<< wrp
->usb_shift
);
245 case OTG_STATE_B_IDLE
:
246 devctl
= dsps_readb(mregs
, MUSB_DEVCTL
);
247 if (devctl
& MUSB_DEVCTL_BDEVICE
)
248 mod_timer(&glue
->timer
[pdev
->id
],
249 jiffies
+ wrp
->poll_seconds
* HZ
);
251 musb
->xceiv
->state
= OTG_STATE_A_IDLE
;
256 spin_unlock_irqrestore(&musb
->lock
, flags
);
259 static void dsps_musb_try_idle(struct musb
*musb
, unsigned long timeout
)
261 struct device
*dev
= musb
->controller
;
262 struct platform_device
*pdev
= to_platform_device(dev
);
263 struct dsps_glue
*glue
= dev_get_drvdata(dev
->parent
);
266 timeout
= jiffies
+ msecs_to_jiffies(3);
268 /* Never idle if active, or when VBUS timeout is not set as host */
269 if (musb
->is_active
|| (musb
->a_wait_bcon
== 0 &&
270 musb
->xceiv
->state
== OTG_STATE_A_WAIT_BCON
)) {
271 dev_dbg(musb
->controller
, "%s active, deleting timer\n",
272 otg_state_string(musb
->xceiv
->state
));
273 del_timer(&glue
->timer
[pdev
->id
]);
274 glue
->last_timer
[pdev
->id
] = jiffies
;
278 if (time_after(glue
->last_timer
[pdev
->id
], timeout
) &&
279 timer_pending(&glue
->timer
[pdev
->id
])) {
280 dev_dbg(musb
->controller
,
281 "Longer idle timer already pending, ignoring...\n");
284 glue
->last_timer
[pdev
->id
] = timeout
;
286 dev_dbg(musb
->controller
, "%s inactive, starting idle timer for %u ms\n",
287 otg_state_string(musb
->xceiv
->state
),
288 jiffies_to_msecs(timeout
- jiffies
));
289 mod_timer(&glue
->timer
[pdev
->id
], timeout
);
292 static irqreturn_t
dsps_interrupt(int irq
, void *hci
)
294 struct musb
*musb
= hci
;
295 void __iomem
*reg_base
= musb
->ctrl_base
;
296 struct device
*dev
= musb
->controller
;
297 struct platform_device
*pdev
= to_platform_device(dev
);
298 struct dsps_glue
*glue
= dev_get_drvdata(dev
->parent
);
299 const struct dsps_musb_wrapper
*wrp
= glue
->wrp
;
301 irqreturn_t ret
= IRQ_NONE
;
304 spin_lock_irqsave(&musb
->lock
, flags
);
306 /* Get endpoint interrupts */
307 epintr
= dsps_readl(reg_base
, wrp
->epintr_status
);
308 musb
->int_rx
= (epintr
& wrp
->rxep_bitmap
) >> wrp
->rxep_shift
;
309 musb
->int_tx
= (epintr
& wrp
->txep_bitmap
) >> wrp
->txep_shift
;
312 dsps_writel(reg_base
, wrp
->epintr_status
, epintr
);
314 /* Get usb core interrupts */
315 usbintr
= dsps_readl(reg_base
, wrp
->coreintr_status
);
316 if (!usbintr
&& !epintr
)
319 musb
->int_usb
= (usbintr
& wrp
->usb_bitmap
) >> wrp
->usb_shift
;
321 dsps_writel(reg_base
, wrp
->coreintr_status
, usbintr
);
323 dev_dbg(musb
->controller
, "usbintr (%x) epintr(%x)\n",
326 * DRVVBUS IRQs are the only proxy we have (a very poor one!) for
327 * DSPS IP's missing ID change IRQ. We need an ID change IRQ to
328 * switch appropriately between halves of the OTG state machine.
329 * Managing DEVCTL.SESSION per Mentor docs requires that we know its
330 * value but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set.
331 * Also, DRVVBUS pulses for SRP (but not at 5V) ...
333 if (usbintr
& MUSB_INTR_BABBLE
)
334 pr_info("CAUTION: musb: Babble Interrupt Occurred\n");
336 if (usbintr
& ((1 << wrp
->drvvbus
) << wrp
->usb_shift
)) {
337 int drvvbus
= dsps_readl(reg_base
, wrp
->status
);
338 void __iomem
*mregs
= musb
->mregs
;
339 u8 devctl
= dsps_readb(mregs
, MUSB_DEVCTL
);
342 err
= musb
->int_usb
& MUSB_INTR_VBUSERROR
;
345 * The Mentor core doesn't debounce VBUS as needed
346 * to cope with device connect current spikes. This
347 * means it's not uncommon for bus-powered devices
348 * to get VBUS errors during enumeration.
350 * This is a workaround, but newer RTL from Mentor
351 * seems to allow a better one: "re"-starting sessions
352 * without waiting for VBUS to stop registering in
355 musb
->int_usb
&= ~MUSB_INTR_VBUSERROR
;
356 musb
->xceiv
->state
= OTG_STATE_A_WAIT_VFALL
;
357 mod_timer(&glue
->timer
[pdev
->id
],
358 jiffies
+ wrp
->poll_seconds
* HZ
);
359 WARNING("VBUS error workaround (delay coming)\n");
360 } else if (drvvbus
) {
363 musb
->xceiv
->otg
->default_a
= 1;
364 musb
->xceiv
->state
= OTG_STATE_A_WAIT_VRISE
;
365 del_timer(&glue
->timer
[pdev
->id
]);
369 musb
->xceiv
->otg
->default_a
= 0;
370 musb
->xceiv
->state
= OTG_STATE_B_IDLE
;
373 /* NOTE: this must complete power-on within 100 ms. */
374 dev_dbg(musb
->controller
, "VBUS %s (%s)%s, devctl %02x\n",
375 drvvbus
? "on" : "off",
376 otg_state_string(musb
->xceiv
->state
),
382 if (musb
->int_tx
|| musb
->int_rx
|| musb
->int_usb
)
383 ret
|= musb_interrupt(musb
);
386 /* EOI needs to be written for the IRQ to be re-asserted. */
387 if (ret
== IRQ_HANDLED
|| epintr
|| usbintr
)
388 dsps_writel(reg_base
, wrp
->eoi
, 1);
390 /* Poll for ID change */
391 if (musb
->xceiv
->state
== OTG_STATE_B_IDLE
)
392 mod_timer(&glue
->timer
[pdev
->id
],
393 jiffies
+ wrp
->poll_seconds
* HZ
);
395 spin_unlock_irqrestore(&musb
->lock
, flags
);
400 static int dsps_musb_init(struct musb
*musb
)
402 struct device
*dev
= musb
->controller
;
403 struct platform_device
*pdev
= to_platform_device(dev
);
404 struct dsps_glue
*glue
= dev_get_drvdata(dev
->parent
);
405 const struct dsps_musb_wrapper
*wrp
= glue
->wrp
;
406 void __iomem
*reg_base
= musb
->ctrl_base
;
410 /* mentor core register starts at offset of 0x400 from musb base */
411 musb
->mregs
+= wrp
->musb_core_offset
;
413 /* NOP driver needs change if supporting dual instance */
414 usb_nop_xceiv_register();
415 musb
->xceiv
= usb_get_phy(USB_PHY_TYPE_USB2
);
416 if (IS_ERR_OR_NULL(musb
->xceiv
))
419 /* Returns zero if e.g. not clocked */
420 rev
= dsps_readl(reg_base
, wrp
->revision
);
426 setup_timer(&glue
->timer
[pdev
->id
], otg_timer
, (unsigned long) musb
);
429 dsps_writel(reg_base
, wrp
->control
, (1 << wrp
->reset
));
431 /* Start the on-chip PHY and its PLL. */
432 musb_dsps_phy_control(glue
, pdev
->id
, 1);
434 musb
->isr
= dsps_interrupt
;
436 /* reset the otgdisable bit, needed for host mode to work */
437 val
= dsps_readl(reg_base
, wrp
->phy_utmi
);
438 val
&= ~(1 << wrp
->otg_disable
);
439 dsps_writel(musb
->ctrl_base
, wrp
->phy_utmi
, val
);
441 /* clear level interrupt */
442 dsps_writel(reg_base
, wrp
->eoi
, 0);
446 usb_put_phy(musb
->xceiv
);
447 usb_nop_xceiv_unregister();
451 static int dsps_musb_exit(struct musb
*musb
)
453 struct device
*dev
= musb
->controller
;
454 struct platform_device
*pdev
= to_platform_device(dev
);
455 struct dsps_glue
*glue
= dev_get_drvdata(dev
->parent
);
457 del_timer_sync(&glue
->timer
[pdev
->id
]);
459 /* Shutdown the on-chip PHY and its PLL. */
460 musb_dsps_phy_control(glue
, pdev
->id
, 0);
462 /* NOP driver needs change if supporting dual instance */
463 usb_put_phy(musb
->xceiv
);
464 usb_nop_xceiv_unregister();
469 static struct musb_platform_ops dsps_ops
= {
470 .init
= dsps_musb_init
,
471 .exit
= dsps_musb_exit
,
473 .enable
= dsps_musb_enable
,
474 .disable
= dsps_musb_disable
,
476 .try_idle
= dsps_musb_try_idle
,
479 static u64 musb_dmamask
= DMA_BIT_MASK(32);
481 static int dsps_create_musb_pdev(struct dsps_glue
*glue
, u8 id
)
483 struct device
*dev
= glue
->dev
;
484 struct platform_device
*pdev
= to_platform_device(dev
);
485 struct musb_hdrc_platform_data
*pdata
= dev
->platform_data
;
486 struct device_node
*np
= pdev
->dev
.of_node
;
487 struct musb_hdrc_config
*config
;
488 struct platform_device
*musb
;
489 struct resource
*res
;
490 struct resource resources
[2];
494 resources
[0].start
= dsps_control_module_phys
[id
];
495 resources
[0].end
= resources
[0].start
+ SZ_4
- 1;
496 resources
[0].flags
= IORESOURCE_MEM
;
498 glue
->usb_ctrl
[id
] = devm_request_and_ioremap(&pdev
->dev
, resources
);
499 if (glue
->usb_ctrl
[id
] == NULL
) {
500 dev_err(dev
, "Failed to obtain usb_ctrl%d memory\n", id
);
505 /* first resource is for usbss, so start index from 1 */
506 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, id
+ 1);
508 dev_err(dev
, "failed to get memory for instance %d\n", id
);
515 /* first resource is for usbss, so start index from 1 */
516 res
= platform_get_resource(pdev
, IORESOURCE_IRQ
, id
+ 1);
518 dev_err(dev
, "failed to get irq for instance %d\n", id
);
524 resources
[1].name
= "mc";
526 /* allocate the child platform device */
527 musb
= platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO
);
529 dev_err(dev
, "failed to allocate musb device\n");
534 musb
->dev
.parent
= dev
;
535 musb
->dev
.dma_mask
= &musb_dmamask
;
536 musb
->dev
.coherent_dma_mask
= musb_dmamask
;
538 glue
->musb
[id
] = musb
;
540 ret
= platform_device_add_resources(musb
, resources
, 2);
542 dev_err(dev
, "failed to add resources\n");
547 pdata
= devm_kzalloc(&pdev
->dev
, sizeof(*pdata
), GFP_KERNEL
);
550 "failed to allocate musb platfrom data\n");
555 config
= devm_kzalloc(&pdev
->dev
, sizeof(*config
), GFP_KERNEL
);
558 "failed to allocate musb hdrc config\n");
562 of_property_read_u32(np
, "num-eps", (u32
*)&config
->num_eps
);
563 of_property_read_u32(np
, "ram-bits", (u32
*)&config
->ram_bits
);
564 snprintf(res_name
, sizeof(res_name
), "port%d-mode", id
);
565 of_property_read_u32(np
, res_name
, (u32
*)&pdata
->mode
);
566 of_property_read_u32(np
, "power", (u32
*)&pdata
->power
);
567 config
->multipoint
= of_property_read_bool(np
, "multipoint");
569 pdata
->config
= config
;
572 pdata
->platform_ops
= &dsps_ops
;
574 ret
= platform_device_add_data(musb
, pdata
, sizeof(*pdata
));
576 dev_err(dev
, "failed to add platform_data\n");
580 ret
= platform_device_add(musb
);
582 dev_err(dev
, "failed to register musb device\n");
589 platform_device_put(musb
);
594 static int dsps_probe(struct platform_device
*pdev
)
596 struct device_node
*np
= pdev
->dev
.of_node
;
597 const struct of_device_id
*match
;
598 const struct dsps_musb_wrapper
*wrp
;
599 struct dsps_glue
*glue
;
600 struct resource
*iomem
;
603 match
= of_match_node(musb_dsps_of_match
, np
);
605 dev_err(&pdev
->dev
, "fail to get matching of_match struct\n");
612 glue
= kzalloc(sizeof(*glue
), GFP_KERNEL
);
614 dev_err(&pdev
->dev
, "unable to allocate glue memory\n");
619 /* get memory resource */
620 iomem
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
622 dev_err(&pdev
->dev
, "failed to get usbss mem resourse\n");
627 glue
->dev
= &pdev
->dev
;
629 glue
->wrp
= kmemdup(wrp
, sizeof(*wrp
), GFP_KERNEL
);
631 dev_err(&pdev
->dev
, "failed to duplicate wrapper struct memory\n");
635 platform_set_drvdata(pdev
, glue
);
637 /* enable the usbss clocks */
638 pm_runtime_enable(&pdev
->dev
);
640 ret
= pm_runtime_get_sync(&pdev
->dev
);
642 dev_err(&pdev
->dev
, "pm_runtime_get_sync FAILED");
646 /* create the child platform device for all instances of musb */
647 for (i
= 0; i
< wrp
->instances
; i
++) {
648 ret
= dsps_create_musb_pdev(glue
, i
);
650 dev_err(&pdev
->dev
, "failed to create child pdev\n");
651 /* release resources of previously created instances */
652 for (i
--; i
>= 0 ; i
--)
653 platform_device_unregister(glue
->musb
[i
]);
661 pm_runtime_put(&pdev
->dev
);
663 pm_runtime_disable(&pdev
->dev
);
670 static int dsps_remove(struct platform_device
*pdev
)
672 struct dsps_glue
*glue
= platform_get_drvdata(pdev
);
673 const struct dsps_musb_wrapper
*wrp
= glue
->wrp
;
676 /* delete the child platform device */
677 for (i
= 0; i
< wrp
->instances
; i
++)
678 platform_device_unregister(glue
->musb
[i
]);
680 /* disable usbss clocks */
681 pm_runtime_put(&pdev
->dev
);
682 pm_runtime_disable(&pdev
->dev
);
688 #ifdef CONFIG_PM_SLEEP
689 static int dsps_suspend(struct device
*dev
)
691 struct platform_device
*pdev
= to_platform_device(dev
->parent
);
692 struct dsps_glue
*glue
= platform_get_drvdata(pdev
);
693 const struct dsps_musb_wrapper
*wrp
= glue
->wrp
;
696 for (i
= 0; i
< wrp
->instances
; i
++)
697 musb_dsps_phy_control(glue
, i
, 0);
702 static int dsps_resume(struct device
*dev
)
704 struct platform_device
*pdev
= to_platform_device(dev
->parent
);
705 struct dsps_glue
*glue
= platform_get_drvdata(pdev
);
706 const struct dsps_musb_wrapper
*wrp
= glue
->wrp
;
709 for (i
= 0; i
< wrp
->instances
; i
++)
710 musb_dsps_phy_control(glue
, i
, 1);
716 static SIMPLE_DEV_PM_OPS(dsps_pm_ops
, dsps_suspend
, dsps_resume
);
718 static const struct dsps_musb_wrapper ti81xx_driver_data
= {
724 .epintr_clear
= 0x40,
725 .epintr_status
= 0x30,
726 .coreintr_set
= 0x3c,
727 .coreintr_clear
= 0x44,
728 .coreintr_status
= 0x34,
736 .usb_bitmap
= (0x1ff << 0),
740 .txep_bitmap
= (0xffff << 0),
743 .rxep_bitmap
= (0xfffe << 16),
744 .musb_core_offset
= 0x400,
749 static const struct platform_device_id musb_dsps_id_table
[] = {
751 .name
= "musb-ti81xx",
752 .driver_data
= (kernel_ulong_t
) &ti81xx_driver_data
,
754 { }, /* Terminating Entry */
756 MODULE_DEVICE_TABLE(platform
, musb_dsps_id_table
);
759 static const struct of_device_id musb_dsps_of_match
[] = {
760 { .compatible
= "ti,musb-am33xx",
761 .data
= (void *) &ti81xx_driver_data
, },
764 MODULE_DEVICE_TABLE(of
, musb_dsps_of_match
);
767 static struct platform_driver dsps_usbss_driver
= {
769 .remove
= dsps_remove
,
773 .of_match_table
= of_match_ptr(musb_dsps_of_match
),
775 .id_table
= musb_dsps_id_table
,
778 MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer");
779 MODULE_AUTHOR("Ravi B <ravibabu@ti.com>");
780 MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>");
781 MODULE_LICENSE("GPL v2");
783 static int __init
dsps_init(void)
785 return platform_driver_register(&dsps_usbss_driver
);
787 subsys_initcall(dsps_init
);
789 static void __exit
dsps_exit(void)
791 platform_driver_unregister(&dsps_usbss_driver
);
793 module_exit(dsps_exit
);