3 * TI 3410/5052 USB Serial Driver Header
5 * Copyright (C) 2004 Texas Instruments
7 * This driver is based on the Linux io_ti driver, which is
8 * Copyright (C) 2000-2002 Inside Out Networks
9 * Copyright (C) 2001-2002 Greg Kroah-Hartman
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * For questions or problems with this driver, contact Texas Instruments
17 * technical support, or Al Borchers <alborchers@steinerpoint.com>, or
18 * Peter Berger <pberger@brimson.com>.
21 #ifndef _TI_3410_5052_H_
22 #define _TI_3410_5052_H_
24 /* Configuration ids */
25 #define TI_BOOT_CONFIG 1
26 #define TI_ACTIVE_CONFIG 2
28 /* Vendor and product ids */
29 #define TI_VENDOR_ID 0x0451
30 #define IBM_VENDOR_ID 0x04b3
31 #define TI_3410_PRODUCT_ID 0x3410
32 #define IBM_4543_PRODUCT_ID 0x4543
33 #define IBM_454B_PRODUCT_ID 0x454b
34 #define IBM_454C_PRODUCT_ID 0x454c
35 #define TI_3410_EZ430_ID 0xF430 /* TI ez430 development tool */
36 #define TI_5052_BOOT_PRODUCT_ID 0x5052 /* no EEPROM, no firmware */
37 #define TI_5152_BOOT_PRODUCT_ID 0x5152 /* no EEPROM, no firmware */
38 #define TI_5052_EEPROM_PRODUCT_ID 0x505A /* EEPROM, no firmware */
39 #define TI_5052_FIRMWARE_PRODUCT_ID 0x505F /* firmware is running */
41 /* Multi-Tech vendor and product ids */
42 #define MTS_VENDOR_ID 0x06E0
43 #define MTS_GSM_NO_FW_PRODUCT_ID 0xF108
44 #define MTS_CDMA_NO_FW_PRODUCT_ID 0xF109
45 #define MTS_CDMA_PRODUCT_ID 0xF110
46 #define MTS_GSM_PRODUCT_ID 0xF111
47 #define MTS_EDGE_PRODUCT_ID 0xF112
50 #define TI_GET_VERSION 0x01
51 #define TI_GET_PORT_STATUS 0x02
52 #define TI_GET_PORT_DEV_INFO 0x03
53 #define TI_GET_CONFIG 0x04
54 #define TI_SET_CONFIG 0x05
55 #define TI_OPEN_PORT 0x06
56 #define TI_CLOSE_PORT 0x07
57 #define TI_START_PORT 0x08
58 #define TI_STOP_PORT 0x09
59 #define TI_TEST_PORT 0x0A
60 #define TI_PURGE_PORT 0x0B
61 #define TI_RESET_EXT_DEVICE 0x0C
62 #define TI_WRITE_DATA 0x80
63 #define TI_READ_DATA 0x81
64 #define TI_REQ_TYPE_CLASS 0x82
66 /* Module identifiers */
67 #define TI_I2C_PORT 0x01
68 #define TI_IEEE1284_PORT 0x02
69 #define TI_UART1_PORT 0x03
70 #define TI_UART2_PORT 0x04
71 #define TI_RAM_PORT 0x05
74 #define TI_MSR_DELTA_CTS 0x01
75 #define TI_MSR_DELTA_DSR 0x02
76 #define TI_MSR_DELTA_RI 0x04
77 #define TI_MSR_DELTA_CD 0x08
78 #define TI_MSR_CTS 0x10
79 #define TI_MSR_DSR 0x20
80 #define TI_MSR_RI 0x40
81 #define TI_MSR_CD 0x80
82 #define TI_MSR_DELTA_MASK 0x0F
83 #define TI_MSR_MASK 0xF0
86 #define TI_LSR_OVERRUN_ERROR 0x01
87 #define TI_LSR_PARITY_ERROR 0x02
88 #define TI_LSR_FRAMING_ERROR 0x04
89 #define TI_LSR_BREAK 0x08
90 #define TI_LSR_ERROR 0x0F
91 #define TI_LSR_RX_FULL 0x10
92 #define TI_LSR_TX_EMPTY 0x20
95 #define TI_LCR_BREAK 0x40
98 #define TI_MCR_LOOP 0x04
99 #define TI_MCR_DTR 0x10
100 #define TI_MCR_RTS 0x20
103 #define TI_UART_ENABLE_RTS_IN 0x0001
104 #define TI_UART_DISABLE_RTS 0x0002
105 #define TI_UART_ENABLE_PARITY_CHECKING 0x0008
106 #define TI_UART_ENABLE_DSR_OUT 0x0010
107 #define TI_UART_ENABLE_CTS_OUT 0x0020
108 #define TI_UART_ENABLE_X_OUT 0x0040
109 #define TI_UART_ENABLE_XA_OUT 0x0080
110 #define TI_UART_ENABLE_X_IN 0x0100
111 #define TI_UART_ENABLE_DTR_IN 0x0800
112 #define TI_UART_DISABLE_DTR 0x1000
113 #define TI_UART_ENABLE_MS_INTS 0x2000
114 #define TI_UART_ENABLE_AUTO_START_DMA 0x4000
117 #define TI_UART_NO_PARITY 0x00
118 #define TI_UART_ODD_PARITY 0x01
119 #define TI_UART_EVEN_PARITY 0x02
120 #define TI_UART_MARK_PARITY 0x03
121 #define TI_UART_SPACE_PARITY 0x04
124 #define TI_UART_1_STOP_BITS 0x00
125 #define TI_UART_1_5_STOP_BITS 0x01
126 #define TI_UART_2_STOP_BITS 0x02
128 /* Bits per character */
129 #define TI_UART_5_DATA_BITS 0x00
130 #define TI_UART_6_DATA_BITS 0x01
131 #define TI_UART_7_DATA_BITS 0x02
132 #define TI_UART_8_DATA_BITS 0x03
135 #define TI_UART_232 0x00
136 #define TI_UART_485_RECEIVER_DISABLED 0x01
137 #define TI_UART_485_RECEIVER_ENABLED 0x02
139 /* Pipe transfer mode and timeout */
140 #define TI_PIPE_MODE_CONTINOUS 0x01
141 #define TI_PIPE_MODE_MASK 0x03
142 #define TI_PIPE_TIMEOUT_MASK 0x7C
143 #define TI_PIPE_TIMEOUT_ENABLE 0x80
146 struct ti_uart_config
{
155 } __attribute__((packed
));
157 /* Get port status */
158 struct ti_port_status
{
164 } __attribute__((packed
));
167 #define TI_PURGE_OUTPUT 0x00
168 #define TI_PURGE_INPUT 0x80
170 /* Read/Write data */
171 #define TI_RW_DATA_ADDR_SFR 0x10
172 #define TI_RW_DATA_ADDR_IDATA 0x20
173 #define TI_RW_DATA_ADDR_XDATA 0x30
174 #define TI_RW_DATA_ADDR_CODE 0x40
175 #define TI_RW_DATA_ADDR_GPIO 0x50
176 #define TI_RW_DATA_ADDR_I2C 0x60
177 #define TI_RW_DATA_ADDR_FLASH 0x70
178 #define TI_RW_DATA_ADDR_DSP 0x80
180 #define TI_RW_DATA_UNSPECIFIED 0x00
181 #define TI_RW_DATA_BYTE 0x01
182 #define TI_RW_DATA_WORD 0x02
183 #define TI_RW_DATA_DOUBLE_WORD 0x04
185 struct ti_write_data_bytes
{
192 } __attribute__((packed
));
194 struct ti_read_data_request
{
200 } __attribute__((packed
));
202 struct ti_read_data_bytes
{
207 } __attribute__((packed
));
209 /* Interrupt struct */
210 struct ti_interrupt
{
213 } __attribute__((packed
));
215 /* Interrupt codes */
216 #define TI_GET_PORT_FROM_CODE(c) (((c) >> 4) - 3)
217 #define TI_GET_FUNC_FROM_CODE(c) ((c) & 0x0f)
218 #define TI_CODE_HARDWARE_ERROR 0xFF
219 #define TI_CODE_DATA_ERROR 0x03
220 #define TI_CODE_MODEM_STATUS 0x04
222 /* Download firmware max packet size */
223 #define TI_DOWNLOAD_MAX_PACKET_SIZE 64
225 /* Firmware image header */
226 struct ti_firmware_header
{
229 } __attribute__((packed
));
232 #define TI_UART1_BASE_ADDR 0xFFA0 /* UART 1 base address */
233 #define TI_UART2_BASE_ADDR 0xFFB0 /* UART 2 base address */
234 #define TI_UART_OFFSET_LCR 0x0002 /* UART MCR register offset */
235 #define TI_UART_OFFSET_MCR 0x0004 /* UART MCR register offset */
237 #endif /* _TI_3410_5052_H_ */
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