drivers/vfio/platform/reset/vfio_platform_calxedaxgmac.c

   1 /*
   2  * VFIO platform driver specialized for Calxeda xgmac reset
   3  * reset code is inherited from calxeda xgmac native driver
   4  *
   5  * Copyright 2010-2011 Calxeda, Inc.
   6  * Copyright (c) 2015 Linaro Ltd.
   7  *              www.linaro.org
   8  *
   9  * This program is free software; you can redistribute it and/or modify it
  10  * under the terms and conditions of the GNU General Public License,
  11  * version 2, as published by the Free Software Foundation.
  12  *
  13  * This program is distributed in the hope it will be useful, but WITHOUT
  14  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  15  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  16  * more details.
  17  *
  18  * You should have received a copy of the GNU General Public License along with
  19  * this program.  If not, see <http://www.gnu.org/licenses/>.
  20  */
  21
  22 #include <linux/module.h>
  23 #include <linux/kernel.h>
  24 #include <linux/init.h>
  25 #include <linux/io.h>
  26
  27 #include "vfio_platform_private.h"
  28
  29 #define DRIVER_VERSION  "0.1"
  30 #define DRIVER_AUTHOR   "Eric Auger <eric.auger@linaro.org>"
  31 #define DRIVER_DESC     "Reset support for Calxeda xgmac vfio platform device"
  32
  33 #define CALXEDAXGMAC_COMPAT "calxeda,hb-xgmac"
  34
  35 /* XGMAC Register definitions */
  36 #define XGMAC_CONTROL           0x00000000      /* MAC Configuration */
  37
  38 /* DMA Control and Status Registers */
  39 #define XGMAC_DMA_CONTROL       0x00000f18      /* Ctrl (Operational Mode) */
  40 #define XGMAC_DMA_INTR_ENA      0x00000f1c      /* Interrupt Enable */
  41
  42 /* DMA Control registe defines */
  43 #define DMA_CONTROL_ST          0x00002000      /* Start/Stop Transmission */
  44 #define DMA_CONTROL_SR          0x00000002      /* Start/Stop Receive */
  45
  46 /* Common MAC defines */
  47 #define MAC_ENABLE_TX           0x00000008      /* Transmitter Enable */
  48 #define MAC_ENABLE_RX           0x00000004      /* Receiver Enable */
  49
  50 static inline void xgmac_mac_disable(void __iomem *ioaddr)
  51 {
  52         u32 value = readl(ioaddr + XGMAC_DMA_CONTROL);
  53
  54         value &= ~(DMA_CONTROL_ST | DMA_CONTROL_SR);
  55         writel(value, ioaddr + XGMAC_DMA_CONTROL);
  56
  57         value = readl(ioaddr + XGMAC_CONTROL);
  58         value &= ~(MAC_ENABLE_TX | MAC_ENABLE_RX);
  59         writel(value, ioaddr + XGMAC_CONTROL);
  60 }
  61
  62 int vfio_platform_calxedaxgmac_reset(struct vfio_platform_device *vdev)
  63 {
  64         struct vfio_platform_region reg = vdev->regions[0];
  65
  66         if (!reg.ioaddr) {
  67                 reg.ioaddr =
  68                         ioremap_nocache(reg.addr, reg.size);
  69                 if (!reg.ioaddr)
  70                         return -ENOMEM;
  71         }
  72
  73         /* disable IRQ */
  74         writel(0, reg.ioaddr + XGMAC_DMA_INTR_ENA);
  75
  76         /* Disable the MAC core */
  77         xgmac_mac_disable(reg.ioaddr);
  78
  79         return 0;
  80 }
  81 EXPORT_SYMBOL_GPL(vfio_platform_calxedaxgmac_reset);
  82
  83 MODULE_VERSION(DRIVER_VERSION);
  84 MODULE_LICENSE("GPL v2");
  85 MODULE_AUTHOR(DRIVER_AUTHOR);
  86 MODULE_DESCRIPTION(DRIVER_DESC);