drivers/video/cg6.c

   1 /* cg6.c: CGSIX (GX, GXplus, TGX) frame buffer driver
   2  *
   3  * Copyright (C) 2003 David S. Miller (davem@redhat.com)
   4  * Copyright (C) 1996,1998 Jakub Jelinek (jj@ultra.linux.cz)
   5  * Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx)
   6  * Copyright (C) 1996 Eddie C. Dost (ecd@skynet.be)
   7  *
   8  * Driver layout based loosely on tgafb.c, see that file for credits.
   9  */
  10
  11 #include <linux/module.h>
  12 #include <linux/kernel.h>
  13 #include <linux/errno.h>
  14 #include <linux/string.h>
  15 #include <linux/slab.h>
  16 #include <linux/delay.h>
  17 #include <linux/init.h>
  18 #include <linux/fb.h>
  19 #include <linux/mm.h>
  20
  21 #include <asm/io.h>
  22 #include <asm/sbus.h>
  23 #include <asm/oplib.h>
  24 #include <asm/fbio.h>
  25
  26 #include "sbuslib.h"
  27
  28 /*
  29  * Local functions.
  30  */
  31
  32 static int cg6_setcolreg(unsigned, unsigned, unsigned, unsigned,
  33                          unsigned, struct fb_info *);
  34 static int cg6_blank(int, struct fb_info *);
  35
  36 static void cg6_imageblit(struct fb_info *, const struct fb_image *);
  37 static void cg6_fillrect(struct fb_info *, const struct fb_fillrect *);
  38 static int cg6_sync(struct fb_info *);
  39 static int cg6_mmap(struct fb_info *, struct file *, struct vm_area_struct *);
  40 static int cg6_ioctl(struct inode *, struct file *, unsigned int,
  41                      unsigned long, struct fb_info *);
  42
  43 /*
  44  *  Frame buffer operations
  45  */
  46
  47 static struct fb_ops cg6_ops = {
  48         .owner                  = THIS_MODULE,
  49         .fb_setcolreg           = cg6_setcolreg,
  50         .fb_blank               = cg6_blank,
  51         .fb_fillrect            = cg6_fillrect,
  52         .fb_copyarea            = cfb_copyarea,
  53         .fb_imageblit           = cg6_imageblit,
  54         .fb_sync                = cg6_sync,
  55         .fb_mmap                = cg6_mmap,
  56         .fb_ioctl               = cg6_ioctl,
  57 #ifdef CONFIG_COMPAT
  58         .fb_compat_ioctl        = sbusfb_compat_ioctl,
  59 #endif
  60 };
  61
  62 /* Offset of interesting structures in the OBIO space */
  63 /*
  64  * Brooktree is the video dac and is funny to program on the cg6.
  65  * (it's even funnier on the cg3)
  66  * The FBC could be the frame buffer control
  67  * The FHC could is the frame buffer hardware control.
  68  */
  69 #define CG6_ROM_OFFSET       0x0UL
  70 #define CG6_BROOKTREE_OFFSET 0x200000UL
  71 #define CG6_DHC_OFFSET       0x240000UL
  72 #define CG6_ALT_OFFSET       0x280000UL
  73 #define CG6_FHC_OFFSET       0x300000UL
  74 #define CG6_THC_OFFSET       0x301000UL
  75 #define CG6_FBC_OFFSET       0x700000UL
  76 #define CG6_TEC_OFFSET       0x701000UL
  77 #define CG6_RAM_OFFSET       0x800000UL
  78
  79 /* FHC definitions */
  80 #define CG6_FHC_FBID_SHIFT           24
  81 #define CG6_FHC_FBID_MASK            255
  82 #define CG6_FHC_REV_SHIFT            20
  83 #define CG6_FHC_REV_MASK             15
  84 #define CG6_FHC_FROP_DISABLE         (1 << 19)
  85 #define CG6_FHC_ROW_DISABLE          (1 << 18)
  86 #define CG6_FHC_SRC_DISABLE          (1 << 17)
  87 #define CG6_FHC_DST_DISABLE          (1 << 16)
  88 #define CG6_FHC_RESET                (1 << 15)
  89 #define CG6_FHC_LITTLE_ENDIAN        (1 << 13)
  90 #define CG6_FHC_RES_MASK             (3 << 11)
  91 #define CG6_FHC_1024                 (0 << 11)
  92 #define CG6_FHC_1152                 (1 << 11)
  93 #define CG6_FHC_1280                 (2 << 11)
  94 #define CG6_FHC_1600                 (3 << 11)
  95 #define CG6_FHC_CPU_MASK             (3 << 9)
  96 #define CG6_FHC_CPU_SPARC            (0 << 9)
  97 #define CG6_FHC_CPU_68020            (1 << 9)
  98 #define CG6_FHC_CPU_386              (2 << 9)
  99 #define CG6_FHC_TEST                 (1 << 8)
 100 #define CG6_FHC_TEST_X_SHIFT         4
 101 #define CG6_FHC_TEST_X_MASK          15
 102 #define CG6_FHC_TEST_Y_SHIFT         0
 103 #define CG6_FHC_TEST_Y_MASK          15
 104
 105 /* FBC mode definitions */
 106 #define CG6_FBC_BLIT_IGNORE             0x00000000
 107 #define CG6_FBC_BLIT_NOSRC              0x00100000
 108 #define CG6_FBC_BLIT_SRC                0x00200000
 109 #define CG6_FBC_BLIT_ILLEGAL            0x00300000
 110 #define CG6_FBC_BLIT_MASK               0x00300000
 111
 112 #define CG6_FBC_VBLANK                  0x00080000
 113
 114 #define CG6_FBC_MODE_IGNORE             0x00000000
 115 #define CG6_FBC_MODE_COLOR8             0x00020000
 116 #define CG6_FBC_MODE_COLOR1             0x00040000
 117 #define CG6_FBC_MODE_HRMONO             0x00060000
 118 #define CG6_FBC_MODE_MASK               0x00060000
 119
 120 #define CG6_FBC_DRAW_IGNORE             0x00000000
 121 #define CG6_FBC_DRAW_RENDER             0x00008000
 122 #define CG6_FBC_DRAW_PICK               0x00010000
 123 #define CG6_FBC_DRAW_ILLEGAL            0x00018000
 124 #define CG6_FBC_DRAW_MASK               0x00018000
 125
 126 #define CG6_FBC_BWRITE0_IGNORE          0x00000000
 127 #define CG6_FBC_BWRITE0_ENABLE          0x00002000
 128 #define CG6_FBC_BWRITE0_DISABLE         0x00004000
 129 #define CG6_FBC_BWRITE0_ILLEGAL         0x00006000
 130 #define CG6_FBC_BWRITE0_MASK            0x00006000
 131
 132 #define CG6_FBC_BWRITE1_IGNORE          0x00000000
 133 #define CG6_FBC_BWRITE1_ENABLE          0x00000800
 134 #define CG6_FBC_BWRITE1_DISABLE         0x00001000
 135 #define CG6_FBC_BWRITE1_ILLEGAL         0x00001800
 136 #define CG6_FBC_BWRITE1_MASK            0x00001800
 137
 138 #define CG6_FBC_BREAD_IGNORE            0x00000000
 139 #define CG6_FBC_BREAD_0                 0x00000200
 140 #define CG6_FBC_BREAD_1                 0x00000400
 141 #define CG6_FBC_BREAD_ILLEGAL           0x00000600
 142 #define CG6_FBC_BREAD_MASK              0x00000600
 143
 144 #define CG6_FBC_BDISP_IGNORE            0x00000000
 145 #define CG6_FBC_BDISP_0                 0x00000080
 146 #define CG6_FBC_BDISP_1                 0x00000100
 147 #define CG6_FBC_BDISP_ILLEGAL           0x00000180
 148 #define CG6_FBC_BDISP_MASK              0x00000180
 149
 150 #define CG6_FBC_INDEX_MOD               0x00000040
 151 #define CG6_FBC_INDEX_MASK              0x00000030
 152
 153 /* THC definitions */
 154 #define CG6_THC_MISC_REV_SHIFT       16
 155 #define CG6_THC_MISC_REV_MASK        15
 156 #define CG6_THC_MISC_RESET           (1 << 12)
 157 #define CG6_THC_MISC_VIDEO           (1 << 10)
 158 #define CG6_THC_MISC_SYNC            (1 << 9)
 159 #define CG6_THC_MISC_VSYNC           (1 << 8)
 160 #define CG6_THC_MISC_SYNC_ENAB       (1 << 7)
 161 #define CG6_THC_MISC_CURS_RES        (1 << 6)
 162 #define CG6_THC_MISC_INT_ENAB        (1 << 5)
 163 #define CG6_THC_MISC_INT             (1 << 4)
 164 #define CG6_THC_MISC_INIT            0x9f
 165
 166 /* The contents are unknown */
 167 struct cg6_tec {
 168         volatile int tec_matrix;
 169         volatile int tec_clip;
 170         volatile int tec_vdc;
 171 };
 172
 173 struct cg6_thc {
 174         uint thc_pad0[512];
 175         volatile uint thc_hs;           /* hsync timing */
 176         volatile uint thc_hsdvs;
 177         volatile uint thc_hd;
 178         volatile uint thc_vs;           /* vsync timing */
 179         volatile uint thc_vd;
 180         volatile uint thc_refresh;
 181         volatile uint thc_misc;
 182         uint thc_pad1[56];
 183         volatile uint thc_cursxy;       /* cursor x,y position (16 bits each) */
 184         volatile uint thc_cursmask[32]; /* cursor mask bits */
 185         volatile uint thc_cursbits[32]; /* what to show where mask enabled */
 186 };
 187
 188 struct cg6_fbc {
 189         u32             xxx0[1];
 190         volatile u32    mode;
 191         volatile u32    clip;
 192         u32             xxx1[1];
 193         volatile u32    s;
 194         volatile u32    draw;
 195         volatile u32    blit;
 196         volatile u32    font;
 197         u32             xxx2[24];
 198         volatile u32    x0, y0, z0, color0;
 199         volatile u32    x1, y1, z1, color1;
 200         volatile u32    x2, y2, z2, color2;
 201         volatile u32    x3, y3, z3, color3;
 202         volatile u32    offx, offy;
 203         u32             xxx3[2];
 204         volatile u32    incx, incy;
 205         u32             xxx4[2];
 206         volatile u32    clipminx, clipminy;
 207         u32             xxx5[2];
 208         volatile u32    clipmaxx, clipmaxy;
 209         u32             xxx6[2];
 210         volatile u32    fg;
 211         volatile u32    bg;
 212         volatile u32    alu;
 213         volatile u32    pm;
 214         volatile u32    pixelm;
 215         u32             xxx7[2];
 216         volatile u32    patalign;
 217         volatile u32    pattern[8];
 218         u32             xxx8[432];
 219         volatile u32    apointx, apointy, apointz;
 220         u32             xxx9[1];
 221         volatile u32    rpointx, rpointy, rpointz;
 222         u32             xxx10[5];
 223         volatile u32    pointr, pointg, pointb, pointa;
 224         volatile u32    alinex, aliney, alinez;
 225         u32             xxx11[1];
 226         volatile u32    rlinex, rliney, rlinez;
 227         u32             xxx12[5];
 228         volatile u32    liner, lineg, lineb, linea;
 229         volatile u32    atrix, atriy, atriz;
 230         u32             xxx13[1];
 231         volatile u32    rtrix, rtriy, rtriz;
 232         u32             xxx14[5];
 233         volatile u32    trir, trig, trib, tria;
 234         volatile u32    aquadx, aquady, aquadz;
 235         u32             xxx15[1];
 236         volatile u32    rquadx, rquady, rquadz;
 237         u32             xxx16[5];
 238         volatile u32    quadr, quadg, quadb, quada;
 239         volatile u32    arectx, arecty, arectz;
 240         u32             xxx17[1];
 241         volatile u32    rrectx, rrecty, rrectz;
 242         u32             xxx18[5];
 243         volatile u32    rectr, rectg, rectb, recta;
 244 };
 245
 246 struct bt_regs {
 247         volatile u32 addr;
 248         volatile u32 color_map;
 249         volatile u32 control;
 250         volatile u32 cursor;
 251 };
 252
 253 struct cg6_par {
 254         spinlock_t              lock;
 255         struct bt_regs          __iomem *bt;
 256         struct cg6_fbc          __iomem *fbc;
 257         struct cg6_thc          __iomem *thc;
 258         struct cg6_tec          __iomem *tec;
 259         volatile u32            __iomem *fhc;
 260
 261         u32                     flags;
 262 #define CG6_FLAG_BLANKED        0x00000001
 263
 264         unsigned long           physbase;
 265         unsigned long           fbsize;
 266
 267         struct sbus_dev         *sdev;
 268         struct list_head        list;
 269 };
 270
 271 static int cg6_sync(struct fb_info *info)
 272 {
 273         struct cg6_par *par = (struct cg6_par *) info->par;
 274         struct cg6_fbc __iomem *fbc = par->fbc;
 275         int limit = 10000;
 276
 277         do {
 278                 if (!(sbus_readl(&fbc->s) & 0x10000000))
 279                         break;
 280                 udelay(10);
 281         } while (--limit > 0);
 282
 283         return 0;
 284 }
 285
 286 /**
 287  *      cg6_fillrect - REQUIRED function. Can use generic routines if
 288  *                     non acclerated hardware and packed pixel based.
 289  *                     Draws a rectangle on the screen.
 290  *
 291  *      @info: frame buffer structure that represents a single frame buffer
 292  *      @rect: structure defining the rectagle and operation.
 293  */
 294 static void cg6_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
 295 {
 296         struct cg6_par *par = (struct cg6_par *) info->par;
 297         struct cg6_fbc __iomem *fbc = par->fbc;
 298         unsigned long flags;
 299         s32 val;
 300
 301         /* XXX doesn't handle ROP_XOR */
 302
 303         spin_lock_irqsave(&par->lock, flags);
 304         cg6_sync(info);
 305         sbus_writel(rect->color, &fbc->fg);
 306         sbus_writel(~(u32)0, &fbc->pixelm);
 307         sbus_writel(0xea80ff00, &fbc->alu);
 308         sbus_writel(0, &fbc->s);
 309         sbus_writel(0, &fbc->clip);
 310         sbus_writel(~(u32)0, &fbc->pm);
 311         sbus_writel(rect->dy, &fbc->arecty);
 312         sbus_writel(rect->dx, &fbc->arectx);
 313         sbus_writel(rect->dy + rect->height, &fbc->arecty);
 314         sbus_writel(rect->dx + rect->width, &fbc->arectx);
 315         do {
 316                 val = sbus_readl(&fbc->draw);
 317         } while (val < 0 && (val & 0x20000000));
 318         spin_unlock_irqrestore(&par->lock, flags);
 319 }
 320
 321 /**
 322  *      cg6_imageblit - REQUIRED function. Can use generic routines if
 323  *                      non acclerated hardware and packed pixel based.
 324  *                      Copies a image from system memory to the screen.
 325  *
 326  *      @info: frame buffer structure that represents a single frame buffer
 327  *      @image: structure defining the image.
 328  */
 329 static void cg6_imageblit(struct fb_info *info, const struct fb_image *image)
 330 {
 331         struct cg6_par *par = (struct cg6_par *) info->par;
 332         struct cg6_fbc __iomem *fbc = par->fbc;
 333         const u8 *data = image->data;
 334         unsigned long flags;
 335         u32 x, y;
 336         int i, width;
 337
 338         if (image->depth > 1) {
 339                 cfb_imageblit(info, image);
 340                 return;
 341         }
 342
 343         spin_lock_irqsave(&par->lock, flags);
 344
 345         cg6_sync(info);
 346
 347         sbus_writel(image->fg_color, &fbc->fg);
 348         sbus_writel(image->bg_color, &fbc->bg);
 349         sbus_writel(0x140000, &fbc->mode);
 350         sbus_writel(0xe880fc30, &fbc->alu);
 351         sbus_writel(~(u32)0, &fbc->pixelm);
 352         sbus_writel(0, &fbc->s);
 353         sbus_writel(0, &fbc->clip);
 354         sbus_writel(0xff, &fbc->pm);
 355         sbus_writel(32, &fbc->incx);
 356         sbus_writel(0, &fbc->incy);
 357
 358         x = image->dx;
 359         y = image->dy;
 360         for (i = 0; i < image->height; i++) {
 361                 width = image->width;
 362
 363                 while (width >= 32) {
 364                         u32 val;
 365
 366                         sbus_writel(y, &fbc->y0);
 367                         sbus_writel(x, &fbc->x0);
 368                         sbus_writel(x + 32 - 1, &fbc->x1);
 369
 370                         val = ((u32)data[0] << 24) |
 371                               ((u32)data[1] << 16) |
 372                               ((u32)data[2] <<  8) |
 373                               ((u32)data[3] <<  0);
 374                         sbus_writel(val, &fbc->font);
 375
 376                         data += 4;
 377                         x += 32;
 378                         width -= 32;
 379                 }
 380                 if (width) {
 381                         u32 val;
 382
 383                         sbus_writel(y, &fbc->y0);
 384                         sbus_writel(x, &fbc->x0);
 385                         sbus_writel(x + width - 1, &fbc->x1);
 386                         if (width <= 8) {
 387                                 val = (u32) data[0] << 24;
 388                                 data += 1;
 389                         } else if (width <= 16) {
 390                                 val = ((u32) data[0] << 24) |
 391                                       ((u32) data[1] << 16);
 392                                 data += 2;
 393                         } else {
 394                                 val = ((u32) data[0] << 24) |
 395                                       ((u32) data[1] << 16) |
 396                                       ((u32) data[2] <<  8);
 397                                 data += 3;
 398                         }
 399                         sbus_writel(val, &fbc->font);
 400                 }
 401
 402                 y += 1;
 403                 x = image->dx;
 404         }
 405
 406         spin_unlock_irqrestore(&par->lock, flags);
 407 }
 408
 409 /**
 410  *      cg6_setcolreg - Optional function. Sets a color register.
 411  *      @regno: boolean, 0 copy local, 1 get_user() function
 412  *      @red: frame buffer colormap structure
 413  *      @green: The green value which can be up to 16 bits wide
 414  *      @blue:  The blue value which can be up to 16 bits wide.
 415  *      @transp: If supported the alpha value which can be up to 16 bits wide.
 416  *      @info: frame buffer info structure
 417  */
 418 static int cg6_setcolreg(unsigned regno,
 419                          unsigned red, unsigned green, unsigned blue,
 420                          unsigned transp, struct fb_info *info)
 421 {
 422         struct cg6_par *par = (struct cg6_par *) info->par;
 423         struct bt_regs __iomem *bt = par->bt;
 424         unsigned long flags;
 425
 426         if (regno >= 256)
 427                 return 1;
 428
 429         red >>= 8;
 430         green >>= 8;
 431         blue >>= 8;
 432
 433         spin_lock_irqsave(&par->lock, flags);
 434
 435         sbus_writel((u32)regno << 24, &bt->addr);
 436         sbus_writel((u32)red << 24, &bt->color_map);
 437         sbus_writel((u32)green << 24, &bt->color_map);
 438         sbus_writel((u32)blue << 24, &bt->color_map);
 439
 440         spin_unlock_irqrestore(&par->lock, flags);
 441
 442         return 0;
 443 }
 444
 445 /**
 446  *      cg6_blank - Optional function.  Blanks the display.
 447  *      @blank_mode: the blank mode we want.
 448  *      @info: frame buffer structure that represents a single frame buffer
 449  */
 450 static int
 451 cg6_blank(int blank, struct fb_info *info)
 452 {
 453         struct cg6_par *par = (struct cg6_par *) info->par;
 454         struct cg6_thc __iomem *thc = par->thc;
 455         unsigned long flags;
 456         u32 val;
 457
 458         spin_lock_irqsave(&par->lock, flags);
 459
 460         switch (blank) {
 461         case FB_BLANK_UNBLANK: /* Unblanking */
 462                 val = sbus_readl(&thc->thc_misc);
 463                 val |= CG6_THC_MISC_VIDEO;
 464                 sbus_writel(val, &thc->thc_misc);
 465                 par->flags &= ~CG6_FLAG_BLANKED;
 466                 break;
 467
 468         case FB_BLANK_NORMAL: /* Normal blanking */
 469         case FB_BLANK_VSYNC_SUSPEND: /* VESA blank (vsync off) */
 470         case FB_BLANK_HSYNC_SUSPEND: /* VESA blank (hsync off) */
 471         case FB_BLANK_POWERDOWN: /* Poweroff */
 472                 val = sbus_readl(&thc->thc_misc);
 473                 val &= ~CG6_THC_MISC_VIDEO;
 474                 sbus_writel(val, &thc->thc_misc);
 475                 par->flags |= CG6_FLAG_BLANKED;
 476                 break;
 477         }
 478
 479         spin_unlock_irqrestore(&par->lock, flags);
 480
 481         return 0;
 482 }
 483
 484 static struct sbus_mmap_map cg6_mmap_map[] = {
 485         {
 486                 .voff   = CG6_FBC,
 487                 .poff   = CG6_FBC_OFFSET,
 488                 .size   = PAGE_SIZE
 489         },
 490         {
 491                 .voff   = CG6_TEC,
 492                 .poff   = CG6_TEC_OFFSET,
 493                 .size   = PAGE_SIZE
 494         },
 495         {
 496                 .voff   = CG6_BTREGS,
 497                 .poff   = CG6_BROOKTREE_OFFSET,
 498                 .size   = PAGE_SIZE
 499         },
 500         {
 501                 .voff   = CG6_FHC,
 502                 .poff   = CG6_FHC_OFFSET,
 503                 .size   = PAGE_SIZE
 504         },
 505         {
 506                 .voff   = CG6_THC,
 507                 .poff   = CG6_THC_OFFSET,
 508                 .size   = PAGE_SIZE
 509         },
 510         {
 511                 .voff   = CG6_ROM,
 512                 .poff   = CG6_ROM_OFFSET,
 513                 .size   = 0x10000
 514         },
 515         {
 516                 .voff   = CG6_RAM,
 517                 .poff   = CG6_RAM_OFFSET,
 518                 .size   = SBUS_MMAP_FBSIZE(1)
 519         },
 520         {
 521                 .voff   = CG6_DHC,
 522                 .poff   = CG6_DHC_OFFSET,
 523                 .size   = 0x40000
 524         },
 525         { .size = 0 }
 526 };
 527
 528 static int cg6_mmap(struct fb_info *info, struct file *file, struct vm_area_struct *vma)
 529 {
 530         struct cg6_par *par = (struct cg6_par *)info->par;
 531
 532         return sbusfb_mmap_helper(cg6_mmap_map,
 533                                   par->physbase, par->fbsize,
 534                                   par->sdev->reg_addrs[0].which_io,
 535                                   vma);
 536 }
 537
 538 static int cg6_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
 539                      unsigned long arg, struct fb_info *info)
 540 {
 541         struct cg6_par *par = (struct cg6_par *) info->par;
 542
 543         return sbusfb_ioctl_helper(cmd, arg, info,
 544                                    FBTYPE_SUNFAST_COLOR, 8, par->fbsize);
 545 }
 546
 547 /*
 548  *  Initialisation
 549  */
 550
 551 static void
 552 cg6_init_fix(struct fb_info *info, int linebytes)
 553 {
 554         struct cg6_par *par = (struct cg6_par *)info->par;
 555         const char *cg6_cpu_name, *cg6_card_name;
 556         u32 conf;
 557
 558         conf = sbus_readl(par->fhc);
 559         switch(conf & CG6_FHC_CPU_MASK) {
 560         case CG6_FHC_CPU_SPARC:
 561                 cg6_cpu_name = "sparc";
 562                 break;
 563         case CG6_FHC_CPU_68020:
 564                 cg6_cpu_name = "68020";
 565                 break;
 566         default:
 567                 cg6_cpu_name = "i386";
 568                 break;
 569         };
 570         if (((conf >> CG6_FHC_REV_SHIFT) & CG6_FHC_REV_MASK) >= 11) {
 571                 if (par->fbsize <= 0x100000) {
 572                         cg6_card_name = "TGX";
 573                 } else {
 574                         cg6_card_name = "TGX+";
 575                 }
 576         } else {
 577                 if (par->fbsize <= 0x100000) {
 578                         cg6_card_name = "GX";
 579                 } else {
 580                         cg6_card_name = "GX+";
 581                 }
 582         }
 583
 584         sprintf(info->fix.id, "%s %s", cg6_card_name, cg6_cpu_name);
 585         info->fix.id[sizeof(info->fix.id)-1] = 0;
 586
 587         info->fix.type = FB_TYPE_PACKED_PIXELS;
 588         info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
 589
 590         info->fix.line_length = linebytes;
 591
 592         info->fix.accel = FB_ACCEL_SUN_CGSIX;
 593 }
 594
 595 /* Initialize Brooktree DAC */
 596 static void cg6_bt_init(struct cg6_par *par)
 597 {
 598         struct bt_regs __iomem *bt = par->bt;
 599
 600         sbus_writel(0x04 << 24, &bt->addr);         /* color planes */
 601         sbus_writel(0xff << 24, &bt->control);
 602         sbus_writel(0x05 << 24, &bt->addr);
 603         sbus_writel(0x00 << 24, &bt->control);
 604         sbus_writel(0x06 << 24, &bt->addr);         /* overlay plane */
 605         sbus_writel(0x73 << 24, &bt->control);
 606         sbus_writel(0x07 << 24, &bt->addr);
 607         sbus_writel(0x00 << 24, &bt->control);
 608 }
 609
 610 static void cg6_chip_init(struct fb_info *info)
 611 {
 612         struct cg6_par *par = (struct cg6_par *) info->par;
 613         struct cg6_tec __iomem *tec = par->tec;
 614         struct cg6_fbc __iomem *fbc = par->fbc;
 615         u32 rev, conf, mode, tmp;
 616         int i;
 617
 618         /* Turn off stuff in the Transform Engine. */
 619         sbus_writel(0, &tec->tec_matrix);
 620         sbus_writel(0, &tec->tec_clip);
 621         sbus_writel(0, &tec->tec_vdc);
 622
 623         /* Take care of bugs in old revisions. */
 624         rev = (sbus_readl(par->fhc) >> CG6_FHC_REV_SHIFT) & CG6_FHC_REV_MASK;
 625         if (rev < 5) {
 626                 conf = (sbus_readl(par->fhc) & CG6_FHC_RES_MASK) |
 627                         CG6_FHC_CPU_68020 | CG6_FHC_TEST |
 628                         (11 << CG6_FHC_TEST_X_SHIFT) |
 629                         (11 << CG6_FHC_TEST_Y_SHIFT);
 630                 if (rev < 2)
 631                         conf |= CG6_FHC_DST_DISABLE;
 632                 sbus_writel(conf, par->fhc);
 633         }
 634
 635         /* Set things in the FBC. Bad things appear to happen if we do
 636          * back to back store/loads on the mode register, so copy it
 637          * out instead. */
 638         mode = sbus_readl(&fbc->mode);
 639         do {
 640                 i = sbus_readl(&fbc->s);
 641         } while (i & 0x10000000);
 642         mode &= ~(CG6_FBC_BLIT_MASK | CG6_FBC_MODE_MASK |
 643                        CG6_FBC_DRAW_MASK | CG6_FBC_BWRITE0_MASK |
 644                        CG6_FBC_BWRITE1_MASK | CG6_FBC_BREAD_MASK |
 645                        CG6_FBC_BDISP_MASK);
 646         mode |= (CG6_FBC_BLIT_SRC | CG6_FBC_MODE_COLOR8 |
 647                       CG6_FBC_DRAW_RENDER | CG6_FBC_BWRITE0_ENABLE |
 648                       CG6_FBC_BWRITE1_DISABLE | CG6_FBC_BREAD_0 |
 649                       CG6_FBC_BDISP_0);
 650         sbus_writel(mode, &fbc->mode);
 651
 652         sbus_writel(0, &fbc->clip);
 653         sbus_writel(0, &fbc->offx);
 654         sbus_writel(0, &fbc->offy);
 655         sbus_writel(0, &fbc->clipminx);
 656         sbus_writel(0, &fbc->clipminy);
 657         sbus_writel(info->var.xres - 1, &fbc->clipmaxx);
 658         sbus_writel(info->var.yres - 1, &fbc->clipmaxy);
 659 }
 660
 661 struct all_info {
 662         struct fb_info info;
 663         struct cg6_par par;
 664         struct list_head list;
 665 };
 666 static LIST_HEAD(cg6_list);
 667
 668 static void cg6_init_one(struct sbus_dev *sdev)
 669 {
 670         struct all_info *all;
 671         int linebytes;
 672
 673         all = kmalloc(sizeof(*all), GFP_KERNEL);
 674         if (!all) {
 675                 printk(KERN_ERR "cg6: Cannot allocate memory.\n");
 676                 return;
 677         }
 678         memset(all, 0, sizeof(*all));
 679
 680         INIT_LIST_HEAD(&all->list);
 681
 682         spin_lock_init(&all->par.lock);
 683         all->par.sdev = sdev;
 684
 685         all->par.physbase = sdev->reg_addrs[0].phys_addr;
 686
 687         sbusfb_fill_var(&all->info.var, sdev->prom_node, 8);
 688         all->info.var.red.length = 8;
 689         all->info.var.green.length = 8;
 690         all->info.var.blue.length = 8;
 691
 692         linebytes = prom_getintdefault(sdev->prom_node, "linebytes",
 693                                        all->info.var.xres);
 694         all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres);
 695         if (prom_getbool(sdev->prom_node, "dblbuf"))
 696                 all->par.fbsize *= 4;
 697
 698         all->par.fbc = sbus_ioremap(&sdev->resource[0], CG6_FBC_OFFSET,
 699                              4096, "cgsix fbc");
 700         all->par.tec = sbus_ioremap(&sdev->resource[0], CG6_TEC_OFFSET,
 701                              sizeof(struct cg6_tec), "cgsix tec");
 702         all->par.thc = sbus_ioremap(&sdev->resource[0], CG6_THC_OFFSET,
 703                              sizeof(struct cg6_thc), "cgsix thc");
 704         all->par.bt = sbus_ioremap(&sdev->resource[0], CG6_BROOKTREE_OFFSET,
 705                              sizeof(struct bt_regs), "cgsix dac");
 706         all->par.fhc = sbus_ioremap(&sdev->resource[0], CG6_FHC_OFFSET,
 707                              sizeof(u32), "cgsix fhc");
 708
 709         all->info.flags = FBINFO_DEFAULT | FBINFO_HWACCEL_IMAGEBLIT |
 710                           FBINFO_HWACCEL_COPYAREA | FBINFO_HWACCEL_FILLRECT;
 711         all->info.fbops = &cg6_ops;
 712 #ifdef CONFIG_SPARC32
 713         all->info.screen_base = (char __iomem *)
 714                 prom_getintdefault(sdev->prom_node, "address", 0);
 715 #endif
 716         if (!all->info.screen_base)
 717                 all->info.screen_base =
 718                         sbus_ioremap(&sdev->resource[0], CG6_RAM_OFFSET,
 719                                      all->par.fbsize, "cgsix ram");
 720         all->info.par = &all->par;
 721
 722         all->info.var.accel_flags = FB_ACCELF_TEXT;
 723
 724         cg6_bt_init(&all->par);
 725         cg6_chip_init(&all->info);
 726         cg6_blank(0, &all->info);
 727
 728         if (fb_alloc_cmap(&all->info.cmap, 256, 0)) {
 729                 printk(KERN_ERR "cg6: Could not allocate color map.\n");
 730                 kfree(all);
 731                 return;
 732         }
 733
 734         fb_set_cmap(&all->info.cmap, &all->info);
 735         cg6_init_fix(&all->info, linebytes);
 736
 737         if (register_framebuffer(&all->info) < 0) {
 738                 printk(KERN_ERR "cg6: Could not register framebuffer.\n");
 739                 fb_dealloc_cmap(&all->info.cmap);
 740                 kfree(all);
 741                 return;
 742         }
 743
 744         list_add(&all->list, &cg6_list);
 745
 746         printk("cg6: CGsix [%s] at %lx:%lx\n",
 747                all->info.fix.id,
 748                (long) sdev->reg_addrs[0].which_io,
 749                (long) sdev->reg_addrs[0].phys_addr);
 750 }
 751
 752 int __init cg6_init(void)
 753 {
 754         struct sbus_bus *sbus;
 755         struct sbus_dev *sdev;
 756
 757         if (fb_get_options("cg6fb", NULL))
 758                 return -ENODEV;
 759
 760         for_all_sbusdev(sdev, sbus) {
 761                 if (!strcmp(sdev->prom_name, "cgsix") ||
 762                     !strcmp(sdev->prom_name, "cgthree+"))
 763                         cg6_init_one(sdev);
 764         }
 765
 766         return 0;
 767 }
 768
 769 void __exit cg6_exit(void)
 770 {
 771         struct list_head *pos, *tmp;
 772
 773         list_for_each_safe(pos, tmp, &cg6_list) {
 774                 struct all_info *all = list_entry(pos, typeof(*all), list);
 775
 776                 unregister_framebuffer(&all->info);
 777                 fb_dealloc_cmap(&all->info.cmap);
 778                 kfree(all);
 779         }
 780 }
 781
 782 int __init
 783 cg6_setup(char *arg)
 784 {
 785         /* No cmdline options yet... */
 786         return 0;
 787 }
 788
 789 module_init(cg6_init);
 790
 791 #ifdef MODULE
 792 module_exit(cg6_exit);
 793 #endif
 794
 795 MODULE_DESCRIPTION("framebuffer driver for CGsix chipsets");
 796 MODULE_AUTHOR("David S. Miller <davem@redhat.com>");
 797 MODULE_LICENSE("GPL");