Merge branch 'overlayfs-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mszer...
[deliverable/linux.git] / drivers / video / fbdev / atmel_lcdfb.c
1 /*
2 * Driver for AT91/AT32 LCD Controller
3 *
4 * Copyright (C) 2007 Atmel Corporation
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive for
8 * more details.
9 */
10
11 #include <linux/kernel.h>
12 #include <linux/platform_device.h>
13 #include <linux/dma-mapping.h>
14 #include <linux/interrupt.h>
15 #include <linux/clk.h>
16 #include <linux/fb.h>
17 #include <linux/init.h>
18 #include <linux/delay.h>
19 #include <linux/backlight.h>
20 #include <linux/gfp.h>
21 #include <linux/module.h>
22 #include <linux/of.h>
23 #include <linux/of_device.h>
24 #include <linux/of_gpio.h>
25 #include <video/of_display_timing.h>
26 #include <linux/regulator/consumer.h>
27 #include <video/videomode.h>
28
29 #include <asm/gpio.h>
30
31 #include <video/atmel_lcdc.h>
32
33 struct atmel_lcdfb_config {
34 bool have_alt_pixclock;
35 bool have_hozval;
36 bool have_intensity_bit;
37 };
38
39 /* LCD Controller info data structure, stored in device platform_data */
40 struct atmel_lcdfb_info {
41 spinlock_t lock;
42 struct fb_info *info;
43 void __iomem *mmio;
44 int irq_base;
45 struct work_struct task;
46
47 unsigned int smem_len;
48 struct platform_device *pdev;
49 struct clk *bus_clk;
50 struct clk *lcdc_clk;
51
52 struct backlight_device *backlight;
53 u8 bl_power;
54 u8 saved_lcdcon;
55
56 u32 pseudo_palette[16];
57 bool have_intensity_bit;
58
59 struct atmel_lcdfb_pdata pdata;
60
61 struct atmel_lcdfb_config *config;
62 struct regulator *reg_lcd;
63 };
64
65 struct atmel_lcdfb_power_ctrl_gpio {
66 int gpio;
67 int active_low;
68
69 struct list_head list;
70 };
71
72 #define lcdc_readl(sinfo, reg) __raw_readl((sinfo)->mmio+(reg))
73 #define lcdc_writel(sinfo, reg, val) __raw_writel((val), (sinfo)->mmio+(reg))
74
75 /* configurable parameters */
76 #define ATMEL_LCDC_CVAL_DEFAULT 0xc8
77 #define ATMEL_LCDC_DMA_BURST_LEN 8 /* words */
78 #define ATMEL_LCDC_FIFO_SIZE 512 /* words */
79
80 static struct atmel_lcdfb_config at91sam9261_config = {
81 .have_hozval = true,
82 .have_intensity_bit = true,
83 };
84
85 static struct atmel_lcdfb_config at91sam9263_config = {
86 .have_intensity_bit = true,
87 };
88
89 static struct atmel_lcdfb_config at91sam9g10_config = {
90 .have_hozval = true,
91 };
92
93 static struct atmel_lcdfb_config at91sam9g45_config = {
94 .have_alt_pixclock = true,
95 };
96
97 static struct atmel_lcdfb_config at91sam9g45es_config = {
98 };
99
100 static struct atmel_lcdfb_config at91sam9rl_config = {
101 .have_intensity_bit = true,
102 };
103
104 static struct atmel_lcdfb_config at32ap_config = {
105 .have_hozval = true,
106 };
107
108 static const struct platform_device_id atmel_lcdfb_devtypes[] = {
109 {
110 .name = "at91sam9261-lcdfb",
111 .driver_data = (unsigned long)&at91sam9261_config,
112 }, {
113 .name = "at91sam9263-lcdfb",
114 .driver_data = (unsigned long)&at91sam9263_config,
115 }, {
116 .name = "at91sam9g10-lcdfb",
117 .driver_data = (unsigned long)&at91sam9g10_config,
118 }, {
119 .name = "at91sam9g45-lcdfb",
120 .driver_data = (unsigned long)&at91sam9g45_config,
121 }, {
122 .name = "at91sam9g45es-lcdfb",
123 .driver_data = (unsigned long)&at91sam9g45es_config,
124 }, {
125 .name = "at91sam9rl-lcdfb",
126 .driver_data = (unsigned long)&at91sam9rl_config,
127 }, {
128 .name = "at32ap-lcdfb",
129 .driver_data = (unsigned long)&at32ap_config,
130 }, {
131 /* terminator */
132 }
133 };
134 MODULE_DEVICE_TABLE(platform, atmel_lcdfb_devtypes);
135
136 static struct atmel_lcdfb_config *
137 atmel_lcdfb_get_config(struct platform_device *pdev)
138 {
139 unsigned long data;
140
141 data = platform_get_device_id(pdev)->driver_data;
142
143 return (struct atmel_lcdfb_config *)data;
144 }
145
146 #if defined(CONFIG_ARCH_AT91)
147 #define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
148 | FBINFO_PARTIAL_PAN_OK \
149 | FBINFO_HWACCEL_YPAN)
150
151 static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
152 struct fb_var_screeninfo *var,
153 struct fb_info *info)
154 {
155
156 }
157 #elif defined(CONFIG_AVR32)
158 #define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
159 | FBINFO_PARTIAL_PAN_OK \
160 | FBINFO_HWACCEL_XPAN \
161 | FBINFO_HWACCEL_YPAN)
162
163 static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
164 struct fb_var_screeninfo *var,
165 struct fb_info *info)
166 {
167 u32 dma2dcfg;
168 u32 pixeloff;
169
170 pixeloff = (var->xoffset * info->var.bits_per_pixel) & 0x1f;
171
172 dma2dcfg = (info->var.xres_virtual - info->var.xres)
173 * info->var.bits_per_pixel / 8;
174 dma2dcfg |= pixeloff << ATMEL_LCDC_PIXELOFF_OFFSET;
175 lcdc_writel(sinfo, ATMEL_LCDC_DMA2DCFG, dma2dcfg);
176
177 /* Update configuration */
178 lcdc_writel(sinfo, ATMEL_LCDC_DMACON,
179 lcdc_readl(sinfo, ATMEL_LCDC_DMACON)
180 | ATMEL_LCDC_DMAUPDT);
181 }
182 #endif
183
184 static u32 contrast_ctr = ATMEL_LCDC_PS_DIV8
185 | ATMEL_LCDC_POL_POSITIVE
186 | ATMEL_LCDC_ENA_PWMENABLE;
187
188 #ifdef CONFIG_BACKLIGHT_ATMEL_LCDC
189
190 /* some bl->props field just changed */
191 static int atmel_bl_update_status(struct backlight_device *bl)
192 {
193 struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
194 int power = sinfo->bl_power;
195 int brightness = bl->props.brightness;
196
197 /* REVISIT there may be a meaningful difference between
198 * fb_blank and power ... there seem to be some cases
199 * this doesn't handle correctly.
200 */
201 if (bl->props.fb_blank != sinfo->bl_power)
202 power = bl->props.fb_blank;
203 else if (bl->props.power != sinfo->bl_power)
204 power = bl->props.power;
205
206 if (brightness < 0 && power == FB_BLANK_UNBLANK)
207 brightness = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
208 else if (power != FB_BLANK_UNBLANK)
209 brightness = 0;
210
211 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, brightness);
212 if (contrast_ctr & ATMEL_LCDC_POL_POSITIVE)
213 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR,
214 brightness ? contrast_ctr : 0);
215 else
216 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
217
218 bl->props.fb_blank = bl->props.power = sinfo->bl_power = power;
219
220 return 0;
221 }
222
223 static int atmel_bl_get_brightness(struct backlight_device *bl)
224 {
225 struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
226
227 return lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
228 }
229
230 static const struct backlight_ops atmel_lcdc_bl_ops = {
231 .update_status = atmel_bl_update_status,
232 .get_brightness = atmel_bl_get_brightness,
233 };
234
235 static void init_backlight(struct atmel_lcdfb_info *sinfo)
236 {
237 struct backlight_properties props;
238 struct backlight_device *bl;
239
240 sinfo->bl_power = FB_BLANK_UNBLANK;
241
242 if (sinfo->backlight)
243 return;
244
245 memset(&props, 0, sizeof(struct backlight_properties));
246 props.type = BACKLIGHT_RAW;
247 props.max_brightness = 0xff;
248 bl = backlight_device_register("backlight", &sinfo->pdev->dev, sinfo,
249 &atmel_lcdc_bl_ops, &props);
250 if (IS_ERR(bl)) {
251 dev_err(&sinfo->pdev->dev, "error %ld on backlight register\n",
252 PTR_ERR(bl));
253 return;
254 }
255 sinfo->backlight = bl;
256
257 bl->props.power = FB_BLANK_UNBLANK;
258 bl->props.fb_blank = FB_BLANK_UNBLANK;
259 bl->props.brightness = atmel_bl_get_brightness(bl);
260 }
261
262 static void exit_backlight(struct atmel_lcdfb_info *sinfo)
263 {
264 if (!sinfo->backlight)
265 return;
266
267 if (sinfo->backlight->ops) {
268 sinfo->backlight->props.power = FB_BLANK_POWERDOWN;
269 sinfo->backlight->ops->update_status(sinfo->backlight);
270 }
271 backlight_device_unregister(sinfo->backlight);
272 }
273
274 #else
275
276 static void init_backlight(struct atmel_lcdfb_info *sinfo)
277 {
278 dev_warn(&sinfo->pdev->dev, "backlight control is not available\n");
279 }
280
281 static void exit_backlight(struct atmel_lcdfb_info *sinfo)
282 {
283 }
284
285 #endif
286
287 static void init_contrast(struct atmel_lcdfb_info *sinfo)
288 {
289 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
290
291 /* contrast pwm can be 'inverted' */
292 if (pdata->lcdcon_pol_negative)
293 contrast_ctr &= ~(ATMEL_LCDC_POL_POSITIVE);
294
295 /* have some default contrast/backlight settings */
296 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
297 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
298
299 if (pdata->lcdcon_is_backlight)
300 init_backlight(sinfo);
301 }
302
303 static inline void atmel_lcdfb_power_control(struct atmel_lcdfb_info *sinfo, int on)
304 {
305 int ret;
306 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
307
308 if (pdata->atmel_lcdfb_power_control)
309 pdata->atmel_lcdfb_power_control(pdata, on);
310 else if (sinfo->reg_lcd) {
311 if (on) {
312 ret = regulator_enable(sinfo->reg_lcd);
313 if (ret)
314 dev_err(&sinfo->pdev->dev,
315 "lcd regulator enable failed: %d\n", ret);
316 } else {
317 ret = regulator_disable(sinfo->reg_lcd);
318 if (ret)
319 dev_err(&sinfo->pdev->dev,
320 "lcd regulator disable failed: %d\n", ret);
321 }
322 }
323 }
324
325 static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = {
326 .type = FB_TYPE_PACKED_PIXELS,
327 .visual = FB_VISUAL_TRUECOLOR,
328 .xpanstep = 0,
329 .ypanstep = 1,
330 .ywrapstep = 0,
331 .accel = FB_ACCEL_NONE,
332 };
333
334 static unsigned long compute_hozval(struct atmel_lcdfb_info *sinfo,
335 unsigned long xres)
336 {
337 unsigned long lcdcon2;
338 unsigned long value;
339
340 if (!sinfo->config->have_hozval)
341 return xres;
342
343 lcdcon2 = lcdc_readl(sinfo, ATMEL_LCDC_LCDCON2);
344 value = xres;
345 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) != ATMEL_LCDC_DISTYPE_TFT) {
346 /* STN display */
347 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) == ATMEL_LCDC_DISTYPE_STNCOLOR) {
348 value *= 3;
349 }
350 if ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_4
351 || ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_8
352 && (lcdcon2 & ATMEL_LCDC_SCANMOD) == ATMEL_LCDC_SCANMOD_DUAL ))
353 value = DIV_ROUND_UP(value, 4);
354 else
355 value = DIV_ROUND_UP(value, 8);
356 }
357
358 return value;
359 }
360
361 static void atmel_lcdfb_stop_nowait(struct atmel_lcdfb_info *sinfo)
362 {
363 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
364
365 /* Turn off the LCD controller and the DMA controller */
366 lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
367 pdata->guard_time << ATMEL_LCDC_GUARDT_OFFSET);
368
369 /* Wait for the LCDC core to become idle */
370 while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY)
371 msleep(10);
372
373 lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
374 }
375
376 static void atmel_lcdfb_stop(struct atmel_lcdfb_info *sinfo)
377 {
378 atmel_lcdfb_stop_nowait(sinfo);
379
380 /* Wait for DMA engine to become idle... */
381 while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
382 msleep(10);
383 }
384
385 static void atmel_lcdfb_start(struct atmel_lcdfb_info *sinfo)
386 {
387 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
388
389 lcdc_writel(sinfo, ATMEL_LCDC_DMACON, pdata->default_dmacon);
390 lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
391 (pdata->guard_time << ATMEL_LCDC_GUARDT_OFFSET)
392 | ATMEL_LCDC_PWR);
393 }
394
395 static void atmel_lcdfb_update_dma(struct fb_info *info,
396 struct fb_var_screeninfo *var)
397 {
398 struct atmel_lcdfb_info *sinfo = info->par;
399 struct fb_fix_screeninfo *fix = &info->fix;
400 unsigned long dma_addr;
401
402 dma_addr = (fix->smem_start + var->yoffset * fix->line_length
403 + var->xoffset * info->var.bits_per_pixel / 8);
404
405 dma_addr &= ~3UL;
406
407 /* Set framebuffer DMA base address and pixel offset */
408 lcdc_writel(sinfo, ATMEL_LCDC_DMABADDR1, dma_addr);
409
410 atmel_lcdfb_update_dma2d(sinfo, var, info);
411 }
412
413 static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info *sinfo)
414 {
415 struct fb_info *info = sinfo->info;
416
417 dma_free_writecombine(info->device, info->fix.smem_len,
418 info->screen_base, info->fix.smem_start);
419 }
420
421 /**
422 * atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory
423 * @sinfo: the frame buffer to allocate memory for
424 *
425 * This function is called only from the atmel_lcdfb_probe()
426 * so no locking by fb_info->mm_lock around smem_len setting is needed.
427 */
428 static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info *sinfo)
429 {
430 struct fb_info *info = sinfo->info;
431 struct fb_var_screeninfo *var = &info->var;
432 unsigned int smem_len;
433
434 smem_len = (var->xres_virtual * var->yres_virtual
435 * ((var->bits_per_pixel + 7) / 8));
436 info->fix.smem_len = max(smem_len, sinfo->smem_len);
437
438 info->screen_base = dma_alloc_writecombine(info->device, info->fix.smem_len,
439 (dma_addr_t *)&info->fix.smem_start, GFP_KERNEL);
440
441 if (!info->screen_base) {
442 return -ENOMEM;
443 }
444
445 memset(info->screen_base, 0, info->fix.smem_len);
446
447 return 0;
448 }
449
450 static const struct fb_videomode *atmel_lcdfb_choose_mode(struct fb_var_screeninfo *var,
451 struct fb_info *info)
452 {
453 struct fb_videomode varfbmode;
454 const struct fb_videomode *fbmode = NULL;
455
456 fb_var_to_videomode(&varfbmode, var);
457 fbmode = fb_find_nearest_mode(&varfbmode, &info->modelist);
458 if (fbmode)
459 fb_videomode_to_var(var, fbmode);
460 return fbmode;
461 }
462
463
464 /**
465 * atmel_lcdfb_check_var - Validates a var passed in.
466 * @var: frame buffer variable screen structure
467 * @info: frame buffer structure that represents a single frame buffer
468 *
469 * Checks to see if the hardware supports the state requested by
470 * var passed in. This function does not alter the hardware
471 * state!!! This means the data stored in struct fb_info and
472 * struct atmel_lcdfb_info do not change. This includes the var
473 * inside of struct fb_info. Do NOT change these. This function
474 * can be called on its own if we intent to only test a mode and
475 * not actually set it. The stuff in modedb.c is a example of
476 * this. If the var passed in is slightly off by what the
477 * hardware can support then we alter the var PASSED in to what
478 * we can do. If the hardware doesn't support mode change a
479 * -EINVAL will be returned by the upper layers. You don't need
480 * to implement this function then. If you hardware doesn't
481 * support changing the resolution then this function is not
482 * needed. In this case the driver would just provide a var that
483 * represents the static state the screen is in.
484 *
485 * Returns negative errno on error, or zero on success.
486 */
487 static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,
488 struct fb_info *info)
489 {
490 struct device *dev = info->device;
491 struct atmel_lcdfb_info *sinfo = info->par;
492 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
493 unsigned long clk_value_khz;
494
495 clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
496
497 dev_dbg(dev, "%s:\n", __func__);
498
499 if (!(var->pixclock && var->bits_per_pixel)) {
500 /* choose a suitable mode if possible */
501 if (!atmel_lcdfb_choose_mode(var, info)) {
502 dev_err(dev, "needed value not specified\n");
503 return -EINVAL;
504 }
505 }
506
507 dev_dbg(dev, " resolution: %ux%u\n", var->xres, var->yres);
508 dev_dbg(dev, " pixclk: %lu KHz\n", PICOS2KHZ(var->pixclock));
509 dev_dbg(dev, " bpp: %u\n", var->bits_per_pixel);
510 dev_dbg(dev, " clk: %lu KHz\n", clk_value_khz);
511
512 if (PICOS2KHZ(var->pixclock) > clk_value_khz) {
513 dev_err(dev, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var->pixclock));
514 return -EINVAL;
515 }
516
517 /* Do not allow to have real resoulution larger than virtual */
518 if (var->xres > var->xres_virtual)
519 var->xres_virtual = var->xres;
520
521 if (var->yres > var->yres_virtual)
522 var->yres_virtual = var->yres;
523
524 /* Force same alignment for each line */
525 var->xres = (var->xres + 3) & ~3UL;
526 var->xres_virtual = (var->xres_virtual + 3) & ~3UL;
527
528 var->red.msb_right = var->green.msb_right = var->blue.msb_right = 0;
529 var->transp.msb_right = 0;
530 var->transp.offset = var->transp.length = 0;
531 var->xoffset = var->yoffset = 0;
532
533 if (info->fix.smem_len) {
534 unsigned int smem_len = (var->xres_virtual * var->yres_virtual
535 * ((var->bits_per_pixel + 7) / 8));
536 if (smem_len > info->fix.smem_len) {
537 dev_err(dev, "Frame buffer is too small (%u) for screen size (need at least %u)\n",
538 info->fix.smem_len, smem_len);
539 return -EINVAL;
540 }
541 }
542
543 /* Saturate vertical and horizontal timings at maximum values */
544 var->vsync_len = min_t(u32, var->vsync_len,
545 (ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1);
546 var->upper_margin = min_t(u32, var->upper_margin,
547 ATMEL_LCDC_VBP >> ATMEL_LCDC_VBP_OFFSET);
548 var->lower_margin = min_t(u32, var->lower_margin,
549 ATMEL_LCDC_VFP);
550 var->right_margin = min_t(u32, var->right_margin,
551 (ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1);
552 var->hsync_len = min_t(u32, var->hsync_len,
553 (ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1);
554 var->left_margin = min_t(u32, var->left_margin,
555 ATMEL_LCDC_HBP + 1);
556
557 /* Some parameters can't be zero */
558 var->vsync_len = max_t(u32, var->vsync_len, 1);
559 var->right_margin = max_t(u32, var->right_margin, 1);
560 var->hsync_len = max_t(u32, var->hsync_len, 1);
561 var->left_margin = max_t(u32, var->left_margin, 1);
562
563 switch (var->bits_per_pixel) {
564 case 1:
565 case 2:
566 case 4:
567 case 8:
568 var->red.offset = var->green.offset = var->blue.offset = 0;
569 var->red.length = var->green.length = var->blue.length
570 = var->bits_per_pixel;
571 break;
572 case 16:
573 /* Older SOCs use IBGR:555 rather than BGR:565. */
574 if (sinfo->config->have_intensity_bit)
575 var->green.length = 5;
576 else
577 var->green.length = 6;
578
579 if (pdata->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
580 /* RGB:5X5 mode */
581 var->red.offset = var->green.length + 5;
582 var->blue.offset = 0;
583 } else {
584 /* BGR:5X5 mode */
585 var->red.offset = 0;
586 var->blue.offset = var->green.length + 5;
587 }
588 var->green.offset = 5;
589 var->red.length = var->blue.length = 5;
590 break;
591 case 32:
592 var->transp.offset = 24;
593 var->transp.length = 8;
594 /* fall through */
595 case 24:
596 if (pdata->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
597 /* RGB:888 mode */
598 var->red.offset = 16;
599 var->blue.offset = 0;
600 } else {
601 /* BGR:888 mode */
602 var->red.offset = 0;
603 var->blue.offset = 16;
604 }
605 var->green.offset = 8;
606 var->red.length = var->green.length = var->blue.length = 8;
607 break;
608 default:
609 dev_err(dev, "color depth %d not supported\n",
610 var->bits_per_pixel);
611 return -EINVAL;
612 }
613
614 return 0;
615 }
616
617 /*
618 * LCD reset sequence
619 */
620 static void atmel_lcdfb_reset(struct atmel_lcdfb_info *sinfo)
621 {
622 might_sleep();
623
624 atmel_lcdfb_stop(sinfo);
625 atmel_lcdfb_start(sinfo);
626 }
627
628 /**
629 * atmel_lcdfb_set_par - Alters the hardware state.
630 * @info: frame buffer structure that represents a single frame buffer
631 *
632 * Using the fb_var_screeninfo in fb_info we set the resolution
633 * of the this particular framebuffer. This function alters the
634 * par AND the fb_fix_screeninfo stored in fb_info. It doesn't
635 * not alter var in fb_info since we are using that data. This
636 * means we depend on the data in var inside fb_info to be
637 * supported by the hardware. atmel_lcdfb_check_var is always called
638 * before atmel_lcdfb_set_par to ensure this. Again if you can't
639 * change the resolution you don't need this function.
640 *
641 */
642 static int atmel_lcdfb_set_par(struct fb_info *info)
643 {
644 struct atmel_lcdfb_info *sinfo = info->par;
645 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
646 unsigned long hozval_linesz;
647 unsigned long value;
648 unsigned long clk_value_khz;
649 unsigned long bits_per_line;
650 unsigned long pix_factor = 2;
651
652 might_sleep();
653
654 dev_dbg(info->device, "%s:\n", __func__);
655 dev_dbg(info->device, " * resolution: %ux%u (%ux%u virtual)\n",
656 info->var.xres, info->var.yres,
657 info->var.xres_virtual, info->var.yres_virtual);
658
659 atmel_lcdfb_stop_nowait(sinfo);
660
661 if (info->var.bits_per_pixel == 1)
662 info->fix.visual = FB_VISUAL_MONO01;
663 else if (info->var.bits_per_pixel <= 8)
664 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
665 else
666 info->fix.visual = FB_VISUAL_TRUECOLOR;
667
668 bits_per_line = info->var.xres_virtual * info->var.bits_per_pixel;
669 info->fix.line_length = DIV_ROUND_UP(bits_per_line, 8);
670
671 /* Re-initialize the DMA engine... */
672 dev_dbg(info->device, " * update DMA engine\n");
673 atmel_lcdfb_update_dma(info, &info->var);
674
675 /* ...set frame size and burst length = 8 words (?) */
676 value = (info->var.yres * info->var.xres * info->var.bits_per_pixel) / 32;
677 value |= ((ATMEL_LCDC_DMA_BURST_LEN - 1) << ATMEL_LCDC_BLENGTH_OFFSET);
678 lcdc_writel(sinfo, ATMEL_LCDC_DMAFRMCFG, value);
679
680 /* Now, the LCDC core... */
681
682 /* Set pixel clock */
683 if (sinfo->config->have_alt_pixclock)
684 pix_factor = 1;
685
686 clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
687
688 value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock));
689
690 if (value < pix_factor) {
691 dev_notice(info->device, "Bypassing pixel clock divider\n");
692 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
693 } else {
694 value = (value / pix_factor) - 1;
695 dev_dbg(info->device, " * programming CLKVAL = 0x%08lx\n",
696 value);
697 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1,
698 value << ATMEL_LCDC_CLKVAL_OFFSET);
699 info->var.pixclock =
700 KHZ2PICOS(clk_value_khz / (pix_factor * (value + 1)));
701 dev_dbg(info->device, " updated pixclk: %lu KHz\n",
702 PICOS2KHZ(info->var.pixclock));
703 }
704
705
706 /* Initialize control register 2 */
707 value = pdata->default_lcdcon2;
708
709 if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT))
710 value |= ATMEL_LCDC_INVLINE_INVERTED;
711 if (!(info->var.sync & FB_SYNC_VERT_HIGH_ACT))
712 value |= ATMEL_LCDC_INVFRAME_INVERTED;
713
714 switch (info->var.bits_per_pixel) {
715 case 1: value |= ATMEL_LCDC_PIXELSIZE_1; break;
716 case 2: value |= ATMEL_LCDC_PIXELSIZE_2; break;
717 case 4: value |= ATMEL_LCDC_PIXELSIZE_4; break;
718 case 8: value |= ATMEL_LCDC_PIXELSIZE_8; break;
719 case 15: /* fall through */
720 case 16: value |= ATMEL_LCDC_PIXELSIZE_16; break;
721 case 24: value |= ATMEL_LCDC_PIXELSIZE_24; break;
722 case 32: value |= ATMEL_LCDC_PIXELSIZE_32; break;
723 default: BUG(); break;
724 }
725 dev_dbg(info->device, " * LCDCON2 = %08lx\n", value);
726 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON2, value);
727
728 /* Vertical timing */
729 value = (info->var.vsync_len - 1) << ATMEL_LCDC_VPW_OFFSET;
730 value |= info->var.upper_margin << ATMEL_LCDC_VBP_OFFSET;
731 value |= info->var.lower_margin;
732 dev_dbg(info->device, " * LCDTIM1 = %08lx\n", value);
733 lcdc_writel(sinfo, ATMEL_LCDC_TIM1, value);
734
735 /* Horizontal timing */
736 value = (info->var.right_margin - 1) << ATMEL_LCDC_HFP_OFFSET;
737 value |= (info->var.hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET;
738 value |= (info->var.left_margin - 1);
739 dev_dbg(info->device, " * LCDTIM2 = %08lx\n", value);
740 lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value);
741
742 /* Horizontal value (aka line size) */
743 hozval_linesz = compute_hozval(sinfo, info->var.xres);
744
745 /* Display size */
746 value = (hozval_linesz - 1) << ATMEL_LCDC_HOZVAL_OFFSET;
747 value |= info->var.yres - 1;
748 dev_dbg(info->device, " * LCDFRMCFG = %08lx\n", value);
749 lcdc_writel(sinfo, ATMEL_LCDC_LCDFRMCFG, value);
750
751 /* FIFO Threshold: Use formula from data sheet */
752 value = ATMEL_LCDC_FIFO_SIZE - (2 * ATMEL_LCDC_DMA_BURST_LEN + 3);
753 lcdc_writel(sinfo, ATMEL_LCDC_FIFO, value);
754
755 /* Toggle LCD_MODE every frame */
756 lcdc_writel(sinfo, ATMEL_LCDC_MVAL, 0);
757
758 /* Disable all interrupts */
759 lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
760 /* Enable FIFO & DMA errors */
761 lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
762
763 /* ...wait for DMA engine to become idle... */
764 while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
765 msleep(10);
766
767 atmel_lcdfb_start(sinfo);
768
769 dev_dbg(info->device, " * DONE\n");
770
771 return 0;
772 }
773
774 static inline unsigned int chan_to_field(unsigned int chan, const struct fb_bitfield *bf)
775 {
776 chan &= 0xffff;
777 chan >>= 16 - bf->length;
778 return chan << bf->offset;
779 }
780
781 /**
782 * atmel_lcdfb_setcolreg - Optional function. Sets a color register.
783 * @regno: Which register in the CLUT we are programming
784 * @red: The red value which can be up to 16 bits wide
785 * @green: The green value which can be up to 16 bits wide
786 * @blue: The blue value which can be up to 16 bits wide.
787 * @transp: If supported the alpha value which can be up to 16 bits wide.
788 * @info: frame buffer info structure
789 *
790 * Set a single color register. The values supplied have a 16 bit
791 * magnitude which needs to be scaled in this function for the hardware.
792 * Things to take into consideration are how many color registers, if
793 * any, are supported with the current color visual. With truecolor mode
794 * no color palettes are supported. Here a pseudo palette is created
795 * which we store the value in pseudo_palette in struct fb_info. For
796 * pseudocolor mode we have a limited color palette. To deal with this
797 * we can program what color is displayed for a particular pixel value.
798 * DirectColor is similar in that we can program each color field. If
799 * we have a static colormap we don't need to implement this function.
800 *
801 * Returns negative errno on error, or zero on success. In an
802 * ideal world, this would have been the case, but as it turns
803 * out, the other drivers return 1 on failure, so that's what
804 * we're going to do.
805 */
806 static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red,
807 unsigned int green, unsigned int blue,
808 unsigned int transp, struct fb_info *info)
809 {
810 struct atmel_lcdfb_info *sinfo = info->par;
811 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
812 unsigned int val;
813 u32 *pal;
814 int ret = 1;
815
816 if (info->var.grayscale)
817 red = green = blue = (19595 * red + 38470 * green
818 + 7471 * blue) >> 16;
819
820 switch (info->fix.visual) {
821 case FB_VISUAL_TRUECOLOR:
822 if (regno < 16) {
823 pal = info->pseudo_palette;
824
825 val = chan_to_field(red, &info->var.red);
826 val |= chan_to_field(green, &info->var.green);
827 val |= chan_to_field(blue, &info->var.blue);
828
829 pal[regno] = val;
830 ret = 0;
831 }
832 break;
833
834 case FB_VISUAL_PSEUDOCOLOR:
835 if (regno < 256) {
836 if (sinfo->config->have_intensity_bit) {
837 /* old style I+BGR:555 */
838 val = ((red >> 11) & 0x001f);
839 val |= ((green >> 6) & 0x03e0);
840 val |= ((blue >> 1) & 0x7c00);
841
842 /*
843 * TODO: intensity bit. Maybe something like
844 * ~(red[10] ^ green[10] ^ blue[10]) & 1
845 */
846 } else {
847 /* new style BGR:565 / RGB:565 */
848 if (pdata->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
849 val = ((blue >> 11) & 0x001f);
850 val |= ((red >> 0) & 0xf800);
851 } else {
852 val = ((red >> 11) & 0x001f);
853 val |= ((blue >> 0) & 0xf800);
854 }
855
856 val |= ((green >> 5) & 0x07e0);
857 }
858
859 lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
860 ret = 0;
861 }
862 break;
863
864 case FB_VISUAL_MONO01:
865 if (regno < 2) {
866 val = (regno == 0) ? 0x00 : 0x1F;
867 lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
868 ret = 0;
869 }
870 break;
871
872 }
873
874 return ret;
875 }
876
877 static int atmel_lcdfb_pan_display(struct fb_var_screeninfo *var,
878 struct fb_info *info)
879 {
880 dev_dbg(info->device, "%s\n", __func__);
881
882 atmel_lcdfb_update_dma(info, var);
883
884 return 0;
885 }
886
887 static int atmel_lcdfb_blank(int blank_mode, struct fb_info *info)
888 {
889 struct atmel_lcdfb_info *sinfo = info->par;
890
891 switch (blank_mode) {
892 case FB_BLANK_UNBLANK:
893 case FB_BLANK_NORMAL:
894 atmel_lcdfb_start(sinfo);
895 break;
896 case FB_BLANK_VSYNC_SUSPEND:
897 case FB_BLANK_HSYNC_SUSPEND:
898 break;
899 case FB_BLANK_POWERDOWN:
900 atmel_lcdfb_stop(sinfo);
901 break;
902 default:
903 return -EINVAL;
904 }
905
906 /* let fbcon do a soft blank for us */
907 return ((blank_mode == FB_BLANK_NORMAL) ? 1 : 0);
908 }
909
910 static struct fb_ops atmel_lcdfb_ops = {
911 .owner = THIS_MODULE,
912 .fb_check_var = atmel_lcdfb_check_var,
913 .fb_set_par = atmel_lcdfb_set_par,
914 .fb_setcolreg = atmel_lcdfb_setcolreg,
915 .fb_blank = atmel_lcdfb_blank,
916 .fb_pan_display = atmel_lcdfb_pan_display,
917 .fb_fillrect = cfb_fillrect,
918 .fb_copyarea = cfb_copyarea,
919 .fb_imageblit = cfb_imageblit,
920 };
921
922 static irqreturn_t atmel_lcdfb_interrupt(int irq, void *dev_id)
923 {
924 struct fb_info *info = dev_id;
925 struct atmel_lcdfb_info *sinfo = info->par;
926 u32 status;
927
928 status = lcdc_readl(sinfo, ATMEL_LCDC_ISR);
929 if (status & ATMEL_LCDC_UFLWI) {
930 dev_warn(info->device, "FIFO underflow %#x\n", status);
931 /* reset DMA and FIFO to avoid screen shifting */
932 schedule_work(&sinfo->task);
933 }
934 lcdc_writel(sinfo, ATMEL_LCDC_ICR, status);
935 return IRQ_HANDLED;
936 }
937
938 /*
939 * LCD controller task (to reset the LCD)
940 */
941 static void atmel_lcdfb_task(struct work_struct *work)
942 {
943 struct atmel_lcdfb_info *sinfo =
944 container_of(work, struct atmel_lcdfb_info, task);
945
946 atmel_lcdfb_reset(sinfo);
947 }
948
949 static int __init atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info *sinfo)
950 {
951 struct fb_info *info = sinfo->info;
952 int ret = 0;
953
954 info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
955
956 dev_info(info->device,
957 "%luKiB frame buffer at %08lx (mapped at %p)\n",
958 (unsigned long)info->fix.smem_len / 1024,
959 (unsigned long)info->fix.smem_start,
960 info->screen_base);
961
962 /* Allocate colormap */
963 ret = fb_alloc_cmap(&info->cmap, 256, 0);
964 if (ret < 0)
965 dev_err(info->device, "Alloc color map failed\n");
966
967 return ret;
968 }
969
970 static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info *sinfo)
971 {
972 clk_prepare_enable(sinfo->bus_clk);
973 clk_prepare_enable(sinfo->lcdc_clk);
974 }
975
976 static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info *sinfo)
977 {
978 clk_disable_unprepare(sinfo->bus_clk);
979 clk_disable_unprepare(sinfo->lcdc_clk);
980 }
981
982 #ifdef CONFIG_OF
983 static const struct of_device_id atmel_lcdfb_dt_ids[] = {
984 { .compatible = "atmel,at91sam9261-lcdc" , .data = &at91sam9261_config, },
985 { .compatible = "atmel,at91sam9263-lcdc" , .data = &at91sam9263_config, },
986 { .compatible = "atmel,at91sam9g10-lcdc" , .data = &at91sam9g10_config, },
987 { .compatible = "atmel,at91sam9g45-lcdc" , .data = &at91sam9g45_config, },
988 { .compatible = "atmel,at91sam9g45es-lcdc" , .data = &at91sam9g45es_config, },
989 { .compatible = "atmel,at91sam9rl-lcdc" , .data = &at91sam9rl_config, },
990 { .compatible = "atmel,at32ap-lcdc" , .data = &at32ap_config, },
991 { /* sentinel */ }
992 };
993
994 MODULE_DEVICE_TABLE(of, atmel_lcdfb_dt_ids);
995
996 static const char *atmel_lcdfb_wiring_modes[] = {
997 [ATMEL_LCDC_WIRING_BGR] = "BRG",
998 [ATMEL_LCDC_WIRING_RGB] = "RGB",
999 };
1000
1001 static int atmel_lcdfb_get_of_wiring_modes(struct device_node *np)
1002 {
1003 const char *mode;
1004 int err, i;
1005
1006 err = of_property_read_string(np, "atmel,lcd-wiring-mode", &mode);
1007 if (err < 0)
1008 return ATMEL_LCDC_WIRING_BGR;
1009
1010 for (i = 0; i < ARRAY_SIZE(atmel_lcdfb_wiring_modes); i++)
1011 if (!strcasecmp(mode, atmel_lcdfb_wiring_modes[i]))
1012 return i;
1013
1014 return -ENODEV;
1015 }
1016
1017 static void atmel_lcdfb_power_control_gpio(struct atmel_lcdfb_pdata *pdata, int on)
1018 {
1019 struct atmel_lcdfb_power_ctrl_gpio *og;
1020
1021 list_for_each_entry(og, &pdata->pwr_gpios, list)
1022 gpio_set_value(og->gpio, on);
1023 }
1024
1025 static int atmel_lcdfb_of_init(struct atmel_lcdfb_info *sinfo)
1026 {
1027 struct fb_info *info = sinfo->info;
1028 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
1029 struct fb_var_screeninfo *var = &info->var;
1030 struct device *dev = &sinfo->pdev->dev;
1031 struct device_node *np =dev->of_node;
1032 struct device_node *display_np;
1033 struct device_node *timings_np;
1034 struct display_timings *timings;
1035 enum of_gpio_flags flags;
1036 struct atmel_lcdfb_power_ctrl_gpio *og;
1037 bool is_gpio_power = false;
1038 int ret = -ENOENT;
1039 int i, gpio;
1040
1041 sinfo->config = (struct atmel_lcdfb_config*)
1042 of_match_device(atmel_lcdfb_dt_ids, dev)->data;
1043
1044 display_np = of_parse_phandle(np, "display", 0);
1045 if (!display_np) {
1046 dev_err(dev, "failed to find display phandle\n");
1047 return -ENOENT;
1048 }
1049
1050 ret = of_property_read_u32(display_np, "bits-per-pixel", &var->bits_per_pixel);
1051 if (ret < 0) {
1052 dev_err(dev, "failed to get property bits-per-pixel\n");
1053 goto put_display_node;
1054 }
1055
1056 ret = of_property_read_u32(display_np, "atmel,guard-time", &pdata->guard_time);
1057 if (ret < 0) {
1058 dev_err(dev, "failed to get property atmel,guard-time\n");
1059 goto put_display_node;
1060 }
1061
1062 ret = of_property_read_u32(display_np, "atmel,lcdcon2", &pdata->default_lcdcon2);
1063 if (ret < 0) {
1064 dev_err(dev, "failed to get property atmel,lcdcon2\n");
1065 goto put_display_node;
1066 }
1067
1068 ret = of_property_read_u32(display_np, "atmel,dmacon", &pdata->default_dmacon);
1069 if (ret < 0) {
1070 dev_err(dev, "failed to get property bits-per-pixel\n");
1071 goto put_display_node;
1072 }
1073
1074 INIT_LIST_HEAD(&pdata->pwr_gpios);
1075 ret = -ENOMEM;
1076 for (i = 0; i < of_gpio_named_count(display_np, "atmel,power-control-gpio"); i++) {
1077 gpio = of_get_named_gpio_flags(display_np, "atmel,power-control-gpio",
1078 i, &flags);
1079 if (gpio < 0)
1080 continue;
1081
1082 og = devm_kzalloc(dev, sizeof(*og), GFP_KERNEL);
1083 if (!og)
1084 goto put_display_node;
1085
1086 og->gpio = gpio;
1087 og->active_low = flags & OF_GPIO_ACTIVE_LOW;
1088 is_gpio_power = true;
1089 ret = devm_gpio_request(dev, gpio, "lcd-power-control-gpio");
1090 if (ret) {
1091 dev_err(dev, "request gpio %d failed\n", gpio);
1092 goto put_display_node;
1093 }
1094
1095 ret = gpio_direction_output(gpio, og->active_low);
1096 if (ret) {
1097 dev_err(dev, "set direction output gpio %d failed\n", gpio);
1098 goto put_display_node;
1099 }
1100 list_add(&og->list, &pdata->pwr_gpios);
1101 }
1102
1103 if (is_gpio_power)
1104 pdata->atmel_lcdfb_power_control = atmel_lcdfb_power_control_gpio;
1105
1106 ret = atmel_lcdfb_get_of_wiring_modes(display_np);
1107 if (ret < 0) {
1108 dev_err(dev, "invalid atmel,lcd-wiring-mode\n");
1109 goto put_display_node;
1110 }
1111 pdata->lcd_wiring_mode = ret;
1112
1113 pdata->lcdcon_is_backlight = of_property_read_bool(display_np, "atmel,lcdcon-backlight");
1114 pdata->lcdcon_pol_negative = of_property_read_bool(display_np, "atmel,lcdcon-backlight-inverted");
1115
1116 timings = of_get_display_timings(display_np);
1117 if (!timings) {
1118 dev_err(dev, "failed to get display timings\n");
1119 ret = -EINVAL;
1120 goto put_display_node;
1121 }
1122
1123 timings_np = of_find_node_by_name(display_np, "display-timings");
1124 if (!timings_np) {
1125 dev_err(dev, "failed to find display-timings node\n");
1126 ret = -ENODEV;
1127 goto put_display_node;
1128 }
1129
1130 for (i = 0; i < of_get_child_count(timings_np); i++) {
1131 struct videomode vm;
1132 struct fb_videomode fb_vm;
1133
1134 ret = videomode_from_timings(timings, &vm, i);
1135 if (ret < 0)
1136 goto put_timings_node;
1137 ret = fb_videomode_from_videomode(&vm, &fb_vm);
1138 if (ret < 0)
1139 goto put_timings_node;
1140
1141 fb_add_videomode(&fb_vm, &info->modelist);
1142 }
1143
1144 return 0;
1145
1146 put_timings_node:
1147 of_node_put(timings_np);
1148 put_display_node:
1149 of_node_put(display_np);
1150 return ret;
1151 }
1152 #else
1153 static int atmel_lcdfb_of_init(struct atmel_lcdfb_info *sinfo)
1154 {
1155 return 0;
1156 }
1157 #endif
1158
1159 static int __init atmel_lcdfb_probe(struct platform_device *pdev)
1160 {
1161 struct device *dev = &pdev->dev;
1162 struct fb_info *info;
1163 struct atmel_lcdfb_info *sinfo;
1164 struct atmel_lcdfb_pdata *pdata = NULL;
1165 struct resource *regs = NULL;
1166 struct resource *map = NULL;
1167 struct fb_modelist *modelist;
1168 int ret;
1169
1170 dev_dbg(dev, "%s BEGIN\n", __func__);
1171
1172 ret = -ENOMEM;
1173 info = framebuffer_alloc(sizeof(struct atmel_lcdfb_info), dev);
1174 if (!info) {
1175 dev_err(dev, "cannot allocate memory\n");
1176 goto out;
1177 }
1178
1179 sinfo = info->par;
1180 sinfo->pdev = pdev;
1181 sinfo->info = info;
1182
1183 INIT_LIST_HEAD(&info->modelist);
1184
1185 if (pdev->dev.of_node) {
1186 ret = atmel_lcdfb_of_init(sinfo);
1187 if (ret)
1188 goto free_info;
1189 } else if (dev_get_platdata(dev)) {
1190 struct fb_monspecs *monspecs;
1191 int i;
1192
1193 pdata = dev_get_platdata(dev);
1194 monspecs = pdata->default_monspecs;
1195 sinfo->pdata = *pdata;
1196
1197 for (i = 0; i < monspecs->modedb_len; i++)
1198 fb_add_videomode(&monspecs->modedb[i], &info->modelist);
1199
1200 sinfo->config = atmel_lcdfb_get_config(pdev);
1201
1202 info->var.bits_per_pixel = pdata->default_bpp ? pdata->default_bpp : 16;
1203 memcpy(&info->monspecs, pdata->default_monspecs, sizeof(info->monspecs));
1204 } else {
1205 dev_err(dev, "cannot get default configuration\n");
1206 goto free_info;
1207 }
1208
1209 if (!sinfo->config)
1210 goto free_info;
1211
1212 sinfo->reg_lcd = devm_regulator_get(&pdev->dev, "lcd");
1213 if (IS_ERR(sinfo->reg_lcd))
1214 sinfo->reg_lcd = NULL;
1215
1216 info->flags = ATMEL_LCDFB_FBINFO_DEFAULT;
1217 info->pseudo_palette = sinfo->pseudo_palette;
1218 info->fbops = &atmel_lcdfb_ops;
1219
1220 info->fix = atmel_lcdfb_fix;
1221 strcpy(info->fix.id, sinfo->pdev->name);
1222
1223 /* Enable LCDC Clocks */
1224 sinfo->bus_clk = clk_get(dev, "hclk");
1225 if (IS_ERR(sinfo->bus_clk)) {
1226 ret = PTR_ERR(sinfo->bus_clk);
1227 goto free_info;
1228 }
1229 sinfo->lcdc_clk = clk_get(dev, "lcdc_clk");
1230 if (IS_ERR(sinfo->lcdc_clk)) {
1231 ret = PTR_ERR(sinfo->lcdc_clk);
1232 goto put_bus_clk;
1233 }
1234 atmel_lcdfb_start_clock(sinfo);
1235
1236 modelist = list_first_entry(&info->modelist,
1237 struct fb_modelist, list);
1238 fb_videomode_to_var(&info->var, &modelist->mode);
1239
1240 atmel_lcdfb_check_var(&info->var, info);
1241
1242 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1243 if (!regs) {
1244 dev_err(dev, "resources unusable\n");
1245 ret = -ENXIO;
1246 goto stop_clk;
1247 }
1248
1249 sinfo->irq_base = platform_get_irq(pdev, 0);
1250 if (sinfo->irq_base < 0) {
1251 dev_err(dev, "unable to get irq\n");
1252 ret = sinfo->irq_base;
1253 goto stop_clk;
1254 }
1255
1256 /* Initialize video memory */
1257 map = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1258 if (map) {
1259 /* use a pre-allocated memory buffer */
1260 info->fix.smem_start = map->start;
1261 info->fix.smem_len = resource_size(map);
1262 if (!request_mem_region(info->fix.smem_start,
1263 info->fix.smem_len, pdev->name)) {
1264 ret = -EBUSY;
1265 goto stop_clk;
1266 }
1267
1268 info->screen_base = ioremap_wc(info->fix.smem_start,
1269 info->fix.smem_len);
1270 if (!info->screen_base) {
1271 ret = -ENOMEM;
1272 goto release_intmem;
1273 }
1274
1275 /*
1276 * Don't clear the framebuffer -- someone may have set
1277 * up a splash image.
1278 */
1279 } else {
1280 /* allocate memory buffer */
1281 ret = atmel_lcdfb_alloc_video_memory(sinfo);
1282 if (ret < 0) {
1283 dev_err(dev, "cannot allocate framebuffer: %d\n", ret);
1284 goto stop_clk;
1285 }
1286 }
1287
1288 /* LCDC registers */
1289 info->fix.mmio_start = regs->start;
1290 info->fix.mmio_len = resource_size(regs);
1291
1292 if (!request_mem_region(info->fix.mmio_start,
1293 info->fix.mmio_len, pdev->name)) {
1294 ret = -EBUSY;
1295 goto free_fb;
1296 }
1297
1298 sinfo->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len);
1299 if (!sinfo->mmio) {
1300 dev_err(dev, "cannot map LCDC registers\n");
1301 ret = -ENOMEM;
1302 goto release_mem;
1303 }
1304
1305 /* Initialize PWM for contrast or backlight ("off") */
1306 init_contrast(sinfo);
1307
1308 /* interrupt */
1309 ret = request_irq(sinfo->irq_base, atmel_lcdfb_interrupt, 0, pdev->name, info);
1310 if (ret) {
1311 dev_err(dev, "request_irq failed: %d\n", ret);
1312 goto unmap_mmio;
1313 }
1314
1315 /* Some operations on the LCDC might sleep and
1316 * require a preemptible task context */
1317 INIT_WORK(&sinfo->task, atmel_lcdfb_task);
1318
1319 ret = atmel_lcdfb_init_fbinfo(sinfo);
1320 if (ret < 0) {
1321 dev_err(dev, "init fbinfo failed: %d\n", ret);
1322 goto unregister_irqs;
1323 }
1324
1325 ret = atmel_lcdfb_set_par(info);
1326 if (ret < 0) {
1327 dev_err(dev, "set par failed: %d\n", ret);
1328 goto unregister_irqs;
1329 }
1330
1331 dev_set_drvdata(dev, info);
1332
1333 /*
1334 * Tell the world that we're ready to go
1335 */
1336 ret = register_framebuffer(info);
1337 if (ret < 0) {
1338 dev_err(dev, "failed to register framebuffer device: %d\n", ret);
1339 goto reset_drvdata;
1340 }
1341
1342 /* Power up the LCDC screen */
1343 atmel_lcdfb_power_control(sinfo, 1);
1344
1345 dev_info(dev, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %d\n",
1346 info->node, info->fix.mmio_start, sinfo->mmio, sinfo->irq_base);
1347
1348 return 0;
1349
1350 reset_drvdata:
1351 dev_set_drvdata(dev, NULL);
1352 fb_dealloc_cmap(&info->cmap);
1353 unregister_irqs:
1354 cancel_work_sync(&sinfo->task);
1355 free_irq(sinfo->irq_base, info);
1356 unmap_mmio:
1357 exit_backlight(sinfo);
1358 iounmap(sinfo->mmio);
1359 release_mem:
1360 release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
1361 free_fb:
1362 if (map)
1363 iounmap(info->screen_base);
1364 else
1365 atmel_lcdfb_free_video_memory(sinfo);
1366
1367 release_intmem:
1368 if (map)
1369 release_mem_region(info->fix.smem_start, info->fix.smem_len);
1370 stop_clk:
1371 atmel_lcdfb_stop_clock(sinfo);
1372 clk_put(sinfo->lcdc_clk);
1373 put_bus_clk:
1374 clk_put(sinfo->bus_clk);
1375 free_info:
1376 framebuffer_release(info);
1377 out:
1378 dev_dbg(dev, "%s FAILED\n", __func__);
1379 return ret;
1380 }
1381
1382 static int __exit atmel_lcdfb_remove(struct platform_device *pdev)
1383 {
1384 struct device *dev = &pdev->dev;
1385 struct fb_info *info = dev_get_drvdata(dev);
1386 struct atmel_lcdfb_info *sinfo;
1387 struct atmel_lcdfb_pdata *pdata;
1388
1389 if (!info || !info->par)
1390 return 0;
1391 sinfo = info->par;
1392 pdata = &sinfo->pdata;
1393
1394 cancel_work_sync(&sinfo->task);
1395 exit_backlight(sinfo);
1396 atmel_lcdfb_power_control(sinfo, 0);
1397 unregister_framebuffer(info);
1398 atmel_lcdfb_stop_clock(sinfo);
1399 clk_put(sinfo->lcdc_clk);
1400 clk_put(sinfo->bus_clk);
1401 fb_dealloc_cmap(&info->cmap);
1402 free_irq(sinfo->irq_base, info);
1403 iounmap(sinfo->mmio);
1404 release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
1405 if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) {
1406 iounmap(info->screen_base);
1407 release_mem_region(info->fix.smem_start, info->fix.smem_len);
1408 } else {
1409 atmel_lcdfb_free_video_memory(sinfo);
1410 }
1411
1412 framebuffer_release(info);
1413
1414 return 0;
1415 }
1416
1417 #ifdef CONFIG_PM
1418
1419 static int atmel_lcdfb_suspend(struct platform_device *pdev, pm_message_t mesg)
1420 {
1421 struct fb_info *info = platform_get_drvdata(pdev);
1422 struct atmel_lcdfb_info *sinfo = info->par;
1423
1424 /*
1425 * We don't want to handle interrupts while the clock is
1426 * stopped. It may take forever.
1427 */
1428 lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
1429
1430 sinfo->saved_lcdcon = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_CTR);
1431 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, 0);
1432 atmel_lcdfb_power_control(sinfo, 0);
1433 atmel_lcdfb_stop(sinfo);
1434 atmel_lcdfb_stop_clock(sinfo);
1435
1436 return 0;
1437 }
1438
1439 static int atmel_lcdfb_resume(struct platform_device *pdev)
1440 {
1441 struct fb_info *info = platform_get_drvdata(pdev);
1442 struct atmel_lcdfb_info *sinfo = info->par;
1443
1444 atmel_lcdfb_start_clock(sinfo);
1445 atmel_lcdfb_start(sinfo);
1446 atmel_lcdfb_power_control(sinfo, 1);
1447 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, sinfo->saved_lcdcon);
1448
1449 /* Enable FIFO & DMA errors */
1450 lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI
1451 | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
1452
1453 return 0;
1454 }
1455
1456 #else
1457 #define atmel_lcdfb_suspend NULL
1458 #define atmel_lcdfb_resume NULL
1459 #endif
1460
1461 static struct platform_driver atmel_lcdfb_driver = {
1462 .remove = __exit_p(atmel_lcdfb_remove),
1463 .suspend = atmel_lcdfb_suspend,
1464 .resume = atmel_lcdfb_resume,
1465 .id_table = atmel_lcdfb_devtypes,
1466 .driver = {
1467 .name = "atmel_lcdfb",
1468 .of_match_table = of_match_ptr(atmel_lcdfb_dt_ids),
1469 },
1470 };
1471
1472 module_platform_driver_probe(atmel_lcdfb_driver, atmel_lcdfb_probe);
1473
1474 MODULE_DESCRIPTION("AT91/AT32 LCD Controller framebuffer driver");
1475 MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>");
1476 MODULE_LICENSE("GPL");
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