drivers/video/vt8623fb.c

   1 /*
   2  * linux/drivers/video/vt8623fb.c - fbdev driver for
   3  * integrated graphic core in VIA VT8623 [CLE266] chipset
   4  *
   5  * Copyright (c) 2006-2007 Ondrej Zajicek <santiago@crfreenet.org>
   6  *
   7  * This file is subject to the terms and conditions of the GNU General Public
   8  * License.  See the file COPYING in the main directory of this archive for
   9  * more details.
  10  *
  11  * Code is based on s3fb, some parts are from David Boucher's viafb
  12  * (http://davesdomain.org.uk/viafb/)
  13  */
  14
  15 #include <linux/module.h>
  16 #include <linux/kernel.h>
  17 #include <linux/errno.h>
  18 #include <linux/string.h>
  19 #include <linux/mm.h>
  20 #include <linux/tty.h>
  21 #include <linux/delay.h>
  22 #include <linux/fb.h>
  23 #include <linux/svga.h>
  24 #include <linux/init.h>
  25 #include <linux/pci.h>
  26 #include <linux/console.h> /* Why should fb driver call console functions? because console_lock() */
  27 #include <video/vga.h>
  28
  29 #ifdef CONFIG_MTRR
  30 #include <asm/mtrr.h>
  31 #endif
  32
  33 struct vt8623fb_info {
  34         char __iomem *mmio_base;
  35         int mtrr_reg;
  36         struct vgastate state;
  37         struct mutex open_lock;
  38         unsigned int ref_count;
  39         u32 pseudo_palette[16];
  40 };
  41
  42
  43
  44 /* ------------------------------------------------------------------------- */
  45
  46 static const struct svga_fb_format vt8623fb_formats[] = {
  47         { 0,  {0, 6, 0},  {0, 6, 0},  {0, 6, 0}, {0, 0, 0}, 0,
  48                 FB_TYPE_TEXT, FB_AUX_TEXT_SVGA_STEP8,   FB_VISUAL_PSEUDOCOLOR, 16, 16},
  49         { 4,  {0, 6, 0},  {0, 6, 0},  {0, 6, 0}, {0, 0, 0}, 0,
  50                 FB_TYPE_PACKED_PIXELS, 0,               FB_VISUAL_PSEUDOCOLOR, 16, 16},
  51         { 4,  {0, 6, 0},  {0, 6, 0},  {0, 6, 0}, {0, 0, 0}, 1,
  52                 FB_TYPE_INTERLEAVED_PLANES, 1,          FB_VISUAL_PSEUDOCOLOR, 16, 16},
  53         { 8,  {0, 6, 0},  {0, 6, 0},  {0, 6, 0}, {0, 0, 0}, 0,
  54                 FB_TYPE_PACKED_PIXELS, 0,               FB_VISUAL_PSEUDOCOLOR, 8, 8},
  55 /*      {16,  {10, 5, 0}, {5, 5, 0},  {0, 5, 0}, {0, 0, 0}, 0,
  56                 FB_TYPE_PACKED_PIXELS, 0,               FB_VISUAL_TRUECOLOR, 4, 4},     */
  57         {16,  {11, 5, 0}, {5, 6, 0},  {0, 5, 0}, {0, 0, 0}, 0,
  58                 FB_TYPE_PACKED_PIXELS, 0,               FB_VISUAL_TRUECOLOR, 4, 4},
  59         {32,  {16, 8, 0}, {8, 8, 0},  {0, 8, 0}, {0, 0, 0}, 0,
  60                 FB_TYPE_PACKED_PIXELS, 0,               FB_VISUAL_TRUECOLOR, 2, 2},
  61         SVGA_FORMAT_END
  62 };
  63
  64 static const struct svga_pll vt8623_pll = {2, 127, 2, 7, 0, 3,
  65         60000, 300000, 14318};
  66
  67 /* CRT timing register sets */
  68
  69 static struct vga_regset vt8623_h_total_regs[]       = {{0x00, 0, 7}, {0x36, 3, 3}, VGA_REGSET_END};
  70 static struct vga_regset vt8623_h_display_regs[]     = {{0x01, 0, 7}, VGA_REGSET_END};
  71 static struct vga_regset vt8623_h_blank_start_regs[] = {{0x02, 0, 7}, VGA_REGSET_END};
  72 static struct vga_regset vt8623_h_blank_end_regs[]   = {{0x03, 0, 4}, {0x05, 7, 7}, {0x33, 5, 5}, VGA_REGSET_END};
  73 static struct vga_regset vt8623_h_sync_start_regs[]  = {{0x04, 0, 7}, {0x33, 4, 4}, VGA_REGSET_END};
  74 static struct vga_regset vt8623_h_sync_end_regs[]    = {{0x05, 0, 4}, VGA_REGSET_END};
  75
  76 static struct vga_regset vt8623_v_total_regs[]       = {{0x06, 0, 7}, {0x07, 0, 0}, {0x07, 5, 5}, {0x35, 0, 0}, VGA_REGSET_END};
  77 static struct vga_regset vt8623_v_display_regs[]     = {{0x12, 0, 7}, {0x07, 1, 1}, {0x07, 6, 6}, {0x35, 2, 2}, VGA_REGSET_END};
  78 static struct vga_regset vt8623_v_blank_start_regs[] = {{0x15, 0, 7}, {0x07, 3, 3}, {0x09, 5, 5}, {0x35, 3, 3}, VGA_REGSET_END};
  79 static struct vga_regset vt8623_v_blank_end_regs[]   = {{0x16, 0, 7}, VGA_REGSET_END};
  80 static struct vga_regset vt8623_v_sync_start_regs[]  = {{0x10, 0, 7}, {0x07, 2, 2}, {0x07, 7, 7}, {0x35, 1, 1}, VGA_REGSET_END};
  81 static struct vga_regset vt8623_v_sync_end_regs[]    = {{0x11, 0, 3}, VGA_REGSET_END};
  82
  83 static struct vga_regset vt8623_offset_regs[]        = {{0x13, 0, 7}, {0x35, 5, 7}, VGA_REGSET_END};
  84 static struct vga_regset vt8623_line_compare_regs[]  = {{0x18, 0, 7}, {0x07, 4, 4}, {0x09, 6, 6}, {0x33, 0, 2}, {0x35, 4, 4}, VGA_REGSET_END};
  85 static struct vga_regset vt8623_fetch_count_regs[]   = {{0x1C, 0, 7}, {0x1D, 0, 1}, VGA_REGSET_END};
  86 static struct vga_regset vt8623_start_address_regs[] = {{0x0d, 0, 7}, {0x0c, 0, 7}, {0x34, 0, 7}, {0x48, 0, 1}, VGA_REGSET_END};
  87
  88 static struct svga_timing_regs vt8623_timing_regs     = {
  89         vt8623_h_total_regs, vt8623_h_display_regs, vt8623_h_blank_start_regs,
  90         vt8623_h_blank_end_regs, vt8623_h_sync_start_regs, vt8623_h_sync_end_regs,
  91         vt8623_v_total_regs, vt8623_v_display_regs, vt8623_v_blank_start_regs,
  92         vt8623_v_blank_end_regs, vt8623_v_sync_start_regs, vt8623_v_sync_end_regs,
  93 };
  94
  95
  96 /* ------------------------------------------------------------------------- */
  97
  98
  99 /* Module parameters */
 100
 101 static char *mode_option = "640x480-8@60";
 102
 103 #ifdef CONFIG_MTRR
 104 static int mtrr = 1;
 105 #endif
 106
 107 MODULE_AUTHOR("(c) 2006 Ondrej Zajicek <santiago@crfreenet.org>");
 108 MODULE_LICENSE("GPL");
 109 MODULE_DESCRIPTION("fbdev driver for integrated graphics core in VIA VT8623 [CLE266]");
 110
 111 module_param(mode_option, charp, 0644);
 112 MODULE_PARM_DESC(mode_option, "Default video mode ('640x480-8@60', etc)");
 113 module_param_named(mode, mode_option, charp, 0);
 114 MODULE_PARM_DESC(mode, "Default video mode e.g. '648x480-8@60' (deprecated)");
 115
 116 #ifdef CONFIG_MTRR
 117 module_param(mtrr, int, 0444);
 118 MODULE_PARM_DESC(mtrr, "Enable write-combining with MTRR (1=enable, 0=disable, default=1)");
 119 #endif
 120
 121
 122 /* ------------------------------------------------------------------------- */
 123
 124 static void vt8623fb_tilecursor(struct fb_info *info, struct fb_tilecursor *cursor)
 125 {
 126         struct vt8623fb_info *par = info->par;
 127
 128         svga_tilecursor(par->state.vgabase, info, cursor);
 129 }
 130
 131 static struct fb_tile_ops vt8623fb_tile_ops = {
 132         .fb_settile     = svga_settile,
 133         .fb_tilecopy    = svga_tilecopy,
 134         .fb_tilefill    = svga_tilefill,
 135         .fb_tileblit    = svga_tileblit,
 136         .fb_tilecursor  = vt8623fb_tilecursor,
 137         .fb_get_tilemax = svga_get_tilemax,
 138 };
 139
 140
 141 /* ------------------------------------------------------------------------- */
 142
 143
 144 /* image data is MSB-first, fb structure is MSB-first too */
 145 static inline u32 expand_color(u32 c)
 146 {
 147         return ((c & 1) | ((c & 2) << 7) | ((c & 4) << 14) | ((c & 8) << 21)) * 0xFF;
 148 }
 149
 150 /* vt8623fb_iplan_imageblit silently assumes that almost everything is 8-pixel aligned */
 151 static void vt8623fb_iplan_imageblit(struct fb_info *info, const struct fb_image *image)
 152 {
 153         u32 fg = expand_color(image->fg_color);
 154         u32 bg = expand_color(image->bg_color);
 155         const u8 *src1, *src;
 156         u8 __iomem *dst1;
 157         u32 __iomem *dst;
 158         u32 val;
 159         int x, y;
 160
 161         src1 = image->data;
 162         dst1 = info->screen_base + (image->dy * info->fix.line_length)
 163                  + ((image->dx / 8) * 4);
 164
 165         for (y = 0; y < image->height; y++) {
 166                 src = src1;
 167                 dst = (u32 __iomem *) dst1;
 168                 for (x = 0; x < image->width; x += 8) {
 169                         val = *(src++) * 0x01010101;
 170                         val = (val & fg) | (~val & bg);
 171                         fb_writel(val, dst++);
 172                 }
 173                 src1 += image->width / 8;
 174                 dst1 += info->fix.line_length;
 175         }
 176 }
 177
 178 /* vt8623fb_iplan_fillrect silently assumes that almost everything is 8-pixel aligned */
 179 static void vt8623fb_iplan_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
 180 {
 181         u32 fg = expand_color(rect->color);
 182         u8 __iomem *dst1;
 183         u32 __iomem *dst;
 184         int x, y;
 185
 186         dst1 = info->screen_base + (rect->dy * info->fix.line_length)
 187                  + ((rect->dx / 8) * 4);
 188
 189         for (y = 0; y < rect->height; y++) {
 190                 dst = (u32 __iomem *) dst1;
 191                 for (x = 0; x < rect->width; x += 8) {
 192                         fb_writel(fg, dst++);
 193                 }
 194                 dst1 += info->fix.line_length;
 195         }
 196 }
 197
 198
 199 /* image data is MSB-first, fb structure is high-nibble-in-low-byte-first */
 200 static inline u32 expand_pixel(u32 c)
 201 {
 202         return (((c &  1) << 24) | ((c &  2) << 27) | ((c &  4) << 14) | ((c &   8) << 17) |
 203                 ((c & 16) <<  4) | ((c & 32) <<  7) | ((c & 64) >>  6) | ((c & 128) >>  3)) * 0xF;
 204 }
 205
 206 /* vt8623fb_cfb4_imageblit silently assumes that almost everything is 8-pixel aligned */
 207 static void vt8623fb_cfb4_imageblit(struct fb_info *info, const struct fb_image *image)
 208 {
 209         u32 fg = image->fg_color * 0x11111111;
 210         u32 bg = image->bg_color * 0x11111111;
 211         const u8 *src1, *src;
 212         u8 __iomem *dst1;
 213         u32 __iomem *dst;
 214         u32 val;
 215         int x, y;
 216
 217         src1 = image->data;
 218         dst1 = info->screen_base + (image->dy * info->fix.line_length)
 219                  + ((image->dx / 8) * 4);
 220
 221         for (y = 0; y < image->height; y++) {
 222                 src = src1;
 223                 dst = (u32 __iomem *) dst1;
 224                 for (x = 0; x < image->width; x += 8) {
 225                         val = expand_pixel(*(src++));
 226                         val = (val & fg) | (~val & bg);
 227                         fb_writel(val, dst++);
 228                 }
 229                 src1 += image->width / 8;
 230                 dst1 += info->fix.line_length;
 231         }
 232 }
 233
 234 static void vt8623fb_imageblit(struct fb_info *info, const struct fb_image *image)
 235 {
 236         if ((info->var.bits_per_pixel == 4) && (image->depth == 1)
 237             && ((image->width % 8) == 0) && ((image->dx % 8) == 0)) {
 238                 if (info->fix.type == FB_TYPE_INTERLEAVED_PLANES)
 239                         vt8623fb_iplan_imageblit(info, image);
 240                 else
 241                         vt8623fb_cfb4_imageblit(info, image);
 242         } else
 243                 cfb_imageblit(info, image);
 244 }
 245
 246 static void vt8623fb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
 247 {
 248         if ((info->var.bits_per_pixel == 4)
 249             && ((rect->width % 8) == 0) && ((rect->dx % 8) == 0)
 250             && (info->fix.type == FB_TYPE_INTERLEAVED_PLANES))
 251                 vt8623fb_iplan_fillrect(info, rect);
 252          else
 253                 cfb_fillrect(info, rect);
 254 }
 255
 256
 257 /* ------------------------------------------------------------------------- */
 258
 259
 260 static void vt8623_set_pixclock(struct fb_info *info, u32 pixclock)
 261 {
 262         struct vt8623fb_info *par = info->par;
 263         u16 m, n, r;
 264         u8 regval;
 265         int rv;
 266
 267         rv = svga_compute_pll(&vt8623_pll, 1000000000 / pixclock, &m, &n, &r, info->node);
 268         if (rv < 0) {
 269                 fb_err(info, "cannot set requested pixclock, keeping old value\n");
 270                 return;
 271         }
 272
 273         /* Set VGA misc register  */
 274         regval = vga_r(par->state.vgabase, VGA_MIS_R);
 275         vga_w(par->state.vgabase, VGA_MIS_W, regval | VGA_MIS_ENB_PLL_LOAD);
 276
 277         /* Set clock registers */
 278         vga_wseq(par->state.vgabase, 0x46, (n  | (r << 6)));
 279         vga_wseq(par->state.vgabase, 0x47, m);
 280
 281         udelay(1000);
 282
 283         /* PLL reset */
 284         svga_wseq_mask(par->state.vgabase, 0x40, 0x02, 0x02);
 285         svga_wseq_mask(par->state.vgabase, 0x40, 0x00, 0x02);
 286 }
 287
 288
 289 static int vt8623fb_open(struct fb_info *info, int user)
 290 {
 291         struct vt8623fb_info *par = info->par;
 292
 293         mutex_lock(&(par->open_lock));
 294         if (par->ref_count == 0) {
 295                 void __iomem *vgabase = par->state.vgabase;
 296
 297                 memset(&(par->state), 0, sizeof(struct vgastate));
 298                 par->state.vgabase = vgabase;
 299                 par->state.flags = VGA_SAVE_MODE | VGA_SAVE_FONTS | VGA_SAVE_CMAP;
 300                 par->state.num_crtc = 0xA2;
 301                 par->state.num_seq = 0x50;
 302                 save_vga(&(par->state));
 303         }
 304
 305         par->ref_count++;
 306         mutex_unlock(&(par->open_lock));
 307
 308         return 0;
 309 }
 310
 311 static int vt8623fb_release(struct fb_info *info, int user)
 312 {
 313         struct vt8623fb_info *par = info->par;
 314
 315         mutex_lock(&(par->open_lock));
 316         if (par->ref_count == 0) {
 317                 mutex_unlock(&(par->open_lock));
 318                 return -EINVAL;
 319         }
 320
 321         if (par->ref_count == 1)
 322                 restore_vga(&(par->state));
 323
 324         par->ref_count--;
 325         mutex_unlock(&(par->open_lock));
 326
 327         return 0;
 328 }
 329
 330 static int vt8623fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
 331 {
 332         int rv, mem, step;
 333
 334         /* Find appropriate format */
 335         rv = svga_match_format (vt8623fb_formats, var, NULL);
 336         if (rv < 0)
 337         {
 338                 fb_err(info, "unsupported mode requested\n");
 339                 return rv;
 340         }
 341
 342         /* Do not allow to have real resoulution larger than virtual */
 343         if (var->xres > var->xres_virtual)
 344                 var->xres_virtual = var->xres;
 345
 346         if (var->yres > var->yres_virtual)
 347                 var->yres_virtual = var->yres;
 348
 349         /* Round up xres_virtual to have proper alignment of lines */
 350         step = vt8623fb_formats[rv].xresstep - 1;
 351         var->xres_virtual = (var->xres_virtual+step) & ~step;
 352
 353         /* Check whether have enough memory */
 354         mem = ((var->bits_per_pixel * var->xres_virtual) >> 3) * var->yres_virtual;
 355         if (mem > info->screen_size)
 356         {
 357                 fb_err(info, "not enough framebuffer memory (%d kB requested, %d kB available)\n",
 358                        mem >> 10, (unsigned int) (info->screen_size >> 10));
 359                 return -EINVAL;
 360         }
 361
 362         /* Text mode is limited to 256 kB of memory */
 363         if ((var->bits_per_pixel == 0) && (mem > (256*1024)))
 364         {
 365                 fb_err(info, "text framebuffer size too large (%d kB requested, 256 kB possible)\n",
 366                        mem >> 10);
 367                 return -EINVAL;
 368         }
 369
 370         rv = svga_check_timings (&vt8623_timing_regs, var, info->node);
 371         if (rv < 0)
 372         {
 373                 fb_err(info, "invalid timings requested\n");
 374                 return rv;
 375         }
 376
 377         /* Interlaced mode not supported */
 378         if (var->vmode & FB_VMODE_INTERLACED)
 379                 return -EINVAL;
 380
 381         return 0;
 382 }
 383
 384
 385 static int vt8623fb_set_par(struct fb_info *info)
 386 {
 387         u32 mode, offset_value, fetch_value, screen_size;
 388         struct vt8623fb_info *par = info->par;
 389         u32 bpp = info->var.bits_per_pixel;
 390
 391         if (bpp != 0) {
 392                 info->fix.ypanstep = 1;
 393                 info->fix.line_length = (info->var.xres_virtual * bpp) / 8;
 394
 395                 info->flags &= ~FBINFO_MISC_TILEBLITTING;
 396                 info->tileops = NULL;
 397
 398                 /* in 4bpp supports 8p wide tiles only, any tiles otherwise */
 399                 info->pixmap.blit_x = (bpp == 4) ? (1 << (8 - 1)) : (~(u32)0);
 400                 info->pixmap.blit_y = ~(u32)0;
 401
 402                 offset_value = (info->var.xres_virtual * bpp) / 64;
 403                 fetch_value  = ((info->var.xres * bpp) / 128) + 4;
 404
 405                 if (bpp == 4)
 406                         fetch_value  = (info->var.xres / 8) + 8; /* + 0 is OK */
 407
 408                 screen_size  = info->var.yres_virtual * info->fix.line_length;
 409         } else {
 410                 info->fix.ypanstep = 16;
 411                 info->fix.line_length = 0;
 412
 413                 info->flags |= FBINFO_MISC_TILEBLITTING;
 414                 info->tileops = &vt8623fb_tile_ops;
 415
 416                 /* supports 8x16 tiles only */
 417                 info->pixmap.blit_x = 1 << (8 - 1);
 418                 info->pixmap.blit_y = 1 << (16 - 1);
 419
 420                 offset_value = info->var.xres_virtual / 16;
 421                 fetch_value  = (info->var.xres / 8) + 8;
 422                 screen_size  = (info->var.xres_virtual * info->var.yres_virtual) / 64;
 423         }
 424
 425         info->var.xoffset = 0;
 426         info->var.yoffset = 0;
 427         info->var.activate = FB_ACTIVATE_NOW;
 428
 429         /* Unlock registers */
 430         svga_wseq_mask(par->state.vgabase, 0x10, 0x01, 0x01);
 431         svga_wcrt_mask(par->state.vgabase, 0x11, 0x00, 0x80);
 432         svga_wcrt_mask(par->state.vgabase, 0x47, 0x00, 0x01);
 433
 434         /* Device, screen and sync off */
 435         svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20);
 436         svga_wcrt_mask(par->state.vgabase, 0x36, 0x30, 0x30);
 437         svga_wcrt_mask(par->state.vgabase, 0x17, 0x00, 0x80);
 438
 439         /* Set default values */
 440         svga_set_default_gfx_regs(par->state.vgabase);
 441         svga_set_default_atc_regs(par->state.vgabase);
 442         svga_set_default_seq_regs(par->state.vgabase);
 443         svga_set_default_crt_regs(par->state.vgabase);
 444         svga_wcrt_multi(par->state.vgabase, vt8623_line_compare_regs, 0xFFFFFFFF);
 445         svga_wcrt_multi(par->state.vgabase, vt8623_start_address_regs, 0);
 446
 447         svga_wcrt_multi(par->state.vgabase, vt8623_offset_regs, offset_value);
 448         svga_wseq_multi(par->state.vgabase, vt8623_fetch_count_regs, fetch_value);
 449
 450         /* Clear H/V Skew */
 451         svga_wcrt_mask(par->state.vgabase, 0x03, 0x00, 0x60);
 452         svga_wcrt_mask(par->state.vgabase, 0x05, 0x00, 0x60);
 453
 454         if (info->var.vmode & FB_VMODE_DOUBLE)
 455                 svga_wcrt_mask(par->state.vgabase, 0x09, 0x80, 0x80);
 456         else
 457                 svga_wcrt_mask(par->state.vgabase, 0x09, 0x00, 0x80);
 458
 459         svga_wseq_mask(par->state.vgabase, 0x1E, 0xF0, 0xF0); // DI/DVP bus
 460         svga_wseq_mask(par->state.vgabase, 0x2A, 0x0F, 0x0F); // DI/DVP bus
 461         svga_wseq_mask(par->state.vgabase, 0x16, 0x08, 0xBF); // FIFO read threshold
 462         vga_wseq(par->state.vgabase, 0x17, 0x1F);       // FIFO depth
 463         vga_wseq(par->state.vgabase, 0x18, 0x4E);
 464         svga_wseq_mask(par->state.vgabase, 0x1A, 0x08, 0x08); // enable MMIO ?
 465
 466         vga_wcrt(par->state.vgabase, 0x32, 0x00);
 467         vga_wcrt(par->state.vgabase, 0x34, 0x00);
 468         vga_wcrt(par->state.vgabase, 0x6A, 0x80);
 469         vga_wcrt(par->state.vgabase, 0x6A, 0xC0);
 470
 471         vga_wgfx(par->state.vgabase, 0x20, 0x00);
 472         vga_wgfx(par->state.vgabase, 0x21, 0x00);
 473         vga_wgfx(par->state.vgabase, 0x22, 0x00);
 474
 475         /* Set SR15 according to number of bits per pixel */
 476         mode = svga_match_format(vt8623fb_formats, &(info->var), &(info->fix));
 477         switch (mode) {
 478         case 0:
 479                 fb_dbg(info, "text mode\n");
 480                 svga_set_textmode_vga_regs(par->state.vgabase);
 481                 svga_wseq_mask(par->state.vgabase, 0x15, 0x00, 0xFE);
 482                 svga_wcrt_mask(par->state.vgabase, 0x11, 0x60, 0x70);
 483                 break;
 484         case 1:
 485                 fb_dbg(info, "4 bit pseudocolor\n");
 486                 vga_wgfx(par->state.vgabase, VGA_GFX_MODE, 0x40);
 487                 svga_wseq_mask(par->state.vgabase, 0x15, 0x20, 0xFE);
 488                 svga_wcrt_mask(par->state.vgabase, 0x11, 0x00, 0x70);
 489                 break;
 490         case 2:
 491                 fb_dbg(info, "4 bit pseudocolor, planar\n");
 492                 svga_wseq_mask(par->state.vgabase, 0x15, 0x00, 0xFE);
 493                 svga_wcrt_mask(par->state.vgabase, 0x11, 0x00, 0x70);
 494                 break;
 495         case 3:
 496                 fb_dbg(info, "8 bit pseudocolor\n");
 497                 svga_wseq_mask(par->state.vgabase, 0x15, 0x22, 0xFE);
 498                 break;
 499         case 4:
 500                 fb_dbg(info, "5/6/5 truecolor\n");
 501                 svga_wseq_mask(par->state.vgabase, 0x15, 0xB6, 0xFE);
 502                 break;
 503         case 5:
 504                 fb_dbg(info, "8/8/8 truecolor\n");
 505                 svga_wseq_mask(par->state.vgabase, 0x15, 0xAE, 0xFE);
 506                 break;
 507         default:
 508                 printk(KERN_ERR "vt8623fb: unsupported mode - bug\n");
 509                 return (-EINVAL);
 510         }
 511
 512         vt8623_set_pixclock(info, info->var.pixclock);
 513         svga_set_timings(par->state.vgabase, &vt8623_timing_regs, &(info->var), 1, 1,
 514                          (info->var.vmode & FB_VMODE_DOUBLE) ? 2 : 1, 1,
 515                          1, info->node);
 516
 517         memset_io(info->screen_base, 0x00, screen_size);
 518
 519         /* Device and screen back on */
 520         svga_wcrt_mask(par->state.vgabase, 0x17, 0x80, 0x80);
 521         svga_wcrt_mask(par->state.vgabase, 0x36, 0x00, 0x30);
 522         svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20);
 523
 524         return 0;
 525 }
 526
 527
 528 static int vt8623fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
 529                                 u_int transp, struct fb_info *fb)
 530 {
 531         switch (fb->var.bits_per_pixel) {
 532         case 0:
 533         case 4:
 534                 if (regno >= 16)
 535                         return -EINVAL;
 536
 537                 outb(0x0F, VGA_PEL_MSK);
 538                 outb(regno, VGA_PEL_IW);
 539                 outb(red >> 10, VGA_PEL_D);
 540                 outb(green >> 10, VGA_PEL_D);
 541                 outb(blue >> 10, VGA_PEL_D);
 542                 break;
 543         case 8:
 544                 if (regno >= 256)
 545                         return -EINVAL;
 546
 547                 outb(0xFF, VGA_PEL_MSK);
 548                 outb(regno, VGA_PEL_IW);
 549                 outb(red >> 10, VGA_PEL_D);
 550                 outb(green >> 10, VGA_PEL_D);
 551                 outb(blue >> 10, VGA_PEL_D);
 552                 break;
 553         case 16:
 554                 if (regno >= 16)
 555                         return 0;
 556
 557                 if (fb->var.green.length == 5)
 558                         ((u32*)fb->pseudo_palette)[regno] = ((red & 0xF800) >> 1) |
 559                                 ((green & 0xF800) >> 6) | ((blue & 0xF800) >> 11);
 560                 else if (fb->var.green.length == 6)
 561                         ((u32*)fb->pseudo_palette)[regno] = (red & 0xF800) |
 562                                 ((green & 0xFC00) >> 5) | ((blue & 0xF800) >> 11);
 563                 else
 564                         return -EINVAL;
 565                 break;
 566         case 24:
 567         case 32:
 568                 if (regno >= 16)
 569                         return 0;
 570
 571                 /* ((transp & 0xFF00) << 16) */
 572                 ((u32*)fb->pseudo_palette)[regno] = ((red & 0xFF00) << 8) |
 573                         (green & 0xFF00) | ((blue & 0xFF00) >> 8);
 574                 break;
 575         default:
 576                 return -EINVAL;
 577         }
 578
 579         return 0;
 580 }
 581
 582
 583 static int vt8623fb_blank(int blank_mode, struct fb_info *info)
 584 {
 585         struct vt8623fb_info *par = info->par;
 586
 587         switch (blank_mode) {
 588         case FB_BLANK_UNBLANK:
 589                 fb_dbg(info, "unblank\n");
 590                 svga_wcrt_mask(par->state.vgabase, 0x36, 0x00, 0x30);
 591                 svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20);
 592                 break;
 593         case FB_BLANK_NORMAL:
 594                 fb_dbg(info, "blank\n");
 595                 svga_wcrt_mask(par->state.vgabase, 0x36, 0x00, 0x30);
 596                 svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20);
 597                 break;
 598         case FB_BLANK_HSYNC_SUSPEND:
 599                 fb_dbg(info, "DPMS standby (hsync off)\n");
 600                 svga_wcrt_mask(par->state.vgabase, 0x36, 0x10, 0x30);
 601                 svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20);
 602                 break;
 603         case FB_BLANK_VSYNC_SUSPEND:
 604                 fb_dbg(info, "DPMS suspend (vsync off)\n");
 605                 svga_wcrt_mask(par->state.vgabase, 0x36, 0x20, 0x30);
 606                 svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20);
 607                 break;
 608         case FB_BLANK_POWERDOWN:
 609                 fb_dbg(info, "DPMS off (no sync)\n");
 610                 svga_wcrt_mask(par->state.vgabase, 0x36, 0x30, 0x30);
 611                 svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20);
 612                 break;
 613         }
 614
 615         return 0;
 616 }
 617
 618
 619 static int vt8623fb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
 620 {
 621         struct vt8623fb_info *par = info->par;
 622         unsigned int offset;
 623
 624         /* Calculate the offset */
 625         if (info->var.bits_per_pixel == 0) {
 626                 offset = (var->yoffset / 16) * info->var.xres_virtual
 627                        + var->xoffset;
 628                 offset = offset >> 3;
 629         } else {
 630                 offset = (var->yoffset * info->fix.line_length) +
 631                          (var->xoffset * info->var.bits_per_pixel / 8);
 632                 offset = offset >> ((info->var.bits_per_pixel == 4) ? 2 : 1);
 633         }
 634
 635         /* Set the offset */
 636         svga_wcrt_multi(par->state.vgabase, vt8623_start_address_regs, offset);
 637
 638         return 0;
 639 }
 640
 641
 642 /* ------------------------------------------------------------------------- */
 643
 644
 645 /* Frame buffer operations */
 646
 647 static struct fb_ops vt8623fb_ops = {
 648         .owner          = THIS_MODULE,
 649         .fb_open        = vt8623fb_open,
 650         .fb_release     = vt8623fb_release,
 651         .fb_check_var   = vt8623fb_check_var,
 652         .fb_set_par     = vt8623fb_set_par,
 653         .fb_setcolreg   = vt8623fb_setcolreg,
 654         .fb_blank       = vt8623fb_blank,
 655         .fb_pan_display = vt8623fb_pan_display,
 656         .fb_fillrect    = vt8623fb_fillrect,
 657         .fb_copyarea    = cfb_copyarea,
 658         .fb_imageblit   = vt8623fb_imageblit,
 659         .fb_get_caps    = svga_get_caps,
 660 };
 661
 662
 663 /* PCI probe */
 664
 665 static int vt8623_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
 666 {
 667         struct pci_bus_region bus_reg;
 668         struct resource vga_res;
 669         struct fb_info *info;
 670         struct vt8623fb_info *par;
 671         unsigned int memsize1, memsize2;
 672         int rc;
 673
 674         /* Ignore secondary VGA device because there is no VGA arbitration */
 675         if (! svga_primary_device(dev)) {
 676                 dev_info(&(dev->dev), "ignoring secondary device\n");
 677                 return -ENODEV;
 678         }
 679
 680         /* Allocate and fill driver data structure */
 681         info = framebuffer_alloc(sizeof(struct vt8623fb_info), &(dev->dev));
 682         if (! info) {
 683                 dev_err(&(dev->dev), "cannot allocate memory\n");
 684                 return -ENOMEM;
 685         }
 686
 687         par = info->par;
 688         mutex_init(&par->open_lock);
 689
 690         info->flags = FBINFO_PARTIAL_PAN_OK | FBINFO_HWACCEL_YPAN;
 691         info->fbops = &vt8623fb_ops;
 692
 693         /* Prepare PCI device */
 694
 695         rc = pci_enable_device(dev);
 696         if (rc < 0) {
 697                 dev_err(info->device, "cannot enable PCI device\n");
 698                 goto err_enable_device;
 699         }
 700
 701         rc = pci_request_regions(dev, "vt8623fb");
 702         if (rc < 0) {
 703                 dev_err(info->device, "cannot reserve framebuffer region\n");
 704                 goto err_request_regions;
 705         }
 706
 707         info->fix.smem_start = pci_resource_start(dev, 0);
 708         info->fix.smem_len = pci_resource_len(dev, 0);
 709         info->fix.mmio_start = pci_resource_start(dev, 1);
 710         info->fix.mmio_len = pci_resource_len(dev, 1);
 711
 712         /* Map physical IO memory address into kernel space */
 713         info->screen_base = pci_iomap(dev, 0, 0);
 714         if (! info->screen_base) {
 715                 rc = -ENOMEM;
 716                 dev_err(info->device, "iomap for framebuffer failed\n");
 717                 goto err_iomap_1;
 718         }
 719
 720         par->mmio_base = pci_iomap(dev, 1, 0);
 721         if (! par->mmio_base) {
 722                 rc = -ENOMEM;
 723                 dev_err(info->device, "iomap for MMIO failed\n");
 724                 goto err_iomap_2;
 725         }
 726
 727         bus_reg.start = 0;
 728         bus_reg.end = 64 * 1024;
 729
 730         vga_res.flags = IORESOURCE_IO;
 731
 732         pcibios_bus_to_resource(dev, &vga_res, &bus_reg);
 733
 734         par->state.vgabase = (void __iomem *) vga_res.start;
 735
 736         /* Find how many physical memory there is on card */
 737         memsize1 = (vga_rseq(par->state.vgabase, 0x34) + 1) >> 1;
 738         memsize2 = vga_rseq(par->state.vgabase, 0x39) << 2;
 739
 740         if ((16 <= memsize1) && (memsize1 <= 64) && (memsize1 == memsize2))
 741                 info->screen_size = memsize1 << 20;
 742         else {
 743                 dev_err(info->device, "memory size detection failed (%x %x), suppose 16 MB\n", memsize1, memsize2);
 744                 info->screen_size = 16 << 20;
 745         }
 746
 747         info->fix.smem_len = info->screen_size;
 748         strcpy(info->fix.id, "VIA VT8623");
 749         info->fix.type = FB_TYPE_PACKED_PIXELS;
 750         info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
 751         info->fix.ypanstep = 0;
 752         info->fix.accel = FB_ACCEL_NONE;
 753         info->pseudo_palette = (void*)par->pseudo_palette;
 754
 755         /* Prepare startup mode */
 756
 757         kparam_block_sysfs_write(mode_option);
 758         rc = fb_find_mode(&(info->var), info, mode_option, NULL, 0, NULL, 8);
 759         kparam_unblock_sysfs_write(mode_option);
 760         if (! ((rc == 1) || (rc == 2))) {
 761                 rc = -EINVAL;
 762                 dev_err(info->device, "mode %s not found\n", mode_option);
 763                 goto err_find_mode;
 764         }
 765
 766         rc = fb_alloc_cmap(&info->cmap, 256, 0);
 767         if (rc < 0) {
 768                 dev_err(info->device, "cannot allocate colormap\n");
 769                 goto err_alloc_cmap;
 770         }
 771
 772         rc = register_framebuffer(info);
 773         if (rc < 0) {
 774                 dev_err(info->device, "cannot register framebuffer\n");
 775                 goto err_reg_fb;
 776         }
 777
 778         fb_info(info, "%s on %s, %d MB RAM\n",
 779                 info->fix.id, pci_name(dev), info->fix.smem_len >> 20);
 780
 781         /* Record a reference to the driver data */
 782         pci_set_drvdata(dev, info);
 783
 784 #ifdef CONFIG_MTRR
 785         if (mtrr) {
 786                 par->mtrr_reg = -1;
 787                 par->mtrr_reg = mtrr_add(info->fix.smem_start, info->fix.smem_len, MTRR_TYPE_WRCOMB, 1);
 788         }
 789 #endif
 790
 791         return 0;
 792
 793         /* Error handling */
 794 err_reg_fb:
 795         fb_dealloc_cmap(&info->cmap);
 796 err_alloc_cmap:
 797 err_find_mode:
 798         pci_iounmap(dev, par->mmio_base);
 799 err_iomap_2:
 800         pci_iounmap(dev, info->screen_base);
 801 err_iomap_1:
 802         pci_release_regions(dev);
 803 err_request_regions:
 804 /*      pci_disable_device(dev); */
 805 err_enable_device:
 806         framebuffer_release(info);
 807         return rc;
 808 }
 809
 810 /* PCI remove */
 811
 812 static void vt8623_pci_remove(struct pci_dev *dev)
 813 {
 814         struct fb_info *info = pci_get_drvdata(dev);
 815
 816         if (info) {
 817                 struct vt8623fb_info *par = info->par;
 818
 819 #ifdef CONFIG_MTRR
 820                 if (par->mtrr_reg >= 0) {
 821                         mtrr_del(par->mtrr_reg, 0, 0);
 822                         par->mtrr_reg = -1;
 823                 }
 824 #endif
 825
 826                 unregister_framebuffer(info);
 827                 fb_dealloc_cmap(&info->cmap);
 828
 829                 pci_iounmap(dev, info->screen_base);
 830                 pci_iounmap(dev, par->mmio_base);
 831                 pci_release_regions(dev);
 832 /*              pci_disable_device(dev); */
 833
 834                 framebuffer_release(info);
 835         }
 836 }
 837
 838
 839 #ifdef CONFIG_PM
 840 /* PCI suspend */
 841
 842 static int vt8623_pci_suspend(struct pci_dev* dev, pm_message_t state)
 843 {
 844         struct fb_info *info = pci_get_drvdata(dev);
 845         struct vt8623fb_info *par = info->par;
 846
 847         dev_info(info->device, "suspend\n");
 848
 849         console_lock();
 850         mutex_lock(&(par->open_lock));
 851
 852         if ((state.event == PM_EVENT_FREEZE) || (par->ref_count == 0)) {
 853                 mutex_unlock(&(par->open_lock));
 854                 console_unlock();
 855                 return 0;
 856         }
 857
 858         fb_set_suspend(info, 1);
 859
 860         pci_save_state(dev);
 861         pci_disable_device(dev);
 862         pci_set_power_state(dev, pci_choose_state(dev, state));
 863
 864         mutex_unlock(&(par->open_lock));
 865         console_unlock();
 866
 867         return 0;
 868 }
 869
 870
 871 /* PCI resume */
 872
 873 static int vt8623_pci_resume(struct pci_dev* dev)
 874 {
 875         struct fb_info *info = pci_get_drvdata(dev);
 876         struct vt8623fb_info *par = info->par;
 877
 878         dev_info(info->device, "resume\n");
 879
 880         console_lock();
 881         mutex_lock(&(par->open_lock));
 882
 883         if (par->ref_count == 0)
 884                 goto fail;
 885
 886         pci_set_power_state(dev, PCI_D0);
 887         pci_restore_state(dev);
 888
 889         if (pci_enable_device(dev))
 890                 goto fail;
 891
 892         pci_set_master(dev);
 893
 894         vt8623fb_set_par(info);
 895         fb_set_suspend(info, 0);
 896
 897 fail:
 898         mutex_unlock(&(par->open_lock));
 899         console_unlock();
 900
 901         return 0;
 902 }
 903 #else
 904 #define vt8623_pci_suspend NULL
 905 #define vt8623_pci_resume NULL
 906 #endif /* CONFIG_PM */
 907
 908 /* List of boards that we are trying to support */
 909
 910 static struct pci_device_id vt8623_devices[] = {
 911         {PCI_DEVICE(PCI_VENDOR_ID_VIA, 0x3122)},
 912         {0, 0, 0, 0, 0, 0, 0}
 913 };
 914
 915 MODULE_DEVICE_TABLE(pci, vt8623_devices);
 916
 917 static struct pci_driver vt8623fb_pci_driver = {
 918         .name           = "vt8623fb",
 919         .id_table       = vt8623_devices,
 920         .probe          = vt8623_pci_probe,
 921         .remove         = vt8623_pci_remove,
 922         .suspend        = vt8623_pci_suspend,
 923         .resume         = vt8623_pci_resume,
 924 };
 925
 926 /* Cleanup */
 927
 928 static void __exit vt8623fb_cleanup(void)
 929 {
 930         pr_debug("vt8623fb: cleaning up\n");
 931         pci_unregister_driver(&vt8623fb_pci_driver);
 932 }
 933
 934 /* Driver Initialisation */
 935
 936 static int __init vt8623fb_init(void)
 937 {
 938
 939 #ifndef MODULE
 940         char *option = NULL;
 941
 942         if (fb_get_options("vt8623fb", &option))
 943                 return -ENODEV;
 944
 945         if (option && *option)
 946                 mode_option = option;
 947 #endif
 948
 949         pr_debug("vt8623fb: initializing\n");
 950         return pci_register_driver(&vt8623fb_pci_driver);
 951 }
 952
 953 /* ------------------------------------------------------------------------- */
 954
 955 /* Modularization */
 956
 957 module_init(vt8623fb_init);
 958 module_exit(vt8623fb_cleanup);