2 * Watchdog timer for PowerPC Book-E systems
4 * Author: Matthew McClintock
5 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
7 * Copyright 2005, 2008, 2010-2011 Freescale Semiconductor Inc.
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
15 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
17 #include <linux/module.h>
18 #include <linux/smp.h>
19 #include <linux/watchdog.h>
21 #include <asm/reg_booke.h>
23 #include <asm/div64.h>
25 /* If the kernel parameter wdt=1, the watchdog will be enabled at boot.
26 * Also, the wdt_period sets the watchdog timer period timeout.
27 * For E500 cpus the wdt_period sets which bit changing from 0->1 will
28 * trigger a watchog timeout. This watchdog timeout will occur 3 times, the
29 * first time nothing will happen, the second time a watchdog exception will
30 * occur, and the final time the board will reset.
33 u32 booke_wdt_enabled
;
34 u32 booke_wdt_period
= CONFIG_BOOKE_WDT_DEFAULT_TIMEOUT
;
36 #ifdef CONFIG_PPC_FSL_BOOK3E
37 #define WDTP(x) ((((x)&0x3)<<30)|(((x)&0x3c)<<15))
38 #define WDTP_MASK (WDTP(0x3f))
40 #define WDTP(x) (TCR_WP(x))
41 #define WDTP_MASK (TCR_WP_MASK)
44 /* Checks wdt=x and wdt_period=xx command-line option */
45 notrace
int __init
early_parse_wdt(char *p
)
47 if (p
&& strncmp(p
, "0", 1) != 0)
48 booke_wdt_enabled
= 1;
52 early_param("wdt", early_parse_wdt
);
54 int __init
early_parse_wdt_period(char *p
)
58 if (!kstrtol(p
, 0, &ret
))
59 booke_wdt_period
= ret
;
64 early_param("wdt_period", early_parse_wdt_period
);
66 #ifdef CONFIG_PPC_FSL_BOOK3E
68 /* For the specified period, determine the number of seconds
69 * corresponding to the reset time. There will be a watchdog
70 * exception at approximately 3/5 of this time.
72 * The formula to calculate this is given by:
73 * 2.5 * (2^(63-period+1)) / timebase_freq
75 * In order to simplify things, we assume that period is
76 * at least 1. This will still result in a very long timeout.
78 static unsigned long long period_to_sec(unsigned int period
)
80 unsigned long long tmp
= 1ULL << (64 - period
);
81 unsigned long tmp2
= ppc_tb_freq
;
83 /* tmp may be a very large number and we don't want to overflow,
84 * so divide the timebase freq instead of multiplying tmp
93 * This procedure will find the highest period which will give a timeout
94 * greater than the one required. e.g. for a bus speed of 66666666 and
95 * and a parameter of 2 secs, then this procedure will return a value of 38.
97 static unsigned int sec_to_period(unsigned int secs
)
100 for (period
= 63; period
> 0; period
--) {
101 if (period_to_sec(period
) >= secs
)
107 #define MAX_WDT_TIMEOUT period_to_sec(1)
109 #else /* CONFIG_PPC_FSL_BOOK3E */
111 static unsigned long long period_to_sec(unsigned int period
)
116 static unsigned int sec_to_period(unsigned int secs
)
121 #define MAX_WDT_TIMEOUT 3 /* from Kconfig */
123 #endif /* !CONFIG_PPC_FSL_BOOK3E */
125 static void __booke_wdt_set(void *data
)
128 struct watchdog_device
*wdog
= data
;
130 val
= mfspr(SPRN_TCR
);
132 val
|= WDTP(sec_to_period(wdog
->timeout
));
134 mtspr(SPRN_TCR
, val
);
137 static void booke_wdt_set(void *data
)
139 on_each_cpu(__booke_wdt_set
, data
, 0);
142 static void __booke_wdt_ping(void *data
)
144 mtspr(SPRN_TSR
, TSR_ENW
|TSR_WIS
);
147 static int booke_wdt_ping(struct watchdog_device
*wdog
)
149 on_each_cpu(__booke_wdt_ping
, NULL
, 0);
154 static void __booke_wdt_enable(void *data
)
157 struct watchdog_device
*wdog
= data
;
159 /* clear status before enabling watchdog */
160 __booke_wdt_ping(NULL
);
161 val
= mfspr(SPRN_TCR
);
163 val
|= (TCR_WIE
|TCR_WRC(WRC_CHIP
)|WDTP(sec_to_period(wdog
->timeout
)));
165 mtspr(SPRN_TCR
, val
);
169 * booke_wdt_disable - disable the watchdog on the given CPU
171 * This function is called on each CPU. It disables the watchdog on that CPU.
173 * TCR[WRC] cannot be changed once it has been set to non-zero, but we can
174 * effectively disable the watchdog by setting its period to the maximum value.
176 static void __booke_wdt_disable(void *data
)
180 val
= mfspr(SPRN_TCR
);
181 val
&= ~(TCR_WIE
| WDTP_MASK
);
182 mtspr(SPRN_TCR
, val
);
184 /* clear status to make sure nothing is pending */
185 __booke_wdt_ping(NULL
);
189 static int booke_wdt_start(struct watchdog_device
*wdog
)
191 on_each_cpu(__booke_wdt_enable
, wdog
, 0);
192 pr_debug("watchdog enabled (timeout = %u sec)\n", wdog
->timeout
);
197 static int booke_wdt_stop(struct watchdog_device
*wdog
)
199 on_each_cpu(__booke_wdt_disable
, NULL
, 0);
200 pr_debug("watchdog disabled\n");
205 static int booke_wdt_set_timeout(struct watchdog_device
*wdt_dev
,
206 unsigned int timeout
)
208 if (timeout
> MAX_WDT_TIMEOUT
)
210 wdt_dev
->timeout
= timeout
;
211 booke_wdt_set(wdt_dev
);
216 static struct watchdog_info booke_wdt_info
= {
217 .options
= WDIOF_SETTIMEOUT
| WDIOF_KEEPALIVEPING
,
218 .identity
= "PowerPC Book-E Watchdog",
221 static struct watchdog_ops booke_wdt_ops
= {
222 .owner
= THIS_MODULE
,
223 .start
= booke_wdt_start
,
224 .stop
= booke_wdt_stop
,
225 .ping
= booke_wdt_ping
,
226 .set_timeout
= booke_wdt_set_timeout
,
229 static struct watchdog_device booke_wdt_dev
= {
230 .info
= &booke_wdt_info
,
231 .ops
= &booke_wdt_ops
,
233 .max_timeout
= 0xFFFF
236 static void __exit
booke_wdt_exit(void)
238 watchdog_unregister_device(&booke_wdt_dev
);
241 static int __init
booke_wdt_init(void)
244 bool nowayout
= WATCHDOG_NOWAYOUT
;
246 pr_info("powerpc book-e watchdog driver loaded\n");
247 booke_wdt_info
.firmware_version
= cur_cpu_spec
->pvr_value
;
248 booke_wdt_set_timeout(&booke_wdt_dev
,
249 period_to_sec(booke_wdt_period
));
250 watchdog_set_nowayout(&booke_wdt_dev
, nowayout
);
251 if (booke_wdt_enabled
)
252 booke_wdt_start(&booke_wdt_dev
);
254 ret
= watchdog_register_device(&booke_wdt_dev
);
259 module_init(booke_wdt_init
);
260 module_exit(booke_wdt_exit
);
262 MODULE_DESCRIPTION("PowerPC Book-E watchdog driver");
263 MODULE_LICENSE("GPL");