watchdog: nowayout is bool
[deliverable/linux.git] / drivers / watchdog / it87_wdt.c
1 /*
2 * Watchdog Timer Driver
3 * for ITE IT87xx Environment Control - Low Pin Count Input / Output
4 *
5 * (c) Copyright 2007 Oliver Schuster <olivers137@aol.com>
6 *
7 * Based on softdog.c by Alan Cox,
8 * 83977f_wdt.c by Jose Goncalves,
9 * it87.c by Chris Gauthron, Jean Delvare
10 *
11 * Data-sheets: Publicly available at the ITE website
12 * http://www.ite.com.tw/
13 *
14 * Support of the watchdog timers, which are available on
15 * IT8702, IT8712, IT8716, IT8718, IT8720, IT8721 and IT8726.
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License
19 * as published by the Free Software Foundation; either version
20 * 2 of the License, or (at your option) any later version.
21 *
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
30 */
31
32 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
33
34 #include <linux/module.h>
35 #include <linux/moduleparam.h>
36 #include <linux/types.h>
37 #include <linux/kernel.h>
38 #include <linux/fs.h>
39 #include <linux/miscdevice.h>
40 #include <linux/init.h>
41 #include <linux/ioport.h>
42 #include <linux/watchdog.h>
43 #include <linux/notifier.h>
44 #include <linux/reboot.h>
45 #include <linux/uaccess.h>
46 #include <linux/io.h>
47
48 #include <asm/system.h>
49
50 #define WATCHDOG_VERSION "1.14"
51 #define WATCHDOG_NAME "IT87 WDT"
52 #define DRIVER_VERSION WATCHDOG_NAME " driver, v" WATCHDOG_VERSION "\n"
53 #define WD_MAGIC 'V'
54
55 /* Defaults for Module Parameter */
56 #define DEFAULT_NOGAMEPORT 0
57 #define DEFAULT_EXCLUSIVE 1
58 #define DEFAULT_TIMEOUT 60
59 #define DEFAULT_TESTMODE 0
60 #define DEFAULT_NOWAYOUT WATCHDOG_NOWAYOUT
61
62 /* IO Ports */
63 #define REG 0x2e
64 #define VAL 0x2f
65
66 /* Logical device Numbers LDN */
67 #define GPIO 0x07
68 #define GAMEPORT 0x09
69 #define CIR 0x0a
70
71 /* Configuration Registers and Functions */
72 #define LDNREG 0x07
73 #define CHIPID 0x20
74 #define CHIPREV 0x22
75 #define ACTREG 0x30
76 #define BASEREG 0x60
77
78 /* Chip Id numbers */
79 #define NO_DEV_ID 0xffff
80 #define IT8702_ID 0x8702
81 #define IT8705_ID 0x8705
82 #define IT8712_ID 0x8712
83 #define IT8716_ID 0x8716
84 #define IT8718_ID 0x8718
85 #define IT8720_ID 0x8720
86 #define IT8721_ID 0x8721
87 #define IT8726_ID 0x8726 /* the data sheet suggest wrongly 0x8716 */
88
89 /* GPIO Configuration Registers LDN=0x07 */
90 #define WDTCTRL 0x71
91 #define WDTCFG 0x72
92 #define WDTVALLSB 0x73
93 #define WDTVALMSB 0x74
94
95 /* GPIO Bits WDTCTRL */
96 #define WDT_CIRINT 0x80
97 #define WDT_MOUSEINT 0x40
98 #define WDT_KYBINT 0x20
99 #define WDT_GAMEPORT 0x10 /* not in it8718, it8720, it8721 */
100 #define WDT_FORCE 0x02
101 #define WDT_ZERO 0x01
102
103 /* GPIO Bits WDTCFG */
104 #define WDT_TOV1 0x80
105 #define WDT_KRST 0x40
106 #define WDT_TOVE 0x20
107 #define WDT_PWROK 0x10 /* not in it8721 */
108 #define WDT_INT_MASK 0x0f
109
110 /* CIR Configuration Register LDN=0x0a */
111 #define CIR_ILS 0x70
112
113 /* The default Base address is not always available, we use this */
114 #define CIR_BASE 0x0208
115
116 /* CIR Controller */
117 #define CIR_DR(b) (b)
118 #define CIR_IER(b) (b + 1)
119 #define CIR_RCR(b) (b + 2)
120 #define CIR_TCR1(b) (b + 3)
121 #define CIR_TCR2(b) (b + 4)
122 #define CIR_TSR(b) (b + 5)
123 #define CIR_RSR(b) (b + 6)
124 #define CIR_BDLR(b) (b + 5)
125 #define CIR_BDHR(b) (b + 6)
126 #define CIR_IIR(b) (b + 7)
127
128 /* Default Base address of Game port */
129 #define GP_BASE_DEFAULT 0x0201
130
131 /* wdt_status */
132 #define WDTS_TIMER_RUN 0
133 #define WDTS_DEV_OPEN 1
134 #define WDTS_KEEPALIVE 2
135 #define WDTS_LOCKED 3
136 #define WDTS_USE_GP 4
137 #define WDTS_EXPECTED 5
138
139 static unsigned int base, gpact, ciract, max_units, chip_type;
140 static unsigned long wdt_status;
141
142 static int nogameport = DEFAULT_NOGAMEPORT;
143 static int exclusive = DEFAULT_EXCLUSIVE;
144 static int timeout = DEFAULT_TIMEOUT;
145 static int testmode = DEFAULT_TESTMODE;
146 static bool nowayout = DEFAULT_NOWAYOUT;
147
148 module_param(nogameport, int, 0);
149 MODULE_PARM_DESC(nogameport, "Forbid the activation of game port, default="
150 __MODULE_STRING(DEFAULT_NOGAMEPORT));
151 module_param(exclusive, int, 0);
152 MODULE_PARM_DESC(exclusive, "Watchdog exclusive device open, default="
153 __MODULE_STRING(DEFAULT_EXCLUSIVE));
154 module_param(timeout, int, 0);
155 MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds, default="
156 __MODULE_STRING(DEFAULT_TIMEOUT));
157 module_param(testmode, int, 0);
158 MODULE_PARM_DESC(testmode, "Watchdog test mode (1 = no reboot), default="
159 __MODULE_STRING(DEFAULT_TESTMODE));
160 module_param(nowayout, bool, 0);
161 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started, default="
162 __MODULE_STRING(WATCHDOG_NOWAYOUT));
163
164 /* Superio Chip */
165
166 static inline int superio_enter(void)
167 {
168 /*
169 * Try to reserve REG and REG + 1 for exclusive access.
170 */
171 if (!request_muxed_region(REG, 2, WATCHDOG_NAME))
172 return -EBUSY;
173
174 outb(0x87, REG);
175 outb(0x01, REG);
176 outb(0x55, REG);
177 outb(0x55, REG);
178 return 0;
179 }
180
181 static inline void superio_exit(void)
182 {
183 outb(0x02, REG);
184 outb(0x02, VAL);
185 release_region(REG, 2);
186 }
187
188 static inline void superio_select(int ldn)
189 {
190 outb(LDNREG, REG);
191 outb(ldn, VAL);
192 }
193
194 static inline int superio_inb(int reg)
195 {
196 outb(reg, REG);
197 return inb(VAL);
198 }
199
200 static inline void superio_outb(int val, int reg)
201 {
202 outb(reg, REG);
203 outb(val, VAL);
204 }
205
206 static inline int superio_inw(int reg)
207 {
208 int val;
209 outb(reg++, REG);
210 val = inb(VAL) << 8;
211 outb(reg, REG);
212 val |= inb(VAL);
213 return val;
214 }
215
216 static inline void superio_outw(int val, int reg)
217 {
218 outb(reg++, REG);
219 outb(val >> 8, VAL);
220 outb(reg, REG);
221 outb(val, VAL);
222 }
223
224 /* Internal function, should be called after superio_select(GPIO) */
225 static void wdt_update_timeout(void)
226 {
227 unsigned char cfg = WDT_KRST;
228 int tm = timeout;
229
230 if (testmode)
231 cfg = 0;
232
233 if (tm <= max_units)
234 cfg |= WDT_TOV1;
235 else
236 tm /= 60;
237
238 if (chip_type != IT8721_ID)
239 cfg |= WDT_PWROK;
240
241 superio_outb(cfg, WDTCFG);
242 superio_outb(tm, WDTVALLSB);
243 if (max_units > 255)
244 superio_outb(tm>>8, WDTVALMSB);
245 }
246
247 static int wdt_round_time(int t)
248 {
249 t += 59;
250 t -= t % 60;
251 return t;
252 }
253
254 /* watchdog timer handling */
255
256 static void wdt_keepalive(void)
257 {
258 if (test_bit(WDTS_USE_GP, &wdt_status))
259 inb(base);
260 else
261 /* The timer reloads with around 5 msec delay */
262 outb(0x55, CIR_DR(base));
263 set_bit(WDTS_KEEPALIVE, &wdt_status);
264 }
265
266 static int wdt_start(void)
267 {
268 int ret = superio_enter();
269 if (ret)
270 return ret;
271
272 superio_select(GPIO);
273 if (test_bit(WDTS_USE_GP, &wdt_status))
274 superio_outb(WDT_GAMEPORT, WDTCTRL);
275 else
276 superio_outb(WDT_CIRINT, WDTCTRL);
277 wdt_update_timeout();
278
279 superio_exit();
280
281 return 0;
282 }
283
284 static int wdt_stop(void)
285 {
286 int ret = superio_enter();
287 if (ret)
288 return ret;
289
290 superio_select(GPIO);
291 superio_outb(0x00, WDTCTRL);
292 superio_outb(WDT_TOV1, WDTCFG);
293 superio_outb(0x00, WDTVALLSB);
294 if (max_units > 255)
295 superio_outb(0x00, WDTVALMSB);
296
297 superio_exit();
298 return 0;
299 }
300
301 /**
302 * wdt_set_timeout - set a new timeout value with watchdog ioctl
303 * @t: timeout value in seconds
304 *
305 * The hardware device has a 8 or 16 bit watchdog timer (depends on
306 * chip version) that can be configured to count seconds or minutes.
307 *
308 * Used within WDIOC_SETTIMEOUT watchdog device ioctl.
309 */
310
311 static int wdt_set_timeout(int t)
312 {
313 if (t < 1 || t > max_units * 60)
314 return -EINVAL;
315
316 if (t > max_units)
317 timeout = wdt_round_time(t);
318 else
319 timeout = t;
320
321 if (test_bit(WDTS_TIMER_RUN, &wdt_status)) {
322 int ret = superio_enter();
323 if (ret)
324 return ret;
325
326 superio_select(GPIO);
327 wdt_update_timeout();
328 superio_exit();
329 }
330 return 0;
331 }
332
333 /**
334 * wdt_get_status - determines the status supported by watchdog ioctl
335 * @status: status returned to user space
336 *
337 * The status bit of the device does not allow to distinguish
338 * between a regular system reset and a watchdog forced reset.
339 * But, in test mode it is useful, so it is supported through
340 * WDIOC_GETSTATUS watchdog ioctl. Additionally the driver
341 * reports the keepalive signal and the acception of the magic.
342 *
343 * Used within WDIOC_GETSTATUS watchdog device ioctl.
344 */
345
346 static int wdt_get_status(int *status)
347 {
348 *status = 0;
349 if (testmode) {
350 int ret = superio_enter();
351 if (ret)
352 return ret;
353
354 superio_select(GPIO);
355 if (superio_inb(WDTCTRL) & WDT_ZERO) {
356 superio_outb(0x00, WDTCTRL);
357 clear_bit(WDTS_TIMER_RUN, &wdt_status);
358 *status |= WDIOF_CARDRESET;
359 }
360
361 superio_exit();
362 }
363 if (test_and_clear_bit(WDTS_KEEPALIVE, &wdt_status))
364 *status |= WDIOF_KEEPALIVEPING;
365 if (test_bit(WDTS_EXPECTED, &wdt_status))
366 *status |= WDIOF_MAGICCLOSE;
367 return 0;
368 }
369
370 /* /dev/watchdog handling */
371
372 /**
373 * wdt_open - watchdog file_operations .open
374 * @inode: inode of the device
375 * @file: file handle to the device
376 *
377 * The watchdog timer starts by opening the device.
378 *
379 * Used within the file operation of the watchdog device.
380 */
381
382 static int wdt_open(struct inode *inode, struct file *file)
383 {
384 if (exclusive && test_and_set_bit(WDTS_DEV_OPEN, &wdt_status))
385 return -EBUSY;
386 if (!test_and_set_bit(WDTS_TIMER_RUN, &wdt_status)) {
387 int ret;
388 if (nowayout && !test_and_set_bit(WDTS_LOCKED, &wdt_status))
389 __module_get(THIS_MODULE);
390
391 ret = wdt_start();
392 if (ret) {
393 clear_bit(WDTS_LOCKED, &wdt_status);
394 clear_bit(WDTS_TIMER_RUN, &wdt_status);
395 clear_bit(WDTS_DEV_OPEN, &wdt_status);
396 return ret;
397 }
398 }
399 return nonseekable_open(inode, file);
400 }
401
402 /**
403 * wdt_release - watchdog file_operations .release
404 * @inode: inode of the device
405 * @file: file handle to the device
406 *
407 * Closing the watchdog device either stops the watchdog timer
408 * or in the case, that nowayout is set or the magic character
409 * wasn't written, a critical warning about an running watchdog
410 * timer is given.
411 *
412 * Used within the file operation of the watchdog device.
413 */
414
415 static int wdt_release(struct inode *inode, struct file *file)
416 {
417 if (test_bit(WDTS_TIMER_RUN, &wdt_status)) {
418 if (test_and_clear_bit(WDTS_EXPECTED, &wdt_status)) {
419 int ret = wdt_stop();
420 if (ret) {
421 /*
422 * Stop failed. Just keep the watchdog alive
423 * and hope nothing bad happens.
424 */
425 set_bit(WDTS_EXPECTED, &wdt_status);
426 wdt_keepalive();
427 return ret;
428 }
429 clear_bit(WDTS_TIMER_RUN, &wdt_status);
430 } else {
431 wdt_keepalive();
432 pr_crit("unexpected close, not stopping watchdog!\n");
433 }
434 }
435 clear_bit(WDTS_DEV_OPEN, &wdt_status);
436 return 0;
437 }
438
439 /**
440 * wdt_write - watchdog file_operations .write
441 * @file: file handle to the watchdog
442 * @buf: buffer to write
443 * @count: count of bytes
444 * @ppos: pointer to the position to write. No seeks allowed
445 *
446 * A write to a watchdog device is defined as a keepalive signal. Any
447 * write of data will do, as we don't define content meaning.
448 *
449 * Used within the file operation of the watchdog device.
450 */
451
452 static ssize_t wdt_write(struct file *file, const char __user *buf,
453 size_t count, loff_t *ppos)
454 {
455 if (count) {
456 clear_bit(WDTS_EXPECTED, &wdt_status);
457 wdt_keepalive();
458 }
459 if (!nowayout) {
460 size_t ofs;
461
462 /* note: just in case someone wrote the magic character long ago */
463 for (ofs = 0; ofs != count; ofs++) {
464 char c;
465 if (get_user(c, buf + ofs))
466 return -EFAULT;
467 if (c == WD_MAGIC)
468 set_bit(WDTS_EXPECTED, &wdt_status);
469 }
470 }
471 return count;
472 }
473
474 static const struct watchdog_info ident = {
475 .options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING,
476 .firmware_version = 1,
477 .identity = WATCHDOG_NAME,
478 };
479
480 /**
481 * wdt_ioctl - watchdog file_operations .unlocked_ioctl
482 * @file: file handle to the device
483 * @cmd: watchdog command
484 * @arg: argument pointer
485 *
486 * The watchdog API defines a common set of functions for all watchdogs
487 * according to their available features.
488 *
489 * Used within the file operation of the watchdog device.
490 */
491
492 static long wdt_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
493 {
494 int rc = 0, status, new_options, new_timeout;
495 union {
496 struct watchdog_info __user *ident;
497 int __user *i;
498 } uarg;
499
500 uarg.i = (int __user *)arg;
501
502 switch (cmd) {
503 case WDIOC_GETSUPPORT:
504 return copy_to_user(uarg.ident,
505 &ident, sizeof(ident)) ? -EFAULT : 0;
506
507 case WDIOC_GETSTATUS:
508 rc = wdt_get_status(&status);
509 if (rc)
510 return rc;
511 return put_user(status, uarg.i);
512
513 case WDIOC_GETBOOTSTATUS:
514 return put_user(0, uarg.i);
515
516 case WDIOC_KEEPALIVE:
517 wdt_keepalive();
518 return 0;
519
520 case WDIOC_SETOPTIONS:
521 if (get_user(new_options, uarg.i))
522 return -EFAULT;
523
524 switch (new_options) {
525 case WDIOS_DISABLECARD:
526 if (test_bit(WDTS_TIMER_RUN, &wdt_status)) {
527 rc = wdt_stop();
528 if (rc)
529 return rc;
530 }
531 clear_bit(WDTS_TIMER_RUN, &wdt_status);
532 return 0;
533
534 case WDIOS_ENABLECARD:
535 if (!test_and_set_bit(WDTS_TIMER_RUN, &wdt_status)) {
536 rc = wdt_start();
537 if (rc) {
538 clear_bit(WDTS_TIMER_RUN, &wdt_status);
539 return rc;
540 }
541 }
542 return 0;
543
544 default:
545 return -EFAULT;
546 }
547
548 case WDIOC_SETTIMEOUT:
549 if (get_user(new_timeout, uarg.i))
550 return -EFAULT;
551 rc = wdt_set_timeout(new_timeout);
552 case WDIOC_GETTIMEOUT:
553 if (put_user(timeout, uarg.i))
554 return -EFAULT;
555 return rc;
556
557 default:
558 return -ENOTTY;
559 }
560 }
561
562 static int wdt_notify_sys(struct notifier_block *this, unsigned long code,
563 void *unused)
564 {
565 if (code == SYS_DOWN || code == SYS_HALT)
566 wdt_stop();
567 return NOTIFY_DONE;
568 }
569
570 static const struct file_operations wdt_fops = {
571 .owner = THIS_MODULE,
572 .llseek = no_llseek,
573 .write = wdt_write,
574 .unlocked_ioctl = wdt_ioctl,
575 .open = wdt_open,
576 .release = wdt_release,
577 };
578
579 static struct miscdevice wdt_miscdev = {
580 .minor = WATCHDOG_MINOR,
581 .name = "watchdog",
582 .fops = &wdt_fops,
583 };
584
585 static struct notifier_block wdt_notifier = {
586 .notifier_call = wdt_notify_sys,
587 };
588
589 static int __init it87_wdt_init(void)
590 {
591 int rc = 0;
592 int try_gameport = !nogameport;
593 u8 chip_rev;
594 int gp_rreq_fail = 0;
595
596 wdt_status = 0;
597
598 rc = superio_enter();
599 if (rc)
600 return rc;
601
602 chip_type = superio_inw(CHIPID);
603 chip_rev = superio_inb(CHIPREV) & 0x0f;
604 superio_exit();
605
606 switch (chip_type) {
607 case IT8702_ID:
608 max_units = 255;
609 break;
610 case IT8712_ID:
611 max_units = (chip_rev < 8) ? 255 : 65535;
612 break;
613 case IT8716_ID:
614 case IT8726_ID:
615 max_units = 65535;
616 break;
617 case IT8718_ID:
618 case IT8720_ID:
619 case IT8721_ID:
620 max_units = 65535;
621 try_gameport = 0;
622 break;
623 case IT8705_ID:
624 pr_err("Unsupported Chip found, Chip %04x Revision %02x\n",
625 chip_type, chip_rev);
626 return -ENODEV;
627 case NO_DEV_ID:
628 pr_err("no device\n");
629 return -ENODEV;
630 default:
631 pr_err("Unknown Chip found, Chip %04x Revision %04x\n",
632 chip_type, chip_rev);
633 return -ENODEV;
634 }
635
636 rc = superio_enter();
637 if (rc)
638 return rc;
639
640 superio_select(GPIO);
641 superio_outb(WDT_TOV1, WDTCFG);
642 superio_outb(0x00, WDTCTRL);
643
644 /* First try to get Gameport support */
645 if (try_gameport) {
646 superio_select(GAMEPORT);
647 base = superio_inw(BASEREG);
648 if (!base) {
649 base = GP_BASE_DEFAULT;
650 superio_outw(base, BASEREG);
651 }
652 gpact = superio_inb(ACTREG);
653 superio_outb(0x01, ACTREG);
654 if (request_region(base, 1, WATCHDOG_NAME))
655 set_bit(WDTS_USE_GP, &wdt_status);
656 else
657 gp_rreq_fail = 1;
658 }
659
660 /* If we haven't Gameport support, try to get CIR support */
661 if (!test_bit(WDTS_USE_GP, &wdt_status)) {
662 if (!request_region(CIR_BASE, 8, WATCHDOG_NAME)) {
663 if (gp_rreq_fail)
664 pr_err("I/O Address 0x%04x and 0x%04x already in use\n",
665 base, CIR_BASE);
666 else
667 pr_err("I/O Address 0x%04x already in use\n",
668 CIR_BASE);
669 rc = -EIO;
670 goto err_out;
671 }
672 base = CIR_BASE;
673
674 superio_select(CIR);
675 superio_outw(base, BASEREG);
676 superio_outb(0x00, CIR_ILS);
677 ciract = superio_inb(ACTREG);
678 superio_outb(0x01, ACTREG);
679 if (gp_rreq_fail) {
680 superio_select(GAMEPORT);
681 superio_outb(gpact, ACTREG);
682 }
683 }
684
685 if (timeout < 1 || timeout > max_units * 60) {
686 timeout = DEFAULT_TIMEOUT;
687 pr_warn("Timeout value out of range, use default %d sec\n",
688 DEFAULT_TIMEOUT);
689 }
690
691 if (timeout > max_units)
692 timeout = wdt_round_time(timeout);
693
694 rc = register_reboot_notifier(&wdt_notifier);
695 if (rc) {
696 pr_err("Cannot register reboot notifier (err=%d)\n", rc);
697 goto err_out_region;
698 }
699
700 rc = misc_register(&wdt_miscdev);
701 if (rc) {
702 pr_err("Cannot register miscdev on minor=%d (err=%d)\n",
703 wdt_miscdev.minor, rc);
704 goto err_out_reboot;
705 }
706
707 /* Initialize CIR to use it as keepalive source */
708 if (!test_bit(WDTS_USE_GP, &wdt_status)) {
709 outb(0x00, CIR_RCR(base));
710 outb(0xc0, CIR_TCR1(base));
711 outb(0x5c, CIR_TCR2(base));
712 outb(0x10, CIR_IER(base));
713 outb(0x00, CIR_BDHR(base));
714 outb(0x01, CIR_BDLR(base));
715 outb(0x09, CIR_IER(base));
716 }
717
718 pr_info("Chip IT%04x revision %d initialized. timeout=%d sec (nowayout=%d testmode=%d exclusive=%d nogameport=%d)\n",
719 chip_type, chip_rev, timeout,
720 nowayout, testmode, exclusive, nogameport);
721
722 superio_exit();
723 return 0;
724
725 err_out_reboot:
726 unregister_reboot_notifier(&wdt_notifier);
727 err_out_region:
728 release_region(base, test_bit(WDTS_USE_GP, &wdt_status) ? 1 : 8);
729 if (!test_bit(WDTS_USE_GP, &wdt_status)) {
730 superio_select(CIR);
731 superio_outb(ciract, ACTREG);
732 }
733 err_out:
734 if (try_gameport) {
735 superio_select(GAMEPORT);
736 superio_outb(gpact, ACTREG);
737 }
738
739 superio_exit();
740 return rc;
741 }
742
743 static void __exit it87_wdt_exit(void)
744 {
745 if (superio_enter() == 0) {
746 superio_select(GPIO);
747 superio_outb(0x00, WDTCTRL);
748 superio_outb(0x00, WDTCFG);
749 superio_outb(0x00, WDTVALLSB);
750 if (max_units > 255)
751 superio_outb(0x00, WDTVALMSB);
752 if (test_bit(WDTS_USE_GP, &wdt_status)) {
753 superio_select(GAMEPORT);
754 superio_outb(gpact, ACTREG);
755 } else {
756 superio_select(CIR);
757 superio_outb(ciract, ACTREG);
758 }
759 superio_exit();
760 }
761
762 misc_deregister(&wdt_miscdev);
763 unregister_reboot_notifier(&wdt_notifier);
764 release_region(base, test_bit(WDTS_USE_GP, &wdt_status) ? 1 : 8);
765 }
766
767 module_init(it87_wdt_init);
768 module_exit(it87_wdt_exit);
769
770 MODULE_AUTHOR("Oliver Schuster");
771 MODULE_DESCRIPTION("Hardware Watchdog Device Driver for IT87xx EC-LPC I/O");
772 MODULE_LICENSE("GPL");
773 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
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