4 * Watchdog driver for the TI OMAP 16xx & 24xx/34xx 32KHz (non-secure) watchdog
6 * Author: MontaVista Software, Inc.
7 * <gdavis@mvista.com> or <source@mvista.com>
9 * 2003 (c) MontaVista Software, Inc. This file is licensed under the
10 * terms of the GNU General Public License version 2. This program is
11 * licensed "as is" without any warranty of any kind, whether express
16 * 20030527: George G. Davis <gdavis@mvista.com>
17 * Initially based on linux-2.4.19-rmk7-pxa1/drivers/char/sa1100_wdt.c
18 * (c) Copyright 2000 Oleg Drokin <green@crimea.edu>
19 * Based on SoftDog driver by Alan Cox <alan@lxorguk.ukuu.org.uk>
21 * Copyright (c) 2004 Texas Instruments.
22 * 1. Modified to support OMAP1610 32-KHz watchdog timer
23 * 2. Ported to 2.6 kernel
25 * Copyright (c) 2005 David Brownell
26 * Use the driver model and standard identifiers; handle bigger timeouts.
29 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
31 #include <linux/module.h>
32 #include <linux/types.h>
33 #include <linux/kernel.h>
36 #include <linux/miscdevice.h>
37 #include <linux/watchdog.h>
38 #include <linux/reboot.h>
39 #include <linux/init.h>
40 #include <linux/err.h>
41 #include <linux/platform_device.h>
42 #include <linux/moduleparam.h>
43 #include <linux/bitops.h>
45 #include <linux/uaccess.h>
46 #include <linux/slab.h>
47 #include <linux/pm_runtime.h>
48 #include <mach/hardware.h>
49 #include <plat/prcm.h>
53 static struct platform_device
*omap_wdt_dev
;
55 static unsigned timer_margin
;
56 module_param(timer_margin
, uint
, 0);
57 MODULE_PARM_DESC(timer_margin
, "initial watchdog timeout (in seconds)");
59 static unsigned int wdt_trgr_pattern
= 0x1234;
60 static DEFINE_SPINLOCK(wdt_lock
);
63 void __iomem
*base
; /* physical */
67 struct miscdevice omap_wdt_miscdev
;
70 static void omap_wdt_ping(struct omap_wdt_dev
*wdev
)
72 void __iomem
*base
= wdev
->base
;
74 /* wait for posted write to complete */
75 while ((__raw_readl(base
+ OMAP_WATCHDOG_WPS
)) & 0x08)
78 wdt_trgr_pattern
= ~wdt_trgr_pattern
;
79 __raw_writel(wdt_trgr_pattern
, (base
+ OMAP_WATCHDOG_TGR
));
81 /* wait for posted write to complete */
82 while ((__raw_readl(base
+ OMAP_WATCHDOG_WPS
)) & 0x08)
84 /* reloaded WCRR from WLDR */
87 static void omap_wdt_enable(struct omap_wdt_dev
*wdev
)
89 void __iomem
*base
= wdev
->base
;
91 /* Sequence to enable the watchdog */
92 __raw_writel(0xBBBB, base
+ OMAP_WATCHDOG_SPR
);
93 while ((__raw_readl(base
+ OMAP_WATCHDOG_WPS
)) & 0x10)
96 __raw_writel(0x4444, base
+ OMAP_WATCHDOG_SPR
);
97 while ((__raw_readl(base
+ OMAP_WATCHDOG_WPS
)) & 0x10)
101 static void omap_wdt_disable(struct omap_wdt_dev
*wdev
)
103 void __iomem
*base
= wdev
->base
;
105 /* sequence required to disable watchdog */
106 __raw_writel(0xAAAA, base
+ OMAP_WATCHDOG_SPR
); /* TIMER_MODE */
107 while (__raw_readl(base
+ OMAP_WATCHDOG_WPS
) & 0x10)
110 __raw_writel(0x5555, base
+ OMAP_WATCHDOG_SPR
); /* TIMER_MODE */
111 while (__raw_readl(base
+ OMAP_WATCHDOG_WPS
) & 0x10)
115 static void omap_wdt_adjust_timeout(unsigned new_timeout
)
117 if (new_timeout
< TIMER_MARGIN_MIN
)
118 new_timeout
= TIMER_MARGIN_DEFAULT
;
119 if (new_timeout
> TIMER_MARGIN_MAX
)
120 new_timeout
= TIMER_MARGIN_MAX
;
121 timer_margin
= new_timeout
;
124 static void omap_wdt_set_timeout(struct omap_wdt_dev
*wdev
)
126 u32 pre_margin
= GET_WLDR_VAL(timer_margin
);
127 void __iomem
*base
= wdev
->base
;
129 pm_runtime_get_sync(wdev
->dev
);
131 /* just count up at 32 KHz */
132 while (__raw_readl(base
+ OMAP_WATCHDOG_WPS
) & 0x04)
135 __raw_writel(pre_margin
, base
+ OMAP_WATCHDOG_LDR
);
136 while (__raw_readl(base
+ OMAP_WATCHDOG_WPS
) & 0x04)
139 pm_runtime_put_sync(wdev
->dev
);
143 * Allow only one task to hold it open
145 static int omap_wdt_open(struct inode
*inode
, struct file
*file
)
147 struct omap_wdt_dev
*wdev
= platform_get_drvdata(omap_wdt_dev
);
148 void __iomem
*base
= wdev
->base
;
150 if (test_and_set_bit(1, (unsigned long *)&(wdev
->omap_wdt_users
)))
153 pm_runtime_get_sync(wdev
->dev
);
155 /* initialize prescaler */
156 while (__raw_readl(base
+ OMAP_WATCHDOG_WPS
) & 0x01)
159 __raw_writel((1 << 5) | (PTV
<< 2), base
+ OMAP_WATCHDOG_CNTRL
);
160 while (__raw_readl(base
+ OMAP_WATCHDOG_WPS
) & 0x01)
163 file
->private_data
= (void *) wdev
;
165 omap_wdt_set_timeout(wdev
);
166 omap_wdt_ping(wdev
); /* trigger loading of new timeout value */
167 omap_wdt_enable(wdev
);
169 pm_runtime_put_sync(wdev
->dev
);
171 return nonseekable_open(inode
, file
);
174 static int omap_wdt_release(struct inode
*inode
, struct file
*file
)
176 struct omap_wdt_dev
*wdev
= file
->private_data
;
179 * Shut off the timer unless NOWAYOUT is defined.
181 #ifndef CONFIG_WATCHDOG_NOWAYOUT
182 pm_runtime_get_sync(wdev
->dev
);
184 omap_wdt_disable(wdev
);
186 pm_runtime_put_sync(wdev
->dev
);
188 pr_crit("Unexpected close, not stopping!\n");
190 wdev
->omap_wdt_users
= 0;
195 static ssize_t
omap_wdt_write(struct file
*file
, const char __user
*data
,
196 size_t len
, loff_t
*ppos
)
198 struct omap_wdt_dev
*wdev
= file
->private_data
;
200 /* Refresh LOAD_TIME. */
202 pm_runtime_get_sync(wdev
->dev
);
203 spin_lock(&wdt_lock
);
205 spin_unlock(&wdt_lock
);
206 pm_runtime_put_sync(wdev
->dev
);
211 static long omap_wdt_ioctl(struct file
*file
, unsigned int cmd
,
214 struct omap_wdt_dev
*wdev
;
216 static const struct watchdog_info ident
= {
217 .identity
= "OMAP Watchdog",
218 .options
= WDIOF_SETTIMEOUT
,
219 .firmware_version
= 0,
222 wdev
= file
->private_data
;
225 case WDIOC_GETSUPPORT
:
226 return copy_to_user((struct watchdog_info __user
*)arg
, &ident
,
228 case WDIOC_GETSTATUS
:
229 return put_user(0, (int __user
*)arg
);
230 case WDIOC_GETBOOTSTATUS
:
231 if (cpu_is_omap16xx())
232 return put_user(__raw_readw(ARM_SYSST
),
234 if (cpu_is_omap24xx())
235 return put_user(omap_prcm_get_reset_sources(),
237 return put_user(0, (int __user
*)arg
);
238 case WDIOC_KEEPALIVE
:
239 pm_runtime_get_sync(wdev
->dev
);
240 spin_lock(&wdt_lock
);
242 spin_unlock(&wdt_lock
);
243 pm_runtime_put_sync(wdev
->dev
);
245 case WDIOC_SETTIMEOUT
:
246 if (get_user(new_margin
, (int __user
*)arg
))
248 omap_wdt_adjust_timeout(new_margin
);
250 pm_runtime_get_sync(wdev
->dev
);
251 spin_lock(&wdt_lock
);
252 omap_wdt_disable(wdev
);
253 omap_wdt_set_timeout(wdev
);
254 omap_wdt_enable(wdev
);
257 spin_unlock(&wdt_lock
);
258 pm_runtime_put_sync(wdev
->dev
);
260 case WDIOC_GETTIMEOUT
:
261 return put_user(timer_margin
, (int __user
*)arg
);
267 static const struct file_operations omap_wdt_fops
= {
268 .owner
= THIS_MODULE
,
269 .write
= omap_wdt_write
,
270 .unlocked_ioctl
= omap_wdt_ioctl
,
271 .open
= omap_wdt_open
,
272 .release
= omap_wdt_release
,
276 static int __devinit
omap_wdt_probe(struct platform_device
*pdev
)
278 struct resource
*res
, *mem
;
279 struct omap_wdt_dev
*wdev
;
282 /* reserve static register mappings */
283 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
286 goto err_get_resource
;
294 mem
= request_mem_region(res
->start
, resource_size(res
), pdev
->name
);
300 wdev
= kzalloc(sizeof(struct omap_wdt_dev
), GFP_KERNEL
);
306 wdev
->omap_wdt_users
= 0;
308 wdev
->dev
= &pdev
->dev
;
310 wdev
->base
= ioremap(res
->start
, resource_size(res
));
316 platform_set_drvdata(pdev
, wdev
);
318 pm_runtime_enable(wdev
->dev
);
319 pm_runtime_get_sync(wdev
->dev
);
321 omap_wdt_disable(wdev
);
322 omap_wdt_adjust_timeout(timer_margin
);
324 wdev
->omap_wdt_miscdev
.parent
= &pdev
->dev
;
325 wdev
->omap_wdt_miscdev
.minor
= WATCHDOG_MINOR
;
326 wdev
->omap_wdt_miscdev
.name
= "watchdog";
327 wdev
->omap_wdt_miscdev
.fops
= &omap_wdt_fops
;
329 ret
= misc_register(&(wdev
->omap_wdt_miscdev
));
333 pr_info("OMAP Watchdog Timer Rev 0x%02x: initial timeout %d sec\n",
334 __raw_readl(wdev
->base
+ OMAP_WATCHDOG_REV
) & 0xFF,
337 pm_runtime_put_sync(wdev
->dev
);
344 pm_runtime_disable(wdev
->dev
);
345 platform_set_drvdata(pdev
, NULL
);
353 release_mem_region(res
->start
, resource_size(res
));
361 static void omap_wdt_shutdown(struct platform_device
*pdev
)
363 struct omap_wdt_dev
*wdev
= platform_get_drvdata(pdev
);
365 if (wdev
->omap_wdt_users
) {
366 pm_runtime_get_sync(wdev
->dev
);
367 omap_wdt_disable(wdev
);
368 pm_runtime_put_sync(wdev
->dev
);
372 static int __devexit
omap_wdt_remove(struct platform_device
*pdev
)
374 struct omap_wdt_dev
*wdev
= platform_get_drvdata(pdev
);
375 struct resource
*res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
377 pm_runtime_disable(wdev
->dev
);
381 misc_deregister(&(wdev
->omap_wdt_miscdev
));
382 release_mem_region(res
->start
, resource_size(res
));
383 platform_set_drvdata(pdev
, NULL
);
395 /* REVISIT ... not clear this is the best way to handle system suspend; and
396 * it's very inappropriate for selective device suspend (e.g. suspending this
397 * through sysfs rather than by stopping the watchdog daemon). Also, this
398 * may not play well enough with NOWAYOUT...
401 static int omap_wdt_suspend(struct platform_device
*pdev
, pm_message_t state
)
403 struct omap_wdt_dev
*wdev
= platform_get_drvdata(pdev
);
405 if (wdev
->omap_wdt_users
) {
406 pm_runtime_get_sync(wdev
->dev
);
407 omap_wdt_disable(wdev
);
408 pm_runtime_put_sync(wdev
->dev
);
414 static int omap_wdt_resume(struct platform_device
*pdev
)
416 struct omap_wdt_dev
*wdev
= platform_get_drvdata(pdev
);
418 if (wdev
->omap_wdt_users
) {
419 pm_runtime_get_sync(wdev
->dev
);
420 omap_wdt_enable(wdev
);
422 pm_runtime_put_sync(wdev
->dev
);
429 #define omap_wdt_suspend NULL
430 #define omap_wdt_resume NULL
433 static const struct of_device_id omap_wdt_of_match
[] = {
434 { .compatible
= "ti,omap3-wdt", },
437 MODULE_DEVICE_TABLE(of
, omap_wdt_of_match
);
439 static struct platform_driver omap_wdt_driver
= {
440 .probe
= omap_wdt_probe
,
441 .remove
= __devexit_p(omap_wdt_remove
),
442 .shutdown
= omap_wdt_shutdown
,
443 .suspend
= omap_wdt_suspend
,
444 .resume
= omap_wdt_resume
,
446 .owner
= THIS_MODULE
,
448 .of_match_table
= omap_wdt_of_match
,
452 module_platform_driver(omap_wdt_driver
);
454 MODULE_AUTHOR("George G. Davis");
455 MODULE_LICENSE("GPL");
456 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR
);
457 MODULE_ALIAS("platform:omap_wdt");